]>
Commit | Line | Data |
---|---|---|
83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
aa0c7a86 | 2 | /* |
4acd2d24 | 3 | * Image manipulator for Marvell SoCs |
8010f4ff T |
4 | * supports Kirkwood, Dove, Armada 370, Armada XP, Armada 375, Armada 38x and |
5 | * Armada 39x | |
4acd2d24 SR |
6 | * |
7 | * (C) Copyright 2013 Thomas Petazzoni | |
8 | * <thomas.petazzoni@free-electrons.com> | |
43558a02 T |
9 | * |
10 | * (C) Copyright 2022 Pali Rohár <pali@kernel.org> | |
aa0c7a86 PW |
11 | */ |
12 | ||
3a8b9199 HS |
13 | #define OPENSSL_API_COMPAT 0x10101000L |
14 | ||
f86ed6a8 | 15 | #include "imagetool.h" |
e5f1a586 | 16 | #include <limits.h> |
aa0c7a86 | 17 | #include <image.h> |
a1b6b0a9 | 18 | #include <stdarg.h> |
4acd2d24 | 19 | #include <stdint.h> |
aa0c7a86 PW |
20 | #include "kwbimage.h" |
21 | ||
e15843b1 | 22 | #include <openssl/bn.h> |
a1b6b0a9 MS |
23 | #include <openssl/rsa.h> |
24 | #include <openssl/pem.h> | |
25 | #include <openssl/err.h> | |
26 | #include <openssl/evp.h> | |
e15843b1 | 27 | |
a2d5efd7 JG |
28 | #if OPENSSL_VERSION_NUMBER < 0x10100000L || \ |
29 | (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x2070000fL) | |
e15843b1 JW |
30 | static void RSA_get0_key(const RSA *r, |
31 | const BIGNUM **n, const BIGNUM **e, const BIGNUM **d) | |
32 | { | |
33 | if (n != NULL) | |
34 | *n = r->n; | |
35 | if (e != NULL) | |
36 | *e = r->e; | |
37 | if (d != NULL) | |
38 | *d = r->d; | |
39 | } | |
40 | ||
a2d5efd7 | 41 | #elif !defined(LIBRESSL_VERSION_NUMBER) |
e15843b1 JW |
42 | void EVP_MD_CTX_cleanup(EVP_MD_CTX *ctx) |
43 | { | |
44 | EVP_MD_CTX_reset(ctx); | |
45 | } | |
46 | #endif | |
a1b6b0a9 | 47 | |
f76ae257 T |
48 | /* fls - find last (most-significant) bit set in 4-bit integer */ |
49 | static inline int fls4(int num) | |
50 | { | |
51 | if (num & 0x8) | |
52 | return 4; | |
53 | else if (num & 0x4) | |
54 | return 3; | |
55 | else if (num & 0x2) | |
56 | return 2; | |
57 | else if (num & 0x1) | |
58 | return 1; | |
59 | else | |
60 | return 0; | |
61 | } | |
62 | ||
4acd2d24 SR |
63 | static struct image_cfg_element *image_cfg; |
64 | static int cfgn; | |
a1b6b0a9 | 65 | static int verbose_mode; |
4acd2d24 SR |
66 | |
67 | struct boot_mode { | |
68 | unsigned int id; | |
69 | const char *name; | |
70 | }; | |
71 | ||
a1b6b0a9 MS |
72 | /* |
73 | * SHA2-256 hash | |
74 | */ | |
75 | struct hash_v1 { | |
76 | uint8_t hash[32]; | |
77 | }; | |
78 | ||
4acd2d24 | 79 | struct boot_mode boot_modes[] = { |
e515a330 T |
80 | { IBR_HDR_I2C_ID, "i2c" }, |
81 | { IBR_HDR_SPI_ID, "spi" }, | |
82 | { IBR_HDR_NAND_ID, "nand" }, | |
83 | { IBR_HDR_SATA_ID, "sata" }, | |
84 | { IBR_HDR_PEX_ID, "pex" }, | |
85 | { IBR_HDR_UART_ID, "uart" }, | |
86 | { IBR_HDR_SDIO_ID, "sdio" }, | |
4acd2d24 | 87 | {}, |
aa0c7a86 PW |
88 | }; |
89 | ||
4acd2d24 SR |
90 | struct nand_ecc_mode { |
91 | unsigned int id; | |
92 | const char *name; | |
93 | }; | |
94 | ||
95 | struct nand_ecc_mode nand_ecc_modes[] = { | |
e515a330 T |
96 | { IBR_HDR_ECC_DEFAULT, "default" }, |
97 | { IBR_HDR_ECC_FORCED_HAMMING, "hamming" }, | |
98 | { IBR_HDR_ECC_FORCED_RS, "rs" }, | |
99 | { IBR_HDR_ECC_DISABLED, "disabled" }, | |
4acd2d24 SR |
100 | {}, |
101 | }; | |
102 | ||
103 | /* Used to identify an undefined execution or destination address */ | |
104 | #define ADDR_INVALID ((uint32_t)-1) | |
105 | ||
6c7f152e | 106 | #define BINARY_MAX_ARGS 255 |
4acd2d24 SR |
107 | |
108 | /* In-memory representation of a line of the configuration file */ | |
4991b4f7 MS |
109 | |
110 | enum image_cfg_type { | |
111 | IMAGE_CFG_VERSION = 0x1, | |
112 | IMAGE_CFG_BOOT_FROM, | |
113 | IMAGE_CFG_DEST_ADDR, | |
114 | IMAGE_CFG_EXEC_ADDR, | |
115 | IMAGE_CFG_NAND_BLKSZ, | |
116 | IMAGE_CFG_NAND_BADBLK_LOCATION, | |
117 | IMAGE_CFG_NAND_ECC_MODE, | |
118 | IMAGE_CFG_NAND_PAGESZ, | |
af49605b | 119 | IMAGE_CFG_CPU, |
4991b4f7 | 120 | IMAGE_CFG_BINARY, |
4991b4f7 | 121 | IMAGE_CFG_DATA, |
f63c583f | 122 | IMAGE_CFG_DATA_DELAY, |
4991b4f7 | 123 | IMAGE_CFG_BAUDRATE, |
12f2c03f T |
124 | IMAGE_CFG_UART_PORT, |
125 | IMAGE_CFG_UART_MPP, | |
4991b4f7 | 126 | IMAGE_CFG_DEBUG, |
a1b6b0a9 MS |
127 | IMAGE_CFG_KAK, |
128 | IMAGE_CFG_CSK, | |
129 | IMAGE_CFG_CSK_INDEX, | |
130 | IMAGE_CFG_JTAG_DELAY, | |
131 | IMAGE_CFG_BOX_ID, | |
132 | IMAGE_CFG_FLASH_ID, | |
133 | IMAGE_CFG_SEC_COMMON_IMG, | |
134 | IMAGE_CFG_SEC_SPECIALIZED_IMG, | |
135 | IMAGE_CFG_SEC_BOOT_DEV, | |
136 | IMAGE_CFG_SEC_FUSE_DUMP, | |
4991b4f7 MS |
137 | |
138 | IMAGE_CFG_COUNT | |
139 | } type; | |
140 | ||
141 | static const char * const id_strs[] = { | |
142 | [IMAGE_CFG_VERSION] = "VERSION", | |
143 | [IMAGE_CFG_BOOT_FROM] = "BOOT_FROM", | |
144 | [IMAGE_CFG_DEST_ADDR] = "DEST_ADDR", | |
145 | [IMAGE_CFG_EXEC_ADDR] = "EXEC_ADDR", | |
146 | [IMAGE_CFG_NAND_BLKSZ] = "NAND_BLKSZ", | |
147 | [IMAGE_CFG_NAND_BADBLK_LOCATION] = "NAND_BADBLK_LOCATION", | |
148 | [IMAGE_CFG_NAND_ECC_MODE] = "NAND_ECC_MODE", | |
149 | [IMAGE_CFG_NAND_PAGESZ] = "NAND_PAGE_SIZE", | |
af49605b | 150 | [IMAGE_CFG_CPU] = "CPU", |
4991b4f7 | 151 | [IMAGE_CFG_BINARY] = "BINARY", |
4991b4f7 | 152 | [IMAGE_CFG_DATA] = "DATA", |
f63c583f | 153 | [IMAGE_CFG_DATA_DELAY] = "DATA_DELAY", |
4991b4f7 | 154 | [IMAGE_CFG_BAUDRATE] = "BAUDRATE", |
12f2c03f T |
155 | [IMAGE_CFG_UART_PORT] = "UART_PORT", |
156 | [IMAGE_CFG_UART_MPP] = "UART_MPP", | |
4991b4f7 | 157 | [IMAGE_CFG_DEBUG] = "DEBUG", |
a1b6b0a9 MS |
158 | [IMAGE_CFG_KAK] = "KAK", |
159 | [IMAGE_CFG_CSK] = "CSK", | |
160 | [IMAGE_CFG_CSK_INDEX] = "CSK_INDEX", | |
161 | [IMAGE_CFG_JTAG_DELAY] = "JTAG_DELAY", | |
162 | [IMAGE_CFG_BOX_ID] = "BOX_ID", | |
163 | [IMAGE_CFG_FLASH_ID] = "FLASH_ID", | |
164 | [IMAGE_CFG_SEC_COMMON_IMG] = "SEC_COMMON_IMG", | |
165 | [IMAGE_CFG_SEC_SPECIALIZED_IMG] = "SEC_SPECIALIZED_IMG", | |
166 | [IMAGE_CFG_SEC_BOOT_DEV] = "SEC_BOOT_DEV", | |
167 | [IMAGE_CFG_SEC_FUSE_DUMP] = "SEC_FUSE_DUMP" | |
4991b4f7 MS |
168 | }; |
169 | ||
4acd2d24 | 170 | struct image_cfg_element { |
4991b4f7 | 171 | enum image_cfg_type type; |
4acd2d24 SR |
172 | union { |
173 | unsigned int version; | |
af49605b | 174 | unsigned int cpu_sheeva; |
4acd2d24 SR |
175 | unsigned int bootfrom; |
176 | struct { | |
177 | const char *file; | |
0aca27ea | 178 | unsigned int loadaddr; |
4acd2d24 SR |
179 | unsigned int args[BINARY_MAX_ARGS]; |
180 | unsigned int nargs; | |
181 | } binary; | |
4acd2d24 SR |
182 | unsigned int dstaddr; |
183 | unsigned int execaddr; | |
184 | unsigned int nandblksz; | |
185 | unsigned int nandbadblklocation; | |
186 | unsigned int nandeccmode; | |
187 | unsigned int nandpagesz; | |
188 | struct ext_hdr_v0_reg regdata; | |
f63c583f | 189 | unsigned int regdata_delay; |
4bdb5479 | 190 | unsigned int baudrate; |
12f2c03f T |
191 | unsigned int uart_port; |
192 | unsigned int uart_mpp; | |
2611c05e | 193 | unsigned int debug; |
a1b6b0a9 MS |
194 | const char *key_name; |
195 | int csk_idx; | |
196 | uint8_t jtag_delay; | |
197 | uint32_t boxid; | |
198 | uint32_t flashid; | |
199 | bool sec_specialized_img; | |
200 | unsigned int sec_boot_dev; | |
201 | const char *name; | |
4acd2d24 SR |
202 | }; |
203 | }; | |
204 | ||
205 | #define IMAGE_CFG_ELEMENT_MAX 256 | |
aa0c7a86 | 206 | |
4acd2d24 SR |
207 | /* |
208 | * Utility functions to manipulate boot mode and ecc modes (convert | |
209 | * them back and forth between description strings and the | |
210 | * corresponding numerical identifiers). | |
211 | */ | |
212 | ||
213 | static const char *image_boot_mode_name(unsigned int id) | |
214 | { | |
215 | int i; | |
94490a4a | 216 | |
4acd2d24 SR |
217 | for (i = 0; boot_modes[i].name; i++) |
218 | if (boot_modes[i].id == id) | |
219 | return boot_modes[i].name; | |
220 | return NULL; | |
221 | } | |
222 | ||
6eb20bbf | 223 | static int image_boot_mode_id(const char *boot_mode_name) |
4acd2d24 SR |
224 | { |
225 | int i; | |
94490a4a | 226 | |
4acd2d24 SR |
227 | for (i = 0; boot_modes[i].name; i++) |
228 | if (!strcmp(boot_modes[i].name, boot_mode_name)) | |
229 | return boot_modes[i].id; | |
230 | ||
231 | return -1; | |
232 | } | |
233 | ||
1a8e6b63 T |
234 | static const char *image_nand_ecc_mode_name(unsigned int id) |
235 | { | |
236 | int i; | |
237 | ||
238 | for (i = 0; nand_ecc_modes[i].name; i++) | |
239 | if (nand_ecc_modes[i].id == id) | |
240 | return nand_ecc_modes[i].name; | |
241 | ||
242 | return NULL; | |
243 | } | |
244 | ||
6eb20bbf | 245 | static int image_nand_ecc_mode_id(const char *nand_ecc_mode_name) |
4acd2d24 SR |
246 | { |
247 | int i; | |
94490a4a | 248 | |
4acd2d24 SR |
249 | for (i = 0; nand_ecc_modes[i].name; i++) |
250 | if (!strcmp(nand_ecc_modes[i].name, nand_ecc_mode_name)) | |
251 | return nand_ecc_modes[i].id; | |
252 | return -1; | |
aa0c7a86 PW |
253 | } |
254 | ||
4acd2d24 SR |
255 | static struct image_cfg_element * |
256 | image_find_option(unsigned int optiontype) | |
aa0c7a86 | 257 | { |
4acd2d24 | 258 | int i; |
aa0c7a86 | 259 | |
4acd2d24 SR |
260 | for (i = 0; i < cfgn; i++) { |
261 | if (image_cfg[i].type == optiontype) | |
262 | return &image_cfg[i]; | |
aa0c7a86 | 263 | } |
4acd2d24 SR |
264 | |
265 | return NULL; | |
266 | } | |
267 | ||
268 | static unsigned int | |
269 | image_count_options(unsigned int optiontype) | |
270 | { | |
271 | int i; | |
272 | unsigned int count = 0; | |
273 | ||
274 | for (i = 0; i < cfgn; i++) | |
275 | if (image_cfg[i].type == optiontype) | |
276 | count++; | |
277 | ||
278 | return count; | |
aa0c7a86 PW |
279 | } |
280 | ||
a1b6b0a9 MS |
281 | static int image_get_csk_index(void) |
282 | { | |
283 | struct image_cfg_element *e; | |
284 | ||
285 | e = image_find_option(IMAGE_CFG_CSK_INDEX); | |
286 | if (!e) | |
287 | return -1; | |
288 | ||
289 | return e->csk_idx; | |
290 | } | |
291 | ||
292 | static bool image_get_spezialized_img(void) | |
293 | { | |
294 | struct image_cfg_element *e; | |
295 | ||
296 | e = image_find_option(IMAGE_CFG_SEC_SPECIALIZED_IMG); | |
297 | if (!e) | |
298 | return false; | |
299 | ||
300 | return e->sec_specialized_img; | |
301 | } | |
302 | ||
d1547b36 T |
303 | static int image_get_bootfrom(void) |
304 | { | |
305 | struct image_cfg_element *e; | |
306 | ||
307 | e = image_find_option(IMAGE_CFG_BOOT_FROM); | |
308 | if (!e) | |
309 | /* fallback to SPI if no BOOT_FROM is not provided */ | |
310 | return IBR_HDR_SPI_ID; | |
311 | ||
312 | return e->bootfrom; | |
313 | } | |
314 | ||
af49605b T |
315 | static int image_is_cpu_sheeva(void) |
316 | { | |
317 | struct image_cfg_element *e; | |
318 | ||
319 | e = image_find_option(IMAGE_CFG_CPU); | |
320 | if (!e) | |
321 | return 0; | |
322 | ||
323 | return e->cpu_sheeva; | |
324 | } | |
325 | ||
aa0c7a86 | 326 | /* |
4acd2d24 SR |
327 | * Compute a 8-bit checksum of a memory area. This algorithm follows |
328 | * the requirements of the Marvell SoC BootROM specifications. | |
aa0c7a86 | 329 | */ |
4acd2d24 | 330 | static uint8_t image_checksum8(void *start, uint32_t len) |
aa0c7a86 | 331 | { |
4acd2d24 SR |
332 | uint8_t csum = 0; |
333 | uint8_t *p = start; | |
aa0c7a86 PW |
334 | |
335 | /* check len and return zero checksum if invalid */ | |
336 | if (!len) | |
337 | return 0; | |
338 | ||
339 | do { | |
4acd2d24 | 340 | csum += *p; |
aa0c7a86 PW |
341 | p++; |
342 | } while (--len); | |
4acd2d24 SR |
343 | |
344 | return csum; | |
aa0c7a86 PW |
345 | } |
346 | ||
db7cd4ed BS |
347 | /* |
348 | * Verify checksum over a complete header that includes the checksum field. | |
349 | * Return 1 when OK, otherwise 0. | |
350 | */ | |
351 | static int main_hdr_checksum_ok(void *hdr) | |
352 | { | |
353 | /* Offsets of checksum in v0 and v1 headers are the same */ | |
354 | struct main_hdr_v0 *main_hdr = (struct main_hdr_v0 *)hdr; | |
355 | uint8_t checksum; | |
356 | ||
fe2fd73d | 357 | checksum = image_checksum8(hdr, kwbheader_size_for_csum(hdr)); |
db7cd4ed BS |
358 | /* Calculated checksum includes the header checksum field. Compensate |
359 | * for that. | |
360 | */ | |
361 | checksum -= main_hdr->checksum; | |
362 | ||
363 | return checksum == main_hdr->checksum; | |
364 | } | |
365 | ||
4acd2d24 | 366 | static uint32_t image_checksum32(void *start, uint32_t len) |
aa0c7a86 | 367 | { |
4acd2d24 SR |
368 | uint32_t csum = 0; |
369 | uint32_t *p = start; | |
aa0c7a86 PW |
370 | |
371 | /* check len and return zero checksum if invalid */ | |
372 | if (!len) | |
373 | return 0; | |
374 | ||
375 | if (len % sizeof(uint32_t)) { | |
4acd2d24 SR |
376 | fprintf(stderr, "Length %d is not in multiple of %zu\n", |
377 | len, sizeof(uint32_t)); | |
aa0c7a86 PW |
378 | return 0; |
379 | } | |
380 | ||
381 | do { | |
4acd2d24 | 382 | csum += *p; |
aa0c7a86 PW |
383 | p++; |
384 | len -= sizeof(uint32_t); | |
385 | } while (len > 0); | |
4acd2d24 SR |
386 | |
387 | return csum; | |
aa0c7a86 PW |
388 | } |
389 | ||
1a8e6b63 T |
390 | static unsigned int options_to_baudrate(uint8_t options) |
391 | { | |
392 | switch (options & 0x7) { | |
393 | case MAIN_HDR_V1_OPT_BAUD_2400: | |
394 | return 2400; | |
395 | case MAIN_HDR_V1_OPT_BAUD_4800: | |
396 | return 4800; | |
397 | case MAIN_HDR_V1_OPT_BAUD_9600: | |
398 | return 9600; | |
399 | case MAIN_HDR_V1_OPT_BAUD_19200: | |
400 | return 19200; | |
401 | case MAIN_HDR_V1_OPT_BAUD_38400: | |
402 | return 38400; | |
403 | case MAIN_HDR_V1_OPT_BAUD_57600: | |
404 | return 57600; | |
405 | case MAIN_HDR_V1_OPT_BAUD_115200: | |
406 | return 115200; | |
407 | case MAIN_HDR_V1_OPT_BAUD_DEFAULT: | |
408 | default: | |
409 | return 0; | |
410 | } | |
411 | } | |
412 | ||
4bdb5479 CP |
413 | static uint8_t baudrate_to_option(unsigned int baudrate) |
414 | { | |
415 | switch (baudrate) { | |
416 | case 2400: | |
417 | return MAIN_HDR_V1_OPT_BAUD_2400; | |
418 | case 4800: | |
419 | return MAIN_HDR_V1_OPT_BAUD_4800; | |
420 | case 9600: | |
421 | return MAIN_HDR_V1_OPT_BAUD_9600; | |
422 | case 19200: | |
423 | return MAIN_HDR_V1_OPT_BAUD_19200; | |
424 | case 38400: | |
425 | return MAIN_HDR_V1_OPT_BAUD_38400; | |
426 | case 57600: | |
427 | return MAIN_HDR_V1_OPT_BAUD_57600; | |
428 | case 115200: | |
429 | return MAIN_HDR_V1_OPT_BAUD_115200; | |
430 | default: | |
431 | return MAIN_HDR_V1_OPT_BAUD_DEFAULT; | |
432 | } | |
433 | } | |
434 | ||
a1b6b0a9 MS |
435 | static void kwb_msg(const char *fmt, ...) |
436 | { | |
437 | if (verbose_mode) { | |
438 | va_list ap; | |
439 | ||
440 | va_start(ap, fmt); | |
441 | vfprintf(stdout, fmt, ap); | |
442 | va_end(ap); | |
443 | } | |
444 | } | |
445 | ||
446 | static int openssl_err(const char *msg) | |
447 | { | |
448 | unsigned long ssl_err = ERR_get_error(); | |
449 | ||
450 | fprintf(stderr, "%s", msg); | |
451 | fprintf(stderr, ": %s\n", | |
452 | ERR_error_string(ssl_err, 0)); | |
453 | ||
454 | return -1; | |
455 | } | |
456 | ||
457 | static int kwb_load_rsa_key(const char *keydir, const char *name, RSA **p_rsa) | |
458 | { | |
459 | char path[PATH_MAX]; | |
460 | RSA *rsa; | |
461 | FILE *f; | |
462 | ||
463 | if (!keydir) | |
464 | keydir = "."; | |
465 | ||
466 | snprintf(path, sizeof(path), "%s/%s.key", keydir, name); | |
467 | f = fopen(path, "r"); | |
468 | if (!f) { | |
469 | fprintf(stderr, "Couldn't open RSA private key: '%s': %s\n", | |
470 | path, strerror(errno)); | |
471 | return -ENOENT; | |
472 | } | |
473 | ||
474 | rsa = PEM_read_RSAPrivateKey(f, 0, NULL, ""); | |
475 | if (!rsa) { | |
476 | openssl_err("Failure reading private key"); | |
477 | fclose(f); | |
478 | return -EPROTO; | |
479 | } | |
480 | fclose(f); | |
481 | *p_rsa = rsa; | |
482 | ||
483 | return 0; | |
484 | } | |
485 | ||
486 | static int kwb_load_cfg_key(struct image_tool_params *params, | |
487 | unsigned int cfg_option, const char *key_name, | |
488 | RSA **p_key) | |
489 | { | |
490 | struct image_cfg_element *e_key; | |
491 | RSA *key; | |
492 | int res; | |
493 | ||
494 | *p_key = NULL; | |
495 | ||
496 | e_key = image_find_option(cfg_option); | |
497 | if (!e_key) { | |
498 | fprintf(stderr, "%s not configured\n", key_name); | |
499 | return -ENOENT; | |
500 | } | |
501 | ||
502 | res = kwb_load_rsa_key(params->keydir, e_key->key_name, &key); | |
503 | if (res < 0) { | |
504 | fprintf(stderr, "Failed to load %s\n", key_name); | |
505 | return -ENOENT; | |
506 | } | |
507 | ||
508 | *p_key = key; | |
509 | ||
510 | return 0; | |
511 | } | |
512 | ||
513 | static int kwb_load_kak(struct image_tool_params *params, RSA **p_kak) | |
514 | { | |
515 | return kwb_load_cfg_key(params, IMAGE_CFG_KAK, "KAK", p_kak); | |
516 | } | |
517 | ||
518 | static int kwb_load_csk(struct image_tool_params *params, RSA **p_csk) | |
519 | { | |
520 | return kwb_load_cfg_key(params, IMAGE_CFG_CSK, "CSK", p_csk); | |
521 | } | |
522 | ||
523 | static int kwb_compute_pubkey_hash(struct pubkey_der_v1 *pk, | |
524 | struct hash_v1 *hash) | |
525 | { | |
526 | EVP_MD_CTX *ctx; | |
527 | unsigned int key_size; | |
528 | unsigned int hash_size; | |
529 | int ret = 0; | |
530 | ||
531 | if (!pk || !hash || pk->key[0] != 0x30 || pk->key[1] != 0x82) | |
532 | return -EINVAL; | |
533 | ||
534 | key_size = (pk->key[2] << 8) + pk->key[3] + 4; | |
535 | ||
536 | ctx = EVP_MD_CTX_create(); | |
537 | if (!ctx) | |
538 | return openssl_err("EVP context creation failed"); | |
539 | ||
540 | EVP_MD_CTX_init(ctx); | |
541 | if (!EVP_DigestInit(ctx, EVP_sha256())) { | |
542 | ret = openssl_err("Digest setup failed"); | |
543 | goto hash_err_ctx; | |
544 | } | |
545 | ||
546 | if (!EVP_DigestUpdate(ctx, pk->key, key_size)) { | |
547 | ret = openssl_err("Hashing data failed"); | |
548 | goto hash_err_ctx; | |
549 | } | |
550 | ||
551 | if (!EVP_DigestFinal(ctx, hash->hash, &hash_size)) { | |
552 | ret = openssl_err("Could not obtain hash"); | |
553 | goto hash_err_ctx; | |
554 | } | |
555 | ||
556 | EVP_MD_CTX_cleanup(ctx); | |
557 | ||
558 | hash_err_ctx: | |
559 | EVP_MD_CTX_destroy(ctx); | |
560 | return ret; | |
561 | } | |
562 | ||
563 | static int kwb_import_pubkey(RSA **key, struct pubkey_der_v1 *src, char *keyname) | |
564 | { | |
565 | RSA *rsa; | |
566 | const unsigned char *ptr; | |
567 | ||
568 | if (!key || !src) | |
569 | goto fail; | |
570 | ||
571 | ptr = src->key; | |
572 | rsa = d2i_RSAPublicKey(key, &ptr, sizeof(src->key)); | |
573 | if (!rsa) { | |
574 | openssl_err("error decoding public key"); | |
575 | goto fail; | |
576 | } | |
577 | ||
578 | return 0; | |
579 | fail: | |
580 | fprintf(stderr, "Failed to decode %s pubkey\n", keyname); | |
581 | return -EINVAL; | |
582 | } | |
583 | ||
584 | static int kwb_export_pubkey(RSA *key, struct pubkey_der_v1 *dst, FILE *hashf, | |
585 | char *keyname) | |
586 | { | |
587 | int size_exp, size_mod, size_seq; | |
e15843b1 | 588 | const BIGNUM *key_e, *key_n; |
a1b6b0a9 MS |
589 | uint8_t *cur; |
590 | char *errmsg = "Failed to encode %s\n"; | |
591 | ||
e15843b1 JW |
592 | RSA_get0_key(key, NULL, &key_e, NULL); |
593 | RSA_get0_key(key, &key_n, NULL, NULL); | |
594 | ||
595 | if (!key || !key_e || !key_n || !dst) { | |
a1b6b0a9 | 596 | fprintf(stderr, "export pk failed: (%p, %p, %p, %p)", |
e15843b1 | 597 | key, key_e, key_n, dst); |
a1b6b0a9 MS |
598 | fprintf(stderr, errmsg, keyname); |
599 | return -EINVAL; | |
600 | } | |
601 | ||
602 | /* | |
603 | * According to the specs, the key should be PKCS#1 DER encoded. | |
604 | * But unfortunately the really required encoding seems to be different; | |
605 | * it violates DER...! (But it still conformes to BER.) | |
606 | * (Length always in long form w/ 2 byte length code; no leading zero | |
607 | * when MSB of first byte is set...) | |
608 | * So we cannot use the encoding func provided by OpenSSL and have to | |
609 | * do the encoding manually. | |
610 | */ | |
611 | ||
e15843b1 JW |
612 | size_exp = BN_num_bytes(key_e); |
613 | size_mod = BN_num_bytes(key_n); | |
a1b6b0a9 MS |
614 | size_seq = 4 + size_mod + 4 + size_exp; |
615 | ||
616 | if (size_mod > 256) { | |
617 | fprintf(stderr, "export pk failed: wrong mod size: %d\n", | |
618 | size_mod); | |
619 | fprintf(stderr, errmsg, keyname); | |
620 | return -EINVAL; | |
621 | } | |
622 | ||
623 | if (4 + size_seq > sizeof(dst->key)) { | |
3b5da64e | 624 | fprintf(stderr, "export pk failed: seq too large (%d, %zu)\n", |
a1b6b0a9 MS |
625 | 4 + size_seq, sizeof(dst->key)); |
626 | fprintf(stderr, errmsg, keyname); | |
627 | return -ENOBUFS; | |
628 | } | |
629 | ||
630 | cur = dst->key; | |
631 | ||
632 | /* PKCS#1 (RFC3447) RSAPublicKey structure */ | |
633 | *cur++ = 0x30; /* SEQUENCE */ | |
634 | *cur++ = 0x82; | |
635 | *cur++ = (size_seq >> 8) & 0xFF; | |
636 | *cur++ = size_seq & 0xFF; | |
637 | /* Modulus */ | |
638 | *cur++ = 0x02; /* INTEGER */ | |
639 | *cur++ = 0x82; | |
640 | *cur++ = (size_mod >> 8) & 0xFF; | |
641 | *cur++ = size_mod & 0xFF; | |
e15843b1 | 642 | BN_bn2bin(key_n, cur); |
a1b6b0a9 MS |
643 | cur += size_mod; |
644 | /* Exponent */ | |
645 | *cur++ = 0x02; /* INTEGER */ | |
646 | *cur++ = 0x82; | |
647 | *cur++ = (size_exp >> 8) & 0xFF; | |
648 | *cur++ = size_exp & 0xFF; | |
e15843b1 | 649 | BN_bn2bin(key_e, cur); |
a1b6b0a9 MS |
650 | |
651 | if (hashf) { | |
652 | struct hash_v1 pk_hash; | |
653 | int i; | |
654 | int ret = 0; | |
655 | ||
656 | ret = kwb_compute_pubkey_hash(dst, &pk_hash); | |
657 | if (ret < 0) { | |
658 | fprintf(stderr, errmsg, keyname); | |
659 | return ret; | |
660 | } | |
661 | ||
662 | fprintf(hashf, "SHA256 = "); | |
663 | for (i = 0 ; i < sizeof(pk_hash.hash); ++i) | |
664 | fprintf(hashf, "%02X", pk_hash.hash[i]); | |
665 | fprintf(hashf, "\n"); | |
666 | } | |
667 | ||
668 | return 0; | |
669 | } | |
670 | ||
6eb20bbf T |
671 | static int kwb_sign(RSA *key, void *data, int datasz, struct sig_v1 *sig, |
672 | char *signame) | |
a1b6b0a9 MS |
673 | { |
674 | EVP_PKEY *evp_key; | |
675 | EVP_MD_CTX *ctx; | |
676 | unsigned int sig_size; | |
677 | int size; | |
678 | int ret = 0; | |
679 | ||
680 | evp_key = EVP_PKEY_new(); | |
681 | if (!evp_key) | |
682 | return openssl_err("EVP_PKEY object creation failed"); | |
683 | ||
684 | if (!EVP_PKEY_set1_RSA(evp_key, key)) { | |
685 | ret = openssl_err("EVP key setup failed"); | |
686 | goto err_key; | |
687 | } | |
688 | ||
689 | size = EVP_PKEY_size(evp_key); | |
690 | if (size > sizeof(sig->sig)) { | |
691 | fprintf(stderr, "Buffer to small for signature (%d bytes)\n", | |
692 | size); | |
693 | ret = -ENOBUFS; | |
694 | goto err_key; | |
695 | } | |
696 | ||
697 | ctx = EVP_MD_CTX_create(); | |
698 | if (!ctx) { | |
699 | ret = openssl_err("EVP context creation failed"); | |
700 | goto err_key; | |
701 | } | |
702 | EVP_MD_CTX_init(ctx); | |
703 | if (!EVP_SignInit(ctx, EVP_sha256())) { | |
704 | ret = openssl_err("Signer setup failed"); | |
705 | goto err_ctx; | |
706 | } | |
707 | ||
708 | if (!EVP_SignUpdate(ctx, data, datasz)) { | |
709 | ret = openssl_err("Signing data failed"); | |
710 | goto err_ctx; | |
711 | } | |
712 | ||
713 | if (!EVP_SignFinal(ctx, sig->sig, &sig_size, evp_key)) { | |
714 | ret = openssl_err("Could not obtain signature"); | |
715 | goto err_ctx; | |
716 | } | |
717 | ||
718 | EVP_MD_CTX_cleanup(ctx); | |
719 | EVP_MD_CTX_destroy(ctx); | |
720 | EVP_PKEY_free(evp_key); | |
721 | ||
722 | return 0; | |
723 | ||
724 | err_ctx: | |
725 | EVP_MD_CTX_destroy(ctx); | |
726 | err_key: | |
727 | EVP_PKEY_free(evp_key); | |
728 | fprintf(stderr, "Failed to create %s signature\n", signame); | |
729 | return ret; | |
730 | } | |
731 | ||
6eb20bbf T |
732 | static int kwb_verify(RSA *key, void *data, int datasz, struct sig_v1 *sig, |
733 | char *signame) | |
a1b6b0a9 MS |
734 | { |
735 | EVP_PKEY *evp_key; | |
736 | EVP_MD_CTX *ctx; | |
737 | int size; | |
738 | int ret = 0; | |
739 | ||
740 | evp_key = EVP_PKEY_new(); | |
741 | if (!evp_key) | |
742 | return openssl_err("EVP_PKEY object creation failed"); | |
743 | ||
744 | if (!EVP_PKEY_set1_RSA(evp_key, key)) { | |
745 | ret = openssl_err("EVP key setup failed"); | |
746 | goto err_key; | |
747 | } | |
748 | ||
749 | size = EVP_PKEY_size(evp_key); | |
750 | if (size > sizeof(sig->sig)) { | |
751 | fprintf(stderr, "Invalid signature size (%d bytes)\n", | |
752 | size); | |
753 | ret = -EINVAL; | |
754 | goto err_key; | |
755 | } | |
756 | ||
757 | ctx = EVP_MD_CTX_create(); | |
758 | if (!ctx) { | |
759 | ret = openssl_err("EVP context creation failed"); | |
760 | goto err_key; | |
761 | } | |
762 | EVP_MD_CTX_init(ctx); | |
763 | if (!EVP_VerifyInit(ctx, EVP_sha256())) { | |
764 | ret = openssl_err("Verifier setup failed"); | |
765 | goto err_ctx; | |
766 | } | |
767 | ||
768 | if (!EVP_VerifyUpdate(ctx, data, datasz)) { | |
769 | ret = openssl_err("Hashing data failed"); | |
770 | goto err_ctx; | |
771 | } | |
772 | ||
22515123 | 773 | if (EVP_VerifyFinal(ctx, sig->sig, sizeof(sig->sig), evp_key) != 1) { |
a1b6b0a9 MS |
774 | ret = openssl_err("Could not verify signature"); |
775 | goto err_ctx; | |
776 | } | |
777 | ||
778 | EVP_MD_CTX_cleanup(ctx); | |
779 | EVP_MD_CTX_destroy(ctx); | |
780 | EVP_PKEY_free(evp_key); | |
781 | ||
782 | return 0; | |
783 | ||
784 | err_ctx: | |
785 | EVP_MD_CTX_destroy(ctx); | |
786 | err_key: | |
787 | EVP_PKEY_free(evp_key); | |
788 | fprintf(stderr, "Failed to verify %s signature\n", signame); | |
789 | return ret; | |
790 | } | |
791 | ||
6eb20bbf T |
792 | static int kwb_sign_and_verify(RSA *key, void *data, int datasz, |
793 | struct sig_v1 *sig, char *signame) | |
a1b6b0a9 MS |
794 | { |
795 | if (kwb_sign(key, data, datasz, sig, signame) < 0) | |
796 | return -1; | |
797 | ||
798 | if (kwb_verify(key, data, datasz, sig, signame) < 0) | |
799 | return -1; | |
800 | ||
801 | return 0; | |
802 | } | |
803 | ||
804 | ||
6eb20bbf | 805 | static int kwb_dump_fuse_cmds_38x(FILE *out, struct secure_hdr_v1 *sec_hdr) |
a1b6b0a9 MS |
806 | { |
807 | struct hash_v1 kak_pub_hash; | |
808 | struct image_cfg_element *e; | |
809 | unsigned int fuse_line; | |
810 | int i, idx; | |
811 | uint8_t *ptr; | |
812 | uint32_t val; | |
813 | int ret = 0; | |
814 | ||
815 | if (!out || !sec_hdr) | |
816 | return -EINVAL; | |
817 | ||
818 | ret = kwb_compute_pubkey_hash(&sec_hdr->kak, &kak_pub_hash); | |
819 | if (ret < 0) | |
820 | goto done; | |
821 | ||
822 | fprintf(out, "# burn KAK pub key hash\n"); | |
823 | ptr = kak_pub_hash.hash; | |
824 | for (fuse_line = 26; fuse_line <= 30; ++fuse_line) { | |
825 | fprintf(out, "fuse prog -y %u 0 ", fuse_line); | |
826 | ||
827 | for (i = 4; i-- > 0;) | |
828 | fprintf(out, "%02hx", (ushort)ptr[i]); | |
829 | ptr += 4; | |
830 | fprintf(out, " 00"); | |
831 | ||
832 | if (fuse_line < 30) { | |
833 | for (i = 3; i-- > 0;) | |
834 | fprintf(out, "%02hx", (ushort)ptr[i]); | |
835 | ptr += 3; | |
836 | } else { | |
837 | fprintf(out, "000000"); | |
838 | } | |
839 | ||
840 | fprintf(out, " 1\n"); | |
841 | } | |
842 | ||
843 | fprintf(out, "# burn CSK selection\n"); | |
844 | ||
845 | idx = image_get_csk_index(); | |
846 | if (idx < 0 || idx > 15) { | |
847 | ret = -EINVAL; | |
848 | goto done; | |
849 | } | |
850 | if (idx > 0) { | |
851 | for (fuse_line = 31; fuse_line < 31 + idx; ++fuse_line) | |
852 | fprintf(out, "fuse prog -y %u 0 00000001 00000000 1\n", | |
853 | fuse_line); | |
854 | } else { | |
855 | fprintf(out, "# CSK index is 0; no mods needed\n"); | |
856 | } | |
857 | ||
858 | e = image_find_option(IMAGE_CFG_BOX_ID); | |
859 | if (e) { | |
860 | fprintf(out, "# set box ID\n"); | |
861 | fprintf(out, "fuse prog -y 48 0 %08x 00000000 1\n", e->boxid); | |
862 | } | |
863 | ||
864 | e = image_find_option(IMAGE_CFG_FLASH_ID); | |
865 | if (e) { | |
866 | fprintf(out, "# set flash ID\n"); | |
867 | fprintf(out, "fuse prog -y 47 0 %08x 00000000 1\n", e->flashid); | |
868 | } | |
869 | ||
870 | fprintf(out, "# enable secure mode "); | |
871 | fprintf(out, "(must be the last fuse line written)\n"); | |
872 | ||
873 | val = 1; | |
874 | e = image_find_option(IMAGE_CFG_SEC_BOOT_DEV); | |
875 | if (!e) { | |
876 | fprintf(stderr, "ERROR: secured mode boot device not given\n"); | |
877 | ret = -EINVAL; | |
878 | goto done; | |
879 | } | |
880 | ||
881 | if (e->sec_boot_dev > 0xff) { | |
882 | fprintf(stderr, "ERROR: secured mode boot device invalid\n"); | |
883 | ret = -EINVAL; | |
884 | goto done; | |
885 | } | |
886 | ||
887 | val |= (e->sec_boot_dev << 8); | |
888 | ||
889 | fprintf(out, "fuse prog -y 24 0 %08x 0103e0a9 1\n", val); | |
890 | ||
891 | fprintf(out, "# lock (unused) fuse lines (0-23)s\n"); | |
892 | for (fuse_line = 0; fuse_line < 24; ++fuse_line) | |
893 | fprintf(out, "fuse prog -y %u 2 1\n", fuse_line); | |
894 | ||
895 | fprintf(out, "# OK, that's all :-)\n"); | |
896 | ||
897 | done: | |
898 | return ret; | |
899 | } | |
900 | ||
901 | static int kwb_dump_fuse_cmds(struct secure_hdr_v1 *sec_hdr) | |
902 | { | |
903 | int ret = 0; | |
904 | struct image_cfg_element *e; | |
905 | ||
906 | e = image_find_option(IMAGE_CFG_SEC_FUSE_DUMP); | |
907 | if (!e) | |
908 | return 0; | |
909 | ||
910 | if (!strcmp(e->name, "a38x")) { | |
911 | FILE *out = fopen("kwb_fuses_a38x.txt", "w+"); | |
912 | ||
f858bb2e HS |
913 | if (!out) { |
914 | fprintf(stderr, "Couldn't open eFuse settings: '%s': %s\n", | |
915 | "kwb_fuses_a38x.txt", strerror(errno)); | |
916 | return -ENOENT; | |
917 | } | |
918 | ||
a1b6b0a9 MS |
919 | kwb_dump_fuse_cmds_38x(out, sec_hdr); |
920 | fclose(out); | |
921 | goto done; | |
922 | } | |
923 | ||
924 | ret = -ENOSYS; | |
925 | ||
926 | done: | |
927 | return ret; | |
928 | } | |
929 | ||
5cad2e6c T |
930 | static size_t image_headersz_align(size_t headersz, uint8_t blockid) |
931 | { | |
932 | /* | |
933 | * Header needs to be 4-byte aligned, which is already ensured by code | |
934 | * above. Moreover UART images must have header aligned to 128 bytes | |
935 | * (xmodem block size), NAND images to 256 bytes (ECC calculation), | |
936 | * and SATA and SDIO images to 512 bytes (storage block size). | |
937 | * Note that SPI images do not have to have header size aligned | |
938 | * to 256 bytes because it is possible to read from SPI storage from | |
939 | * any offset (read offset does not have to be aligned to block size). | |
940 | */ | |
941 | if (blockid == IBR_HDR_UART_ID) | |
942 | return ALIGN(headersz, 128); | |
943 | else if (blockid == IBR_HDR_NAND_ID) | |
944 | return ALIGN(headersz, 256); | |
945 | else if (blockid == IBR_HDR_SATA_ID || blockid == IBR_HDR_SDIO_ID) | |
946 | return ALIGN(headersz, 512); | |
947 | else | |
948 | return headersz; | |
949 | } | |
950 | ||
851114be T |
951 | static size_t image_headersz_v0(int *hasext) |
952 | { | |
953 | size_t headersz; | |
954 | ||
955 | headersz = sizeof(struct main_hdr_v0); | |
956 | if (image_count_options(IMAGE_CFG_DATA) > 0) { | |
957 | headersz += sizeof(struct ext_hdr_v0); | |
958 | if (hasext) | |
959 | *hasext = 1; | |
960 | } | |
961 | ||
9b4531f6 | 962 | return headersz; |
851114be T |
963 | } |
964 | ||
39c78724 | 965 | static void *image_create_v0(size_t *dataoff, struct image_tool_params *params, |
4acd2d24 | 966 | int payloadsz) |
aa0c7a86 | 967 | { |
4acd2d24 SR |
968 | struct image_cfg_element *e; |
969 | size_t headersz; | |
970 | struct main_hdr_v0 *main_hdr; | |
885fba15 | 971 | uint8_t *image; |
4acd2d24 SR |
972 | int has_ext = 0; |
973 | ||
974 | /* | |
9b4531f6 | 975 | * Calculate the size of the header and the offset of the |
4acd2d24 SR |
976 | * payload |
977 | */ | |
851114be | 978 | headersz = image_headersz_v0(&has_ext); |
9b4531f6 | 979 | *dataoff = image_headersz_align(headersz, image_get_bootfrom()); |
4acd2d24 | 980 | |
4acd2d24 SR |
981 | image = malloc(headersz); |
982 | if (!image) { | |
983 | fprintf(stderr, "Cannot allocate memory for image\n"); | |
984 | return NULL; | |
aa0c7a86 | 985 | } |
aa0c7a86 | 986 | |
4acd2d24 SR |
987 | memset(image, 0, headersz); |
988 | ||
885fba15 | 989 | main_hdr = (struct main_hdr_v0 *)image; |
4acd2d24 SR |
990 | |
991 | /* Fill in the main header */ | |
a8840dce | 992 | main_hdr->blocksize = |
e23ad5d5 | 993 | cpu_to_le32(payloadsz); |
9b4531f6 | 994 | main_hdr->srcaddr = cpu_to_le32(*dataoff); |
4acd2d24 | 995 | main_hdr->ext = has_ext; |
01bdac6d | 996 | main_hdr->version = 0; |
a8840dce RP |
997 | main_hdr->destaddr = cpu_to_le32(params->addr); |
998 | main_hdr->execaddr = cpu_to_le32(params->ep); | |
d1547b36 | 999 | main_hdr->blockid = image_get_bootfrom(); |
4acd2d24 | 1000 | |
4acd2d24 SR |
1001 | e = image_find_option(IMAGE_CFG_NAND_ECC_MODE); |
1002 | if (e) | |
1003 | main_hdr->nandeccmode = e->nandeccmode; | |
a6661a0e T |
1004 | e = image_find_option(IMAGE_CFG_NAND_BLKSZ); |
1005 | if (e) | |
1006 | main_hdr->nandblocksize = e->nandblksz / (64 * 1024); | |
4acd2d24 SR |
1007 | e = image_find_option(IMAGE_CFG_NAND_PAGESZ); |
1008 | if (e) | |
a8840dce | 1009 | main_hdr->nandpagesize = cpu_to_le16(e->nandpagesz); |
a6661a0e T |
1010 | e = image_find_option(IMAGE_CFG_NAND_BADBLK_LOCATION); |
1011 | if (e) | |
1012 | main_hdr->nandbadblklocation = e->nandbadblklocation; | |
4acd2d24 | 1013 | |
5c61710c | 1014 | /* |
954c94aa | 1015 | * For SATA srcaddr is specified in number of sectors. |
5c61710c | 1016 | * This expects the sector size to be 512 bytes. |
5c61710c T |
1017 | */ |
1018 | if (main_hdr->blockid == IBR_HDR_SATA_ID) | |
9b4531f6 | 1019 | main_hdr->srcaddr = cpu_to_le32(le32_to_cpu(main_hdr->srcaddr) / 512); |
5c61710c | 1020 | |
5c61710c T |
1021 | /* For PCIe srcaddr is not used and must be set to 0xFFFFFFFF. */ |
1022 | if (main_hdr->blockid == IBR_HDR_PEX_ID) | |
1023 | main_hdr->srcaddr = cpu_to_le32(0xFFFFFFFF); | |
1024 | ||
4acd2d24 SR |
1025 | /* Generate the ext header */ |
1026 | if (has_ext) { | |
e89016c4 | 1027 | struct ext_hdr_v0 *ext_hdr; |
4acd2d24 SR |
1028 | int cfgi, datai; |
1029 | ||
885fba15 MS |
1030 | ext_hdr = (struct ext_hdr_v0 *) |
1031 | (image + sizeof(struct main_hdr_v0)); | |
a8840dce | 1032 | ext_hdr->offset = cpu_to_le32(0x40); |
4acd2d24 SR |
1033 | |
1034 | for (cfgi = 0, datai = 0; cfgi < cfgn; cfgi++) { | |
1035 | e = &image_cfg[cfgi]; | |
1036 | if (e->type != IMAGE_CFG_DATA) | |
1037 | continue; | |
1038 | ||
a8840dce RP |
1039 | ext_hdr->rcfg[datai].raddr = |
1040 | cpu_to_le32(e->regdata.raddr); | |
1041 | ext_hdr->rcfg[datai].rdata = | |
1042 | cpu_to_le32(e->regdata.rdata); | |
4acd2d24 SR |
1043 | datai++; |
1044 | } | |
1045 | ||
1046 | ext_hdr->checksum = image_checksum8(ext_hdr, | |
1047 | sizeof(struct ext_hdr_v0)); | |
1048 | } | |
1049 | ||
ee3da92d T |
1050 | main_hdr->checksum = image_checksum8(image, |
1051 | sizeof(struct main_hdr_v0)); | |
1052 | ||
4acd2d24 | 1053 | return image; |
aa0c7a86 PW |
1054 | } |
1055 | ||
e93cf53f | 1056 | static size_t image_headersz_v1(int *hasext) |
4acd2d24 | 1057 | { |
0aca27ea | 1058 | struct image_cfg_element *e; |
02ba70ad | 1059 | unsigned int count; |
4acd2d24 | 1060 | size_t headersz; |
0aca27ea T |
1061 | int cpu_sheeva; |
1062 | struct stat s; | |
d9fb82c5 | 1063 | int cfgi; |
0aca27ea | 1064 | int ret; |
4acd2d24 | 1065 | |
4acd2d24 SR |
1066 | headersz = sizeof(struct main_hdr_v1); |
1067 | ||
e58f08b4 T |
1068 | if (image_get_csk_index() >= 0) { |
1069 | headersz += sizeof(struct secure_hdr_v1); | |
1070 | if (hasext) | |
1071 | *hasext = 1; | |
1072 | } | |
1073 | ||
0aca27ea T |
1074 | cpu_sheeva = image_is_cpu_sheeva(); |
1075 | ||
d737d5d2 T |
1076 | count = 0; |
1077 | for (cfgi = 0; cfgi < cfgn; cfgi++) { | |
1078 | e = &image_cfg[cfgi]; | |
1079 | ||
1080 | if (e->type == IMAGE_CFG_DATA) | |
1081 | count++; | |
1082 | ||
3db9c417 T |
1083 | if (e->type == IMAGE_CFG_DATA_DELAY || |
1084 | (e->type == IMAGE_CFG_BINARY && count > 0)) { | |
d737d5d2 T |
1085 | headersz += sizeof(struct register_set_hdr_v1) + 8 * count + 4; |
1086 | count = 0; | |
1087 | } | |
4acd2d24 | 1088 | |
0aca27ea | 1089 | if (e->type != IMAGE_CFG_BINARY) |
d9fb82c5 T |
1090 | continue; |
1091 | ||
0aca27ea | 1092 | ret = stat(e->binary.file, &s); |
4acd2d24 | 1093 | if (ret < 0) { |
e5f1a586 AB |
1094 | char cwd[PATH_MAX]; |
1095 | char *dir = cwd; | |
1096 | ||
1097 | memset(cwd, 0, sizeof(cwd)); | |
1098 | if (!getcwd(cwd, sizeof(cwd))) { | |
1099 | dir = "current working directory"; | |
1100 | perror("getcwd() failed"); | |
1101 | } | |
1102 | ||
4acd2d24 SR |
1103 | fprintf(stderr, |
1104 | "Didn't find the file '%s' in '%s' which is mandatory to generate the image\n" | |
1105 | "This file generally contains the DDR3 training code, and should be extracted from an existing bootable\n" | |
107d587f | 1106 | "image for your board. Use 'dumpimage -T kwbimage -p 1' to extract it from an existing image.\n", |
0aca27ea | 1107 | e->binary.file, dir); |
4acd2d24 SR |
1108 | return 0; |
1109 | } | |
aa0c7a86 | 1110 | |
e58f08b4 | 1111 | headersz += sizeof(struct opt_hdr_v1) + sizeof(uint32_t) + |
0aca27ea T |
1112 | (e->binary.nargs) * sizeof(uint32_t); |
1113 | ||
1114 | if (e->binary.loadaddr) { | |
1115 | /* | |
1116 | * BootROM loads kwbimage header (in which the | |
1117 | * executable code is also stored) to address | |
1118 | * 0x40004000 or 0x40000000. Thus there is | |
1119 | * restriction for the load address of the N-th | |
1120 | * BINARY image. | |
1121 | */ | |
1122 | unsigned int base_addr, low_addr, high_addr; | |
1123 | ||
1124 | base_addr = cpu_sheeva ? 0x40004000 : 0x40000000; | |
1125 | low_addr = base_addr + headersz; | |
1126 | high_addr = low_addr + | |
1127 | (BINARY_MAX_ARGS - e->binary.nargs) * sizeof(uint32_t); | |
1128 | ||
1129 | if (cpu_sheeva && e->binary.loadaddr % 16) { | |
1130 | fprintf(stderr, | |
1131 | "Invalid LOAD_ADDRESS 0x%08x for BINARY %s with %d args.\n" | |
1132 | "Address for CPU SHEEVA must be 16-byte aligned.\n", | |
1133 | e->binary.loadaddr, e->binary.file, e->binary.nargs); | |
1134 | return 0; | |
1135 | } | |
1136 | ||
1137 | if (e->binary.loadaddr % 4 || e->binary.loadaddr < low_addr || | |
1138 | e->binary.loadaddr > high_addr) { | |
1139 | fprintf(stderr, | |
1140 | "Invalid LOAD_ADDRESS 0x%08x for BINARY %s with %d args.\n" | |
1141 | "Address must be 4-byte aligned and in range 0x%08x-0x%08x.\n", | |
1142 | e->binary.loadaddr, e->binary.file, | |
1143 | e->binary.nargs, low_addr, high_addr); | |
1144 | return 0; | |
1145 | } | |
1146 | headersz = e->binary.loadaddr - base_addr; | |
bdf8c9f2 | 1147 | } else if (cpu_sheeva) { |
0aca27ea | 1148 | headersz = ALIGN(headersz, 16); |
bdf8c9f2 T |
1149 | } else { |
1150 | headersz = ALIGN(headersz, 4); | |
0aca27ea T |
1151 | } |
1152 | ||
e58f08b4 | 1153 | headersz += ALIGN(s.st_size, 4) + sizeof(uint32_t); |
a1b6b0a9 MS |
1154 | if (hasext) |
1155 | *hasext = 1; | |
1156 | } | |
a1b6b0a9 | 1157 | |
0aca27ea T |
1158 | if (count > 0) |
1159 | headersz += sizeof(struct register_set_hdr_v1) + 8 * count + 4; | |
1160 | ||
9b4531f6 | 1161 | return headersz; |
4acd2d24 | 1162 | } |
aa0c7a86 | 1163 | |
6eb20bbf T |
1164 | static int add_binary_header_v1(uint8_t **cur, uint8_t **next_ext, |
1165 | struct image_cfg_element *binarye, | |
1166 | struct main_hdr_v1 *main_hdr) | |
79066ef8 | 1167 | { |
d9fb82c5 | 1168 | struct opt_hdr_v1 *hdr = (struct opt_hdr_v1 *)*cur; |
0aca27ea | 1169 | uint32_t base_addr; |
e58f08b4 T |
1170 | uint32_t add_args; |
1171 | uint32_t offset; | |
79066ef8 MS |
1172 | uint32_t *args; |
1173 | size_t binhdrsz; | |
0aca27ea | 1174 | int cpu_sheeva; |
79066ef8 MS |
1175 | struct stat s; |
1176 | int argi; | |
1177 | FILE *bin; | |
1178 | int ret; | |
1179 | ||
79066ef8 MS |
1180 | hdr->headertype = OPT_HDR_V1_BINARY_TYPE; |
1181 | ||
1182 | bin = fopen(binarye->binary.file, "r"); | |
1183 | if (!bin) { | |
1184 | fprintf(stderr, "Cannot open binary file %s\n", | |
1185 | binarye->binary.file); | |
1186 | return -1; | |
1187 | } | |
1188 | ||
1f6c8a57 MS |
1189 | if (fstat(fileno(bin), &s)) { |
1190 | fprintf(stderr, "Cannot stat binary file %s\n", | |
1191 | binarye->binary.file); | |
1192 | goto err_close; | |
1193 | } | |
79066ef8 | 1194 | |
d9fb82c5 | 1195 | *cur += sizeof(struct opt_hdr_v1); |
79066ef8 | 1196 | |
d9fb82c5 | 1197 | args = (uint32_t *)*cur; |
79066ef8 MS |
1198 | *args = cpu_to_le32(binarye->binary.nargs); |
1199 | args++; | |
1200 | for (argi = 0; argi < binarye->binary.nargs; argi++) | |
1201 | args[argi] = cpu_to_le32(binarye->binary.args[argi]); | |
1202 | ||
d9fb82c5 | 1203 | *cur += (binarye->binary.nargs + 1) * sizeof(uint32_t); |
79066ef8 | 1204 | |
e58f08b4 | 1205 | /* |
bdf8c9f2 T |
1206 | * ARM executable code inside the BIN header on platforms with Sheeva |
1207 | * CPU (A370 and AXP) must always be aligned with the 128-bit boundary. | |
0aca27ea T |
1208 | * In the case when this code is not position independent (e.g. ARM |
1209 | * SPL), it must be placed at fixed load and execute address. | |
e58f08b4 T |
1210 | * This requirement can be met by inserting dummy arguments into |
1211 | * BIN header, if needed. | |
1212 | */ | |
0aca27ea T |
1213 | cpu_sheeva = image_is_cpu_sheeva(); |
1214 | base_addr = cpu_sheeva ? 0x40004000 : 0x40000000; | |
e58f08b4 | 1215 | offset = *cur - (uint8_t *)main_hdr; |
0aca27ea T |
1216 | if (binarye->binary.loadaddr) |
1217 | add_args = (binarye->binary.loadaddr - base_addr - offset) / sizeof(uint32_t); | |
bdf8c9f2 | 1218 | else if (cpu_sheeva) |
0aca27ea | 1219 | add_args = ((16 - offset % 16) % 16) / sizeof(uint32_t); |
bdf8c9f2 T |
1220 | else |
1221 | add_args = 0; | |
e58f08b4 T |
1222 | if (add_args) { |
1223 | *(args - 1) = cpu_to_le32(binarye->binary.nargs + add_args); | |
1224 | *cur += add_args * sizeof(uint32_t); | |
1225 | } | |
1226 | ||
d9fb82c5 | 1227 | ret = fread(*cur, s.st_size, 1, bin); |
79066ef8 MS |
1228 | if (ret != 1) { |
1229 | fprintf(stderr, | |
1230 | "Could not read binary image %s\n", | |
1231 | binarye->binary.file); | |
1f6c8a57 | 1232 | goto err_close; |
79066ef8 MS |
1233 | } |
1234 | ||
1235 | fclose(bin); | |
1236 | ||
d9fb82c5 | 1237 | *cur += ALIGN(s.st_size, 4); |
79066ef8 | 1238 | |
d9fb82c5 T |
1239 | *((uint32_t *)*cur) = 0x00000000; |
1240 | **next_ext = 1; | |
1241 | *next_ext = *cur; | |
79066ef8 | 1242 | |
d9fb82c5 | 1243 | *cur += sizeof(uint32_t); |
79066ef8 | 1244 | |
e58f08b4 T |
1245 | binhdrsz = sizeof(struct opt_hdr_v1) + |
1246 | (binarye->binary.nargs + add_args + 2) * sizeof(uint32_t) + | |
1247 | ALIGN(s.st_size, 4); | |
1248 | hdr->headersz_lsb = cpu_to_le16(binhdrsz & 0xFFFF); | |
1249 | hdr->headersz_msb = (binhdrsz & 0xFFFF0000) >> 16; | |
1250 | ||
79066ef8 | 1251 | return 0; |
1f6c8a57 MS |
1252 | |
1253 | err_close: | |
1254 | fclose(bin); | |
1255 | ||
1256 | return -1; | |
79066ef8 MS |
1257 | } |
1258 | ||
6eb20bbf | 1259 | static int export_pub_kak_hash(RSA *kak, struct secure_hdr_v1 *secure_hdr) |
a1b6b0a9 MS |
1260 | { |
1261 | FILE *hashf; | |
1262 | int res; | |
1263 | ||
1264 | hashf = fopen("pub_kak_hash.txt", "w"); | |
f858bb2e HS |
1265 | if (!hashf) { |
1266 | fprintf(stderr, "Couldn't open hash file: '%s': %s\n", | |
1267 | "pub_kak_hash.txt", strerror(errno)); | |
1268 | return 1; | |
1269 | } | |
a1b6b0a9 MS |
1270 | |
1271 | res = kwb_export_pubkey(kak, &secure_hdr->kak, hashf, "KAK"); | |
1272 | ||
1273 | fclose(hashf); | |
1274 | ||
1275 | return res < 0 ? 1 : 0; | |
1276 | } | |
1277 | ||
6eb20bbf T |
1278 | static int kwb_sign_csk_with_kak(struct image_tool_params *params, |
1279 | struct secure_hdr_v1 *secure_hdr, RSA *csk) | |
a1b6b0a9 MS |
1280 | { |
1281 | RSA *kak = NULL; | |
1282 | RSA *kak_pub = NULL; | |
1283 | int csk_idx = image_get_csk_index(); | |
1284 | struct sig_v1 tmp_sig; | |
1285 | ||
f0317d78 | 1286 | if (csk_idx < 0 || csk_idx > 15) { |
a1b6b0a9 MS |
1287 | fprintf(stderr, "Invalid CSK index %d\n", csk_idx); |
1288 | return 1; | |
1289 | } | |
1290 | ||
1291 | if (kwb_load_kak(params, &kak) < 0) | |
1292 | return 1; | |
1293 | ||
1294 | if (export_pub_kak_hash(kak, secure_hdr)) | |
1295 | return 1; | |
1296 | ||
1297 | if (kwb_import_pubkey(&kak_pub, &secure_hdr->kak, "KAK") < 0) | |
1298 | return 1; | |
1299 | ||
1300 | if (kwb_export_pubkey(csk, &secure_hdr->csk[csk_idx], NULL, "CSK") < 0) | |
1301 | return 1; | |
1302 | ||
1303 | if (kwb_sign_and_verify(kak, &secure_hdr->csk, | |
1304 | sizeof(secure_hdr->csk) + | |
1305 | sizeof(secure_hdr->csksig), | |
1306 | &tmp_sig, "CSK") < 0) | |
1307 | return 1; | |
1308 | ||
1309 | if (kwb_verify(kak_pub, &secure_hdr->csk, | |
1310 | sizeof(secure_hdr->csk) + | |
1311 | sizeof(secure_hdr->csksig), | |
1312 | &tmp_sig, "CSK (2)") < 0) | |
1313 | return 1; | |
1314 | ||
1315 | secure_hdr->csksig = tmp_sig; | |
1316 | ||
1317 | return 0; | |
1318 | } | |
1319 | ||
dd13ac54 T |
1320 | static int add_secure_header_v1(struct image_tool_params *params, uint8_t *image_ptr, |
1321 | size_t image_size, uint8_t *header_ptr, size_t headersz, | |
6eb20bbf | 1322 | struct secure_hdr_v1 *secure_hdr) |
a1b6b0a9 MS |
1323 | { |
1324 | struct image_cfg_element *e_jtagdelay; | |
1325 | struct image_cfg_element *e_boxid; | |
1326 | struct image_cfg_element *e_flashid; | |
1327 | RSA *csk = NULL; | |
a1b6b0a9 MS |
1328 | struct sig_v1 tmp_sig; |
1329 | bool specialized_img = image_get_spezialized_img(); | |
1330 | ||
1331 | kwb_msg("Create secure header content\n"); | |
1332 | ||
1333 | e_jtagdelay = image_find_option(IMAGE_CFG_JTAG_DELAY); | |
1334 | e_boxid = image_find_option(IMAGE_CFG_BOX_ID); | |
1335 | e_flashid = image_find_option(IMAGE_CFG_FLASH_ID); | |
1336 | ||
1337 | if (kwb_load_csk(params, &csk) < 0) | |
1338 | return 1; | |
1339 | ||
1340 | secure_hdr->headertype = OPT_HDR_V1_SECURE_TYPE; | |
1341 | secure_hdr->headersz_msb = 0; | |
1342 | secure_hdr->headersz_lsb = cpu_to_le16(sizeof(struct secure_hdr_v1)); | |
1343 | if (e_jtagdelay) | |
1344 | secure_hdr->jtag_delay = e_jtagdelay->jtag_delay; | |
1345 | if (e_boxid && specialized_img) | |
1346 | secure_hdr->boxid = cpu_to_le32(e_boxid->boxid); | |
1347 | if (e_flashid && specialized_img) | |
1348 | secure_hdr->flashid = cpu_to_le32(e_flashid->flashid); | |
1349 | ||
1350 | if (kwb_sign_csk_with_kak(params, secure_hdr, csk)) | |
1351 | return 1; | |
1352 | ||
bf78a57e | 1353 | if (kwb_sign_and_verify(csk, image_ptr, image_size - 4, |
a1b6b0a9 MS |
1354 | &secure_hdr->imgsig, "image") < 0) |
1355 | return 1; | |
1356 | ||
dd13ac54 | 1357 | if (kwb_sign_and_verify(csk, header_ptr, headersz, &tmp_sig, "header") < 0) |
a1b6b0a9 MS |
1358 | return 1; |
1359 | ||
1360 | secure_hdr->hdrsig = tmp_sig; | |
1361 | ||
1362 | kwb_dump_fuse_cmds(secure_hdr); | |
1363 | ||
1364 | return 0; | |
1365 | } | |
a1b6b0a9 | 1366 | |
9ac1def0 T |
1367 | static void finish_register_set_header_v1(uint8_t **cur, uint8_t **next_ext, |
1368 | struct register_set_hdr_v1 *register_set_hdr, | |
1369 | int *datai, uint8_t delay) | |
1370 | { | |
1371 | int size = sizeof(struct register_set_hdr_v1) + 8 * (*datai) + 4; | |
1372 | ||
1373 | register_set_hdr->headertype = OPT_HDR_V1_REGISTER_TYPE; | |
1374 | register_set_hdr->headersz_lsb = cpu_to_le16(size & 0xFFFF); | |
1375 | register_set_hdr->headersz_msb = size >> 16; | |
1376 | register_set_hdr->data[*datai].last_entry.delay = delay; | |
1377 | *cur += size; | |
1378 | **next_ext = 1; | |
1379 | *next_ext = ®ister_set_hdr->data[*datai].last_entry.next; | |
1380 | *datai = 0; | |
1381 | } | |
1382 | ||
39c78724 | 1383 | static void *image_create_v1(size_t *dataoff, struct image_tool_params *params, |
a1b6b0a9 | 1384 | uint8_t *ptr, int payloadsz) |
4acd2d24 | 1385 | { |
79066ef8 | 1386 | struct image_cfg_element *e; |
4acd2d24 | 1387 | struct main_hdr_v1 *main_hdr; |
02ba70ad | 1388 | struct register_set_hdr_v1 *register_set_hdr; |
a1b6b0a9 | 1389 | struct secure_hdr_v1 *secure_hdr = NULL; |
4acd2d24 | 1390 | size_t headersz; |
885fba15 | 1391 | uint8_t *image, *cur; |
4acd2d24 | 1392 | int hasext = 0; |
a1b6b0a9 | 1393 | uint8_t *next_ext = NULL; |
9ac1def0 | 1394 | int cfgi, datai; |
3db9c417 | 1395 | uint8_t delay; |
4acd2d24 SR |
1396 | |
1397 | /* | |
9b4531f6 | 1398 | * Calculate the size of the header and the offset of the |
4acd2d24 SR |
1399 | * payload |
1400 | */ | |
e93cf53f | 1401 | headersz = image_headersz_v1(&hasext); |
4acd2d24 SR |
1402 | if (headersz == 0) |
1403 | return NULL; | |
9b4531f6 | 1404 | *dataoff = image_headersz_align(headersz, image_get_bootfrom()); |
4acd2d24 SR |
1405 | |
1406 | image = malloc(headersz); | |
1407 | if (!image) { | |
1408 | fprintf(stderr, "Cannot allocate memory for image\n"); | |
1409 | return NULL; | |
1410 | } | |
aa0c7a86 | 1411 | |
4acd2d24 SR |
1412 | memset(image, 0, headersz); |
1413 | ||
885fba15 | 1414 | main_hdr = (struct main_hdr_v1 *)image; |
a1b6b0a9 MS |
1415 | cur = image; |
1416 | cur += sizeof(struct main_hdr_v1); | |
1417 | next_ext = &main_hdr->ext; | |
4acd2d24 SR |
1418 | |
1419 | /* Fill the main header */ | |
a8840dce | 1420 | main_hdr->blocksize = |
e23ad5d5 | 1421 | cpu_to_le32(payloadsz); |
a8840dce | 1422 | main_hdr->headersz_lsb = cpu_to_le16(headersz & 0xFFFF); |
4acd2d24 | 1423 | main_hdr->headersz_msb = (headersz & 0xFFFF0000) >> 16; |
cc3443ff | 1424 | main_hdr->destaddr = cpu_to_le32(params->addr); |
a8840dce | 1425 | main_hdr->execaddr = cpu_to_le32(params->ep); |
9b4531f6 | 1426 | main_hdr->srcaddr = cpu_to_le32(*dataoff); |
4acd2d24 SR |
1427 | main_hdr->ext = hasext; |
1428 | main_hdr->version = 1; | |
d1547b36 T |
1429 | main_hdr->blockid = image_get_bootfrom(); |
1430 | ||
4acd2d24 SR |
1431 | e = image_find_option(IMAGE_CFG_NAND_BLKSZ); |
1432 | if (e) | |
1433 | main_hdr->nandblocksize = e->nandblksz / (64 * 1024); | |
2fdba4f6 T |
1434 | e = image_find_option(IMAGE_CFG_NAND_PAGESZ); |
1435 | if (e) | |
1436 | main_hdr->nandpagesize = cpu_to_le16(e->nandpagesz); | |
4acd2d24 SR |
1437 | e = image_find_option(IMAGE_CFG_NAND_BADBLK_LOCATION); |
1438 | if (e) | |
1439 | main_hdr->nandbadblklocation = e->nandbadblklocation; | |
4bdb5479 CP |
1440 | e = image_find_option(IMAGE_CFG_BAUDRATE); |
1441 | if (e) | |
12f2c03f T |
1442 | main_hdr->options |= baudrate_to_option(e->baudrate); |
1443 | e = image_find_option(IMAGE_CFG_UART_PORT); | |
1444 | if (e) | |
1445 | main_hdr->options |= (e->uart_port & 3) << 3; | |
1446 | e = image_find_option(IMAGE_CFG_UART_MPP); | |
1447 | if (e) | |
1448 | main_hdr->options |= (e->uart_mpp & 7) << 5; | |
2611c05e CP |
1449 | e = image_find_option(IMAGE_CFG_DEBUG); |
1450 | if (e) | |
1451 | main_hdr->flags = e->debug ? 0x1 : 0; | |
4acd2d24 | 1452 | |
501a54a2 | 1453 | /* |
954c94aa | 1454 | * For SATA srcaddr is specified in number of sectors. |
501a54a2 | 1455 | * This expects the sector size to be 512 bytes. |
501a54a2 T |
1456 | */ |
1457 | if (main_hdr->blockid == IBR_HDR_SATA_ID) | |
9b4531f6 | 1458 | main_hdr->srcaddr = cpu_to_le32(le32_to_cpu(main_hdr->srcaddr) / 512); |
501a54a2 | 1459 | |
501a54a2 T |
1460 | /* For PCIe srcaddr is not used and must be set to 0xFFFFFFFF. */ |
1461 | if (main_hdr->blockid == IBR_HDR_PEX_ID) | |
1462 | main_hdr->srcaddr = cpu_to_le32(0xFFFFFFFF); | |
1463 | ||
a1b6b0a9 MS |
1464 | if (image_get_csk_index() >= 0) { |
1465 | /* | |
1466 | * only reserve the space here; we fill the header later since | |
1467 | * we need the header to be complete to compute the signatures | |
1468 | */ | |
1469 | secure_hdr = (struct secure_hdr_v1 *)cur; | |
1470 | cur += sizeof(struct secure_hdr_v1); | |
d9fb82c5 | 1471 | *next_ext = 1; |
a1b6b0a9 MS |
1472 | next_ext = &secure_hdr->next; |
1473 | } | |
a1b6b0a9 | 1474 | |
02ba70ad | 1475 | datai = 0; |
02ba70ad T |
1476 | for (cfgi = 0; cfgi < cfgn; cfgi++) { |
1477 | e = &image_cfg[cfgi]; | |
f63c583f | 1478 | if (e->type != IMAGE_CFG_DATA && |
3db9c417 T |
1479 | e->type != IMAGE_CFG_DATA_DELAY && |
1480 | e->type != IMAGE_CFG_BINARY) | |
02ba70ad | 1481 | continue; |
3db9c417 | 1482 | |
d737d5d2 T |
1483 | if (datai == 0) |
1484 | register_set_hdr = (struct register_set_hdr_v1 *)cur; | |
3db9c417 T |
1485 | |
1486 | /* If delay is not specified, use the smallest possible value. */ | |
1487 | if (e->type == IMAGE_CFG_DATA_DELAY) | |
1488 | delay = e->regdata_delay; | |
1489 | else | |
1490 | delay = REGISTER_SET_HDR_OPT_DELAY_MS(0); | |
1491 | ||
1492 | /* | |
1493 | * DATA_DELAY command is the last entry in the register set | |
1494 | * header and BINARY command inserts new binary header. | |
1495 | * Therefore BINARY command requires to finish register set | |
1496 | * header if some DATA command was specified. And DATA_DELAY | |
1497 | * command automatically finish register set header even when | |
1498 | * there was no DATA command. | |
1499 | */ | |
1500 | if (e->type == IMAGE_CFG_DATA_DELAY || | |
1501 | (e->type == IMAGE_CFG_BINARY && datai != 0)) | |
9ac1def0 | 1502 | finish_register_set_header_v1(&cur, &next_ext, register_set_hdr, |
3db9c417 T |
1503 | &datai, delay); |
1504 | ||
1505 | if (e->type == IMAGE_CFG_DATA) { | |
1506 | register_set_hdr->data[datai].entry.address = | |
1507 | cpu_to_le32(e->regdata.raddr); | |
1508 | register_set_hdr->data[datai].entry.value = | |
1509 | cpu_to_le32(e->regdata.rdata); | |
1510 | datai++; | |
1511 | } | |
1512 | ||
1513 | if (e->type == IMAGE_CFG_BINARY) { | |
1514 | if (add_binary_header_v1(&cur, &next_ext, e, main_hdr)) | |
1515 | return NULL; | |
f63c583f | 1516 | } |
02ba70ad T |
1517 | } |
1518 | if (datai != 0) { | |
9ac1def0 | 1519 | /* Set delay to the smallest possible value. */ |
3db9c417 | 1520 | delay = REGISTER_SET_HDR_OPT_DELAY_MS(0); |
9ac1def0 | 1521 | finish_register_set_header_v1(&cur, &next_ext, register_set_hdr, |
3db9c417 | 1522 | &datai, delay); |
d9fb82c5 | 1523 | } |
4acd2d24 | 1524 | |
9b4531f6 | 1525 | if (secure_hdr && add_secure_header_v1(params, ptr + *dataoff, payloadsz, |
dd13ac54 | 1526 | image, headersz, secure_hdr)) |
a1b6b0a9 | 1527 | return NULL; |
a1b6b0a9 | 1528 | |
9203c738 PB |
1529 | /* Calculate and set the header checksum */ |
1530 | main_hdr->checksum = image_checksum8(main_hdr, headersz); | |
1531 | ||
4acd2d24 SR |
1532 | return image; |
1533 | } | |
1534 | ||
6eb20bbf | 1535 | static int recognize_keyword(char *keyword) |
4991b4f7 MS |
1536 | { |
1537 | int kw_id; | |
1538 | ||
1539 | for (kw_id = 1; kw_id < IMAGE_CFG_COUNT; ++kw_id) | |
1540 | if (!strcmp(keyword, id_strs[kw_id])) | |
1541 | return kw_id; | |
1542 | ||
1543 | return 0; | |
1544 | } | |
1545 | ||
4acd2d24 SR |
1546 | static int image_create_config_parse_oneline(char *line, |
1547 | struct image_cfg_element *el) | |
1548 | { | |
4991b4f7 MS |
1549 | char *keyword, *saveptr, *value1, *value2; |
1550 | char delimiters[] = " \t"; | |
1551 | int keyword_id, ret, argi; | |
1552 | char *unknown_msg = "Ignoring unknown line '%s'\n"; | |
1553 | ||
1554 | keyword = strtok_r(line, delimiters, &saveptr); | |
1555 | keyword_id = recognize_keyword(keyword); | |
1556 | ||
1557 | if (!keyword_id) { | |
1558 | fprintf(stderr, unknown_msg, line); | |
1559 | return 0; | |
1560 | } | |
4acd2d24 | 1561 | |
4991b4f7 | 1562 | el->type = keyword_id; |
94490a4a | 1563 | |
4991b4f7 MS |
1564 | value1 = strtok_r(NULL, delimiters, &saveptr); |
1565 | ||
1566 | if (!value1) { | |
1567 | fprintf(stderr, "Parameter missing in line '%s'\n", line); | |
1568 | return -1; | |
1569 | } | |
1570 | ||
1571 | switch (keyword_id) { | |
1572 | case IMAGE_CFG_VERSION: | |
1573 | el->version = atoi(value1); | |
1574 | break; | |
af49605b T |
1575 | case IMAGE_CFG_CPU: |
1576 | if (strcmp(value1, "FEROCEON") == 0) | |
1577 | el->cpu_sheeva = 0; | |
1578 | else if (strcmp(value1, "SHEEVA") == 0) | |
1579 | el->cpu_sheeva = 1; | |
1580 | else if (strcmp(value1, "A9") == 0) | |
1581 | el->cpu_sheeva = 0; | |
1582 | else { | |
1583 | fprintf(stderr, "Invalid CPU %s\n", value1); | |
1584 | return -1; | |
1585 | } | |
1586 | break; | |
4991b4f7 MS |
1587 | case IMAGE_CFG_BOOT_FROM: |
1588 | ret = image_boot_mode_id(value1); | |
94490a4a | 1589 | |
f411b8f2 | 1590 | if (ret < 0) { |
4991b4f7 | 1591 | fprintf(stderr, "Invalid boot media '%s'\n", value1); |
4acd2d24 SR |
1592 | return -1; |
1593 | } | |
f411b8f2 | 1594 | el->bootfrom = ret; |
4991b4f7 MS |
1595 | break; |
1596 | case IMAGE_CFG_NAND_BLKSZ: | |
1597 | el->nandblksz = strtoul(value1, NULL, 16); | |
1598 | break; | |
1599 | case IMAGE_CFG_NAND_BADBLK_LOCATION: | |
1600 | el->nandbadblklocation = strtoul(value1, NULL, 16); | |
1601 | break; | |
1602 | case IMAGE_CFG_NAND_ECC_MODE: | |
1603 | ret = image_nand_ecc_mode_id(value1); | |
94490a4a | 1604 | |
f411b8f2 | 1605 | if (ret < 0) { |
4991b4f7 | 1606 | fprintf(stderr, "Invalid NAND ECC mode '%s'\n", value1); |
4acd2d24 SR |
1607 | return -1; |
1608 | } | |
f411b8f2 | 1609 | el->nandeccmode = ret; |
4991b4f7 MS |
1610 | break; |
1611 | case IMAGE_CFG_NAND_PAGESZ: | |
1612 | el->nandpagesz = strtoul(value1, NULL, 16); | |
1613 | break; | |
1614 | case IMAGE_CFG_BINARY: | |
1615 | argi = 0; | |
1616 | ||
1617 | el->binary.file = strdup(value1); | |
4acd2d24 | 1618 | while (1) { |
4991b4f7 | 1619 | char *value = strtok_r(NULL, delimiters, &saveptr); |
0aca27ea | 1620 | char *endptr; |
4991b4f7 | 1621 | |
4acd2d24 SR |
1622 | if (!value) |
1623 | break; | |
0aca27ea T |
1624 | |
1625 | if (!strcmp(value, "LOAD_ADDRESS")) { | |
1626 | value = strtok_r(NULL, delimiters, &saveptr); | |
1627 | if (!value) { | |
1628 | fprintf(stderr, | |
1629 | "Missing address argument for BINARY LOAD_ADDRESS\n"); | |
1630 | return -1; | |
1631 | } | |
1632 | el->binary.loadaddr = strtoul(value, &endptr, 16); | |
1633 | if (*endptr) { | |
1634 | fprintf(stderr, | |
1635 | "Invalid argument '%s' for BINARY LOAD_ADDRESS\n", | |
1636 | value); | |
1637 | return -1; | |
1638 | } | |
1639 | value = strtok_r(NULL, delimiters, &saveptr); | |
1640 | if (value) { | |
1641 | fprintf(stderr, | |
1642 | "Unexpected argument '%s' after BINARY LOAD_ADDRESS\n", | |
1643 | value); | |
1644 | return -1; | |
1645 | } | |
1646 | break; | |
1647 | } | |
1648 | ||
1649 | el->binary.args[argi] = strtoul(value, &endptr, 16); | |
1650 | if (*endptr) { | |
1651 | fprintf(stderr, "Invalid argument '%s' for BINARY\n", value); | |
1652 | return -1; | |
1653 | } | |
4acd2d24 SR |
1654 | argi++; |
1655 | if (argi >= BINARY_MAX_ARGS) { | |
1656 | fprintf(stderr, | |
4991b4f7 | 1657 | "Too many arguments for BINARY\n"); |
4acd2d24 | 1658 | return -1; |
aa0c7a86 | 1659 | } |
aa0c7a86 | 1660 | } |
4acd2d24 | 1661 | el->binary.nargs = argi; |
4991b4f7 MS |
1662 | break; |
1663 | case IMAGE_CFG_DATA: | |
1664 | value2 = strtok_r(NULL, delimiters, &saveptr); | |
4acd2d24 SR |
1665 | |
1666 | if (!value1 || !value2) { | |
1667 | fprintf(stderr, | |
1668 | "Invalid number of arguments for DATA\n"); | |
1669 | return -1; | |
1670 | } | |
1671 | ||
4acd2d24 SR |
1672 | el->regdata.raddr = strtoul(value1, NULL, 16); |
1673 | el->regdata.rdata = strtoul(value2, NULL, 16); | |
4991b4f7 | 1674 | break; |
f63c583f T |
1675 | case IMAGE_CFG_DATA_DELAY: |
1676 | if (!strcmp(value1, "SDRAM_SETUP")) | |
1677 | el->regdata_delay = REGISTER_SET_HDR_OPT_DELAY_SDRAM_SETUP; | |
1678 | else | |
1679 | el->regdata_delay = REGISTER_SET_HDR_OPT_DELAY_MS(strtoul(value1, NULL, 10)); | |
fdcae261 T |
1680 | if (el->regdata_delay > 255) { |
1681 | fprintf(stderr, "Maximal DATA_DELAY is 255\n"); | |
1682 | return -1; | |
1683 | } | |
f63c583f | 1684 | break; |
4991b4f7 MS |
1685 | case IMAGE_CFG_BAUDRATE: |
1686 | el->baudrate = strtoul(value1, NULL, 10); | |
1687 | break; | |
12f2c03f T |
1688 | case IMAGE_CFG_UART_PORT: |
1689 | el->uart_port = strtoul(value1, NULL, 16); | |
1690 | break; | |
1691 | case IMAGE_CFG_UART_MPP: | |
1692 | el->uart_mpp = strtoul(value1, NULL, 16); | |
1693 | break; | |
4991b4f7 MS |
1694 | case IMAGE_CFG_DEBUG: |
1695 | el->debug = strtoul(value1, NULL, 10); | |
1696 | break; | |
a1b6b0a9 MS |
1697 | case IMAGE_CFG_KAK: |
1698 | el->key_name = strdup(value1); | |
1699 | break; | |
1700 | case IMAGE_CFG_CSK: | |
1701 | el->key_name = strdup(value1); | |
1702 | break; | |
1703 | case IMAGE_CFG_CSK_INDEX: | |
1704 | el->csk_idx = strtol(value1, NULL, 0); | |
1705 | break; | |
1706 | case IMAGE_CFG_JTAG_DELAY: | |
1707 | el->jtag_delay = strtoul(value1, NULL, 0); | |
1708 | break; | |
1709 | case IMAGE_CFG_BOX_ID: | |
1710 | el->boxid = strtoul(value1, NULL, 0); | |
1711 | break; | |
1712 | case IMAGE_CFG_FLASH_ID: | |
1713 | el->flashid = strtoul(value1, NULL, 0); | |
1714 | break; | |
1715 | case IMAGE_CFG_SEC_SPECIALIZED_IMG: | |
1716 | el->sec_specialized_img = true; | |
1717 | break; | |
1718 | case IMAGE_CFG_SEC_COMMON_IMG: | |
1719 | el->sec_specialized_img = false; | |
1720 | break; | |
1721 | case IMAGE_CFG_SEC_BOOT_DEV: | |
1722 | el->sec_boot_dev = strtoul(value1, NULL, 0); | |
1723 | break; | |
1724 | case IMAGE_CFG_SEC_FUSE_DUMP: | |
1725 | el->name = strdup(value1); | |
1726 | break; | |
4991b4f7 MS |
1727 | default: |
1728 | fprintf(stderr, unknown_msg, line); | |
aa0c7a86 | 1729 | } |
aa0c7a86 | 1730 | |
4acd2d24 SR |
1731 | return 0; |
1732 | } | |
aa0c7a86 PW |
1733 | |
1734 | /* | |
4acd2d24 SR |
1735 | * Parse the configuration file 'fcfg' into the array of configuration |
1736 | * elements 'image_cfg', and return the number of configuration | |
1737 | * elements in 'cfgn'. | |
aa0c7a86 | 1738 | */ |
4acd2d24 SR |
1739 | static int image_create_config_parse(FILE *fcfg) |
1740 | { | |
1741 | int ret; | |
1742 | int cfgi = 0; | |
1743 | ||
1744 | /* Parse the configuration file */ | |
1745 | while (!feof(fcfg)) { | |
1746 | char *line; | |
1747 | char buf[256]; | |
1748 | ||
1749 | /* Read the current line */ | |
1750 | memset(buf, 0, sizeof(buf)); | |
1751 | line = fgets(buf, sizeof(buf), fcfg); | |
1752 | if (!line) | |
1753 | break; | |
1754 | ||
1755 | /* Ignore useless lines */ | |
1756 | if (line[0] == '\n' || line[0] == '#') | |
1757 | continue; | |
1758 | ||
1759 | /* Strip final newline */ | |
1760 | if (line[strlen(line) - 1] == '\n') | |
1761 | line[strlen(line) - 1] = 0; | |
1762 | ||
1763 | /* Parse the current line */ | |
1764 | ret = image_create_config_parse_oneline(line, | |
1765 | &image_cfg[cfgi]); | |
1766 | if (ret) | |
1767 | return ret; | |
1768 | ||
1769 | cfgi++; | |
1770 | ||
1771 | if (cfgi >= IMAGE_CFG_ELEMENT_MAX) { | |
1772 | fprintf(stderr, | |
1773 | "Too many configuration elements in .cfg file\n"); | |
1774 | return -1; | |
1775 | } | |
1776 | } | |
1777 | ||
1778 | cfgn = cfgi; | |
1779 | return 0; | |
1780 | } | |
1781 | ||
1782 | static int image_get_version(void) | |
1783 | { | |
1784 | struct image_cfg_element *e; | |
1785 | ||
1786 | e = image_find_option(IMAGE_CFG_VERSION); | |
1787 | if (!e) | |
1788 | return -1; | |
1789 | ||
1790 | return e->version; | |
1791 | } | |
1792 | ||
4acd2d24 | 1793 | static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd, |
f86ed6a8 | 1794 | struct image_tool_params *params) |
aa0c7a86 | 1795 | { |
4acd2d24 SR |
1796 | FILE *fcfg; |
1797 | void *image = NULL; | |
1798 | int version; | |
39c78724 | 1799 | size_t dataoff = 0; |
e23ad5d5 | 1800 | size_t datasz; |
aa0c7a86 | 1801 | uint32_t checksum; |
e23ad5d5 | 1802 | struct stat s; |
4acd2d24 | 1803 | int ret; |
aa0c7a86 | 1804 | |
e23ad5d5 T |
1805 | /* |
1806 | * Do not use sbuf->st_size as it contains size with padding. | |
1807 | * We need original image data size, so stat original file. | |
1808 | */ | |
1809 | if (stat(params->datafile, &s)) { | |
1810 | fprintf(stderr, "Could not stat data file %s: %s\n", | |
1811 | params->datafile, strerror(errno)); | |
1812 | exit(EXIT_FAILURE); | |
1813 | } | |
1814 | datasz = ALIGN(s.st_size, 4); | |
1815 | ||
4acd2d24 SR |
1816 | fcfg = fopen(params->imagename, "r"); |
1817 | if (!fcfg) { | |
1818 | fprintf(stderr, "Could not open input file %s\n", | |
1819 | params->imagename); | |
1820 | exit(EXIT_FAILURE); | |
1821 | } | |
1822 | ||
1823 | image_cfg = malloc(IMAGE_CFG_ELEMENT_MAX * | |
1824 | sizeof(struct image_cfg_element)); | |
1825 | if (!image_cfg) { | |
1826 | fprintf(stderr, "Cannot allocate memory\n"); | |
1827 | fclose(fcfg); | |
1828 | exit(EXIT_FAILURE); | |
1829 | } | |
1830 | ||
1831 | memset(image_cfg, 0, | |
1832 | IMAGE_CFG_ELEMENT_MAX * sizeof(struct image_cfg_element)); | |
1833 | rewind(fcfg); | |
1834 | ||
1835 | ret = image_create_config_parse(fcfg); | |
1836 | fclose(fcfg); | |
1837 | if (ret) { | |
1838 | free(image_cfg); | |
1839 | exit(EXIT_FAILURE); | |
1840 | } | |
1841 | ||
1842 | version = image_get_version(); | |
934a529f SR |
1843 | switch (version) { |
1844 | /* | |
1845 | * Fallback to version 0 if no version is provided in the | |
1846 | * cfg file | |
1847 | */ | |
1848 | case -1: | |
1849 | case 0: | |
39c78724 | 1850 | image = image_create_v0(&dataoff, params, datasz + 4); |
934a529f SR |
1851 | break; |
1852 | ||
1853 | case 1: | |
39c78724 | 1854 | image = image_create_v1(&dataoff, params, ptr, datasz + 4); |
934a529f SR |
1855 | break; |
1856 | ||
1857 | default: | |
1858 | fprintf(stderr, "Unsupported version %d\n", version); | |
1859 | free(image_cfg); | |
1860 | exit(EXIT_FAILURE); | |
1861 | } | |
4acd2d24 SR |
1862 | |
1863 | if (!image) { | |
1864 | fprintf(stderr, "Could not create image\n"); | |
1865 | free(image_cfg); | |
1866 | exit(EXIT_FAILURE); | |
1867 | } | |
1868 | ||
1869 | free(image_cfg); | |
aa0c7a86 | 1870 | |
e23ad5d5 | 1871 | /* Build and add image data checksum */ |
39c78724 | 1872 | checksum = cpu_to_le32(image_checksum32((uint8_t *)ptr + dataoff, |
e23ad5d5 | 1873 | datasz)); |
39c78724 | 1874 | memcpy((uint8_t *)ptr + dataoff + datasz, &checksum, sizeof(uint32_t)); |
aa0c7a86 | 1875 | |
4acd2d24 | 1876 | /* Finally copy the header into the image area */ |
9b4531f6 | 1877 | memcpy(ptr, image, kwbheader_size(image)); |
aa0c7a86 | 1878 | |
4acd2d24 | 1879 | free(image); |
aa0c7a86 PW |
1880 | } |
1881 | ||
4acd2d24 | 1882 | static void kwbimage_print_header(const void *ptr) |
aa0c7a86 | 1883 | { |
4acd2d24 | 1884 | struct main_hdr_v0 *mhdr = (struct main_hdr_v0 *)ptr; |
f76ae257 | 1885 | struct bin_hdr_v0 *bhdr; |
732c930b | 1886 | struct opt_hdr_v1 *ohdr; |
4acd2d24 SR |
1887 | |
1888 | printf("Image Type: MVEBU Boot from %s Image\n", | |
1889 | image_boot_mode_name(mhdr->blockid)); | |
acb0b38d | 1890 | printf("Image version:%d\n", kwbimage_version(ptr)); |
34dcf952 | 1891 | |
732c930b MB |
1892 | for_each_opt_hdr_v1 (ohdr, mhdr) { |
1893 | if (ohdr->headertype == OPT_HDR_V1_BINARY_TYPE) { | |
c934c9a6 | 1894 | printf("BIN Img Size: "); |
732c930b MB |
1895 | genimg_print_size(opt_hdr_v1_size(ohdr) - 12 - |
1896 | 4 * ohdr->data[0]); | |
63cf0d72 T |
1897 | printf("BIN Img Offs: "); |
1898 | genimg_print_size(((uint8_t *)ohdr - (uint8_t *)mhdr) + | |
1899 | 8 + 4 * ohdr->data[0]); | |
34dcf952 T |
1900 | } |
1901 | } | |
732c930b | 1902 | |
f76ae257 T |
1903 | for_each_bin_hdr_v0(bhdr, mhdr) { |
1904 | printf("BIN Img Size: "); | |
1905 | genimg_print_size(le32_to_cpu(bhdr->size)); | |
1906 | printf("BIN Img Addr: %08x\n", le32_to_cpu(bhdr->destaddr)); | |
1907 | printf("BIN Img Entr: %08x\n", le32_to_cpu(bhdr->execaddr)); | |
1908 | } | |
1909 | ||
26f195c7 | 1910 | printf("Data Size: "); |
9f39f199 | 1911 | genimg_print_size(le32_to_cpu(mhdr->blocksize) - sizeof(uint32_t)); |
443894a8 T |
1912 | printf("Data Offset: "); |
1913 | if (mhdr->blockid == IBR_HDR_SATA_ID) | |
1914 | printf("%u Sector%s (LBA)\n", le32_to_cpu(mhdr->srcaddr), | |
1915 | le32_to_cpu(mhdr->srcaddr) != 1 ? "s" : ""); | |
1916 | else | |
1917 | genimg_print_size(le32_to_cpu(mhdr->srcaddr)); | |
9f39f199 T |
1918 | printf("Load Address: %08x\n", le32_to_cpu(mhdr->destaddr)); |
1919 | printf("Entry Point: %08x\n", le32_to_cpu(mhdr->execaddr)); | |
aa0c7a86 PW |
1920 | } |
1921 | ||
4acd2d24 | 1922 | static int kwbimage_check_image_types(uint8_t type) |
aa0c7a86 PW |
1923 | { |
1924 | if (type == IH_TYPE_KWBIMAGE) | |
1925 | return EXIT_SUCCESS; | |
94490a4a MS |
1926 | |
1927 | return EXIT_FAILURE; | |
aa0c7a86 PW |
1928 | } |
1929 | ||
4acd2d24 SR |
1930 | static int kwbimage_verify_header(unsigned char *ptr, int image_size, |
1931 | struct image_tool_params *params) | |
1932 | { | |
fe2fd73d | 1933 | size_t header_size = kwbheader_size(ptr); |
700ea98b T |
1934 | uint8_t blockid; |
1935 | uint32_t offset; | |
1936 | uint32_t size; | |
fe2fd73d | 1937 | uint8_t csum; |
6cd5678c | 1938 | |
cbd0043e T |
1939 | if (header_size > 192*1024) |
1940 | return -FDT_ERR_BADSTRUCTURE; | |
1941 | ||
6cd5678c AG |
1942 | if (header_size > image_size) |
1943 | return -FDT_ERR_BADSTRUCTURE; | |
4acd2d24 | 1944 | |
db7cd4ed | 1945 | if (!main_hdr_checksum_ok(ptr)) |
4acd2d24 SR |
1946 | return -FDT_ERR_BADSTRUCTURE; |
1947 | ||
1948 | /* Only version 0 extended header has checksum */ | |
acb0b38d | 1949 | if (kwbimage_version(ptr) == 0) { |
fe2c0e25 | 1950 | struct main_hdr_v0 *mhdr = (struct main_hdr_v0 *)ptr; |
f76ae257 T |
1951 | struct ext_hdr_v0 *ext_hdr; |
1952 | struct bin_hdr_v0 *bhdr; | |
e89016c4 | 1953 | |
f76ae257 | 1954 | for_each_ext_hdr_v0(ext_hdr, ptr) { |
fe2fd73d MB |
1955 | csum = image_checksum8(ext_hdr, sizeof(*ext_hdr) - 1); |
1956 | if (csum != ext_hdr->checksum) | |
fe2c0e25 T |
1957 | return -FDT_ERR_BADSTRUCTURE; |
1958 | } | |
700ea98b | 1959 | |
f76ae257 T |
1960 | for_each_bin_hdr_v0(bhdr, ptr) { |
1961 | csum = image_checksum8(bhdr, (uint8_t *)&bhdr->checksum - (uint8_t *)bhdr - 1); | |
1962 | if (csum != bhdr->checksum) | |
1963 | return -FDT_ERR_BADSTRUCTURE; | |
1964 | ||
1965 | if (bhdr->offset > sizeof(*bhdr) || bhdr->offset % 4 != 0) | |
1966 | return -FDT_ERR_BADSTRUCTURE; | |
1967 | ||
1968 | if (bhdr->offset + bhdr->size + 4 > sizeof(*bhdr) || bhdr->size % 4 != 0) | |
1969 | return -FDT_ERR_BADSTRUCTURE; | |
1970 | ||
1971 | if (image_checksum32((uint8_t *)bhdr + bhdr->offset, bhdr->size) != | |
1972 | *(uint32_t *)((uint8_t *)bhdr + bhdr->offset + bhdr->size)) | |
1973 | return -FDT_ERR_BADSTRUCTURE; | |
1974 | } | |
1975 | ||
700ea98b T |
1976 | blockid = mhdr->blockid; |
1977 | offset = le32_to_cpu(mhdr->srcaddr); | |
1978 | size = le32_to_cpu(mhdr->blocksize); | |
acb0b38d | 1979 | } else if (kwbimage_version(ptr) == 1) { |
9380445f | 1980 | struct main_hdr_v1 *mhdr = (struct main_hdr_v1 *)ptr; |
732c930b MB |
1981 | const uint8_t *mhdr_end; |
1982 | struct opt_hdr_v1 *ohdr; | |
9380445f | 1983 | |
732c930b MB |
1984 | mhdr_end = (uint8_t *)mhdr + header_size; |
1985 | for_each_opt_hdr_v1 (ohdr, ptr) | |
1986 | if (!opt_hdr_v1_valid_size(ohdr, mhdr_end)) | |
1987 | return -FDT_ERR_BADSTRUCTURE; | |
e0c243c3 | 1988 | |
700ea98b | 1989 | blockid = mhdr->blockid; |
e0c243c3 | 1990 | offset = le32_to_cpu(mhdr->srcaddr); |
700ea98b T |
1991 | size = le32_to_cpu(mhdr->blocksize); |
1992 | } else { | |
1993 | return -FDT_ERR_BADSTRUCTURE; | |
1994 | } | |
e0c243c3 | 1995 | |
700ea98b T |
1996 | /* |
1997 | * For SATA srcaddr is specified in number of sectors. | |
954c94aa | 1998 | * This expects that sector size is 512 bytes. |
700ea98b | 1999 | */ |
954c94aa | 2000 | if (blockid == IBR_HDR_SATA_ID) |
700ea98b | 2001 | offset *= 512; |
e0c243c3 | 2002 | |
700ea98b T |
2003 | /* |
2004 | * For PCIe srcaddr is always set to 0xFFFFFFFF. | |
2005 | * This expects that data starts after all headers. | |
2006 | */ | |
2007 | if (blockid == IBR_HDR_PEX_ID && offset == 0xFFFFFFFF) | |
2008 | offset = header_size; | |
e0c243c3 | 2009 | |
700ea98b T |
2010 | if (offset > image_size || offset % 4 != 0) |
2011 | return -FDT_ERR_BADSTRUCTURE; | |
e0c243c3 | 2012 | |
700ea98b T |
2013 | if (size < 4 || offset + size > image_size || size % 4 != 0) |
2014 | return -FDT_ERR_BADSTRUCTURE; | |
e0c243c3 | 2015 | |
700ea98b T |
2016 | if (image_checksum32(ptr + offset, size - 4) != |
2017 | *(uint32_t *)(ptr + offset + size - 4)) | |
b984056f | 2018 | return -FDT_ERR_BADSTRUCTURE; |
9380445f | 2019 | |
4acd2d24 SR |
2020 | return 0; |
2021 | } | |
2022 | ||
2023 | static int kwbimage_generate(struct image_tool_params *params, | |
2024 | struct image_type_params *tparams) | |
2025 | { | |
6cbf7eda | 2026 | FILE *fcfg; |
37cb9c15 | 2027 | struct stat s; |
4acd2d24 | 2028 | int alloc_len; |
c934aad0 | 2029 | int bootfrom; |
6cbf7eda | 2030 | int version; |
4acd2d24 | 2031 | void *hdr; |
6cbf7eda | 2032 | int ret; |
4acd2d24 | 2033 | |
6cbf7eda PW |
2034 | fcfg = fopen(params->imagename, "r"); |
2035 | if (!fcfg) { | |
2036 | fprintf(stderr, "Could not open input file %s\n", | |
2037 | params->imagename); | |
2038 | exit(EXIT_FAILURE); | |
2039 | } | |
2040 | ||
37cb9c15 T |
2041 | if (stat(params->datafile, &s)) { |
2042 | fprintf(stderr, "Could not stat data file %s: %s\n", | |
2043 | params->datafile, strerror(errno)); | |
2044 | exit(EXIT_FAILURE); | |
2045 | } | |
2046 | ||
6cbf7eda PW |
2047 | image_cfg = malloc(IMAGE_CFG_ELEMENT_MAX * |
2048 | sizeof(struct image_cfg_element)); | |
2049 | if (!image_cfg) { | |
2050 | fprintf(stderr, "Cannot allocate memory\n"); | |
2051 | fclose(fcfg); | |
2052 | exit(EXIT_FAILURE); | |
2053 | } | |
2054 | ||
2055 | memset(image_cfg, 0, | |
2056 | IMAGE_CFG_ELEMENT_MAX * sizeof(struct image_cfg_element)); | |
2057 | rewind(fcfg); | |
2058 | ||
2059 | ret = image_create_config_parse(fcfg); | |
2060 | fclose(fcfg); | |
2061 | if (ret) { | |
2062 | free(image_cfg); | |
2063 | exit(EXIT_FAILURE); | |
2064 | } | |
2065 | ||
c934aad0 | 2066 | bootfrom = image_get_bootfrom(); |
6cbf7eda PW |
2067 | version = image_get_version(); |
2068 | switch (version) { | |
2069 | /* | |
2070 | * Fallback to version 0 if no version is provided in the | |
2071 | * cfg file | |
2072 | */ | |
2073 | case -1: | |
2074 | case 0: | |
851114be | 2075 | alloc_len = image_headersz_v0(NULL); |
6cbf7eda PW |
2076 | break; |
2077 | ||
2078 | case 1: | |
e93cf53f | 2079 | alloc_len = image_headersz_v1(NULL); |
252e7c3a T |
2080 | if (!alloc_len) { |
2081 | free(image_cfg); | |
2082 | exit(EXIT_FAILURE); | |
2083 | } | |
78d997f9 T |
2084 | if (alloc_len > 192*1024) { |
2085 | fprintf(stderr, "Header is too big (%u bytes), maximal kwbimage header size is %u bytes\n", alloc_len, 192*1024); | |
2086 | free(image_cfg); | |
2087 | exit(EXIT_FAILURE); | |
2088 | } | |
6cbf7eda PW |
2089 | break; |
2090 | ||
2091 | default: | |
2092 | fprintf(stderr, "Unsupported version %d\n", version); | |
2093 | free(image_cfg); | |
2094 | exit(EXIT_FAILURE); | |
4acd2d24 SR |
2095 | } |
2096 | ||
9b4531f6 T |
2097 | alloc_len = image_headersz_align(alloc_len, image_get_bootfrom()); |
2098 | ||
6cbf7eda PW |
2099 | free(image_cfg); |
2100 | ||
4acd2d24 SR |
2101 | hdr = malloc(alloc_len); |
2102 | if (!hdr) { | |
2103 | fprintf(stderr, "%s: malloc return failure: %s\n", | |
2104 | params->cmdname, strerror(errno)); | |
2105 | exit(EXIT_FAILURE); | |
2106 | } | |
2107 | ||
2108 | memset(hdr, 0, alloc_len); | |
2109 | tparams->header_size = alloc_len; | |
2110 | tparams->hdr = hdr; | |
2111 | ||
77720859 SR |
2112 | /* |
2113 | * The resulting image needs to be 4-byte aligned. At least | |
2114 | * the Marvell hdrparser tool complains if its unaligned. | |
37cb9c15 | 2115 | * After the image data is stored 4-byte checksum. |
188099ed | 2116 | * Final UART image must be aligned to 128 bytes. |
c934aad0 | 2117 | * Final SPI and NAND images must be aligned to 256 bytes. |
501a54a2 | 2118 | * Final SATA and SDIO images must be aligned to 512 bytes. |
77720859 | 2119 | */ |
c934aad0 T |
2120 | if (bootfrom == IBR_HDR_SPI_ID || bootfrom == IBR_HDR_NAND_ID) |
2121 | return 4 + (256 - (alloc_len + s.st_size + 4) % 256) % 256; | |
501a54a2 T |
2122 | else if (bootfrom == IBR_HDR_SATA_ID || bootfrom == IBR_HDR_SDIO_ID) |
2123 | return 4 + (512 - (alloc_len + s.st_size + 4) % 512) % 512; | |
188099ed T |
2124 | else if (bootfrom == IBR_HDR_UART_ID) |
2125 | return 4 + (128 - (alloc_len + s.st_size + 4) % 128) % 128; | |
c934aad0 T |
2126 | else |
2127 | return 4 + (4 - s.st_size % 4) % 4; | |
4acd2d24 SR |
2128 | } |
2129 | ||
1a8e6b63 T |
2130 | static int kwbimage_generate_config(void *ptr, struct image_tool_params *params) |
2131 | { | |
2132 | struct main_hdr_v0 *mhdr0 = (struct main_hdr_v0 *)ptr; | |
2133 | struct main_hdr_v1 *mhdr = (struct main_hdr_v1 *)ptr; | |
2134 | size_t header_size = kwbheader_size(ptr); | |
2135 | struct register_set_hdr_v1 *regset_hdr; | |
2136 | struct ext_hdr_v0_reg *regdata; | |
2137 | struct ext_hdr_v0 *ehdr0; | |
f76ae257 | 2138 | struct bin_hdr_v0 *bhdr0; |
1a8e6b63 | 2139 | struct opt_hdr_v1 *ohdr; |
908801dc | 2140 | int regset_count; |
f76ae257 | 2141 | int params_count; |
1a8e6b63 | 2142 | unsigned offset; |
f76ae257 | 2143 | int is_v0_ext; |
1a8e6b63 T |
2144 | int cur_idx; |
2145 | int version; | |
2146 | FILE *f; | |
2147 | int i; | |
2148 | ||
2149 | f = fopen(params->outfile, "w"); | |
2150 | if (!f) { | |
2151 | fprintf(stderr, "Can't open \"%s\": %s\n", params->outfile, strerror(errno)); | |
2152 | return -1; | |
2153 | } | |
2154 | ||
2155 | version = kwbimage_version(ptr); | |
2156 | ||
f76ae257 T |
2157 | is_v0_ext = 0; |
2158 | if (version == 0) { | |
2159 | if (mhdr0->ext > 1 || mhdr0->bin || | |
2160 | ((ehdr0 = ext_hdr_v0_first(ptr)) && | |
2161 | (ehdr0->match_addr || ehdr0->match_mask || ehdr0->match_value))) | |
2162 | is_v0_ext = 1; | |
2163 | } | |
2164 | ||
1a8e6b63 T |
2165 | if (version != 0) |
2166 | fprintf(f, "VERSION %d\n", version); | |
2167 | ||
2168 | fprintf(f, "BOOT_FROM %s\n", image_boot_mode_name(mhdr->blockid) ?: "<unknown>"); | |
2169 | ||
2170 | if (version == 0 && mhdr->blockid == IBR_HDR_NAND_ID) | |
2171 | fprintf(f, "NAND_ECC_MODE %s\n", image_nand_ecc_mode_name(mhdr0->nandeccmode)); | |
2172 | ||
2173 | if (mhdr->blockid == IBR_HDR_NAND_ID) | |
aab9b063 | 2174 | fprintf(f, "NAND_PAGE_SIZE 0x%x\n", (unsigned)le16_to_cpu(mhdr->nandpagesize)); |
1a8e6b63 | 2175 | |
0a3a392c | 2176 | if (mhdr->blockid == IBR_HDR_NAND_ID && (version != 0 || is_v0_ext || mhdr->nandblocksize != 0)) { |
226abde8 T |
2177 | if (mhdr->nandblocksize != 0) /* block size explicitly set in 64 kB unit */ |
2178 | fprintf(f, "NAND_BLKSZ 0x%x\n", (unsigned)mhdr->nandblocksize * 64*1024); | |
2179 | else if (le16_to_cpu(mhdr->nandpagesize) > 512) | |
2180 | fprintf(f, "NAND_BLKSZ 0x10000\n"); /* large page NAND flash = 64 kB block size */ | |
2181 | else | |
2182 | fprintf(f, "NAND_BLKSZ 0x4000\n"); /* small page NAND flash = 16 kB block size */ | |
2183 | } | |
f76ae257 | 2184 | |
e060779e | 2185 | if (mhdr->blockid == IBR_HDR_NAND_ID && (version != 0 || is_v0_ext)) |
1a8e6b63 | 2186 | fprintf(f, "NAND_BADBLK_LOCATION 0x%x\n", (unsigned)mhdr->nandbadblklocation); |
1a8e6b63 T |
2187 | |
2188 | if (version == 0 && mhdr->blockid == IBR_HDR_SATA_ID) | |
2189 | fprintf(f, "SATA_PIO_MODE %u\n", (unsigned)mhdr0->satapiomode); | |
2190 | ||
2191 | /* | |
2192 | * Addresses and sizes which are specified by mkimage command line | |
2193 | * arguments and not in kwbimage config file | |
2194 | */ | |
2195 | ||
2196 | if (version != 0) | |
2197 | fprintf(f, "#HEADER_SIZE 0x%x\n", | |
2198 | ((unsigned)mhdr->headersz_msb << 8) | le16_to_cpu(mhdr->headersz_lsb)); | |
2199 | ||
2200 | fprintf(f, "#SRC_ADDRESS 0x%x\n", le32_to_cpu(mhdr->srcaddr)); | |
2201 | fprintf(f, "#BLOCK_SIZE 0x%x\n", le32_to_cpu(mhdr->blocksize)); | |
2202 | fprintf(f, "#DEST_ADDRESS 0x%08x\n", le32_to_cpu(mhdr->destaddr)); | |
2203 | fprintf(f, "#EXEC_ADDRESS 0x%08x\n", le32_to_cpu(mhdr->execaddr)); | |
2204 | ||
2205 | if (version != 0) { | |
2206 | if (options_to_baudrate(mhdr->options)) | |
2207 | fprintf(f, "BAUDRATE %u\n", options_to_baudrate(mhdr->options)); | |
2208 | if (options_to_baudrate(mhdr->options) || | |
2209 | ((mhdr->options >> 3) & 0x3) || ((mhdr->options >> 5) & 0x7)) { | |
2210 | fprintf(f, "UART_PORT %u\n", (unsigned)((mhdr->options >> 3) & 0x3)); | |
2211 | fprintf(f, "UART_MPP 0x%x\n", (unsigned)((mhdr->options >> 5) & 0x7)); | |
2212 | } | |
2213 | if (mhdr->flags & 0x1) | |
2214 | fprintf(f, "DEBUG 1\n"); | |
2215 | } | |
2216 | ||
2217 | cur_idx = 1; | |
2218 | for_each_opt_hdr_v1(ohdr, ptr) { | |
2219 | if (ohdr->headertype == OPT_HDR_V1_SECURE_TYPE) { | |
2220 | fprintf(f, "#SECURE_HEADER\n"); | |
2221 | } else if (ohdr->headertype == OPT_HDR_V1_BINARY_TYPE) { | |
2222 | fprintf(f, "BINARY binary%d.bin", cur_idx); | |
2223 | for (i = 0; i < ohdr->data[0]; i++) | |
2224 | fprintf(f, " 0x%x", le32_to_cpu(((uint32_t *)ohdr->data)[i + 1])); | |
2225 | offset = (unsigned)((uint8_t *)ohdr - (uint8_t *)mhdr) + 8 + 4 * ohdr->data[0]; | |
2226 | fprintf(f, " LOAD_ADDRESS 0x%08x\n", 0x40000000 + offset); | |
2227 | fprintf(f, " # for CPU SHEEVA: LOAD_ADDRESS 0x%08x\n", 0x40004000 + offset); | |
2228 | cur_idx++; | |
2229 | } else if (ohdr->headertype == OPT_HDR_V1_REGISTER_TYPE) { | |
2230 | regset_hdr = (struct register_set_hdr_v1 *)ohdr; | |
908801dc T |
2231 | if (opt_hdr_v1_size(ohdr) > sizeof(*ohdr)) |
2232 | regset_count = (opt_hdr_v1_size(ohdr) - sizeof(*ohdr)) / | |
2233 | sizeof(regset_hdr->data[0].entry); | |
2234 | else | |
2235 | regset_count = 0; | |
2236 | for (i = 0; i < regset_count; i++) | |
1a8e6b63 T |
2237 | fprintf(f, "DATA 0x%08x 0x%08x\n", |
2238 | le32_to_cpu(regset_hdr->data[i].entry.address), | |
2239 | le32_to_cpu(regset_hdr->data[i].entry.value)); | |
908801dc T |
2240 | if (regset_count > 0) { |
2241 | if (regset_hdr->data[regset_count-1].last_entry.delay != | |
2242 | REGISTER_SET_HDR_OPT_DELAY_SDRAM_SETUP) | |
1a8e6b63 | 2243 | fprintf(f, "DATA_DELAY %u\n", |
908801dc | 2244 | (unsigned)regset_hdr->data[regset_count-1].last_entry.delay); |
1a8e6b63 T |
2245 | else |
2246 | fprintf(f, "DATA_DELAY SDRAM_SETUP\n"); | |
2247 | } | |
2248 | } | |
2249 | } | |
2250 | ||
f76ae257 T |
2251 | if (version == 0 && !is_v0_ext && le16_to_cpu(mhdr0->ddrinitdelay)) |
2252 | fprintf(f, "DDR_INIT_DELAY %u\n", (unsigned)le16_to_cpu(mhdr0->ddrinitdelay)); | |
2253 | ||
2254 | for_each_ext_hdr_v0(ehdr0, ptr) { | |
2255 | if (is_v0_ext) { | |
2256 | fprintf(f, "\nMATCH ADDRESS 0x%08x MASK 0x%08x VALUE 0x%08x\n", | |
2257 | le32_to_cpu(ehdr0->match_addr), | |
2258 | le32_to_cpu(ehdr0->match_mask), | |
2259 | le32_to_cpu(ehdr0->match_value)); | |
2260 | if (ehdr0->rsvd1[0] || ehdr0->rsvd1[1] || ehdr0->rsvd1[2] || | |
2261 | ehdr0->rsvd1[3] || ehdr0->rsvd1[4] || ehdr0->rsvd1[5] || | |
2262 | ehdr0->rsvd1[6] || ehdr0->rsvd1[7]) | |
2263 | fprintf(f, "#DDR_RSVD1 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", | |
2264 | ehdr0->rsvd1[0], ehdr0->rsvd1[1], ehdr0->rsvd1[2], | |
2265 | ehdr0->rsvd1[3], ehdr0->rsvd1[4], ehdr0->rsvd1[5], | |
2266 | ehdr0->rsvd1[6], ehdr0->rsvd1[7]); | |
2267 | if (ehdr0->rsvd2[0] || ehdr0->rsvd2[1] || ehdr0->rsvd2[2] || | |
2268 | ehdr0->rsvd2[3] || ehdr0->rsvd2[4] || ehdr0->rsvd2[5] || | |
2269 | ehdr0->rsvd2[6]) | |
2270 | fprintf(f, "#DDR_RSVD2 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", | |
2271 | ehdr0->rsvd2[0], ehdr0->rsvd2[1], ehdr0->rsvd2[2], | |
2272 | ehdr0->rsvd2[3], ehdr0->rsvd2[4], ehdr0->rsvd2[5], | |
2273 | ehdr0->rsvd2[6]); | |
2274 | if (ehdr0->ddrwritetype) | |
2275 | fprintf(f, "DDR_WRITE_TYPE %u\n", (unsigned)ehdr0->ddrwritetype); | |
2276 | if (ehdr0->ddrresetmpp) | |
2277 | fprintf(f, "DDR_RESET_MPP 0x%x\n", (unsigned)ehdr0->ddrresetmpp); | |
2278 | if (ehdr0->ddrclkenmpp) | |
2279 | fprintf(f, "DDR_CLKEN_MPP 0x%x\n", (unsigned)ehdr0->ddrclkenmpp); | |
2280 | if (ehdr0->ddrinitdelay) | |
2281 | fprintf(f, "DDR_INIT_DELAY %u\n", (unsigned)ehdr0->ddrinitdelay); | |
2282 | } | |
2283 | ||
1a8e6b63 T |
2284 | if (ehdr0->offset) { |
2285 | for (regdata = (struct ext_hdr_v0_reg *)((uint8_t *)ptr + ehdr0->offset); | |
a2389213 T |
2286 | (uint8_t *)regdata < (uint8_t *)ptr + header_size && |
2287 | (regdata->raddr || regdata->rdata); | |
1a8e6b63 T |
2288 | regdata++) |
2289 | fprintf(f, "DATA 0x%08x 0x%08x\n", le32_to_cpu(regdata->raddr), | |
2290 | le32_to_cpu(regdata->rdata)); | |
a2389213 T |
2291 | if ((uint8_t *)regdata != (uint8_t *)ptr + ehdr0->offset) |
2292 | fprintf(f, "DATA 0x0 0x0\n"); | |
1a8e6b63 | 2293 | } |
f76ae257 T |
2294 | |
2295 | if (le32_to_cpu(ehdr0->enddelay)) | |
2296 | fprintf(f, "DATA_DELAY %u\n", le32_to_cpu(ehdr0->enddelay)); | |
2297 | else if (is_v0_ext) | |
2298 | fprintf(f, "DATA_DELAY SDRAM_SETUP\n"); | |
1a8e6b63 T |
2299 | } |
2300 | ||
f76ae257 T |
2301 | cur_idx = 1; |
2302 | for_each_bin_hdr_v0(bhdr0, ptr) { | |
2303 | fprintf(f, "\nMATCH ADDRESS 0x%08x MASK 0x%08x VALUE 0x%08x\n", | |
2304 | le32_to_cpu(bhdr0->match_addr), | |
2305 | le32_to_cpu(bhdr0->match_mask), | |
2306 | le32_to_cpu(bhdr0->match_value)); | |
2307 | ||
2308 | fprintf(f, "BINARY binary%d.bin", cur_idx); | |
2309 | params_count = fls4(bhdr0->params_flags & 0xF); | |
2310 | for (i = 0; i < params_count; i++) | |
2311 | fprintf(f, " 0x%x", (bhdr0->params[i] & (1 << i)) ? bhdr0->params[i] : 0); | |
2312 | fprintf(f, " LOAD_ADDRESS 0x%08x", le32_to_cpu(bhdr0->destaddr)); | |
2313 | fprintf(f, " EXEC_ADDRESS 0x%08x", le32_to_cpu(bhdr0->execaddr)); | |
2314 | fprintf(f, "\n"); | |
2315 | ||
2316 | fprintf(f, "#BINARY_OFFSET 0x%x\n", le32_to_cpu(bhdr0->offset)); | |
2317 | fprintf(f, "#BINARY_SIZE 0x%x\n", le32_to_cpu(bhdr0->size)); | |
2318 | ||
2319 | if (bhdr0->rsvd1) | |
2320 | fprintf(f, "#BINARY_RSVD1 0x%x\n", (unsigned)bhdr0->rsvd1); | |
2321 | if (bhdr0->rsvd2) | |
2322 | fprintf(f, "#BINARY_RSVD2 0x%x\n", (unsigned)bhdr0->rsvd2); | |
2323 | ||
2324 | cur_idx++; | |
2325 | } | |
1a8e6b63 T |
2326 | |
2327 | /* Undocumented reserved fields */ | |
2328 | ||
2329 | if (version == 0 && (mhdr0->rsvd1[0] || mhdr0->rsvd1[1] || mhdr0->rsvd1[2])) | |
2330 | fprintf(f, "#RSVD1 0x%x 0x%x 0x%x\n", (unsigned)mhdr0->rsvd1[0], | |
2331 | (unsigned)mhdr0->rsvd1[1], (unsigned)mhdr0->rsvd1[2]); | |
2332 | ||
1a8e6b63 T |
2333 | if (version == 0 && le16_to_cpu(mhdr0->rsvd2)) |
2334 | fprintf(f, "#RSVD2 0x%x\n", (unsigned)le16_to_cpu(mhdr0->rsvd2)); | |
2335 | ||
2336 | if (version != 0 && mhdr->reserved4) | |
2337 | fprintf(f, "#RESERVED4 0x%x\n", (unsigned)mhdr->reserved4); | |
2338 | ||
2339 | if (version != 0 && mhdr->reserved5) | |
2340 | fprintf(f, "#RESERVED5 0x%x\n", (unsigned)le16_to_cpu(mhdr->reserved5)); | |
2341 | ||
2342 | fclose(f); | |
2343 | ||
2344 | return 0; | |
2345 | } | |
2346 | ||
aa6943ca T |
2347 | static int kwbimage_extract_subimage(void *ptr, struct image_tool_params *params) |
2348 | { | |
2349 | struct main_hdr_v1 *mhdr = (struct main_hdr_v1 *)ptr; | |
fe2fd73d | 2350 | size_t header_size = kwbheader_size(ptr); |
f76ae257 | 2351 | struct bin_hdr_v0 *bhdr; |
732c930b | 2352 | struct opt_hdr_v1 *ohdr; |
aa6943ca | 2353 | int idx = params->pflag; |
1972c7e3 | 2354 | int cur_idx; |
aa6943ca T |
2355 | uint32_t offset; |
2356 | ulong image; | |
2357 | ulong size; | |
2358 | ||
1a8e6b63 T |
2359 | /* Generate kwbimage config file when '-p -1' is specified */ |
2360 | if (idx == -1) | |
2361 | return kwbimage_generate_config(ptr, params); | |
2362 | ||
1972c7e3 T |
2363 | image = 0; |
2364 | size = 0; | |
2365 | ||
2366 | if (idx == 0) { | |
2367 | /* Extract data image when -p is not specified or when '-p 0' is specified */ | |
2368 | offset = le32_to_cpu(mhdr->srcaddr); | |
aa6943ca | 2369 | |
954c94aa | 2370 | if (mhdr->blockid == IBR_HDR_SATA_ID) |
1972c7e3 | 2371 | offset *= 512; |
732c930b | 2372 | |
1972c7e3 T |
2373 | if (mhdr->blockid == IBR_HDR_PEX_ID && offset == 0xFFFFFFFF) |
2374 | offset = header_size; | |
aa6943ca | 2375 | |
1972c7e3 T |
2376 | image = (ulong)((uint8_t *)ptr + offset); |
2377 | size = le32_to_cpu(mhdr->blocksize) - 4; | |
2378 | } else { | |
2379 | /* Extract N-th binary header executabe image when other '-p N' is specified */ | |
2380 | cur_idx = 1; | |
2381 | for_each_opt_hdr_v1(ohdr, ptr) { | |
2382 | if (ohdr->headertype != OPT_HDR_V1_BINARY_TYPE) | |
2383 | continue; | |
aa6943ca | 2384 | |
1972c7e3 T |
2385 | if (idx == cur_idx) { |
2386 | image = (ulong)&ohdr->data[4 + 4 * ohdr->data[0]]; | |
2387 | size = opt_hdr_v1_size(ohdr) - 12 - 4 * ohdr->data[0]; | |
2388 | break; | |
2389 | } | |
aa6943ca | 2390 | |
1972c7e3 T |
2391 | ++cur_idx; |
2392 | } | |
f76ae257 T |
2393 | for_each_bin_hdr_v0(bhdr, ptr) { |
2394 | if (idx == cur_idx) { | |
2395 | image = (ulong)bhdr + bhdr->offset; | |
2396 | size = bhdr->size; | |
2397 | break; | |
2398 | } | |
2399 | ++cur_idx; | |
2400 | } | |
aa6943ca | 2401 | |
1972c7e3 T |
2402 | if (!image) { |
2403 | fprintf(stderr, "Argument -p %d is invalid\n", idx); | |
2404 | fprintf(stderr, "Available subimages:\n"); | |
2405 | fprintf(stderr, " -p -1 - kwbimage config file\n"); | |
2406 | fprintf(stderr, " -p 0 - data image\n"); | |
2407 | if (cur_idx - 1 > 0) | |
2408 | fprintf(stderr, " -p N - Nth binary header image (totally: %d)\n", | |
2409 | cur_idx - 1); | |
2410 | return -1; | |
2411 | } | |
2412 | } | |
aa6943ca | 2413 | |
aa6943ca T |
2414 | return imagetool_save_subimage(params->outfile, image, size); |
2415 | } | |
2416 | ||
4acd2d24 SR |
2417 | /* |
2418 | * Report Error if xflag is set in addition to default | |
2419 | */ | |
2420 | static int kwbimage_check_params(struct image_tool_params *params) | |
2421 | { | |
e65ea147 | 2422 | if (!params->lflag && !params->iflag && !params->pflag && |
32860b00 | 2423 | (!params->imagename || !strlen(params->imagename))) { |
94490a4a MS |
2424 | char *msg = "Configuration file for kwbimage creation omitted"; |
2425 | ||
2426 | fprintf(stderr, "Error:%s - %s\n", params->cmdname, msg); | |
56087c1b | 2427 | return 1; |
4acd2d24 SR |
2428 | } |
2429 | ||
2430 | return (params->dflag && (params->fflag || params->lflag)) || | |
0201244c | 2431 | (params->fflag) || |
4acd2d24 | 2432 | (params->lflag && (params->dflag || params->fflag)) || |
aa6943ca | 2433 | (params->xflag); |
4acd2d24 SR |
2434 | } |
2435 | ||
aa0c7a86 PW |
2436 | /* |
2437 | * kwbimage type parameters definition | |
2438 | */ | |
a93648d1 GMF |
2439 | U_BOOT_IMAGE_TYPE( |
2440 | kwbimage, | |
2441 | "Marvell MVEBU Boot Image support", | |
2442 | 0, | |
2443 | NULL, | |
2444 | kwbimage_check_params, | |
2445 | kwbimage_verify_header, | |
2446 | kwbimage_print_header, | |
2447 | kwbimage_set_header, | |
aa6943ca | 2448 | kwbimage_extract_subimage, |
a93648d1 GMF |
2449 | kwbimage_check_image_types, |
2450 | NULL, | |
2451 | kwbimage_generate | |
2452 | ); |