[thirdparty/u-boot.git] / tools / mtk_image.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * MediaTek BootROM header definitions
 *
 * Copyright (C) 2018 MediaTek Inc.
 * Author: Weijie Gao <weijie.gao@mediatek.com>
 */

#ifndef _MTK_IMAGE_H
#define _MTK_IMAGE_H

/* Device header definitions, all fields are little-endian */

/* Header for NOR/SD/eMMC */
union gen_boot_header {
	struct {
		char name[12];
		uint32_t version;
		uint32_t size;
	};

	uint8_t pad[0x200];
};

#define EMMC_BOOT_NAME		"EMMC_BOOT"
#define SF_BOOT_NAME		"SF_BOOT"
#define SDMMC_BOOT_NAME		"SDMMC_BOOT"

/* BootROM layout header */
struct brom_layout_header {
	char name[8];
	uint32_t version;
	uint32_t header_size;
	uint32_t total_size;
	uint32_t magic;
	uint32_t type;
	uint32_t header_size_2;
	uint32_t total_size_2;
	uint32_t unused;
};

#define BRLYT_NAME		"BRLYT"
#define BRLYT_MAGIC		0x42424242

enum brlyt_img_type {
	BRLYT_TYPE_INVALID = 0,
	BRLYT_TYPE_NAND = 0x10002,
	BRLYT_TYPE_EMMC = 0x10005,
	BRLYT_TYPE_NOR = 0x10007,
	BRLYT_TYPE_SDMMC = 0x10008,
	BRLYT_TYPE_SNAND = 0x10009
};

/* Combined device header for NOR/SD/eMMC */
struct gen_device_header {
	union gen_boot_header boot;

	union {
		struct brom_layout_header brlyt;
		uint8_t brlyt_pad[0x400];
	};
};

/* BootROM header definitions */
struct gfh_common_header {
	uint32_t magic_version;
	uint16_t size;
	uint16_t type;
};

#define GFH_HEADER_MAGIC		0x4D4D4D
#define GFH_HEADER_VERSION_SHIFT	24

#define GFH_TYPE_FILE_INFO	0
#define GFH_TYPE_BL_INFO	1
#define GFH_TYPE_BROM_CFG	7
#define GFH_TYPE_BL_SEC_KEY	3
#define GFH_TYPE_ANTI_CLONE	2
#define GFH_TYPE_BROM_SEC_CFG	8

struct gfh_file_info {
	struct gfh_common_header gfh;
	char name[12];
	uint32_t unused;
	uint16_t file_type;
	uint8_t flash_type;
	uint8_t sig_type;
	uint32_t load_addr;
	uint32_t total_size;
	uint32_t max_size;
	uint32_t hdr_size;
	uint32_t sig_size;
	uint32_t jump_offset;
	uint32_t processed;
};

#define GFH_FILE_INFO_NAME	"FILE_INFO"

#define GFH_FLASH_TYPE_GEN	5
#define GFH_FLASH_TYPE_NAND	2

#define GFH_SIG_TYPE_NONE	0
#define GFH_SIG_TYPE_SHA256	1

struct gfh_bl_info {
	struct gfh_common_header gfh;
	uint32_t attr;
};

struct gfh_brom_cfg {
	struct gfh_common_header gfh;
	uint32_t cfg_bits;
	uint32_t usbdl_by_auto_detect_timeout_ms;
	uint8_t unused[0x45];
	uint8_t jump_bl_arm64;
	uint8_t unused2[2];
	uint32_t usbdl_by_kcol0_timeout_ms;
	uint32_t usbdl_by_flag_timeout_ms;
	uint32_t pad;
};

#define GFH_BROM_CFG_USBDL_BY_AUTO_DETECT_TIMEOUT_EN	0x02
#define GFH_BROM_CFG_USBDL_AUTO_DETECT_DIS		0x10
#define GFH_BROM_CFG_USBDL_BY_KCOL0_TIMEOUT_EN		0x80
#define GFH_BROM_CFG_USBDL_BY_FLAG_TIMEOUT_EN		0x100
#define GFH_BROM_CFG_JUMP_BL_ARM64_EN			0x1000
#define GFH_BROM_CFG_JUMP_BL_ARM64			0x64

struct gfh_bl_sec_key {
	struct gfh_common_header gfh;
	uint8_t pad[0x20c];
};

struct gfh_anti_clone {
	struct gfh_common_header gfh;
	uint8_t ac_b2k;
	uint8_t ac_b2c;
	uint16_t pad;
	uint32_t ac_offset;
	uint32_t ac_len;
};

struct gfh_brom_sec_cfg {
	struct gfh_common_header gfh;
	uint32_t cfg_bits;
	char customer_name[0x20];
	uint32_t pad;
};

#define BROM_SEC_CFG_JTAG_EN	1
#define BROM_SEC_CFG_UART_EN	2

struct gfh_header {
	struct gfh_file_info file_info;
	struct gfh_bl_info bl_info;
	struct gfh_brom_cfg brom_cfg;
	struct gfh_bl_sec_key bl_sec_key;
	struct gfh_anti_clone anti_clone;
	struct gfh_brom_sec_cfg brom_sec_cfg;
};

/* LK image header */

union lk_hdr {
	struct {
		uint32_t magic;
		uint32_t size;
		char name[32];
		uint32_t loadaddr;
		uint32_t mode;
	};

	uint8_t data[512];
};

#define LK_PART_MAGIC		0x58881688

/* MT7621 NAND SPL image header */

#define MT7621_IH_NMLEN			12
#define MT7621_IH_CRC_POLYNOMIAL	0x04c11db7

struct mt7621_nand_header {
	char ih_name[MT7621_IH_NMLEN];
	uint32_t nand_ac_timing;
	uint32_t ih_stage_offset;
	uint32_t ih_bootloader_offset;
	uint32_t nand_info_1_data;
	uint32_t crc;
};

struct mt7621_stage1_header {
	uint32_t jump_insn[2];
	uint32_t ep;
	uint32_t stage_size;
	uint32_t has_stage2;
	uint32_t next_ep;
	uint32_t next_size;
	uint32_t next_offset;
};

#endif /* _MTK_IMAGE_H */
Commit	Line	Data
3b975a14 RL	1	/* SPDX-License-Identifier: GPL-2.0+ */
	2	/*
	3	* MediaTek BootROM header definitions
	4	*
	5	* Copyright (C) 2018 MediaTek Inc.
	6	* Author: Weijie Gao <weijie.gao@mediatek.com>
	7	*/
	8
	9	#ifndef _MTK_IMAGE_H
	10	#define _MTK_IMAGE_H
	11
a7c9a65e	12	/* Device header definitions, all fields are little-endian */
3b975a14 RL	13
	14	/* Header for NOR/SD/eMMC */
	15	union gen_boot_header {
	16	struct {
	17	char name[12];
a7c9a65e BM	18	uint32_t version;
a7c9a65e BM	19	uint32_t size;
3b975a14 RL	20	};
	21
	22	uint8_t pad[0x200];
	23	};
	24
	25	#define EMMC_BOOT_NAME "EMMC_BOOT"
	26	#define SF_BOOT_NAME "SF_BOOT"
	27	#define SDMMC_BOOT_NAME "SDMMC_BOOT"
	28
3b975a14 RL	29	/* BootROM layout header */
	30	struct brom_layout_header {
	31	char name[8];
a7c9a65e BM	32	uint32_t version;
	33	uint32_t header_size;
	34	uint32_t total_size;
	35	uint32_t magic;
	36	uint32_t type;
	37	uint32_t header_size_2;
	38	uint32_t total_size_2;
	39	uint32_t unused;
3b975a14 RL	40	};
	41
	42	#define BRLYT_NAME "BRLYT"
	43	#define BRLYT_MAGIC 0x42424242
	44
	45	enum brlyt_img_type {
	46	BRLYT_TYPE_INVALID = 0,
	47	BRLYT_TYPE_NAND = 0x10002,
	48	BRLYT_TYPE_EMMC = 0x10005,
	49	BRLYT_TYPE_NOR = 0x10007,
	50	BRLYT_TYPE_SDMMC = 0x10008,
	51	BRLYT_TYPE_SNAND = 0x10009
	52	};
	53
	54	/* Combined device header for NOR/SD/eMMC */
	55	struct gen_device_header {
	56	union gen_boot_header boot;
	57
	58	union {
	59	struct brom_layout_header brlyt;
	60	uint8_t brlyt_pad[0x400];
	61	};
	62	};
	63
	64	/* BootROM header definitions */
	65	struct gfh_common_header {
2bff97ad	66	uint32_t magic_version;
a7c9a65e BM	67	uint16_t size;
a7c9a65e BM	68	uint16_t type;
3b975a14 RL	69	};
3b975a14 RL	70
2bff97ad WG	71	#define GFH_HEADER_MAGIC 0x4D4D4D
2bff97ad WG	72	#define GFH_HEADER_VERSION_SHIFT 24
3b975a14 RL	73
	74	#define GFH_TYPE_FILE_INFO 0
	75	#define GFH_TYPE_BL_INFO 1
	76	#define GFH_TYPE_BROM_CFG 7
	77	#define GFH_TYPE_BL_SEC_KEY 3
	78	#define GFH_TYPE_ANTI_CLONE 2
	79	#define GFH_TYPE_BROM_SEC_CFG 8
	80
	81	struct gfh_file_info {
	82	struct gfh_common_header gfh;
	83	char name[12];
a7c9a65e BM	84	uint32_t unused;
a7c9a65e BM	85	uint16_t file_type;
3b975a14 RL	86	uint8_t flash_type;
3b975a14 RL	87	uint8_t sig_type;
a7c9a65e BM	88	uint32_t load_addr;
	89	uint32_t total_size;
	90	uint32_t max_size;
	91	uint32_t hdr_size;
	92	uint32_t sig_size;
	93	uint32_t jump_offset;
	94	uint32_t processed;
3b975a14 RL	95	};
	96
	97	#define GFH_FILE_INFO_NAME "FILE_INFO"
	98
	99	#define GFH_FLASH_TYPE_GEN 5
	100	#define GFH_FLASH_TYPE_NAND 2
	101
	102	#define GFH_SIG_TYPE_NONE 0
	103	#define GFH_SIG_TYPE_SHA256 1
	104
	105	struct gfh_bl_info {
	106	struct gfh_common_header gfh;
a7c9a65e	107	uint32_t attr;
3b975a14 RL	108	};
	109
	110	struct gfh_brom_cfg {
	111	struct gfh_common_header gfh;
a7c9a65e BM	112	uint32_t cfg_bits;
a7c9a65e BM	113	uint32_t usbdl_by_auto_detect_timeout_ms;
44165e4c FP	114	uint8_t unused[0x45];
	115	uint8_t jump_bl_arm64;
	116	uint8_t unused2[2];
a7c9a65e BM	117	uint32_t usbdl_by_kcol0_timeout_ms;
a7c9a65e BM	118	uint32_t usbdl_by_flag_timeout_ms;
3b975a14 RL	119	uint32_t pad;
	120	};
	121
	122	#define GFH_BROM_CFG_USBDL_BY_AUTO_DETECT_TIMEOUT_EN 0x02
	123	#define GFH_BROM_CFG_USBDL_AUTO_DETECT_DIS 0x10
	124	#define GFH_BROM_CFG_USBDL_BY_KCOL0_TIMEOUT_EN 0x80
	125	#define GFH_BROM_CFG_USBDL_BY_FLAG_TIMEOUT_EN 0x100
44165e4c FP	126	#define GFH_BROM_CFG_JUMP_BL_ARM64_EN 0x1000
44165e4c FP	127	#define GFH_BROM_CFG_JUMP_BL_ARM64 0x64
3b975a14 RL	128
	129	struct gfh_bl_sec_key {
	130	struct gfh_common_header gfh;
	131	uint8_t pad[0x20c];
	132	};
	133
	134	struct gfh_anti_clone {
	135	struct gfh_common_header gfh;
	136	uint8_t ac_b2k;
	137	uint8_t ac_b2c;
	138	uint16_t pad;
a7c9a65e BM	139	uint32_t ac_offset;
a7c9a65e BM	140	uint32_t ac_len;
3b975a14 RL	141	};
	142
	143	struct gfh_brom_sec_cfg {
	144	struct gfh_common_header gfh;
a7c9a65e	145	uint32_t cfg_bits;
3b975a14	146	char customer_name[0x20];
a7c9a65e	147	uint32_t pad;
3b975a14 RL	148	};
	149
	150	#define BROM_SEC_CFG_JTAG_EN 1
	151	#define BROM_SEC_CFG_UART_EN 2
	152
	153	struct gfh_header {
	154	struct gfh_file_info file_info;
	155	struct gfh_bl_info bl_info;
	156	struct gfh_brom_cfg brom_cfg;
	157	struct gfh_bl_sec_key bl_sec_key;
	158	struct gfh_anti_clone anti_clone;
	159	struct gfh_brom_sec_cfg brom_sec_cfg;
	160	};
	161
	162	/* LK image header */
	163
	164	union lk_hdr {
	165	struct {
a7c9a65e BM	166	uint32_t magic;
a7c9a65e BM	167	uint32_t size;
3b975a14	168	char name[32];
a7c9a65e BM	169	uint32_t loadaddr;
a7c9a65e BM	170	uint32_t mode;
3b975a14 RL	171	};
	172
	173	uint8_t data[512];
	174	};
	175
	176	#define LK_PART_MAGIC 0x58881688
	177
c561d14c WG	178	/* MT7621 NAND SPL image header */
	179
	180	#define MT7621_IH_NMLEN 12
	181	#define MT7621_IH_CRC_POLYNOMIAL 0x04c11db7
	182
	183	struct mt7621_nand_header {
	184	char ih_name[MT7621_IH_NMLEN];
	185	uint32_t nand_ac_timing;
	186	uint32_t ih_stage_offset;
	187	uint32_t ih_bootloader_offset;
	188	uint32_t nand_info_1_data;
	189	uint32_t crc;
	190	};
	191
	192	struct mt7621_stage1_header {
	193	uint32_t jump_insn[2];
	194	uint32_t ep;
	195	uint32_t stage_size;
	196	uint32_t has_stage2;
	197	uint32_t next_ep;
	198	uint32_t next_size;
	199	uint32_t next_offset;
	200	};
	201
3b975a14	202	#endif /* _MTK_IMAGE_H */