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caab277b | 1 | // SPDX-License-Identifier: GPL-2.0-only |
59c5ab40 AP |
2 | /* |
3 | * GICv3 ITS emulation | |
4 | * | |
5 | * Copyright (C) 2015,2016 ARM Ltd. | |
6 | * Author: Andre Przywara <andre.przywara@arm.com> | |
59c5ab40 AP |
7 | */ |
8 | ||
9 | #include <linux/cpu.h> | |
10 | #include <linux/kvm.h> | |
11 | #include <linux/kvm_host.h> | |
12 | #include <linux/interrupt.h> | |
424c3383 | 13 | #include <linux/list.h> |
1085fdc6 | 14 | #include <linux/uaccess.h> |
57a9a117 | 15 | #include <linux/list_sort.h> |
59c5ab40 AP |
16 | |
17 | #include <linux/irqchip/arm-gic-v3.h> | |
18 | ||
19 | #include <asm/kvm_emulate.h> | |
20 | #include <asm/kvm_arm.h> | |
21 | #include <asm/kvm_mmu.h> | |
22 | ||
23 | #include "vgic.h" | |
24 | #include "vgic-mmio.h" | |
25 | ||
71afe470 EA |
26 | static int vgic_its_save_tables_v0(struct vgic_its *its); |
27 | static int vgic_its_restore_tables_v0(struct vgic_its *its); | |
28 | static int vgic_its_commit_v0(struct vgic_its *its); | |
06bd5359 | 29 | static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, |
6ce18e3a | 30 | struct kvm_vcpu *filter_vcpu, bool needs_inv); |
71afe470 | 31 | |
df9f58fb AP |
32 | /* |
33 | * Creates a new (reference to a) struct vgic_irq for a given LPI. | |
34 | * If this LPI is already mapped on another ITS, we increase its refcount | |
35 | * and return a pointer to the existing structure. | |
36 | * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq. | |
37 | * This function returns a pointer to the _unlocked_ structure. | |
38 | */ | |
06bd5359 EA |
39 | static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid, |
40 | struct kvm_vcpu *vcpu) | |
df9f58fb AP |
41 | { |
42 | struct vgic_dist *dist = &kvm->arch.vgic; | |
43 | struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq; | |
388d4359 | 44 | unsigned long flags; |
06bd5359 | 45 | int ret; |
df9f58fb AP |
46 | |
47 | /* In this case there is no put, since we keep the reference. */ | |
48 | if (irq) | |
49 | return irq; | |
50 | ||
51 | irq = kzalloc(sizeof(struct vgic_irq), GFP_KERNEL); | |
52 | if (!irq) | |
99e5e886 | 53 | return ERR_PTR(-ENOMEM); |
df9f58fb AP |
54 | |
55 | INIT_LIST_HEAD(&irq->lpi_list); | |
56 | INIT_LIST_HEAD(&irq->ap_list); | |
8fa3adb8 | 57 | raw_spin_lock_init(&irq->irq_lock); |
df9f58fb AP |
58 | |
59 | irq->config = VGIC_CONFIG_EDGE; | |
60 | kref_init(&irq->refcount); | |
61 | irq->intid = intid; | |
06bd5359 | 62 | irq->target_vcpu = vcpu; |
8df3c8f3 | 63 | irq->group = 1; |
df9f58fb | 64 | |
fc3bc475 | 65 | raw_spin_lock_irqsave(&dist->lpi_list_lock, flags); |
df9f58fb AP |
66 | |
67 | /* | |
68 | * There could be a race with another vgic_add_lpi(), so we need to | |
69 | * check that we don't add a second list entry with the same LPI. | |
70 | */ | |
71 | list_for_each_entry(oldirq, &dist->lpi_list_head, lpi_list) { | |
72 | if (oldirq->intid != intid) | |
73 | continue; | |
74 | ||
75 | /* Someone was faster with adding this LPI, lets use that. */ | |
76 | kfree(irq); | |
77 | irq = oldirq; | |
78 | ||
79 | /* | |
80 | * This increases the refcount, the caller is expected to | |
81 | * call vgic_put_irq() on the returned pointer once it's | |
82 | * finished with the IRQ. | |
83 | */ | |
d97594e6 | 84 | vgic_get_irq_kref(irq); |
df9f58fb AP |
85 | |
86 | goto out_unlock; | |
87 | } | |
88 | ||
89 | list_add_tail(&irq->lpi_list, &dist->lpi_list_head); | |
90 | dist->lpi_list_count++; | |
91 | ||
92 | out_unlock: | |
fc3bc475 | 93 | raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); |
df9f58fb | 94 | |
06bd5359 EA |
95 | /* |
96 | * We "cache" the configuration table entries in our struct vgic_irq's. | |
97 | * However we only have those structs for mapped IRQs, so we read in | |
98 | * the respective config data from memory here upon mapping the LPI. | |
99 | */ | |
6ce18e3a | 100 | ret = update_lpi_config(kvm, irq, NULL, false); |
06bd5359 EA |
101 | if (ret) |
102 | return ERR_PTR(ret); | |
103 | ||
104 | ret = vgic_v3_lpi_sync_pending_status(kvm, irq); | |
105 | if (ret) | |
106 | return ERR_PTR(ret); | |
107 | ||
df9f58fb AP |
108 | return irq; |
109 | } | |
110 | ||
424c3383 AP |
111 | struct its_device { |
112 | struct list_head dev_list; | |
113 | ||
114 | /* the head for the list of ITTEs */ | |
115 | struct list_head itt_head; | |
0d44cdb6 | 116 | u32 num_eventid_bits; |
7333cefe | 117 | gpa_t itt_addr; |
424c3383 AP |
118 | u32 device_id; |
119 | }; | |
120 | ||
121 | #define COLLECTION_NOT_MAPPED ((u32)~0) | |
122 | ||
123 | struct its_collection { | |
124 | struct list_head coll_list; | |
125 | ||
126 | u32 collection_id; | |
127 | u32 target_addr; | |
128 | }; | |
129 | ||
130 | #define its_is_collection_mapped(coll) ((coll) && \ | |
131 | ((coll)->target_addr != COLLECTION_NOT_MAPPED)) | |
132 | ||
9ce91c72 EA |
133 | struct its_ite { |
134 | struct list_head ite_list; | |
424c3383 | 135 | |
3802411d | 136 | struct vgic_irq *irq; |
424c3383 | 137 | struct its_collection *collection; |
424c3383 AP |
138 | u32 event_id; |
139 | }; | |
140 | ||
71afe470 EA |
141 | /** |
142 | * struct vgic_its_abi - ITS abi ops and settings | |
143 | * @cte_esz: collection table entry size | |
144 | * @dte_esz: device table entry size | |
145 | * @ite_esz: interrupt translation table entry size | |
146 | * @save tables: save the ITS tables into guest RAM | |
147 | * @restore_tables: restore the ITS internal structs from tables | |
148 | * stored in guest RAM | |
149 | * @commit: initialize the registers which expose the ABI settings, | |
150 | * especially the entry sizes | |
151 | */ | |
152 | struct vgic_its_abi { | |
153 | int cte_esz; | |
154 | int dte_esz; | |
155 | int ite_esz; | |
156 | int (*save_tables)(struct vgic_its *its); | |
157 | int (*restore_tables)(struct vgic_its *its); | |
158 | int (*commit)(struct vgic_its *its); | |
159 | }; | |
160 | ||
2326acee KC |
161 | #define ABI_0_ESZ 8 |
162 | #define ESZ_MAX ABI_0_ESZ | |
163 | ||
71afe470 | 164 | static const struct vgic_its_abi its_table_abi_versions[] = { |
2326acee KC |
165 | [0] = { |
166 | .cte_esz = ABI_0_ESZ, | |
167 | .dte_esz = ABI_0_ESZ, | |
168 | .ite_esz = ABI_0_ESZ, | |
71afe470 EA |
169 | .save_tables = vgic_its_save_tables_v0, |
170 | .restore_tables = vgic_its_restore_tables_v0, | |
171 | .commit = vgic_its_commit_v0, | |
172 | }, | |
173 | }; | |
174 | ||
175 | #define NR_ITS_ABIS ARRAY_SIZE(its_table_abi_versions) | |
176 | ||
177 | inline const struct vgic_its_abi *vgic_its_get_abi(struct vgic_its *its) | |
178 | { | |
179 | return &its_table_abi_versions[its->abi_rev]; | |
180 | } | |
181 | ||
2326acee | 182 | static int vgic_its_set_abi(struct vgic_its *its, u32 rev) |
71afe470 EA |
183 | { |
184 | const struct vgic_its_abi *abi; | |
185 | ||
186 | its->abi_rev = rev; | |
187 | abi = vgic_its_get_abi(its); | |
188 | return abi->commit(its); | |
189 | } | |
190 | ||
df9f58fb AP |
191 | /* |
192 | * Find and returns a device in the device table for an ITS. | |
193 | * Must be called with the its_lock mutex held. | |
194 | */ | |
195 | static struct its_device *find_its_device(struct vgic_its *its, u32 device_id) | |
196 | { | |
197 | struct its_device *device; | |
198 | ||
199 | list_for_each_entry(device, &its->device_list, dev_list) | |
200 | if (device_id == device->device_id) | |
201 | return device; | |
202 | ||
203 | return NULL; | |
204 | } | |
205 | ||
206 | /* | |
207 | * Find and returns an interrupt translation table entry (ITTE) for a given | |
208 | * Device ID/Event ID pair on an ITS. | |
209 | * Must be called with the its_lock mutex held. | |
210 | */ | |
9ce91c72 | 211 | static struct its_ite *find_ite(struct vgic_its *its, u32 device_id, |
df9f58fb AP |
212 | u32 event_id) |
213 | { | |
214 | struct its_device *device; | |
9ce91c72 | 215 | struct its_ite *ite; |
df9f58fb AP |
216 | |
217 | device = find_its_device(its, device_id); | |
218 | if (device == NULL) | |
219 | return NULL; | |
220 | ||
9ce91c72 EA |
221 | list_for_each_entry(ite, &device->itt_head, ite_list) |
222 | if (ite->event_id == event_id) | |
223 | return ite; | |
df9f58fb AP |
224 | |
225 | return NULL; | |
226 | } | |
227 | ||
228 | /* To be used as an iterator this macro misses the enclosing parentheses */ | |
9ce91c72 | 229 | #define for_each_lpi_its(dev, ite, its) \ |
df9f58fb | 230 | list_for_each_entry(dev, &(its)->device_list, dev_list) \ |
9ce91c72 | 231 | list_for_each_entry(ite, &(dev)->itt_head, ite_list) |
df9f58fb | 232 | |
f9f77af9 AP |
233 | #define GIC_LPI_OFFSET 8192 |
234 | ||
0d44cdb6 | 235 | #define VITS_TYPER_IDBITS 16 |
07a3e9a7 | 236 | #define VITS_TYPER_DEVBITS 16 |
920a7a8f EA |
237 | #define VITS_DTE_MAX_DEVID_OFFSET (BIT(14) - 1) |
238 | #define VITS_ITE_MAX_EVENTID_OFFSET (BIT(16) - 1) | |
0d44cdb6 | 239 | |
df9f58fb AP |
240 | /* |
241 | * Finds and returns a collection in the ITS collection table. | |
242 | * Must be called with the its_lock mutex held. | |
243 | */ | |
244 | static struct its_collection *find_collection(struct vgic_its *its, int coll_id) | |
245 | { | |
246 | struct its_collection *collection; | |
247 | ||
248 | list_for_each_entry(collection, &its->collection_list, coll_list) { | |
249 | if (coll_id == collection->collection_id) | |
250 | return collection; | |
251 | } | |
252 | ||
253 | return NULL; | |
254 | } | |
255 | ||
f9f77af9 AP |
256 | #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED) |
257 | #define LPI_PROP_PRIORITY(p) ((p) & 0xfc) | |
258 | ||
259 | /* | |
260 | * Reads the configuration data for a given LPI from guest memory and | |
261 | * updates the fields in struct vgic_irq. | |
262 | * If filter_vcpu is not NULL, applies only if the IRQ is targeting this | |
263 | * VCPU. Unconditionally applies if filter_vcpu is NULL. | |
264 | */ | |
265 | static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, | |
6ce18e3a | 266 | struct kvm_vcpu *filter_vcpu, bool needs_inv) |
f9f77af9 | 267 | { |
44de9d68 | 268 | u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser); |
f9f77af9 AP |
269 | u8 prop; |
270 | int ret; | |
006df0f3 | 271 | unsigned long flags; |
f9f77af9 | 272 | |
bf308242 AP |
273 | ret = kvm_read_guest_lock(kvm, propbase + irq->intid - GIC_LPI_OFFSET, |
274 | &prop, 1); | |
f9f77af9 AP |
275 | |
276 | if (ret) | |
277 | return ret; | |
278 | ||
8fa3adb8 | 279 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
f9f77af9 AP |
280 | |
281 | if (!filter_vcpu || filter_vcpu == irq->target_vcpu) { | |
282 | irq->priority = LPI_PROP_PRIORITY(prop); | |
283 | irq->enabled = LPI_PROP_ENABLE_BIT(prop); | |
284 | ||
95b110ab CD |
285 | if (!irq->hw) { |
286 | vgic_queue_irq_unlock(kvm, irq, flags); | |
287 | return 0; | |
288 | } | |
f9f77af9 AP |
289 | } |
290 | ||
8fa3adb8 | 291 | raw_spin_unlock_irqrestore(&irq->irq_lock, flags); |
95b110ab | 292 | |
af340f99 | 293 | if (irq->hw) |
6ce18e3a | 294 | return its_prop_update_vlpi(irq->host_irq, prop, needs_inv); |
af340f99 | 295 | |
f9f77af9 AP |
296 | return 0; |
297 | } | |
33d3bc95 AP |
298 | |
299 | /* | |
ccb1d791 EA |
300 | * Create a snapshot of the current LPIs targeting @vcpu, so that we can |
301 | * enumerate those LPIs without holding any lock. | |
302 | * Returns their number and puts the kmalloc'ed array into intid_ptr. | |
33d3bc95 | 303 | */ |
e294cb3a | 304 | int vgic_copy_lpi_list(struct kvm *kvm, struct kvm_vcpu *vcpu, u32 **intid_ptr) |
33d3bc95 | 305 | { |
e294cb3a | 306 | struct vgic_dist *dist = &kvm->arch.vgic; |
33d3bc95 | 307 | struct vgic_irq *irq; |
388d4359 | 308 | unsigned long flags; |
33d3bc95 | 309 | u32 *intids; |
7d8b44c5 | 310 | int irq_count, i = 0; |
33d3bc95 AP |
311 | |
312 | /* | |
7d8b44c5 MZ |
313 | * There is an obvious race between allocating the array and LPIs |
314 | * being mapped/unmapped. If we ended up here as a result of a | |
315 | * command, we're safe (locks are held, preventing another | |
316 | * command). If coming from another path (such as enabling LPIs), | |
317 | * we must be careful not to overrun the array. | |
33d3bc95 | 318 | */ |
7d8b44c5 | 319 | irq_count = READ_ONCE(dist->lpi_list_count); |
33d3bc95 AP |
320 | intids = kmalloc_array(irq_count, sizeof(intids[0]), GFP_KERNEL); |
321 | if (!intids) | |
322 | return -ENOMEM; | |
323 | ||
fc3bc475 | 324 | raw_spin_lock_irqsave(&dist->lpi_list_lock, flags); |
33d3bc95 | 325 | list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) { |
7d8b44c5 MZ |
326 | if (i == irq_count) |
327 | break; | |
33d3bc95 | 328 | /* We don't need to "get" the IRQ, as we hold the list lock. */ |
e294cb3a | 329 | if (vcpu && irq->target_vcpu != vcpu) |
ccb1d791 EA |
330 | continue; |
331 | intids[i++] = irq->intid; | |
33d3bc95 | 332 | } |
fc3bc475 | 333 | raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); |
33d3bc95 AP |
334 | |
335 | *intid_ptr = intids; | |
ccb1d791 | 336 | return i; |
33d3bc95 AP |
337 | } |
338 | ||
08c9fd04 MZ |
339 | static int update_affinity(struct vgic_irq *irq, struct kvm_vcpu *vcpu) |
340 | { | |
0fc9a58e | 341 | int ret = 0; |
9c418876 | 342 | unsigned long flags; |
0fc9a58e | 343 | |
8fa3adb8 | 344 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
08c9fd04 | 345 | irq->target_vcpu = vcpu; |
8fa3adb8 | 346 | raw_spin_unlock_irqrestore(&irq->irq_lock, flags); |
08c9fd04 | 347 | |
0fc9a58e MZ |
348 | if (irq->hw) { |
349 | struct its_vlpi_map map; | |
350 | ||
351 | ret = its_get_vlpi(irq->host_irq, &map); | |
352 | if (ret) | |
353 | return ret; | |
354 | ||
355 | map.vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe; | |
356 | ||
357 | ret = its_map_vlpi(irq->host_irq, &map); | |
358 | } | |
359 | ||
360 | return ret; | |
08c9fd04 MZ |
361 | } |
362 | ||
df9f58fb AP |
363 | /* |
364 | * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI | |
365 | * is targeting) to the VGIC's view, which deals with target VCPUs. | |
366 | * Needs to be called whenever either the collection for a LPIs has | |
367 | * changed or the collection itself got retargeted. | |
368 | */ | |
9ce91c72 | 369 | static void update_affinity_ite(struct kvm *kvm, struct its_ite *ite) |
df9f58fb AP |
370 | { |
371 | struct kvm_vcpu *vcpu; | |
372 | ||
9ce91c72 | 373 | if (!its_is_collection_mapped(ite->collection)) |
df9f58fb AP |
374 | return; |
375 | ||
9ce91c72 | 376 | vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr); |
08c9fd04 | 377 | update_affinity(ite->irq, vcpu); |
df9f58fb AP |
378 | } |
379 | ||
380 | /* | |
381 | * Updates the target VCPU for every LPI targeting this collection. | |
382 | * Must be called with the its_lock mutex held. | |
383 | */ | |
384 | static void update_affinity_collection(struct kvm *kvm, struct vgic_its *its, | |
385 | struct its_collection *coll) | |
386 | { | |
387 | struct its_device *device; | |
9ce91c72 | 388 | struct its_ite *ite; |
df9f58fb | 389 | |
9ce91c72 EA |
390 | for_each_lpi_its(device, ite, its) { |
391 | if (!ite->collection || coll != ite->collection) | |
df9f58fb AP |
392 | continue; |
393 | ||
9ce91c72 | 394 | update_affinity_ite(kvm, ite); |
df9f58fb AP |
395 | } |
396 | } | |
397 | ||
398 | static u32 max_lpis_propbaser(u64 propbaser) | |
399 | { | |
400 | int nr_idbits = (propbaser & 0x1f) + 1; | |
401 | ||
402 | return 1U << min(nr_idbits, INTERRUPT_ID_BITS_ITS); | |
403 | } | |
404 | ||
33d3bc95 | 405 | /* |
ccb1d791 | 406 | * Sync the pending table pending bit of LPIs targeting @vcpu |
33d3bc95 AP |
407 | * with our own data structures. This relies on the LPI being |
408 | * mapped before. | |
409 | */ | |
410 | static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu) | |
411 | { | |
44de9d68 | 412 | gpa_t pendbase = GICR_PENDBASER_ADDRESS(vcpu->arch.vgic_cpu.pendbaser); |
33d3bc95 AP |
413 | struct vgic_irq *irq; |
414 | int last_byte_offset = -1; | |
415 | int ret = 0; | |
416 | u32 *intids; | |
417 | int nr_irqs, i; | |
006df0f3 | 418 | unsigned long flags; |
64afe6e9 | 419 | u8 pendmask; |
33d3bc95 | 420 | |
e294cb3a | 421 | nr_irqs = vgic_copy_lpi_list(vcpu->kvm, vcpu, &intids); |
33d3bc95 AP |
422 | if (nr_irqs < 0) |
423 | return nr_irqs; | |
424 | ||
425 | for (i = 0; i < nr_irqs; i++) { | |
426 | int byte_offset, bit_nr; | |
33d3bc95 AP |
427 | |
428 | byte_offset = intids[i] / BITS_PER_BYTE; | |
429 | bit_nr = intids[i] % BITS_PER_BYTE; | |
430 | ||
431 | /* | |
432 | * For contiguously allocated LPIs chances are we just read | |
433 | * this very same byte in the last iteration. Reuse that. | |
434 | */ | |
435 | if (byte_offset != last_byte_offset) { | |
bf308242 AP |
436 | ret = kvm_read_guest_lock(vcpu->kvm, |
437 | pendbase + byte_offset, | |
438 | &pendmask, 1); | |
33d3bc95 AP |
439 | if (ret) { |
440 | kfree(intids); | |
441 | return ret; | |
442 | } | |
443 | last_byte_offset = byte_offset; | |
444 | } | |
445 | ||
446 | irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]); | |
8fa3adb8 | 447 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
8694e4da | 448 | irq->pending_latch = pendmask & (1U << bit_nr); |
006df0f3 | 449 | vgic_queue_irq_unlock(vcpu->kvm, irq, flags); |
33d3bc95 AP |
450 | vgic_put_irq(vcpu->kvm, irq); |
451 | } | |
452 | ||
453 | kfree(intids); | |
454 | ||
455 | return ret; | |
456 | } | |
424c3383 | 457 | |
424c3383 AP |
458 | static unsigned long vgic_mmio_read_its_typer(struct kvm *kvm, |
459 | struct vgic_its *its, | |
460 | gpa_t addr, unsigned int len) | |
461 | { | |
71afe470 | 462 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
424c3383 AP |
463 | u64 reg = GITS_TYPER_PLPIS; |
464 | ||
465 | /* | |
466 | * We use linear CPU numbers for redistributor addressing, | |
467 | * so GITS_TYPER.PTA is 0. | |
468 | * Also we force all PROPBASER registers to be the same, so | |
469 | * CommonLPIAff is 0 as well. | |
470 | * To avoid memory waste in the guest, we keep the number of IDBits and | |
471 | * DevBits low - as least for the time being. | |
472 | */ | |
07a3e9a7 | 473 | reg |= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS, 5) << GITS_TYPER_DEVBITS_SHIFT; |
0d44cdb6 | 474 | reg |= GIC_ENCODE_SZ(VITS_TYPER_IDBITS, 5) << GITS_TYPER_IDBITS_SHIFT; |
71afe470 | 475 | reg |= GIC_ENCODE_SZ(abi->ite_esz, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT; |
424c3383 AP |
476 | |
477 | return extract_bytes(reg, addr & 7, len); | |
478 | } | |
479 | ||
480 | static unsigned long vgic_mmio_read_its_iidr(struct kvm *kvm, | |
481 | struct vgic_its *its, | |
482 | gpa_t addr, unsigned int len) | |
483 | { | |
ab01c6bd EA |
484 | u32 val; |
485 | ||
486 | val = (its->abi_rev << GITS_IIDR_REV_SHIFT) & GITS_IIDR_REV_MASK; | |
487 | val |= (PRODUCT_ID_KVM << GITS_IIDR_PRODUCTID_SHIFT) | IMPLEMENTER_ARM; | |
488 | return val; | |
489 | } | |
490 | ||
491 | static int vgic_mmio_uaccess_write_its_iidr(struct kvm *kvm, | |
492 | struct vgic_its *its, | |
493 | gpa_t addr, unsigned int len, | |
494 | unsigned long val) | |
495 | { | |
496 | u32 rev = GITS_IIDR_REV(val); | |
497 | ||
498 | if (rev >= NR_ITS_ABIS) | |
499 | return -EINVAL; | |
500 | return vgic_its_set_abi(its, rev); | |
424c3383 AP |
501 | } |
502 | ||
503 | static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm, | |
504 | struct vgic_its *its, | |
505 | gpa_t addr, unsigned int len) | |
506 | { | |
507 | switch (addr & 0xffff) { | |
508 | case GITS_PIDR0: | |
509 | return 0x92; /* part number, bits[7:0] */ | |
510 | case GITS_PIDR1: | |
511 | return 0xb4; /* part number, bits[11:8] */ | |
512 | case GITS_PIDR2: | |
513 | return GIC_PIDR2_ARCH_GICv3 | 0x0b; | |
514 | case GITS_PIDR4: | |
515 | return 0x40; /* This is a 64K software visible page */ | |
516 | /* The following are the ID registers for (any) GIC. */ | |
517 | case GITS_CIDR0: | |
518 | return 0x0d; | |
519 | case GITS_CIDR1: | |
520 | return 0xf0; | |
521 | case GITS_CIDR2: | |
522 | return 0x05; | |
523 | case GITS_CIDR3: | |
524 | return 0xb1; | |
525 | } | |
526 | ||
527 | return 0; | |
528 | } | |
529 | ||
bebfd2a2 MZ |
530 | int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its, |
531 | u32 devid, u32 eventid, struct vgic_irq **irq) | |
2891a7df | 532 | { |
fd837b08 | 533 | struct kvm_vcpu *vcpu; |
9ce91c72 | 534 | struct its_ite *ite; |
2891a7df AP |
535 | |
536 | if (!its->enabled) | |
fd837b08 | 537 | return -EBUSY; |
2891a7df | 538 | |
9ce91c72 EA |
539 | ite = find_ite(its, devid, eventid); |
540 | if (!ite || !its_is_collection_mapped(ite->collection)) | |
fd837b08 AP |
541 | return E_ITS_INT_UNMAPPED_INTERRUPT; |
542 | ||
9ce91c72 | 543 | vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr); |
fd837b08 AP |
544 | if (!vcpu) |
545 | return E_ITS_INT_UNMAPPED_INTERRUPT; | |
546 | ||
547 | if (!vcpu->arch.vgic_cpu.lpis_enabled) | |
548 | return -EBUSY; | |
549 | ||
bebfd2a2 | 550 | *irq = ite->irq; |
fd837b08 | 551 | return 0; |
2891a7df AP |
552 | } |
553 | ||
bebfd2a2 | 554 | struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi) |
505a19ee | 555 | { |
bebfd2a2 MZ |
556 | u64 address; |
557 | struct kvm_io_device *kvm_io_dev; | |
505a19ee AP |
558 | struct vgic_io_device *iodev; |
559 | ||
bebfd2a2 MZ |
560 | if (!vgic_has_its(kvm)) |
561 | return ERR_PTR(-ENODEV); | |
562 | ||
563 | if (!(msi->flags & KVM_MSI_VALID_DEVID)) | |
564 | return ERR_PTR(-EINVAL); | |
505a19ee | 565 | |
bebfd2a2 MZ |
566 | address = (u64)msi->address_hi << 32 | msi->address_lo; |
567 | ||
568 | kvm_io_dev = kvm_io_bus_get_dev(kvm, KVM_MMIO_BUS, address); | |
569 | if (!kvm_io_dev) | |
570 | return ERR_PTR(-EINVAL); | |
505a19ee | 571 | |
bebfd2a2 MZ |
572 | if (kvm_io_dev->ops != &kvm_io_gic_ops) |
573 | return ERR_PTR(-EINVAL); | |
505a19ee | 574 | |
bebfd2a2 | 575 | iodev = container_of(kvm_io_dev, struct vgic_io_device, dev); |
505a19ee | 576 | if (iodev->iodev_type != IODEV_ITS) |
bebfd2a2 | 577 | return ERR_PTR(-EINVAL); |
505a19ee | 578 | |
bebfd2a2 MZ |
579 | return iodev->its; |
580 | } | |
581 | ||
582 | /* | |
583 | * Find the target VCPU and the LPI number for a given devid/eventid pair | |
584 | * and make this IRQ pending, possibly injecting it. | |
585 | * Must be called with the its_lock mutex held. | |
586 | * Returns 0 on success, a positive error value for any ITS mapping | |
587 | * related errors and negative error values for generic errors. | |
588 | */ | |
589 | static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its, | |
590 | u32 devid, u32 eventid) | |
591 | { | |
592 | struct vgic_irq *irq = NULL; | |
593 | unsigned long flags; | |
594 | int err; | |
505a19ee | 595 | |
bebfd2a2 MZ |
596 | err = vgic_its_resolve_lpi(kvm, its, devid, eventid, &irq); |
597 | if (err) | |
598 | return err; | |
599 | ||
1b7fe468 MZ |
600 | if (irq->hw) |
601 | return irq_set_irqchip_state(irq->host_irq, | |
602 | IRQCHIP_STATE_PENDING, true); | |
603 | ||
8fa3adb8 | 604 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
bebfd2a2 MZ |
605 | irq->pending_latch = true; |
606 | vgic_queue_irq_unlock(kvm, irq, flags); | |
607 | ||
608 | return 0; | |
505a19ee AP |
609 | } |
610 | ||
2891a7df AP |
611 | /* |
612 | * Queries the KVM IO bus framework to get the ITS pointer from the given | |
613 | * doorbell address. | |
614 | * We then call vgic_its_trigger_msi() with the decoded data. | |
fd837b08 | 615 | * According to the KVM_SIGNAL_MSI API description returns 1 on success. |
2891a7df AP |
616 | */ |
617 | int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi) | |
618 | { | |
bebfd2a2 | 619 | struct vgic_its *its; |
fd837b08 | 620 | int ret; |
2891a7df | 621 | |
bebfd2a2 MZ |
622 | its = vgic_msi_to_its(kvm, msi); |
623 | if (IS_ERR(its)) | |
624 | return PTR_ERR(its); | |
2891a7df | 625 | |
bebfd2a2 MZ |
626 | mutex_lock(&its->its_lock); |
627 | ret = vgic_its_trigger_msi(kvm, its, msi->devid, msi->data); | |
628 | mutex_unlock(&its->its_lock); | |
2891a7df | 629 | |
fd837b08 AP |
630 | if (ret < 0) |
631 | return ret; | |
632 | ||
633 | /* | |
634 | * KVM_SIGNAL_MSI demands a return value > 0 for success and 0 | |
635 | * if the guest has blocked the MSI. So we map any LPI mapping | |
636 | * related error to that. | |
637 | */ | |
638 | if (ret) | |
639 | return 0; | |
640 | else | |
641 | return 1; | |
2891a7df AP |
642 | } |
643 | ||
424c3383 | 644 | /* Requires the its_lock to be held. */ |
9ce91c72 | 645 | static void its_free_ite(struct kvm *kvm, struct its_ite *ite) |
424c3383 | 646 | { |
9ce91c72 | 647 | list_del(&ite->ite_list); |
3802411d AP |
648 | |
649 | /* This put matches the get in vgic_add_lpi. */ | |
07b46ed1 MZ |
650 | if (ite->irq) { |
651 | if (ite->irq->hw) | |
652 | WARN_ON(its_unmap_vlpi(ite->irq->host_irq)); | |
653 | ||
9ce91c72 | 654 | vgic_put_irq(kvm, ite->irq); |
07b46ed1 | 655 | } |
3802411d | 656 | |
9ce91c72 | 657 | kfree(ite); |
424c3383 AP |
658 | } |
659 | ||
df9f58fb AP |
660 | static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size) |
661 | { | |
662 | return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1); | |
663 | } | |
664 | ||
665 | #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8) | |
666 | #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32) | |
0d44cdb6 | 667 | #define its_cmd_get_size(cmd) (its_cmd_mask_field(cmd, 1, 0, 5) + 1) |
df9f58fb AP |
668 | #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32) |
669 | #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32) | |
670 | #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16) | |
7333cefe | 671 | #define its_cmd_get_ittaddr(cmd) (its_cmd_mask_field(cmd, 2, 8, 44) << 8) |
df9f58fb AP |
672 | #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32) |
673 | #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1) | |
674 | ||
675 | /* | |
676 | * The DISCARD command frees an Interrupt Translation Table Entry (ITTE). | |
677 | * Must be called with the its_lock mutex held. | |
678 | */ | |
679 | static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its, | |
680 | u64 *its_cmd) | |
681 | { | |
682 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
683 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 684 | struct its_ite *ite; |
df9f58fb AP |
685 | |
686 | ||
9ce91c72 EA |
687 | ite = find_ite(its, device_id, event_id); |
688 | if (ite && ite->collection) { | |
df9f58fb AP |
689 | /* |
690 | * Though the spec talks about removing the pending state, we | |
691 | * don't bother here since we clear the ITTE anyway and the | |
692 | * pending state is a property of the ITTE struct. | |
693 | */ | |
9ce91c72 | 694 | its_free_ite(kvm, ite); |
df9f58fb AP |
695 | return 0; |
696 | } | |
697 | ||
698 | return E_ITS_DISCARD_UNMAPPED_INTERRUPT; | |
699 | } | |
700 | ||
701 | /* | |
702 | * The MOVI command moves an ITTE to a different collection. | |
703 | * Must be called with the its_lock mutex held. | |
704 | */ | |
705 | static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its, | |
706 | u64 *its_cmd) | |
707 | { | |
708 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
709 | u32 event_id = its_cmd_get_id(its_cmd); | |
710 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
711 | struct kvm_vcpu *vcpu; | |
9ce91c72 | 712 | struct its_ite *ite; |
df9f58fb AP |
713 | struct its_collection *collection; |
714 | ||
9ce91c72 EA |
715 | ite = find_ite(its, device_id, event_id); |
716 | if (!ite) | |
df9f58fb AP |
717 | return E_ITS_MOVI_UNMAPPED_INTERRUPT; |
718 | ||
9ce91c72 | 719 | if (!its_is_collection_mapped(ite->collection)) |
df9f58fb AP |
720 | return E_ITS_MOVI_UNMAPPED_COLLECTION; |
721 | ||
722 | collection = find_collection(its, coll_id); | |
723 | if (!its_is_collection_mapped(collection)) | |
724 | return E_ITS_MOVI_UNMAPPED_COLLECTION; | |
725 | ||
9ce91c72 | 726 | ite->collection = collection; |
df9f58fb AP |
727 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); |
728 | ||
08c9fd04 | 729 | return update_affinity(ite->irq, vcpu); |
df9f58fb AP |
730 | } |
731 | ||
6d03a68f MZ |
732 | /* |
733 | * Check whether an ID can be stored into the corresponding guest table. | |
734 | * For a direct table this is pretty easy, but gets a bit nasty for | |
735 | * indirect tables. We check whether the resulting guest physical address | |
07a3e9a7 | 736 | * is actually valid (covered by a memslot and guest accessible). |
6d03a68f MZ |
737 | * For this we have to read the respective first level entry. |
738 | */ | |
dceff702 EA |
739 | static bool vgic_its_check_id(struct vgic_its *its, u64 baser, u32 id, |
740 | gpa_t *eaddr) | |
6d03a68f MZ |
741 | { |
742 | int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; | |
07a3e9a7 | 743 | u64 indirect_ptr, type = GITS_BASER_TYPE(baser); |
8ad50c89 | 744 | phys_addr_t base = GITS_BASER_ADDR_48_to_52(baser); |
07a3e9a7 | 745 | int esz = GITS_BASER_ENTRY_SIZE(baser); |
7494cec6 | 746 | int index, idx; |
6d03a68f | 747 | gfn_t gfn; |
7494cec6 | 748 | bool ret; |
07a3e9a7 EA |
749 | |
750 | switch (type) { | |
751 | case GITS_BASER_TYPE_DEVICE: | |
752 | if (id >= BIT_ULL(VITS_TYPER_DEVBITS)) | |
753 | return false; | |
754 | break; | |
755 | case GITS_BASER_TYPE_COLLECTION: | |
756 | /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */ | |
757 | if (id >= BIT_ULL(16)) | |
758 | return false; | |
759 | break; | |
760 | default: | |
761 | return false; | |
762 | } | |
6d03a68f MZ |
763 | |
764 | if (!(baser & GITS_BASER_INDIRECT)) { | |
765 | phys_addr_t addr; | |
766 | ||
e29bd6f2 | 767 | if (id >= (l1_tbl_size / esz)) |
6d03a68f MZ |
768 | return false; |
769 | ||
8ad50c89 | 770 | addr = base + id * esz; |
6d03a68f MZ |
771 | gfn = addr >> PAGE_SHIFT; |
772 | ||
dceff702 EA |
773 | if (eaddr) |
774 | *eaddr = addr; | |
7494cec6 MZ |
775 | |
776 | goto out; | |
6d03a68f MZ |
777 | } |
778 | ||
779 | /* calculate and check the index into the 1st level */ | |
e29bd6f2 | 780 | index = id / (SZ_64K / esz); |
6d03a68f MZ |
781 | if (index >= (l1_tbl_size / sizeof(u64))) |
782 | return false; | |
783 | ||
784 | /* Each 1st level entry is represented by a 64-bit value. */ | |
bf308242 | 785 | if (kvm_read_guest_lock(its->dev->kvm, |
8ad50c89 | 786 | base + index * sizeof(indirect_ptr), |
6d03a68f MZ |
787 | &indirect_ptr, sizeof(indirect_ptr))) |
788 | return false; | |
789 | ||
790 | indirect_ptr = le64_to_cpu(indirect_ptr); | |
791 | ||
792 | /* check the valid bit of the first level entry */ | |
793 | if (!(indirect_ptr & BIT_ULL(63))) | |
794 | return false; | |
795 | ||
8ad50c89 | 796 | /* Mask the guest physical address and calculate the frame number. */ |
6d03a68f MZ |
797 | indirect_ptr &= GENMASK_ULL(51, 16); |
798 | ||
799 | /* Find the address of the actual entry */ | |
e29bd6f2 VM |
800 | index = id % (SZ_64K / esz); |
801 | indirect_ptr += index * esz; | |
6d03a68f MZ |
802 | gfn = indirect_ptr >> PAGE_SHIFT; |
803 | ||
dceff702 EA |
804 | if (eaddr) |
805 | *eaddr = indirect_ptr; | |
7494cec6 MZ |
806 | |
807 | out: | |
808 | idx = srcu_read_lock(&its->dev->kvm->srcu); | |
809 | ret = kvm_is_visible_gfn(its->dev->kvm, gfn); | |
810 | srcu_read_unlock(&its->dev->kvm->srcu, idx); | |
811 | return ret; | |
6d03a68f MZ |
812 | } |
813 | ||
17a21f58 MZ |
814 | static int vgic_its_alloc_collection(struct vgic_its *its, |
815 | struct its_collection **colp, | |
df9f58fb AP |
816 | u32 coll_id) |
817 | { | |
17a21f58 MZ |
818 | struct its_collection *collection; |
819 | ||
dceff702 | 820 | if (!vgic_its_check_id(its, its->baser_coll_table, coll_id, NULL)) |
6d03a68f MZ |
821 | return E_ITS_MAPC_COLLECTION_OOR; |
822 | ||
17a21f58 | 823 | collection = kzalloc(sizeof(*collection), GFP_KERNEL); |
686f294f MZ |
824 | if (!collection) |
825 | return -ENOMEM; | |
17a21f58 | 826 | |
df9f58fb AP |
827 | collection->collection_id = coll_id; |
828 | collection->target_addr = COLLECTION_NOT_MAPPED; | |
829 | ||
830 | list_add_tail(&collection->coll_list, &its->collection_list); | |
17a21f58 MZ |
831 | *colp = collection; |
832 | ||
833 | return 0; | |
834 | } | |
835 | ||
836 | static void vgic_its_free_collection(struct vgic_its *its, u32 coll_id) | |
837 | { | |
838 | struct its_collection *collection; | |
839 | struct its_device *device; | |
9ce91c72 | 840 | struct its_ite *ite; |
17a21f58 MZ |
841 | |
842 | /* | |
843 | * Clearing the mapping for that collection ID removes the | |
844 | * entry from the list. If there wasn't any before, we can | |
845 | * go home early. | |
846 | */ | |
847 | collection = find_collection(its, coll_id); | |
848 | if (!collection) | |
849 | return; | |
850 | ||
9ce91c72 EA |
851 | for_each_lpi_its(device, ite, its) |
852 | if (ite->collection && | |
853 | ite->collection->collection_id == coll_id) | |
854 | ite->collection = NULL; | |
17a21f58 MZ |
855 | |
856 | list_del(&collection->coll_list); | |
857 | kfree(collection); | |
df9f58fb AP |
858 | } |
859 | ||
528297f5 EA |
860 | /* Must be called with its_lock mutex held */ |
861 | static struct its_ite *vgic_its_alloc_ite(struct its_device *device, | |
862 | struct its_collection *collection, | |
7c7d2fa1 | 863 | u32 event_id) |
528297f5 EA |
864 | { |
865 | struct its_ite *ite; | |
866 | ||
867 | ite = kzalloc(sizeof(*ite), GFP_KERNEL); | |
868 | if (!ite) | |
869 | return ERR_PTR(-ENOMEM); | |
870 | ||
871 | ite->event_id = event_id; | |
872 | ite->collection = collection; | |
528297f5 EA |
873 | |
874 | list_add_tail(&ite->ite_list, &device->itt_head); | |
875 | return ite; | |
876 | } | |
877 | ||
df9f58fb AP |
878 | /* |
879 | * The MAPTI and MAPI commands map LPIs to ITTEs. | |
880 | * Must be called with its_lock mutex held. | |
881 | */ | |
882 | static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its, | |
a3e7aa27 | 883 | u64 *its_cmd) |
df9f58fb AP |
884 | { |
885 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
886 | u32 event_id = its_cmd_get_id(its_cmd); | |
887 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
9ce91c72 | 888 | struct its_ite *ite; |
06bd5359 | 889 | struct kvm_vcpu *vcpu = NULL; |
df9f58fb AP |
890 | struct its_device *device; |
891 | struct its_collection *collection, *new_coll = NULL; | |
99e5e886 | 892 | struct vgic_irq *irq; |
528297f5 | 893 | int lpi_nr; |
df9f58fb AP |
894 | |
895 | device = find_its_device(its, device_id); | |
896 | if (!device) | |
897 | return E_ITS_MAPTI_UNMAPPED_DEVICE; | |
898 | ||
0d44cdb6 EA |
899 | if (event_id >= BIT_ULL(device->num_eventid_bits)) |
900 | return E_ITS_MAPTI_ID_OOR; | |
901 | ||
a3e7aa27 | 902 | if (its_cmd_get_command(its_cmd) == GITS_CMD_MAPTI) |
df9f58fb AP |
903 | lpi_nr = its_cmd_get_physical_id(its_cmd); |
904 | else | |
905 | lpi_nr = event_id; | |
906 | if (lpi_nr < GIC_LPI_OFFSET || | |
3a88bded MZ |
907 | lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser)) |
908 | return E_ITS_MAPTI_PHYSICALID_OOR; | |
909 | ||
286054a7 | 910 | /* If there is an existing mapping, behavior is UNPREDICTABLE. */ |
9ce91c72 | 911 | if (find_ite(its, device_id, event_id)) |
286054a7 AP |
912 | return 0; |
913 | ||
3a88bded MZ |
914 | collection = find_collection(its, coll_id); |
915 | if (!collection) { | |
916 | int ret = vgic_its_alloc_collection(its, &collection, coll_id); | |
917 | if (ret) | |
918 | return ret; | |
919 | new_coll = collection; | |
df9f58fb AP |
920 | } |
921 | ||
7c7d2fa1 | 922 | ite = vgic_its_alloc_ite(device, collection, event_id); |
528297f5 | 923 | if (IS_ERR(ite)) { |
286054a7 AP |
924 | if (new_coll) |
925 | vgic_its_free_collection(its, coll_id); | |
528297f5 | 926 | return PTR_ERR(ite); |
df9f58fb AP |
927 | } |
928 | ||
06bd5359 EA |
929 | if (its_is_collection_mapped(collection)) |
930 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); | |
931 | ||
932 | irq = vgic_add_lpi(kvm, lpi_nr, vcpu); | |
99e5e886 CD |
933 | if (IS_ERR(irq)) { |
934 | if (new_coll) | |
935 | vgic_its_free_collection(its, coll_id); | |
9ce91c72 | 936 | its_free_ite(kvm, ite); |
99e5e886 CD |
937 | return PTR_ERR(irq); |
938 | } | |
9ce91c72 | 939 | ite->irq = irq; |
99e5e886 | 940 | |
df9f58fb AP |
941 | return 0; |
942 | } | |
943 | ||
944 | /* Requires the its_lock to be held. */ | |
0a0d389e | 945 | static void vgic_its_free_device(struct kvm *kvm, struct its_device *device) |
df9f58fb | 946 | { |
9ce91c72 | 947 | struct its_ite *ite, *temp; |
df9f58fb AP |
948 | |
949 | /* | |
950 | * The spec says that unmapping a device with still valid | |
951 | * ITTEs associated is UNPREDICTABLE. We remove all ITTEs, | |
952 | * since we cannot leave the memory unreferenced. | |
953 | */ | |
9ce91c72 EA |
954 | list_for_each_entry_safe(ite, temp, &device->itt_head, ite_list) |
955 | its_free_ite(kvm, ite); | |
df9f58fb AP |
956 | |
957 | list_del(&device->dev_list); | |
958 | kfree(device); | |
959 | } | |
960 | ||
2f609a03 | 961 | /* its lock must be held */ |
962 | static void vgic_its_free_device_list(struct kvm *kvm, struct vgic_its *its) | |
963 | { | |
964 | struct its_device *cur, *temp; | |
965 | ||
966 | list_for_each_entry_safe(cur, temp, &its->device_list, dev_list) | |
967 | vgic_its_free_device(kvm, cur); | |
968 | } | |
969 | ||
970 | /* its lock must be held */ | |
971 | static void vgic_its_free_collection_list(struct kvm *kvm, struct vgic_its *its) | |
972 | { | |
973 | struct its_collection *cur, *temp; | |
974 | ||
975 | list_for_each_entry_safe(cur, temp, &its->collection_list, coll_list) | |
976 | vgic_its_free_collection(its, cur->collection_id); | |
977 | } | |
978 | ||
528297f5 EA |
979 | /* Must be called with its_lock mutex held */ |
980 | static struct its_device *vgic_its_alloc_device(struct vgic_its *its, | |
981 | u32 device_id, gpa_t itt_addr, | |
982 | u8 num_eventid_bits) | |
983 | { | |
984 | struct its_device *device; | |
985 | ||
986 | device = kzalloc(sizeof(*device), GFP_KERNEL); | |
987 | if (!device) | |
988 | return ERR_PTR(-ENOMEM); | |
989 | ||
990 | device->device_id = device_id; | |
991 | device->itt_addr = itt_addr; | |
992 | device->num_eventid_bits = num_eventid_bits; | |
993 | INIT_LIST_HEAD(&device->itt_head); | |
994 | ||
995 | list_add_tail(&device->dev_list, &its->device_list); | |
996 | return device; | |
997 | } | |
998 | ||
df9f58fb AP |
999 | /* |
1000 | * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs). | |
1001 | * Must be called with the its_lock mutex held. | |
1002 | */ | |
1003 | static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its, | |
1004 | u64 *its_cmd) | |
1005 | { | |
1006 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1007 | bool valid = its_cmd_get_validbit(its_cmd); | |
0d44cdb6 | 1008 | u8 num_eventid_bits = its_cmd_get_size(its_cmd); |
7333cefe | 1009 | gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd); |
df9f58fb AP |
1010 | struct its_device *device; |
1011 | ||
dceff702 | 1012 | if (!vgic_its_check_id(its, its->baser_device_table, device_id, NULL)) |
df9f58fb AP |
1013 | return E_ITS_MAPD_DEVICE_OOR; |
1014 | ||
0d44cdb6 EA |
1015 | if (valid && num_eventid_bits > VITS_TYPER_IDBITS) |
1016 | return E_ITS_MAPD_ITTSIZE_OOR; | |
1017 | ||
df9f58fb AP |
1018 | device = find_its_device(its, device_id); |
1019 | ||
1020 | /* | |
1021 | * The spec says that calling MAPD on an already mapped device | |
1022 | * invalidates all cached data for this device. We implement this | |
1023 | * by removing the mapping and re-establishing it. | |
1024 | */ | |
1025 | if (device) | |
0a0d389e | 1026 | vgic_its_free_device(kvm, device); |
df9f58fb AP |
1027 | |
1028 | /* | |
1029 | * The spec does not say whether unmapping a not-mapped device | |
1030 | * is an error, so we are done in any case. | |
1031 | */ | |
1032 | if (!valid) | |
1033 | return 0; | |
1034 | ||
528297f5 EA |
1035 | device = vgic_its_alloc_device(its, device_id, itt_addr, |
1036 | num_eventid_bits); | |
df9f58fb | 1037 | |
4404b336 | 1038 | return PTR_ERR_OR_ZERO(device); |
df9f58fb AP |
1039 | } |
1040 | ||
df9f58fb AP |
1041 | /* |
1042 | * The MAPC command maps collection IDs to redistributors. | |
1043 | * Must be called with the its_lock mutex held. | |
1044 | */ | |
1045 | static int vgic_its_cmd_handle_mapc(struct kvm *kvm, struct vgic_its *its, | |
1046 | u64 *its_cmd) | |
1047 | { | |
1048 | u16 coll_id; | |
1049 | u32 target_addr; | |
1050 | struct its_collection *collection; | |
1051 | bool valid; | |
1052 | ||
1053 | valid = its_cmd_get_validbit(its_cmd); | |
1054 | coll_id = its_cmd_get_collection(its_cmd); | |
1055 | target_addr = its_cmd_get_target_addr(its_cmd); | |
1056 | ||
1057 | if (target_addr >= atomic_read(&kvm->online_vcpus)) | |
1058 | return E_ITS_MAPC_PROCNUM_OOR; | |
1059 | ||
df9f58fb | 1060 | if (!valid) { |
17a21f58 | 1061 | vgic_its_free_collection(its, coll_id); |
df9f58fb | 1062 | } else { |
17a21f58 MZ |
1063 | collection = find_collection(its, coll_id); |
1064 | ||
df9f58fb | 1065 | if (!collection) { |
17a21f58 | 1066 | int ret; |
df9f58fb | 1067 | |
17a21f58 MZ |
1068 | ret = vgic_its_alloc_collection(its, &collection, |
1069 | coll_id); | |
1070 | if (ret) | |
1071 | return ret; | |
df9f58fb AP |
1072 | collection->target_addr = target_addr; |
1073 | } else { | |
1074 | collection->target_addr = target_addr; | |
1075 | update_affinity_collection(kvm, its, collection); | |
1076 | } | |
1077 | } | |
1078 | ||
1079 | return 0; | |
1080 | } | |
1081 | ||
1082 | /* | |
1083 | * The CLEAR command removes the pending state for a particular LPI. | |
1084 | * Must be called with the its_lock mutex held. | |
1085 | */ | |
1086 | static int vgic_its_cmd_handle_clear(struct kvm *kvm, struct vgic_its *its, | |
1087 | u64 *its_cmd) | |
1088 | { | |
1089 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1090 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 1091 | struct its_ite *ite; |
df9f58fb AP |
1092 | |
1093 | ||
9ce91c72 EA |
1094 | ite = find_ite(its, device_id, event_id); |
1095 | if (!ite) | |
df9f58fb AP |
1096 | return E_ITS_CLEAR_UNMAPPED_INTERRUPT; |
1097 | ||
9ce91c72 | 1098 | ite->irq->pending_latch = false; |
df9f58fb | 1099 | |
fb0cada6 MZ |
1100 | if (ite->irq->hw) |
1101 | return irq_set_irqchip_state(ite->irq->host_irq, | |
1102 | IRQCHIP_STATE_PENDING, false); | |
1103 | ||
df9f58fb AP |
1104 | return 0; |
1105 | } | |
1106 | ||
1107 | /* | |
1108 | * The INV command syncs the configuration bits from the memory table. | |
1109 | * Must be called with the its_lock mutex held. | |
1110 | */ | |
1111 | static int vgic_its_cmd_handle_inv(struct kvm *kvm, struct vgic_its *its, | |
1112 | u64 *its_cmd) | |
1113 | { | |
1114 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1115 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 1116 | struct its_ite *ite; |
df9f58fb AP |
1117 | |
1118 | ||
9ce91c72 EA |
1119 | ite = find_ite(its, device_id, event_id); |
1120 | if (!ite) | |
df9f58fb AP |
1121 | return E_ITS_INV_UNMAPPED_INTERRUPT; |
1122 | ||
6ce18e3a | 1123 | return update_lpi_config(kvm, ite->irq, NULL, true); |
df9f58fb AP |
1124 | } |
1125 | ||
1126 | /* | |
1127 | * The INVALL command requests flushing of all IRQ data in this collection. | |
1128 | * Find the VCPU mapped to that collection, then iterate over the VM's list | |
1129 | * of mapped LPIs and update the configuration for each IRQ which targets | |
1130 | * the specified vcpu. The configuration will be read from the in-memory | |
1131 | * configuration table. | |
1132 | * Must be called with the its_lock mutex held. | |
1133 | */ | |
1134 | static int vgic_its_cmd_handle_invall(struct kvm *kvm, struct vgic_its *its, | |
1135 | u64 *its_cmd) | |
1136 | { | |
1137 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
1138 | struct its_collection *collection; | |
1139 | struct kvm_vcpu *vcpu; | |
1140 | struct vgic_irq *irq; | |
1141 | u32 *intids; | |
1142 | int irq_count, i; | |
1143 | ||
1144 | collection = find_collection(its, coll_id); | |
1145 | if (!its_is_collection_mapped(collection)) | |
1146 | return E_ITS_INVALL_UNMAPPED_COLLECTION; | |
1147 | ||
1148 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); | |
1149 | ||
e294cb3a | 1150 | irq_count = vgic_copy_lpi_list(kvm, vcpu, &intids); |
df9f58fb AP |
1151 | if (irq_count < 0) |
1152 | return irq_count; | |
1153 | ||
1154 | for (i = 0; i < irq_count; i++) { | |
1155 | irq = vgic_get_irq(kvm, NULL, intids[i]); | |
1156 | if (!irq) | |
1157 | continue; | |
6ce18e3a | 1158 | update_lpi_config(kvm, irq, vcpu, false); |
df9f58fb AP |
1159 | vgic_put_irq(kvm, irq); |
1160 | } | |
1161 | ||
1162 | kfree(intids); | |
1163 | ||
6ce18e3a MZ |
1164 | if (vcpu->arch.vgic_cpu.vgic_v3.its_vpe.its_vm) |
1165 | its_invall_vpe(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe); | |
1166 | ||
df9f58fb AP |
1167 | return 0; |
1168 | } | |
1169 | ||
1170 | /* | |
1171 | * The MOVALL command moves the pending state of all IRQs targeting one | |
1172 | * redistributor to another. We don't hold the pending state in the VCPUs, | |
1173 | * but in the IRQs instead, so there is really not much to do for us here. | |
1174 | * However the spec says that no IRQ must target the old redistributor | |
1175 | * afterwards, so we make sure that no LPI is using the associated target_vcpu. | |
1176 | * This command affects all LPIs in the system that target that redistributor. | |
1177 | */ | |
1178 | static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its, | |
1179 | u64 *its_cmd) | |
1180 | { | |
df9f58fb AP |
1181 | u32 target1_addr = its_cmd_get_target_addr(its_cmd); |
1182 | u32 target2_addr = its_cmd_mask_field(its_cmd, 3, 16, 32); | |
1183 | struct kvm_vcpu *vcpu1, *vcpu2; | |
1184 | struct vgic_irq *irq; | |
ff9c1143 MZ |
1185 | u32 *intids; |
1186 | int irq_count, i; | |
df9f58fb AP |
1187 | |
1188 | if (target1_addr >= atomic_read(&kvm->online_vcpus) || | |
1189 | target2_addr >= atomic_read(&kvm->online_vcpus)) | |
1190 | return E_ITS_MOVALL_PROCNUM_OOR; | |
1191 | ||
1192 | if (target1_addr == target2_addr) | |
1193 | return 0; | |
1194 | ||
1195 | vcpu1 = kvm_get_vcpu(kvm, target1_addr); | |
1196 | vcpu2 = kvm_get_vcpu(kvm, target2_addr); | |
1197 | ||
e294cb3a | 1198 | irq_count = vgic_copy_lpi_list(kvm, vcpu1, &intids); |
ff9c1143 MZ |
1199 | if (irq_count < 0) |
1200 | return irq_count; | |
df9f58fb | 1201 | |
ff9c1143 MZ |
1202 | for (i = 0; i < irq_count; i++) { |
1203 | irq = vgic_get_irq(kvm, NULL, intids[i]); | |
df9f58fb | 1204 | |
ff9c1143 | 1205 | update_affinity(irq, vcpu2); |
df9f58fb | 1206 | |
ff9c1143 | 1207 | vgic_put_irq(kvm, irq); |
df9f58fb AP |
1208 | } |
1209 | ||
ff9c1143 | 1210 | kfree(intids); |
df9f58fb AP |
1211 | return 0; |
1212 | } | |
1213 | ||
2891a7df AP |
1214 | /* |
1215 | * The INT command injects the LPI associated with that DevID/EvID pair. | |
1216 | * Must be called with the its_lock mutex held. | |
1217 | */ | |
1218 | static int vgic_its_cmd_handle_int(struct kvm *kvm, struct vgic_its *its, | |
1219 | u64 *its_cmd) | |
1220 | { | |
1221 | u32 msi_data = its_cmd_get_id(its_cmd); | |
1222 | u64 msi_devid = its_cmd_get_deviceid(its_cmd); | |
1223 | ||
fd837b08 | 1224 | return vgic_its_trigger_msi(kvm, its, msi_devid, msi_data); |
2891a7df AP |
1225 | } |
1226 | ||
df9f58fb AP |
1227 | /* |
1228 | * This function is called with the its_cmd lock held, but the ITS data | |
1229 | * structure lock dropped. | |
1230 | */ | |
424c3383 AP |
1231 | static int vgic_its_handle_command(struct kvm *kvm, struct vgic_its *its, |
1232 | u64 *its_cmd) | |
1233 | { | |
df9f58fb AP |
1234 | int ret = -ENODEV; |
1235 | ||
1236 | mutex_lock(&its->its_lock); | |
a3e7aa27 | 1237 | switch (its_cmd_get_command(its_cmd)) { |
df9f58fb AP |
1238 | case GITS_CMD_MAPD: |
1239 | ret = vgic_its_cmd_handle_mapd(kvm, its, its_cmd); | |
1240 | break; | |
1241 | case GITS_CMD_MAPC: | |
1242 | ret = vgic_its_cmd_handle_mapc(kvm, its, its_cmd); | |
1243 | break; | |
1244 | case GITS_CMD_MAPI: | |
a3e7aa27 | 1245 | ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd); |
df9f58fb AP |
1246 | break; |
1247 | case GITS_CMD_MAPTI: | |
a3e7aa27 | 1248 | ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd); |
df9f58fb AP |
1249 | break; |
1250 | case GITS_CMD_MOVI: | |
1251 | ret = vgic_its_cmd_handle_movi(kvm, its, its_cmd); | |
1252 | break; | |
1253 | case GITS_CMD_DISCARD: | |
1254 | ret = vgic_its_cmd_handle_discard(kvm, its, its_cmd); | |
1255 | break; | |
1256 | case GITS_CMD_CLEAR: | |
1257 | ret = vgic_its_cmd_handle_clear(kvm, its, its_cmd); | |
1258 | break; | |
1259 | case GITS_CMD_MOVALL: | |
1260 | ret = vgic_its_cmd_handle_movall(kvm, its, its_cmd); | |
1261 | break; | |
2891a7df AP |
1262 | case GITS_CMD_INT: |
1263 | ret = vgic_its_cmd_handle_int(kvm, its, its_cmd); | |
1264 | break; | |
df9f58fb AP |
1265 | case GITS_CMD_INV: |
1266 | ret = vgic_its_cmd_handle_inv(kvm, its, its_cmd); | |
1267 | break; | |
1268 | case GITS_CMD_INVALL: | |
1269 | ret = vgic_its_cmd_handle_invall(kvm, its, its_cmd); | |
1270 | break; | |
1271 | case GITS_CMD_SYNC: | |
1272 | /* we ignore this command: we are in sync all of the time */ | |
1273 | ret = 0; | |
1274 | break; | |
1275 | } | |
1276 | mutex_unlock(&its->its_lock); | |
1277 | ||
1278 | return ret; | |
424c3383 AP |
1279 | } |
1280 | ||
1281 | static u64 vgic_sanitise_its_baser(u64 reg) | |
1282 | { | |
1283 | reg = vgic_sanitise_field(reg, GITS_BASER_SHAREABILITY_MASK, | |
1284 | GITS_BASER_SHAREABILITY_SHIFT, | |
1285 | vgic_sanitise_shareability); | |
1286 | reg = vgic_sanitise_field(reg, GITS_BASER_INNER_CACHEABILITY_MASK, | |
1287 | GITS_BASER_INNER_CACHEABILITY_SHIFT, | |
1288 | vgic_sanitise_inner_cacheability); | |
1289 | reg = vgic_sanitise_field(reg, GITS_BASER_OUTER_CACHEABILITY_MASK, | |
1290 | GITS_BASER_OUTER_CACHEABILITY_SHIFT, | |
1291 | vgic_sanitise_outer_cacheability); | |
1292 | ||
424c3383 AP |
1293 | /* We support only one (ITS) page size: 64K */ |
1294 | reg = (reg & ~GITS_BASER_PAGE_SIZE_MASK) | GITS_BASER_PAGE_SIZE_64K; | |
1295 | ||
1296 | return reg; | |
1297 | } | |
1298 | ||
1299 | static u64 vgic_sanitise_its_cbaser(u64 reg) | |
1300 | { | |
1301 | reg = vgic_sanitise_field(reg, GITS_CBASER_SHAREABILITY_MASK, | |
1302 | GITS_CBASER_SHAREABILITY_SHIFT, | |
1303 | vgic_sanitise_shareability); | |
1304 | reg = vgic_sanitise_field(reg, GITS_CBASER_INNER_CACHEABILITY_MASK, | |
1305 | GITS_CBASER_INNER_CACHEABILITY_SHIFT, | |
1306 | vgic_sanitise_inner_cacheability); | |
1307 | reg = vgic_sanitise_field(reg, GITS_CBASER_OUTER_CACHEABILITY_MASK, | |
1308 | GITS_CBASER_OUTER_CACHEABILITY_SHIFT, | |
1309 | vgic_sanitise_outer_cacheability); | |
1310 | ||
8ad50c89 KM |
1311 | /* Sanitise the physical address to be 64k aligned. */ |
1312 | reg &= ~GENMASK_ULL(15, 12); | |
424c3383 AP |
1313 | |
1314 | return reg; | |
1315 | } | |
1316 | ||
1317 | static unsigned long vgic_mmio_read_its_cbaser(struct kvm *kvm, | |
1318 | struct vgic_its *its, | |
1319 | gpa_t addr, unsigned int len) | |
1320 | { | |
1321 | return extract_bytes(its->cbaser, addr & 7, len); | |
1322 | } | |
1323 | ||
1324 | static void vgic_mmio_write_its_cbaser(struct kvm *kvm, struct vgic_its *its, | |
1325 | gpa_t addr, unsigned int len, | |
1326 | unsigned long val) | |
1327 | { | |
1328 | /* When GITS_CTLR.Enable is 1, this register is RO. */ | |
1329 | if (its->enabled) | |
1330 | return; | |
1331 | ||
1332 | mutex_lock(&its->cmd_lock); | |
1333 | its->cbaser = update_64bit_reg(its->cbaser, addr & 7, len, val); | |
1334 | its->cbaser = vgic_sanitise_its_cbaser(its->cbaser); | |
1335 | its->creadr = 0; | |
1336 | /* | |
1337 | * CWRITER is architecturally UNKNOWN on reset, but we need to reset | |
1338 | * it to CREADR to make sure we start with an empty command buffer. | |
1339 | */ | |
1340 | its->cwriter = its->creadr; | |
1341 | mutex_unlock(&its->cmd_lock); | |
1342 | } | |
1343 | ||
1344 | #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12) | |
1345 | #define ITS_CMD_SIZE 32 | |
1346 | #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5)) | |
1347 | ||
a5e1e6ca AP |
1348 | /* Must be called with the cmd_lock held. */ |
1349 | static void vgic_its_process_commands(struct kvm *kvm, struct vgic_its *its) | |
424c3383 AP |
1350 | { |
1351 | gpa_t cbaser; | |
1352 | u64 cmd_buf[4]; | |
424c3383 | 1353 | |
a5e1e6ca AP |
1354 | /* Commands are only processed when the ITS is enabled. */ |
1355 | if (!its->enabled) | |
424c3383 | 1356 | return; |
424c3383 | 1357 | |
8ad50c89 | 1358 | cbaser = GITS_CBASER_ADDRESS(its->cbaser); |
424c3383 AP |
1359 | |
1360 | while (its->cwriter != its->creadr) { | |
bf308242 AP |
1361 | int ret = kvm_read_guest_lock(kvm, cbaser + its->creadr, |
1362 | cmd_buf, ITS_CMD_SIZE); | |
424c3383 AP |
1363 | /* |
1364 | * If kvm_read_guest() fails, this could be due to the guest | |
1365 | * programming a bogus value in CBASER or something else going | |
1366 | * wrong from which we cannot easily recover. | |
1367 | * According to section 6.3.2 in the GICv3 spec we can just | |
1368 | * ignore that command then. | |
1369 | */ | |
1370 | if (!ret) | |
1371 | vgic_its_handle_command(kvm, its, cmd_buf); | |
1372 | ||
1373 | its->creadr += ITS_CMD_SIZE; | |
1374 | if (its->creadr == ITS_CMD_BUFFER_SIZE(its->cbaser)) | |
1375 | its->creadr = 0; | |
1376 | } | |
a5e1e6ca AP |
1377 | } |
1378 | ||
1379 | /* | |
1380 | * By writing to CWRITER the guest announces new commands to be processed. | |
1381 | * To avoid any races in the first place, we take the its_cmd lock, which | |
1382 | * protects our ring buffer variables, so that there is only one user | |
1383 | * per ITS handling commands at a given time. | |
1384 | */ | |
1385 | static void vgic_mmio_write_its_cwriter(struct kvm *kvm, struct vgic_its *its, | |
1386 | gpa_t addr, unsigned int len, | |
1387 | unsigned long val) | |
1388 | { | |
1389 | u64 reg; | |
1390 | ||
1391 | if (!its) | |
1392 | return; | |
1393 | ||
1394 | mutex_lock(&its->cmd_lock); | |
1395 | ||
1396 | reg = update_64bit_reg(its->cwriter, addr & 7, len, val); | |
1397 | reg = ITS_CMD_OFFSET(reg); | |
1398 | if (reg >= ITS_CMD_BUFFER_SIZE(its->cbaser)) { | |
1399 | mutex_unlock(&its->cmd_lock); | |
1400 | return; | |
1401 | } | |
1402 | its->cwriter = reg; | |
1403 | ||
1404 | vgic_its_process_commands(kvm, its); | |
424c3383 AP |
1405 | |
1406 | mutex_unlock(&its->cmd_lock); | |
1407 | } | |
1408 | ||
1409 | static unsigned long vgic_mmio_read_its_cwriter(struct kvm *kvm, | |
1410 | struct vgic_its *its, | |
1411 | gpa_t addr, unsigned int len) | |
1412 | { | |
1413 | return extract_bytes(its->cwriter, addr & 0x7, len); | |
1414 | } | |
1415 | ||
1416 | static unsigned long vgic_mmio_read_its_creadr(struct kvm *kvm, | |
1417 | struct vgic_its *its, | |
1418 | gpa_t addr, unsigned int len) | |
1419 | { | |
1420 | return extract_bytes(its->creadr, addr & 0x7, len); | |
1421 | } | |
1422 | ||
0979bfa6 EA |
1423 | static int vgic_mmio_uaccess_write_its_creadr(struct kvm *kvm, |
1424 | struct vgic_its *its, | |
1425 | gpa_t addr, unsigned int len, | |
1426 | unsigned long val) | |
1427 | { | |
1428 | u32 cmd_offset; | |
1429 | int ret = 0; | |
1430 | ||
1431 | mutex_lock(&its->cmd_lock); | |
1432 | ||
1433 | if (its->enabled) { | |
1434 | ret = -EBUSY; | |
1435 | goto out; | |
1436 | } | |
1437 | ||
1438 | cmd_offset = ITS_CMD_OFFSET(val); | |
1439 | if (cmd_offset >= ITS_CMD_BUFFER_SIZE(its->cbaser)) { | |
1440 | ret = -EINVAL; | |
1441 | goto out; | |
1442 | } | |
1443 | ||
1444 | its->creadr = cmd_offset; | |
1445 | out: | |
1446 | mutex_unlock(&its->cmd_lock); | |
1447 | return ret; | |
1448 | } | |
1449 | ||
424c3383 AP |
1450 | #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7) |
1451 | static unsigned long vgic_mmio_read_its_baser(struct kvm *kvm, | |
1452 | struct vgic_its *its, | |
1453 | gpa_t addr, unsigned int len) | |
1454 | { | |
1455 | u64 reg; | |
1456 | ||
1457 | switch (BASER_INDEX(addr)) { | |
1458 | case 0: | |
1459 | reg = its->baser_device_table; | |
1460 | break; | |
1461 | case 1: | |
1462 | reg = its->baser_coll_table; | |
1463 | break; | |
1464 | default: | |
1465 | reg = 0; | |
1466 | break; | |
1467 | } | |
1468 | ||
1469 | return extract_bytes(reg, addr & 7, len); | |
1470 | } | |
1471 | ||
1472 | #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56)) | |
1473 | static void vgic_mmio_write_its_baser(struct kvm *kvm, | |
1474 | struct vgic_its *its, | |
1475 | gpa_t addr, unsigned int len, | |
1476 | unsigned long val) | |
1477 | { | |
71afe470 | 1478 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
36d6961c | 1479 | u64 entry_size, table_type; |
424c3383 AP |
1480 | u64 reg, *regptr, clearbits = 0; |
1481 | ||
1482 | /* When GITS_CTLR.Enable is 1, we ignore write accesses. */ | |
1483 | if (its->enabled) | |
1484 | return; | |
1485 | ||
1486 | switch (BASER_INDEX(addr)) { | |
1487 | case 0: | |
1488 | regptr = &its->baser_device_table; | |
71afe470 | 1489 | entry_size = abi->dte_esz; |
36d6961c | 1490 | table_type = GITS_BASER_TYPE_DEVICE; |
424c3383 AP |
1491 | break; |
1492 | case 1: | |
1493 | regptr = &its->baser_coll_table; | |
71afe470 | 1494 | entry_size = abi->cte_esz; |
36d6961c | 1495 | table_type = GITS_BASER_TYPE_COLLECTION; |
424c3383 AP |
1496 | clearbits = GITS_BASER_INDIRECT; |
1497 | break; | |
1498 | default: | |
1499 | return; | |
1500 | } | |
1501 | ||
1502 | reg = update_64bit_reg(*regptr, addr & 7, len, val); | |
1503 | reg &= ~GITS_BASER_RO_MASK; | |
1504 | reg &= ~clearbits; | |
1505 | ||
1506 | reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT; | |
36d6961c | 1507 | reg |= table_type << GITS_BASER_TYPE_SHIFT; |
424c3383 AP |
1508 | reg = vgic_sanitise_its_baser(reg); |
1509 | ||
1510 | *regptr = reg; | |
36d6961c EA |
1511 | |
1512 | if (!(reg & GITS_BASER_VALID)) { | |
1513 | /* Take the its_lock to prevent a race with a save/restore */ | |
1514 | mutex_lock(&its->its_lock); | |
1515 | switch (table_type) { | |
1516 | case GITS_BASER_TYPE_DEVICE: | |
1517 | vgic_its_free_device_list(kvm, its); | |
1518 | break; | |
1519 | case GITS_BASER_TYPE_COLLECTION: | |
1520 | vgic_its_free_collection_list(kvm, its); | |
1521 | break; | |
1522 | } | |
1523 | mutex_unlock(&its->its_lock); | |
1524 | } | |
424c3383 AP |
1525 | } |
1526 | ||
a5e1e6ca AP |
1527 | static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu, |
1528 | struct vgic_its *its, | |
1529 | gpa_t addr, unsigned int len) | |
1530 | { | |
1531 | u32 reg = 0; | |
1532 | ||
1533 | mutex_lock(&its->cmd_lock); | |
1534 | if (its->creadr == its->cwriter) | |
1535 | reg |= GITS_CTLR_QUIESCENT; | |
1536 | if (its->enabled) | |
1537 | reg |= GITS_CTLR_ENABLE; | |
1538 | mutex_unlock(&its->cmd_lock); | |
1539 | ||
1540 | return reg; | |
1541 | } | |
1542 | ||
1543 | static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its, | |
1544 | gpa_t addr, unsigned int len, | |
1545 | unsigned long val) | |
1546 | { | |
1547 | mutex_lock(&its->cmd_lock); | |
1548 | ||
c9b51bb6 EA |
1549 | /* |
1550 | * It is UNPREDICTABLE to enable the ITS if any of the CBASER or | |
1551 | * device/collection BASER are invalid | |
1552 | */ | |
1553 | if (!its->enabled && (val & GITS_CTLR_ENABLE) && | |
1554 | (!(its->baser_device_table & GITS_BASER_VALID) || | |
1555 | !(its->baser_coll_table & GITS_BASER_VALID) || | |
1556 | !(its->cbaser & GITS_CBASER_VALID))) | |
1557 | goto out; | |
1558 | ||
a5e1e6ca AP |
1559 | its->enabled = !!(val & GITS_CTLR_ENABLE); |
1560 | ||
1561 | /* | |
1562 | * Try to process any pending commands. This function bails out early | |
1563 | * if the ITS is disabled or no commands have been queued. | |
1564 | */ | |
1565 | vgic_its_process_commands(kvm, its); | |
1566 | ||
c9b51bb6 | 1567 | out: |
a5e1e6ca AP |
1568 | mutex_unlock(&its->cmd_lock); |
1569 | } | |
1570 | ||
59c5ab40 AP |
1571 | #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \ |
1572 | { \ | |
1573 | .reg_offset = off, \ | |
1574 | .len = length, \ | |
1575 | .access_flags = acc, \ | |
1576 | .its_read = rd, \ | |
1577 | .its_write = wr, \ | |
1578 | } | |
1579 | ||
0979bfa6 EA |
1580 | #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\ |
1581 | { \ | |
1582 | .reg_offset = off, \ | |
1583 | .len = length, \ | |
1584 | .access_flags = acc, \ | |
1585 | .its_read = rd, \ | |
1586 | .its_write = wr, \ | |
1587 | .uaccess_its_write = uwr, \ | |
1588 | } | |
1589 | ||
59c5ab40 AP |
1590 | static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its, |
1591 | gpa_t addr, unsigned int len, unsigned long val) | |
1592 | { | |
1593 | /* Ignore */ | |
1594 | } | |
1595 | ||
1596 | static struct vgic_register_region its_registers[] = { | |
1597 | REGISTER_ITS_DESC(GITS_CTLR, | |
424c3383 | 1598 | vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, 4, |
59c5ab40 | 1599 | VGIC_ACCESS_32bit), |
ab01c6bd EA |
1600 | REGISTER_ITS_DESC_UACCESS(GITS_IIDR, |
1601 | vgic_mmio_read_its_iidr, its_mmio_write_wi, | |
1602 | vgic_mmio_uaccess_write_its_iidr, 4, | |
59c5ab40 AP |
1603 | VGIC_ACCESS_32bit), |
1604 | REGISTER_ITS_DESC(GITS_TYPER, | |
424c3383 | 1605 | vgic_mmio_read_its_typer, its_mmio_write_wi, 8, |
59c5ab40 AP |
1606 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1607 | REGISTER_ITS_DESC(GITS_CBASER, | |
424c3383 | 1608 | vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, 8, |
59c5ab40 AP |
1609 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1610 | REGISTER_ITS_DESC(GITS_CWRITER, | |
424c3383 | 1611 | vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, 8, |
59c5ab40 | 1612 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
0979bfa6 EA |
1613 | REGISTER_ITS_DESC_UACCESS(GITS_CREADR, |
1614 | vgic_mmio_read_its_creadr, its_mmio_write_wi, | |
1615 | vgic_mmio_uaccess_write_its_creadr, 8, | |
59c5ab40 AP |
1616 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1617 | REGISTER_ITS_DESC(GITS_BASER, | |
424c3383 | 1618 | vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, 0x40, |
59c5ab40 AP |
1619 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1620 | REGISTER_ITS_DESC(GITS_IDREGS_BASE, | |
424c3383 | 1621 | vgic_mmio_read_its_idregs, its_mmio_write_wi, 0x30, |
59c5ab40 AP |
1622 | VGIC_ACCESS_32bit), |
1623 | }; | |
1624 | ||
33d3bc95 AP |
1625 | /* This is called on setting the LPI enable bit in the redistributor. */ |
1626 | void vgic_enable_lpis(struct kvm_vcpu *vcpu) | |
1627 | { | |
1628 | if (!(vcpu->arch.vgic_cpu.pendbaser & GICR_PENDBASER_PTZ)) | |
1629 | its_sync_lpi_pending_table(vcpu); | |
1630 | } | |
1631 | ||
30e1b684 CD |
1632 | static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its, |
1633 | u64 addr) | |
59c5ab40 AP |
1634 | { |
1635 | struct vgic_io_device *iodev = &its->iodev; | |
1636 | int ret; | |
1637 | ||
30e1b684 CD |
1638 | mutex_lock(&kvm->slots_lock); |
1639 | if (!IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) { | |
1640 | ret = -EBUSY; | |
1641 | goto out; | |
1642 | } | |
59c5ab40 | 1643 | |
30e1b684 | 1644 | its->vgic_its_base = addr; |
59c5ab40 AP |
1645 | iodev->regions = its_registers; |
1646 | iodev->nr_regions = ARRAY_SIZE(its_registers); | |
1647 | kvm_iodevice_init(&iodev->dev, &kvm_io_gic_ops); | |
1648 | ||
1649 | iodev->base_addr = its->vgic_its_base; | |
1650 | iodev->iodev_type = IODEV_ITS; | |
1651 | iodev->its = its; | |
59c5ab40 AP |
1652 | ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, iodev->base_addr, |
1653 | KVM_VGIC_V3_ITS_SIZE, &iodev->dev); | |
30e1b684 | 1654 | out: |
59c5ab40 AP |
1655 | mutex_unlock(&kvm->slots_lock); |
1656 | ||
1657 | return ret; | |
1658 | } | |
1085fdc6 | 1659 | |
424c3383 AP |
1660 | #define INITIAL_BASER_VALUE \ |
1661 | (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \ | |
1662 | GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \ | |
1663 | GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \ | |
424c3383 AP |
1664 | GITS_BASER_PAGE_SIZE_64K) |
1665 | ||
1666 | #define INITIAL_PROPBASER_VALUE \ | |
1667 | (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \ | |
1668 | GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \ | |
1669 | GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable)) | |
1670 | ||
1085fdc6 AP |
1671 | static int vgic_its_create(struct kvm_device *dev, u32 type) |
1672 | { | |
1673 | struct vgic_its *its; | |
1674 | ||
1675 | if (type != KVM_DEV_TYPE_ARM_VGIC_ITS) | |
1676 | return -ENODEV; | |
1677 | ||
1678 | its = kzalloc(sizeof(struct vgic_its), GFP_KERNEL); | |
1679 | if (!its) | |
1680 | return -ENOMEM; | |
1681 | ||
74fe55dc MZ |
1682 | if (vgic_initialized(dev->kvm)) { |
1683 | int ret = vgic_v4_init(dev->kvm); | |
3d1ad640 | 1684 | if (ret < 0) { |
74fe55dc MZ |
1685 | kfree(its); |
1686 | return ret; | |
1687 | } | |
1688 | } | |
1689 | ||
424c3383 AP |
1690 | mutex_init(&its->its_lock); |
1691 | mutex_init(&its->cmd_lock); | |
1692 | ||
1085fdc6 AP |
1693 | its->vgic_its_base = VGIC_ADDR_UNDEF; |
1694 | ||
424c3383 AP |
1695 | INIT_LIST_HEAD(&its->device_list); |
1696 | INIT_LIST_HEAD(&its->collection_list); | |
1697 | ||
79962a5c | 1698 | dev->kvm->arch.vgic.msis_require_devid = true; |
1085fdc6 | 1699 | dev->kvm->arch.vgic.has_its = true; |
1085fdc6 | 1700 | its->enabled = false; |
bb717644 | 1701 | its->dev = dev; |
1085fdc6 | 1702 | |
424c3383 AP |
1703 | its->baser_device_table = INITIAL_BASER_VALUE | |
1704 | ((u64)GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT); | |
1705 | its->baser_coll_table = INITIAL_BASER_VALUE | | |
1706 | ((u64)GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT); | |
1707 | dev->kvm->arch.vgic.propbaser = INITIAL_PROPBASER_VALUE; | |
1708 | ||
1085fdc6 AP |
1709 | dev->private = its; |
1710 | ||
71afe470 | 1711 | return vgic_its_set_abi(its, NR_ITS_ABIS - 1); |
1085fdc6 AP |
1712 | } |
1713 | ||
1714 | static void vgic_its_destroy(struct kvm_device *kvm_dev) | |
1715 | { | |
424c3383 | 1716 | struct kvm *kvm = kvm_dev->kvm; |
1085fdc6 | 1717 | struct vgic_its *its = kvm_dev->private; |
424c3383 AP |
1718 | |
1719 | mutex_lock(&its->its_lock); | |
a2b19e6e | 1720 | |
2f609a03 | 1721 | vgic_its_free_device_list(kvm, its); |
1722 | vgic_its_free_collection_list(kvm, its); | |
424c3383 | 1723 | |
424c3383 | 1724 | mutex_unlock(&its->its_lock); |
1085fdc6 AP |
1725 | kfree(its); |
1726 | } | |
1727 | ||
d9ea27a3 Y |
1728 | static int vgic_its_has_attr_regs(struct kvm_device *dev, |
1729 | struct kvm_device_attr *attr) | |
876ae234 | 1730 | { |
8331c23c EA |
1731 | const struct vgic_register_region *region; |
1732 | gpa_t offset = attr->attr; | |
1733 | int align; | |
1734 | ||
1735 | align = (offset < GITS_TYPER) || (offset >= GITS_PIDR4) ? 0x3 : 0x7; | |
1736 | ||
1737 | if (offset & align) | |
1738 | return -EINVAL; | |
1739 | ||
1740 | region = vgic_find_mmio_region(its_registers, | |
1741 | ARRAY_SIZE(its_registers), | |
1742 | offset); | |
1743 | if (!region) | |
1744 | return -ENXIO; | |
1745 | ||
1746 | return 0; | |
876ae234 EA |
1747 | } |
1748 | ||
d9ea27a3 Y |
1749 | static int vgic_its_attr_regs_access(struct kvm_device *dev, |
1750 | struct kvm_device_attr *attr, | |
1751 | u64 *reg, bool is_write) | |
876ae234 | 1752 | { |
8331c23c EA |
1753 | const struct vgic_register_region *region; |
1754 | struct vgic_its *its; | |
1755 | gpa_t addr, offset; | |
1756 | unsigned int len; | |
1757 | int align, ret = 0; | |
1758 | ||
1759 | its = dev->private; | |
1760 | offset = attr->attr; | |
1761 | ||
1762 | /* | |
1763 | * Although the spec supports upper/lower 32-bit accesses to | |
1764 | * 64-bit ITS registers, the userspace ABI requires 64-bit | |
1765 | * accesses to all 64-bit wide registers. We therefore only | |
1766 | * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID | |
1767 | * registers | |
1768 | */ | |
1769 | if ((offset < GITS_TYPER) || (offset >= GITS_PIDR4)) | |
1770 | align = 0x3; | |
1771 | else | |
1772 | align = 0x7; | |
1773 | ||
1774 | if (offset & align) | |
1775 | return -EINVAL; | |
1776 | ||
1777 | mutex_lock(&dev->kvm->lock); | |
1778 | ||
1779 | if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) { | |
1780 | ret = -ENXIO; | |
1781 | goto out; | |
1782 | } | |
1783 | ||
1784 | region = vgic_find_mmio_region(its_registers, | |
1785 | ARRAY_SIZE(its_registers), | |
1786 | offset); | |
1787 | if (!region) { | |
1788 | ret = -ENXIO; | |
1789 | goto out; | |
1790 | } | |
1791 | ||
1792 | if (!lock_all_vcpus(dev->kvm)) { | |
1793 | ret = -EBUSY; | |
1794 | goto out; | |
1795 | } | |
1796 | ||
1797 | addr = its->vgic_its_base + offset; | |
1798 | ||
1799 | len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4; | |
1800 | ||
1801 | if (is_write) { | |
1802 | if (region->uaccess_its_write) | |
1803 | ret = region->uaccess_its_write(dev->kvm, its, addr, | |
1804 | len, *reg); | |
1805 | else | |
1806 | region->its_write(dev->kvm, its, addr, len, *reg); | |
1807 | } else { | |
1808 | *reg = region->its_read(dev->kvm, its, addr, len); | |
1809 | } | |
1810 | unlock_all_vcpus(dev->kvm); | |
1811 | out: | |
1812 | mutex_unlock(&dev->kvm->lock); | |
1813 | return ret; | |
876ae234 EA |
1814 | } |
1815 | ||
57a9a117 EA |
1816 | static u32 compute_next_devid_offset(struct list_head *h, |
1817 | struct its_device *dev) | |
920a7a8f EA |
1818 | { |
1819 | struct its_device *next; | |
1820 | u32 next_offset; | |
1821 | ||
1822 | if (list_is_last(&dev->dev_list, h)) | |
1823 | return 0; | |
1824 | next = list_next_entry(dev, dev_list); | |
1825 | next_offset = next->device_id - dev->device_id; | |
1826 | ||
1827 | return min_t(u32, next_offset, VITS_DTE_MAX_DEVID_OFFSET); | |
1828 | } | |
1829 | ||
eff484e0 | 1830 | static u32 compute_next_eventid_offset(struct list_head *h, struct its_ite *ite) |
920a7a8f EA |
1831 | { |
1832 | struct its_ite *next; | |
1833 | u32 next_offset; | |
1834 | ||
1835 | if (list_is_last(&ite->ite_list, h)) | |
1836 | return 0; | |
1837 | next = list_next_entry(ite, ite_list); | |
1838 | next_offset = next->event_id - ite->event_id; | |
1839 | ||
1840 | return min_t(u32, next_offset, VITS_ITE_MAX_EVENTID_OFFSET); | |
1841 | } | |
1842 | ||
1843 | /** | |
1844 | * entry_fn_t - Callback called on a table entry restore path | |
1845 | * @its: its handle | |
1846 | * @id: id of the entry | |
1847 | * @entry: pointer to the entry | |
1848 | * @opaque: pointer to an opaque data | |
1849 | * | |
1850 | * Return: < 0 on error, 0 if last element was identified, id offset to next | |
1851 | * element otherwise | |
1852 | */ | |
1853 | typedef int (*entry_fn_t)(struct vgic_its *its, u32 id, void *entry, | |
1854 | void *opaque); | |
1855 | ||
1856 | /** | |
1857 | * scan_its_table - Scan a contiguous table in guest RAM and applies a function | |
1858 | * to each entry | |
1859 | * | |
1860 | * @its: its handle | |
1861 | * @base: base gpa of the table | |
1862 | * @size: size of the table in bytes | |
1863 | * @esz: entry size in bytes | |
1864 | * @start_id: the ID of the first entry in the table | |
1865 | * (non zero for 2d level tables) | |
1866 | * @fn: function to apply on each entry | |
1867 | * | |
1868 | * Return: < 0 on error, 0 if last element was identified, 1 otherwise | |
1869 | * (the last element may not be found on second level tables) | |
1870 | */ | |
2326acee | 1871 | static int scan_its_table(struct vgic_its *its, gpa_t base, int size, u32 esz, |
57a9a117 | 1872 | int start_id, entry_fn_t fn, void *opaque) |
920a7a8f | 1873 | { |
920a7a8f EA |
1874 | struct kvm *kvm = its->dev->kvm; |
1875 | unsigned long len = size; | |
1876 | int id = start_id; | |
1877 | gpa_t gpa = base; | |
2326acee | 1878 | char entry[ESZ_MAX]; |
920a7a8f EA |
1879 | int ret; |
1880 | ||
8c1a8a32 CD |
1881 | memset(entry, 0, esz); |
1882 | ||
920a7a8f EA |
1883 | while (len > 0) { |
1884 | int next_offset; | |
1885 | size_t byte_offset; | |
1886 | ||
711702b5 | 1887 | ret = kvm_read_guest_lock(kvm, gpa, entry, esz); |
920a7a8f | 1888 | if (ret) |
8c1a8a32 | 1889 | return ret; |
920a7a8f EA |
1890 | |
1891 | next_offset = fn(its, id, entry, opaque); | |
8c1a8a32 CD |
1892 | if (next_offset <= 0) |
1893 | return next_offset; | |
920a7a8f EA |
1894 | |
1895 | byte_offset = next_offset * esz; | |
1896 | id += next_offset; | |
1897 | gpa += byte_offset; | |
1898 | len -= byte_offset; | |
1899 | } | |
8c1a8a32 | 1900 | return 1; |
920a7a8f EA |
1901 | } |
1902 | ||
eff484e0 EA |
1903 | /** |
1904 | * vgic_its_save_ite - Save an interrupt translation entry at @gpa | |
1905 | */ | |
1906 | static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev, | |
1907 | struct its_ite *ite, gpa_t gpa, int ite_esz) | |
1908 | { | |
1909 | struct kvm *kvm = its->dev->kvm; | |
1910 | u32 next_offset; | |
1911 | u64 val; | |
1912 | ||
1913 | next_offset = compute_next_eventid_offset(&dev->itt_head, ite); | |
1914 | val = ((u64)next_offset << KVM_ITS_ITE_NEXT_SHIFT) | | |
7c7d2fa1 | 1915 | ((u64)ite->irq->intid << KVM_ITS_ITE_PINTID_SHIFT) | |
eff484e0 EA |
1916 | ite->collection->collection_id; |
1917 | val = cpu_to_le64(val); | |
a6ecfb11 | 1918 | return kvm_write_guest_lock(kvm, gpa, &val, ite_esz); |
eff484e0 EA |
1919 | } |
1920 | ||
1921 | /** | |
1922 | * vgic_its_restore_ite - restore an interrupt translation entry | |
1923 | * @event_id: id used for indexing | |
1924 | * @ptr: pointer to the ITE entry | |
1925 | * @opaque: pointer to the its_device | |
1926 | */ | |
1927 | static int vgic_its_restore_ite(struct vgic_its *its, u32 event_id, | |
1928 | void *ptr, void *opaque) | |
1929 | { | |
1930 | struct its_device *dev = (struct its_device *)opaque; | |
1931 | struct its_collection *collection; | |
1932 | struct kvm *kvm = its->dev->kvm; | |
1933 | struct kvm_vcpu *vcpu = NULL; | |
1934 | u64 val; | |
1935 | u64 *p = (u64 *)ptr; | |
1936 | struct vgic_irq *irq; | |
1937 | u32 coll_id, lpi_id; | |
1938 | struct its_ite *ite; | |
1939 | u32 offset; | |
1940 | ||
1941 | val = *p; | |
1942 | ||
1943 | val = le64_to_cpu(val); | |
1944 | ||
1945 | coll_id = val & KVM_ITS_ITE_ICID_MASK; | |
1946 | lpi_id = (val & KVM_ITS_ITE_PINTID_MASK) >> KVM_ITS_ITE_PINTID_SHIFT; | |
1947 | ||
1948 | if (!lpi_id) | |
1949 | return 1; /* invalid entry, no choice but to scan next entry */ | |
1950 | ||
1951 | if (lpi_id < VGIC_MIN_LPI) | |
1952 | return -EINVAL; | |
1953 | ||
1954 | offset = val >> KVM_ITS_ITE_NEXT_SHIFT; | |
1955 | if (event_id + offset >= BIT_ULL(dev->num_eventid_bits)) | |
1956 | return -EINVAL; | |
1957 | ||
1958 | collection = find_collection(its, coll_id); | |
1959 | if (!collection) | |
1960 | return -EINVAL; | |
1961 | ||
7c7d2fa1 | 1962 | ite = vgic_its_alloc_ite(dev, collection, event_id); |
eff484e0 EA |
1963 | if (IS_ERR(ite)) |
1964 | return PTR_ERR(ite); | |
1965 | ||
1966 | if (its_is_collection_mapped(collection)) | |
1967 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); | |
1968 | ||
1969 | irq = vgic_add_lpi(kvm, lpi_id, vcpu); | |
1970 | if (IS_ERR(irq)) | |
1971 | return PTR_ERR(irq); | |
1972 | ite->irq = irq; | |
1973 | ||
1974 | return offset; | |
1975 | } | |
1976 | ||
1977 | static int vgic_its_ite_cmp(void *priv, struct list_head *a, | |
1978 | struct list_head *b) | |
1979 | { | |
1980 | struct its_ite *itea = container_of(a, struct its_ite, ite_list); | |
1981 | struct its_ite *iteb = container_of(b, struct its_ite, ite_list); | |
1982 | ||
1983 | if (itea->event_id < iteb->event_id) | |
1984 | return -1; | |
1985 | else | |
1986 | return 1; | |
1987 | } | |
1988 | ||
57a9a117 EA |
1989 | static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device) |
1990 | { | |
eff484e0 EA |
1991 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
1992 | gpa_t base = device->itt_addr; | |
1993 | struct its_ite *ite; | |
1994 | int ret; | |
1995 | int ite_esz = abi->ite_esz; | |
1996 | ||
1997 | list_sort(NULL, &device->itt_head, vgic_its_ite_cmp); | |
1998 | ||
1999 | list_for_each_entry(ite, &device->itt_head, ite_list) { | |
2000 | gpa_t gpa = base + ite->event_id * ite_esz; | |
2001 | ||
bd94e7ae MZ |
2002 | /* |
2003 | * If an LPI carries the HW bit, this means that this | |
2004 | * interrupt is controlled by GICv4, and we do not | |
2005 | * have direct access to that state. Let's simply fail | |
2006 | * the save operation... | |
2007 | */ | |
2008 | if (ite->irq->hw) | |
2009 | return -EACCES; | |
2010 | ||
eff484e0 EA |
2011 | ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz); |
2012 | if (ret) | |
2013 | return ret; | |
2014 | } | |
2015 | return 0; | |
57a9a117 EA |
2016 | } |
2017 | ||
b9238262 | 2018 | /** |
2019 | * vgic_its_restore_itt - restore the ITT of a device | |
2020 | * | |
2021 | * @its: its handle | |
2022 | * @dev: device handle | |
2023 | * | |
2024 | * Return 0 on success, < 0 on error | |
2025 | */ | |
57a9a117 EA |
2026 | static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev) |
2027 | { | |
eff484e0 EA |
2028 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2029 | gpa_t base = dev->itt_addr; | |
2030 | int ret; | |
2031 | int ite_esz = abi->ite_esz; | |
2032 | size_t max_size = BIT_ULL(dev->num_eventid_bits) * ite_esz; | |
2033 | ||
2034 | ret = scan_its_table(its, base, max_size, ite_esz, 0, | |
2035 | vgic_its_restore_ite, dev); | |
2036 | ||
b9238262 | 2037 | /* scan_its_table returns +1 if all ITEs are invalid */ |
2038 | if (ret > 0) | |
2039 | ret = 0; | |
2040 | ||
eff484e0 | 2041 | return ret; |
57a9a117 EA |
2042 | } |
2043 | ||
2044 | /** | |
2045 | * vgic_its_save_dte - Save a device table entry at a given GPA | |
2046 | * | |
2047 | * @its: ITS handle | |
2048 | * @dev: ITS device | |
2049 | * @ptr: GPA | |
2050 | */ | |
2051 | static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev, | |
2052 | gpa_t ptr, int dte_esz) | |
2053 | { | |
2054 | struct kvm *kvm = its->dev->kvm; | |
2055 | u64 val, itt_addr_field; | |
2056 | u32 next_offset; | |
2057 | ||
2058 | itt_addr_field = dev->itt_addr >> 8; | |
2059 | next_offset = compute_next_devid_offset(&its->device_list, dev); | |
2060 | val = (1ULL << KVM_ITS_DTE_VALID_SHIFT | | |
2061 | ((u64)next_offset << KVM_ITS_DTE_NEXT_SHIFT) | | |
2062 | (itt_addr_field << KVM_ITS_DTE_ITTADDR_SHIFT) | | |
2063 | (dev->num_eventid_bits - 1)); | |
2064 | val = cpu_to_le64(val); | |
a6ecfb11 | 2065 | return kvm_write_guest_lock(kvm, ptr, &val, dte_esz); |
57a9a117 EA |
2066 | } |
2067 | ||
2068 | /** | |
2069 | * vgic_its_restore_dte - restore a device table entry | |
2070 | * | |
2071 | * @its: its handle | |
2072 | * @id: device id the DTE corresponds to | |
2073 | * @ptr: kernel VA where the 8 byte DTE is located | |
2074 | * @opaque: unused | |
2075 | * | |
2076 | * Return: < 0 on error, 0 if the dte is the last one, id offset to the | |
2077 | * next dte otherwise | |
2078 | */ | |
2079 | static int vgic_its_restore_dte(struct vgic_its *its, u32 id, | |
2080 | void *ptr, void *opaque) | |
2081 | { | |
2082 | struct its_device *dev; | |
2083 | gpa_t itt_addr; | |
2084 | u8 num_eventid_bits; | |
2085 | u64 entry = *(u64 *)ptr; | |
2086 | bool valid; | |
2087 | u32 offset; | |
2088 | int ret; | |
2089 | ||
2090 | entry = le64_to_cpu(entry); | |
2091 | ||
2092 | valid = entry >> KVM_ITS_DTE_VALID_SHIFT; | |
2093 | num_eventid_bits = (entry & KVM_ITS_DTE_SIZE_MASK) + 1; | |
2094 | itt_addr = ((entry & KVM_ITS_DTE_ITTADDR_MASK) | |
2095 | >> KVM_ITS_DTE_ITTADDR_SHIFT) << 8; | |
2096 | ||
2097 | if (!valid) | |
2098 | return 1; | |
2099 | ||
2100 | /* dte entry is valid */ | |
2101 | offset = (entry & KVM_ITS_DTE_NEXT_MASK) >> KVM_ITS_DTE_NEXT_SHIFT; | |
2102 | ||
2103 | dev = vgic_its_alloc_device(its, id, itt_addr, num_eventid_bits); | |
2104 | if (IS_ERR(dev)) | |
2105 | return PTR_ERR(dev); | |
2106 | ||
2107 | ret = vgic_its_restore_itt(its, dev); | |
a2b19e6e CD |
2108 | if (ret) { |
2109 | vgic_its_free_device(its->dev->kvm, dev); | |
57a9a117 | 2110 | return ret; |
a2b19e6e | 2111 | } |
57a9a117 EA |
2112 | |
2113 | return offset; | |
2114 | } | |
2115 | ||
2116 | static int vgic_its_device_cmp(void *priv, struct list_head *a, | |
2117 | struct list_head *b) | |
2118 | { | |
2119 | struct its_device *deva = container_of(a, struct its_device, dev_list); | |
2120 | struct its_device *devb = container_of(b, struct its_device, dev_list); | |
2121 | ||
2122 | if (deva->device_id < devb->device_id) | |
2123 | return -1; | |
2124 | else | |
2125 | return 1; | |
2126 | } | |
2127 | ||
3b65808f EA |
2128 | /** |
2129 | * vgic_its_save_device_tables - Save the device table and all ITT | |
2130 | * into guest RAM | |
57a9a117 EA |
2131 | * |
2132 | * L1/L2 handling is hidden by vgic_its_check_id() helper which directly | |
2133 | * returns the GPA of the device entry | |
3b65808f EA |
2134 | */ |
2135 | static int vgic_its_save_device_tables(struct vgic_its *its) | |
2136 | { | |
57a9a117 | 2137 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa | 2138 | u64 baser = its->baser_device_table; |
57a9a117 EA |
2139 | struct its_device *dev; |
2140 | int dte_esz = abi->dte_esz; | |
57a9a117 | 2141 | |
c2385eaa EA |
2142 | if (!(baser & GITS_BASER_VALID)) |
2143 | return 0; | |
57a9a117 EA |
2144 | |
2145 | list_sort(NULL, &its->device_list, vgic_its_device_cmp); | |
2146 | ||
2147 | list_for_each_entry(dev, &its->device_list, dev_list) { | |
2148 | int ret; | |
2149 | gpa_t eaddr; | |
2150 | ||
2151 | if (!vgic_its_check_id(its, baser, | |
2152 | dev->device_id, &eaddr)) | |
2153 | return -EINVAL; | |
2154 | ||
2155 | ret = vgic_its_save_itt(its, dev); | |
2156 | if (ret) | |
2157 | return ret; | |
2158 | ||
2159 | ret = vgic_its_save_dte(its, dev, eaddr, dte_esz); | |
2160 | if (ret) | |
2161 | return ret; | |
2162 | } | |
2163 | return 0; | |
2164 | } | |
2165 | ||
2166 | /** | |
2167 | * handle_l1_dte - callback used for L1 device table entries (2 stage case) | |
2168 | * | |
2169 | * @its: its handle | |
2170 | * @id: index of the entry in the L1 table | |
2171 | * @addr: kernel VA | |
2172 | * @opaque: unused | |
2173 | * | |
2174 | * L1 table entries are scanned by steps of 1 entry | |
2175 | * Return < 0 if error, 0 if last dte was found when scanning the L2 | |
2176 | * table, +1 otherwise (meaning next L1 entry must be scanned) | |
2177 | */ | |
2178 | static int handle_l1_dte(struct vgic_its *its, u32 id, void *addr, | |
2179 | void *opaque) | |
2180 | { | |
2181 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2182 | int l2_start_id = id * (SZ_64K / abi->dte_esz); | |
2183 | u64 entry = *(u64 *)addr; | |
2184 | int dte_esz = abi->dte_esz; | |
2185 | gpa_t gpa; | |
2186 | int ret; | |
2187 | ||
2188 | entry = le64_to_cpu(entry); | |
2189 | ||
2190 | if (!(entry & KVM_ITS_L1E_VALID_MASK)) | |
2191 | return 1; | |
2192 | ||
2193 | gpa = entry & KVM_ITS_L1E_ADDR_MASK; | |
2194 | ||
2195 | ret = scan_its_table(its, gpa, SZ_64K, dte_esz, | |
2196 | l2_start_id, vgic_its_restore_dte, NULL); | |
2197 | ||
b9238262 | 2198 | return ret; |
3b65808f EA |
2199 | } |
2200 | ||
2201 | /** | |
2202 | * vgic_its_restore_device_tables - Restore the device table and all ITT | |
2203 | * from guest RAM to internal data structs | |
2204 | */ | |
2205 | static int vgic_its_restore_device_tables(struct vgic_its *its) | |
2206 | { | |
57a9a117 EA |
2207 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2208 | u64 baser = its->baser_device_table; | |
2209 | int l1_esz, ret; | |
2210 | int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; | |
2211 | gpa_t l1_gpa; | |
2212 | ||
2213 | if (!(baser & GITS_BASER_VALID)) | |
2214 | return 0; | |
2215 | ||
8ad50c89 | 2216 | l1_gpa = GITS_BASER_ADDR_48_to_52(baser); |
57a9a117 EA |
2217 | |
2218 | if (baser & GITS_BASER_INDIRECT) { | |
2219 | l1_esz = GITS_LVL1_ENTRY_SIZE; | |
2220 | ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0, | |
2221 | handle_l1_dte, NULL); | |
2222 | } else { | |
2223 | l1_esz = abi->dte_esz; | |
2224 | ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0, | |
2225 | vgic_its_restore_dte, NULL); | |
2226 | } | |
2227 | ||
b9238262 | 2228 | /* scan_its_table returns +1 if all entries are invalid */ |
57a9a117 | 2229 | if (ret > 0) |
b9238262 | 2230 | ret = 0; |
57a9a117 EA |
2231 | |
2232 | return ret; | |
3b65808f EA |
2233 | } |
2234 | ||
ea1ad53e EA |
2235 | static int vgic_its_save_cte(struct vgic_its *its, |
2236 | struct its_collection *collection, | |
2237 | gpa_t gpa, int esz) | |
2238 | { | |
2239 | u64 val; | |
2240 | ||
2241 | val = (1ULL << KVM_ITS_CTE_VALID_SHIFT | | |
2242 | ((u64)collection->target_addr << KVM_ITS_CTE_RDBASE_SHIFT) | | |
2243 | collection->collection_id); | |
2244 | val = cpu_to_le64(val); | |
a6ecfb11 | 2245 | return kvm_write_guest_lock(its->dev->kvm, gpa, &val, esz); |
ea1ad53e EA |
2246 | } |
2247 | ||
2248 | static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz) | |
2249 | { | |
2250 | struct its_collection *collection; | |
2251 | struct kvm *kvm = its->dev->kvm; | |
2252 | u32 target_addr, coll_id; | |
2253 | u64 val; | |
2254 | int ret; | |
2255 | ||
2256 | BUG_ON(esz > sizeof(val)); | |
711702b5 | 2257 | ret = kvm_read_guest_lock(kvm, gpa, &val, esz); |
ea1ad53e EA |
2258 | if (ret) |
2259 | return ret; | |
2260 | val = le64_to_cpu(val); | |
2261 | if (!(val & KVM_ITS_CTE_VALID_MASK)) | |
2262 | return 0; | |
2263 | ||
2264 | target_addr = (u32)(val >> KVM_ITS_CTE_RDBASE_SHIFT); | |
2265 | coll_id = val & KVM_ITS_CTE_ICID_MASK; | |
2266 | ||
2267 | if (target_addr >= atomic_read(&kvm->online_vcpus)) | |
2268 | return -EINVAL; | |
2269 | ||
2270 | collection = find_collection(its, coll_id); | |
2271 | if (collection) | |
2272 | return -EEXIST; | |
2273 | ret = vgic_its_alloc_collection(its, &collection, coll_id); | |
2274 | if (ret) | |
2275 | return ret; | |
2276 | collection->target_addr = target_addr; | |
2277 | return 1; | |
2278 | } | |
2279 | ||
3b65808f EA |
2280 | /** |
2281 | * vgic_its_save_collection_table - Save the collection table into | |
2282 | * guest RAM | |
2283 | */ | |
2284 | static int vgic_its_save_collection_table(struct vgic_its *its) | |
2285 | { | |
ea1ad53e | 2286 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa | 2287 | u64 baser = its->baser_coll_table; |
8ad50c89 | 2288 | gpa_t gpa = GITS_BASER_ADDR_48_to_52(baser); |
ea1ad53e EA |
2289 | struct its_collection *collection; |
2290 | u64 val; | |
ea1ad53e EA |
2291 | size_t max_size, filled = 0; |
2292 | int ret, cte_esz = abi->cte_esz; | |
2293 | ||
c2385eaa | 2294 | if (!(baser & GITS_BASER_VALID)) |
ea1ad53e EA |
2295 | return 0; |
2296 | ||
c2385eaa | 2297 | max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; |
ea1ad53e EA |
2298 | |
2299 | list_for_each_entry(collection, &its->collection_list, coll_list) { | |
2300 | ret = vgic_its_save_cte(its, collection, gpa, cte_esz); | |
2301 | if (ret) | |
2302 | return ret; | |
2303 | gpa += cte_esz; | |
2304 | filled += cte_esz; | |
2305 | } | |
2306 | ||
2307 | if (filled == max_size) | |
2308 | return 0; | |
2309 | ||
2310 | /* | |
2311 | * table is not fully filled, add a last dummy element | |
2312 | * with valid bit unset | |
2313 | */ | |
2314 | val = 0; | |
2315 | BUG_ON(cte_esz > sizeof(val)); | |
a6ecfb11 | 2316 | ret = kvm_write_guest_lock(its->dev->kvm, gpa, &val, cte_esz); |
ea1ad53e | 2317 | return ret; |
3b65808f EA |
2318 | } |
2319 | ||
2320 | /** | |
2321 | * vgic_its_restore_collection_table - reads the collection table | |
2322 | * in guest memory and restores the ITS internal state. Requires the | |
2323 | * BASER registers to be restored before. | |
2324 | */ | |
2325 | static int vgic_its_restore_collection_table(struct vgic_its *its) | |
2326 | { | |
ea1ad53e | 2327 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa | 2328 | u64 baser = its->baser_coll_table; |
ea1ad53e EA |
2329 | int cte_esz = abi->cte_esz; |
2330 | size_t max_size, read = 0; | |
2331 | gpa_t gpa; | |
2332 | int ret; | |
2333 | ||
c2385eaa | 2334 | if (!(baser & GITS_BASER_VALID)) |
ea1ad53e EA |
2335 | return 0; |
2336 | ||
8ad50c89 | 2337 | gpa = GITS_BASER_ADDR_48_to_52(baser); |
ea1ad53e | 2338 | |
c2385eaa | 2339 | max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; |
ea1ad53e EA |
2340 | |
2341 | while (read < max_size) { | |
2342 | ret = vgic_its_restore_cte(its, gpa, cte_esz); | |
2343 | if (ret <= 0) | |
2344 | break; | |
2345 | gpa += cte_esz; | |
2346 | read += cte_esz; | |
2347 | } | |
f31b98b5 EA |
2348 | |
2349 | if (ret > 0) | |
2350 | return 0; | |
2351 | ||
ea1ad53e | 2352 | return ret; |
3b65808f EA |
2353 | } |
2354 | ||
71afe470 EA |
2355 | /** |
2356 | * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM | |
2357 | * according to v0 ABI | |
2358 | */ | |
2359 | static int vgic_its_save_tables_v0(struct vgic_its *its) | |
2360 | { | |
3b65808f EA |
2361 | int ret; |
2362 | ||
3b65808f EA |
2363 | ret = vgic_its_save_device_tables(its); |
2364 | if (ret) | |
3eb4271b | 2365 | return ret; |
3b65808f | 2366 | |
3eb4271b | 2367 | return vgic_its_save_collection_table(its); |
71afe470 EA |
2368 | } |
2369 | ||
2370 | /** | |
2371 | * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM | |
2372 | * to internal data structs according to V0 ABI | |
2373 | * | |
2374 | */ | |
2375 | static int vgic_its_restore_tables_v0(struct vgic_its *its) | |
2376 | { | |
3b65808f EA |
2377 | int ret; |
2378 | ||
3b65808f EA |
2379 | ret = vgic_its_restore_collection_table(its); |
2380 | if (ret) | |
3eb4271b | 2381 | return ret; |
3b65808f | 2382 | |
3eb4271b | 2383 | return vgic_its_restore_device_tables(its); |
71afe470 EA |
2384 | } |
2385 | ||
2386 | static int vgic_its_commit_v0(struct vgic_its *its) | |
2387 | { | |
2388 | const struct vgic_its_abi *abi; | |
2389 | ||
2390 | abi = vgic_its_get_abi(its); | |
2391 | its->baser_coll_table &= ~GITS_BASER_ENTRY_SIZE_MASK; | |
2392 | its->baser_device_table &= ~GITS_BASER_ENTRY_SIZE_MASK; | |
2393 | ||
2394 | its->baser_coll_table |= (GIC_ENCODE_SZ(abi->cte_esz, 5) | |
2395 | << GITS_BASER_ENTRY_SIZE_SHIFT); | |
2396 | ||
2397 | its->baser_device_table |= (GIC_ENCODE_SZ(abi->dte_esz, 5) | |
2398 | << GITS_BASER_ENTRY_SIZE_SHIFT); | |
2399 | return 0; | |
2400 | } | |
2401 | ||
3eb4271b EA |
2402 | static void vgic_its_reset(struct kvm *kvm, struct vgic_its *its) |
2403 | { | |
2404 | /* We need to keep the ABI specific field values */ | |
2405 | its->baser_coll_table &= ~GITS_BASER_VALID; | |
2406 | its->baser_device_table &= ~GITS_BASER_VALID; | |
2407 | its->cbaser = 0; | |
2408 | its->creadr = 0; | |
2409 | its->cwriter = 0; | |
2410 | its->enabled = 0; | |
2411 | vgic_its_free_device_list(kvm, its); | |
2412 | vgic_its_free_collection_list(kvm, its); | |
2413 | } | |
2414 | ||
1085fdc6 AP |
2415 | static int vgic_its_has_attr(struct kvm_device *dev, |
2416 | struct kvm_device_attr *attr) | |
2417 | { | |
2418 | switch (attr->group) { | |
2419 | case KVM_DEV_ARM_VGIC_GRP_ADDR: | |
2420 | switch (attr->attr) { | |
2421 | case KVM_VGIC_ITS_ADDR_TYPE: | |
2422 | return 0; | |
2423 | } | |
2424 | break; | |
2425 | case KVM_DEV_ARM_VGIC_GRP_CTRL: | |
2426 | switch (attr->attr) { | |
2427 | case KVM_DEV_ARM_VGIC_CTRL_INIT: | |
2428 | return 0; | |
3eb4271b EA |
2429 | case KVM_DEV_ARM_ITS_CTRL_RESET: |
2430 | return 0; | |
3b65808f EA |
2431 | case KVM_DEV_ARM_ITS_SAVE_TABLES: |
2432 | return 0; | |
2433 | case KVM_DEV_ARM_ITS_RESTORE_TABLES: | |
2434 | return 0; | |
1085fdc6 AP |
2435 | } |
2436 | break; | |
876ae234 EA |
2437 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: |
2438 | return vgic_its_has_attr_regs(dev, attr); | |
1085fdc6 AP |
2439 | } |
2440 | return -ENXIO; | |
2441 | } | |
2442 | ||
3eb4271b EA |
2443 | static int vgic_its_ctrl(struct kvm *kvm, struct vgic_its *its, u64 attr) |
2444 | { | |
2445 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2446 | int ret = 0; | |
2447 | ||
2448 | if (attr == KVM_DEV_ARM_VGIC_CTRL_INIT) /* Nothing to do */ | |
2449 | return 0; | |
2450 | ||
2451 | mutex_lock(&kvm->lock); | |
2452 | mutex_lock(&its->its_lock); | |
2453 | ||
2454 | if (!lock_all_vcpus(kvm)) { | |
2455 | mutex_unlock(&its->its_lock); | |
2456 | mutex_unlock(&kvm->lock); | |
2457 | return -EBUSY; | |
2458 | } | |
2459 | ||
2460 | switch (attr) { | |
2461 | case KVM_DEV_ARM_ITS_CTRL_RESET: | |
2462 | vgic_its_reset(kvm, its); | |
2463 | break; | |
2464 | case KVM_DEV_ARM_ITS_SAVE_TABLES: | |
2465 | ret = abi->save_tables(its); | |
2466 | break; | |
2467 | case KVM_DEV_ARM_ITS_RESTORE_TABLES: | |
2468 | ret = abi->restore_tables(its); | |
2469 | break; | |
2470 | } | |
2471 | ||
2472 | unlock_all_vcpus(kvm); | |
2473 | mutex_unlock(&its->its_lock); | |
2474 | mutex_unlock(&kvm->lock); | |
2475 | return ret; | |
2476 | } | |
2477 | ||
1085fdc6 AP |
2478 | static int vgic_its_set_attr(struct kvm_device *dev, |
2479 | struct kvm_device_attr *attr) | |
2480 | { | |
2481 | struct vgic_its *its = dev->private; | |
2482 | int ret; | |
2483 | ||
2484 | switch (attr->group) { | |
2485 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { | |
2486 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2487 | unsigned long type = (unsigned long)attr->attr; | |
2488 | u64 addr; | |
2489 | ||
2490 | if (type != KVM_VGIC_ITS_ADDR_TYPE) | |
2491 | return -ENODEV; | |
2492 | ||
1085fdc6 AP |
2493 | if (copy_from_user(&addr, uaddr, sizeof(addr))) |
2494 | return -EFAULT; | |
2495 | ||
2496 | ret = vgic_check_ioaddr(dev->kvm, &its->vgic_its_base, | |
2497 | addr, SZ_64K); | |
2498 | if (ret) | |
2499 | return ret; | |
2500 | ||
30e1b684 | 2501 | return vgic_register_its_iodev(dev->kvm, its, addr); |
1085fdc6 | 2502 | } |
3eb4271b EA |
2503 | case KVM_DEV_ARM_VGIC_GRP_CTRL: |
2504 | return vgic_its_ctrl(dev->kvm, its, attr->attr); | |
876ae234 EA |
2505 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: { |
2506 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2507 | u64 reg; | |
2508 | ||
2509 | if (get_user(reg, uaddr)) | |
2510 | return -EFAULT; | |
2511 | ||
2512 | return vgic_its_attr_regs_access(dev, attr, ®, true); | |
2513 | } | |
1085fdc6 AP |
2514 | } |
2515 | return -ENXIO; | |
2516 | } | |
2517 | ||
2518 | static int vgic_its_get_attr(struct kvm_device *dev, | |
2519 | struct kvm_device_attr *attr) | |
2520 | { | |
2521 | switch (attr->group) { | |
2522 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { | |
2523 | struct vgic_its *its = dev->private; | |
2524 | u64 addr = its->vgic_its_base; | |
2525 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2526 | unsigned long type = (unsigned long)attr->attr; | |
2527 | ||
2528 | if (type != KVM_VGIC_ITS_ADDR_TYPE) | |
2529 | return -ENODEV; | |
2530 | ||
2531 | if (copy_to_user(uaddr, &addr, sizeof(addr))) | |
2532 | return -EFAULT; | |
2533 | break; | |
876ae234 EA |
2534 | } |
2535 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: { | |
2536 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2537 | u64 reg; | |
2538 | int ret; | |
2539 | ||
2540 | ret = vgic_its_attr_regs_access(dev, attr, ®, false); | |
2541 | if (ret) | |
2542 | return ret; | |
2543 | return put_user(reg, uaddr); | |
2544 | } | |
1085fdc6 AP |
2545 | default: |
2546 | return -ENXIO; | |
2547 | } | |
1085fdc6 AP |
2548 | |
2549 | return 0; | |
2550 | } | |
2551 | ||
2552 | static struct kvm_device_ops kvm_arm_vgic_its_ops = { | |
2553 | .name = "kvm-arm-vgic-its", | |
2554 | .create = vgic_its_create, | |
2555 | .destroy = vgic_its_destroy, | |
2556 | .set_attr = vgic_its_set_attr, | |
2557 | .get_attr = vgic_its_get_attr, | |
2558 | .has_attr = vgic_its_has_attr, | |
2559 | }; | |
2560 | ||
2561 | int kvm_vgic_register_its_device(void) | |
2562 | { | |
2563 | return kvm_register_device_ops(&kvm_arm_vgic_its_ops, | |
2564 | KVM_DEV_TYPE_ARM_VGIC_ITS); | |
2565 | } |