| | 1 | /* |
| | 2 | * (C) Copyright 2010,2011 |
| | 3 | * NVIDIA Corporation <www.nvidia.com> |
| | 4 | * |
| | 5 | * SPDX-License-Identifier: GPL-2.0+ |
| | 6 | */ |
| | 7 | |
| | 8 | #include <common.h> |
| | 9 | #include <asm/io.h> |
| | 10 | #include <asm/arch/tegra.h> |
| | 11 | #include <asm/arch/clock.h> |
| | 12 | #include <asm/arch/funcmux.h> |
| | 13 | #include <asm/arch/gpio.h> |
| | 14 | #include <asm/arch/pinmux.h> |
| | 15 | #include <asm/gpio.h> |
| | 16 | |
| | 17 | /* TODO: Remove this code when the SPI switch is working */ |
| | 18 | #if (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA) |
| | 19 | void gpio_early_init_uart(void) |
| | 20 | { |
| | 21 | /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ |
| | 22 | #ifndef CONFIG_SPL_BUILD |
| | 23 | gpio_request(GPIO_PI3, NULL); |
| | 24 | #endif |
| | 25 | gpio_direction_output(GPIO_PI3, 0); |
| | 26 | } |
| | 27 | #endif |
| | 28 | |
| | 29 | #ifdef CONFIG_TEGRA_MMC |
| | 30 | /* |
| | 31 | * Routine: pin_mux_mmc |
| | 32 | * Description: setup the pin muxes/tristate values for the SDMMC(s) |
| | 33 | */ |
| | 34 | void pin_mux_mmc(void) |
| | 35 | { |
| | 36 | funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); |
| | 37 | funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT); |
| | 38 | |
| | 39 | /* For power GPIO PI6 */ |
| | 40 | pinmux_tristate_disable(PINGRP_ATA); |
| | 41 | /* For CD GPIO PI5 */ |
| | 42 | pinmux_tristate_disable(PINGRP_ATC); |
| | 43 | } |
| | 44 | #endif |
| | 45 | |
| | 46 | void pin_mux_usb(void) |
| | 47 | { |
| | 48 | /* For USB's GPIO PD0. For now, since we have no pinmux in fdt */ |
| | 49 | pinmux_tristate_disable(PINGRP_SLXK); |
| | 50 | } |
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