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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2000, 2001
4 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
5 */
6
7/*
8 * FPGA support
9 */
10#include <command.h>
11#include <env.h>
12#include <fpga.h>
13#include <fs.h>
14#include <gzip.h>
15#include <image.h>
16#include <log.h>
17#include <malloc.h>
18
19static long do_fpga_get_device(char *arg)
20{
21 long dev = FPGA_INVALID_DEVICE;
22 char *devstr = env_get("fpga");
23
24 if (devstr)
25 /* Should be strtol to handle -1 cases */
26 dev = simple_strtol(devstr, NULL, 16);
27
28 if (dev == FPGA_INVALID_DEVICE && arg)
29 dev = simple_strtol(arg, NULL, 16);
30
31 debug("%s: device = %ld\n", __func__, dev);
32
33 return dev;
34}
35
36static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size,
37 struct cmd_tbl *cmdtp, int argc,
38 char *const argv[])
39{
40 size_t local_data_size;
41 long local_fpga_data;
42
43 debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs);
44
45 if (argc != cmdtp->maxargs) {
46 debug("fpga: incorrect parameters passed\n");
47 return CMD_RET_USAGE;
48 }
49
50 *dev = do_fpga_get_device(argv[0]);
51
52 local_fpga_data = simple_strtol(argv[1], NULL, 16);
53 if (!local_fpga_data) {
54 debug("fpga: zero fpga_data address\n");
55 return CMD_RET_USAGE;
56 }
57 *fpga_data = local_fpga_data;
58
59 local_data_size = hextoul(argv[2], NULL);
60 if (!local_data_size) {
61 debug("fpga: zero size\n");
62 return CMD_RET_USAGE;
63 }
64 *data_size = local_data_size;
65
66 return 0;
67}
68
69#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
70static int do_fpga_loads(struct cmd_tbl *cmdtp, int flag, int argc,
71 char *const argv[])
72{
73 size_t data_size = 0;
74 long fpga_data, dev;
75 int ret;
76 struct fpga_secure_info fpga_sec_info;
77
78 memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
79
80 if (argc < 5) {
81 debug("fpga: incorrect parameters passed\n");
82 return CMD_RET_USAGE;
83 }
84
85 if (argc == 6)
86 fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
87 simple_strtoull(argv[5],
88 NULL, 16);
89 else
90 /*
91 * If 6th parameter is not passed then do_fpga_check_params
92 * will get 5 instead of expected 6 which means that function
93 * return CMD_RET_USAGE. Increase number of params +1 to pass
94 * this.
95 */
96 argc++;
97
98 fpga_sec_info.encflag = (u8)hextoul(argv[4], NULL);
99 fpga_sec_info.authflag = (u8)hextoul(argv[3], NULL);
100
101 if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
102 fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
103 debug("fpga: Use <fpga load> for NonSecure bitstream\n");
104 return CMD_RET_USAGE;
105 }
106
107 if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
108 !fpga_sec_info.userkey_addr) {
109 debug("fpga: User key not provided\n");
110 return CMD_RET_USAGE;
111 }
112
113 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
114 cmdtp, argc, argv);
115 if (ret)
116 return ret;
117
118 return fpga_loads(dev, (void *)fpga_data, data_size, &fpga_sec_info);
119}
120#endif
121
122#if defined(CONFIG_CMD_FPGA_LOADFS)
123static int do_fpga_loadfs(struct cmd_tbl *cmdtp, int flag, int argc,
124 char *const argv[])
125{
126 size_t data_size = 0;
127 long fpga_data, dev;
128 int ret;
129 fpga_fs_info fpga_fsinfo;
130
131 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
132 cmdtp, argc, argv);
133 if (ret)
134 return ret;
135
136 fpga_fsinfo.fstype = FS_TYPE_ANY;
137 fpga_fsinfo.blocksize = (unsigned int)hextoul(argv[3], NULL);
138 fpga_fsinfo.interface = argv[4];
139 fpga_fsinfo.dev_part = argv[5];
140 fpga_fsinfo.filename = argv[6];
141
142 return fpga_fsload(dev, (void *)fpga_data, data_size, &fpga_fsinfo);
143}
144#endif
145
146static int do_fpga_info(struct cmd_tbl *cmdtp, int flag, int argc,
147 char *const argv[])
148{
149 long dev = do_fpga_get_device(argv[0]);
150
151 return fpga_info(dev);
152}
153
154static int do_fpga_dump(struct cmd_tbl *cmdtp, int flag, int argc,
155 char *const argv[])
156{
157 size_t data_size = 0;
158 long fpga_data, dev;
159 int ret;
160
161 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
162 cmdtp, argc, argv);
163 if (ret)
164 return ret;
165
166 return fpga_dump(dev, (void *)fpga_data, data_size);
167}
168
169static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, int argc,
170 char *const argv[])
171{
172 size_t data_size = 0;
173 long fpga_data, dev;
174 int ret;
175
176 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
177 cmdtp, argc, argv);
178 if (ret)
179 return ret;
180
181 return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL, 0);
182}
183
184#if defined(CONFIG_CMD_FPGA_LOADB)
185static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
186 char *const argv[])
187{
188 size_t data_size = 0;
189 long fpga_data, dev;
190 int ret;
191
192 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
193 cmdtp, argc, argv);
194 if (ret)
195 return ret;
196
197 return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
198}
199#endif
200#if defined(CONFIG_CMD_FPGA_LOADP)
201static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, int argc,
202 char *const argv[])
203{
204 size_t data_size = 0;
205 long fpga_data, dev;
206 int ret;
207
208 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
209 cmdtp, argc, argv);
210 if (ret)
211 return ret;
212
213 return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL, 0);
214}
215#endif
216
217#if defined(CONFIG_CMD_FPGA_LOADBP)
218static int do_fpga_loadbp(struct cmd_tbl *cmdtp, int flag, int argc,
219 char *const argv[])
220{
221 size_t data_size = 0;
222 long fpga_data, dev;
223 int ret;
224
225 ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
226 cmdtp, argc, argv);
227 if (ret)
228 return ret;
229
230 return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
231 BIT_PARTIAL);
232}
233#endif
234
235#if defined(CONFIG_CMD_FPGA_LOADMK)
236static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc,
237 char *const argv[])
238{
239 size_t data_size = 0;
240 void *fpga_data = NULL;
241#if defined(CONFIG_FIT)
242 const char *fit_uname = NULL;
243 ulong fit_addr;
244#endif
245 ulong dev = do_fpga_get_device(argv[0]);
246 char *datastr = env_get("fpgadata");
247
248 debug("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr);
249
250 if (dev == FPGA_INVALID_DEVICE) {
251 debug("fpga: Invalid fpga device\n");
252 return CMD_RET_USAGE;
253 }
254
255 if (argc == 0 && !datastr) {
256 debug("fpga: No datastr passed\n");
257 return CMD_RET_USAGE;
258 }
259
260 if (argc == 2) {
261 datastr = argv[1];
262 debug("fpga: Full command with two args\n");
263 } else if (argc == 1 && !datastr) {
264 debug("fpga: Dev is setup - fpgadata passed\n");
265 datastr = argv[0];
266 }
267
268#if defined(CONFIG_FIT)
269 if (fit_parse_subimage(datastr, (ulong)fpga_data,
270 &fit_addr, &fit_uname)) {
271 fpga_data = (void *)fit_addr;
272 debug("* fpga: subimage '%s' from FIT image ",
273 fit_uname);
274 debug("at 0x%08lx\n", fit_addr);
275 } else
276#endif
277 {
278 fpga_data = (void *)hextoul(datastr, NULL);
279 debug("* fpga: cmdline image address = 0x%08lx\n",
280 (ulong)fpga_data);
281 }
282 debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
283 if (!fpga_data) {
284 puts("Zero fpga_data address\n");
285 return CMD_RET_USAGE;
286 }
287
288 switch (genimg_get_format(fpga_data)) {
289#if defined(CONFIG_LEGACY_IMAGE_FORMAT)
290 case IMAGE_FORMAT_LEGACY:
291 {
292 struct legacy_img_hdr *hdr = (struct legacy_img_hdr *)fpga_data;
293 ulong data;
294 u8 comp;
295
296 comp = image_get_comp(hdr);
297 if (comp == IH_COMP_GZIP) {
298#if defined(CONFIG_GZIP)
299 ulong image_buf = image_get_data(hdr);
300 ulong image_size = ~0UL;
301
302 data = image_get_load(hdr);
303
304 if (gunzip((void *)data, ~0UL, (void *)image_buf,
305 &image_size) != 0) {
306 puts("GUNZIP: error\n");
307 return CMD_RET_FAILURE;
308 }
309 data_size = image_size;
310#else
311 puts("Gunzip image is not supported\n");
312 return 1;
313#endif
314 } else {
315 data = (ulong)image_get_data(hdr);
316 data_size = image_get_data_size(hdr);
317 }
318 return fpga_load(dev, (void *)data, data_size,
319 BIT_FULL, 0);
320 }
321#endif
322#if defined(CONFIG_FIT)
323 case IMAGE_FORMAT_FIT:
324 {
325 const void *fit_hdr = (const void *)fpga_data;
326 int err;
327 const void *fit_data;
328
329 if (!fit_uname) {
330 puts("No FIT subimage unit name\n");
331 return CMD_RET_FAILURE;
332 }
333
334 if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) {
335 puts("Bad FIT image format\n");
336 return CMD_RET_FAILURE;
337 }
338
339 err = fit_get_data_node(fit_hdr, fit_uname, &fit_data,
340 &data_size);
341 if (err) {
342 printf("Could not load '%s' subimage (err %d)\n",
343 fit_uname, err);
344 return CMD_RET_FAILURE;
345 }
346
347 return fpga_load(dev, fit_data, data_size, BIT_FULL, 0);
348 }
349#endif
350 default:
351 puts("** Unknown image type\n");
352 return CMD_RET_FAILURE;
353 }
354}
355#endif
356
357static struct cmd_tbl fpga_commands[] = {
358 U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
359 U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
360 U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
361#if defined(CONFIG_CMD_FPGA_LOADB)
362 U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
363#endif
364#if defined(CONFIG_CMD_FPGA_LOADP)
365 U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
366#endif
367#if defined(CONFIG_CMD_FPGA_LOADBP)
368 U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
369#endif
370#if defined(CONFIG_CMD_FPGA_LOADFS)
371 U_BOOT_CMD_MKENT(loadfs, 7, 1, do_fpga_loadfs, "", ""),
372#endif
373#if defined(CONFIG_CMD_FPGA_LOADMK)
374 U_BOOT_CMD_MKENT(loadmk, 2, 1, do_fpga_loadmk, "", ""),
375#endif
376#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
377 U_BOOT_CMD_MKENT(loads, 6, 1, do_fpga_loads, "", ""),
378#endif
379};
380
381static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
382 char *const argv[])
383{
384 struct cmd_tbl *fpga_cmd;
385 int ret;
386
387 if (argc < 2)
388 return CMD_RET_USAGE;
389
390 fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
391 ARRAY_SIZE(fpga_commands));
392 if (!fpga_cmd) {
393 debug("fpga: non existing command\n");
394 return CMD_RET_USAGE;
395 }
396
397 argc -= 2;
398 argv += 2;
399
400 if (argc > fpga_cmd->maxargs) {
401 debug("fpga: more parameters passed\n");
402 return CMD_RET_USAGE;
403 }
404
405 ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);
406
407 return cmd_process_error(fpga_cmd, ret);
408}
409
410#if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE)
411U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
412#else
413U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
414#endif
415 "loadable FPGA image support",
416 "info [dev] List known device information\n"
417 "fpga dump <dev> <address> <size> Load device to memory buffer\n"
418 "fpga load <dev> <address> <size> Load device from memory buffer\n"
419#if defined(CONFIG_CMD_FPGA_LOADP)
420 "fpga loadb <dev> <address> <size> Load device from bitstream buffer\n"
421#endif
422#if defined(CONFIG_CMD_FPGA_LOADP)
423 "fpga loadp <dev> <address> <size> Load device from memory buffer\n"
424 " with partial bitstream\n"
425#endif
426#if defined(CONFIG_CMD_FPGA_LOADBP)
427 "fpga loadbp <dev> <address> <size> Load device from bitstream buffer\n"
428 " with partial bitstream\n"
429#endif
430#if defined(CONFIG_CMD_FPGA_LOADFS)
431 "fpga loadfs <dev> <address> <size> <blocksize> <interface> [<dev[:part]>] <filename>\n"
432 " Load device from filesystem (FAT by default)\n"
433#endif
434#if defined(CONFIG_CMD_FPGA_LOADMK)
435 "fpga loadmk <dev> <address> Load device generated with mkimage\n"
436#if defined(CONFIG_FIT)
437 " NOTE: loadmk operating on FIT must include subimage unit\n"
438 " name in the form of addr:<subimg_uname>\n"
439#endif
440#endif
441#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
442 "fpga loads <dev> <address> <size> <authflag> <encflag> [Userkey address]\n"
443 " Load device from memory buffer with secure bistream\n"
444 " (authenticated/encrypted/both)\n"
445 " -authflag: 0 for OCM, 1 for DDR, 2 for no authentication\n"
446 " (specifies where to perform authentication)\n"
447 " -encflag: 0 for device key, 1 for user key, 2 for no encryption\n"
448 " -Userkey address: address where user key is stored\n"
449 " NOTE: secure bitstream has to be created using Xilinx bootgen tool\n"
450#endif
451);