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armv8: fsl-layerscape: Make DDR non secure in MMU tables
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1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#include <common.h>
14#include <linux/compiler.h>
15#include <version.h>
16#include <console.h>
17#include <environment.h>
18#include <dm.h>
19#include <fdtdec.h>
20#include <fs.h>
21#if defined(CONFIG_CMD_IDE)
22#include <ide.h>
23#endif
24#include <i2c.h>
25#include <initcall.h>
26#include <logbuff.h>
27#include <malloc.h>
28#include <mapmem.h>
29
30/* TODO: Can we move these into arch/ headers? */
31#ifdef CONFIG_8xx
32#include <mpc8xx.h>
33#endif
34#ifdef CONFIG_5xx
35#include <mpc5xx.h>
36#endif
37#ifdef CONFIG_MPC5xxx
38#include <mpc5xxx.h>
39#endif
40#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
41#include <asm/mp.h>
42#endif
43
44#include <os.h>
45#include <post.h>
46#include <spi.h>
47#include <status_led.h>
48#include <trace.h>
49#include <watchdog.h>
50#include <asm/errno.h>
51#include <asm/io.h>
52#include <asm/sections.h>
53#if defined(CONFIG_X86) || defined(CONFIG_ARC)
54#include <asm/init_helpers.h>
55#include <asm/relocate.h>
56#endif
57#ifdef CONFIG_SANDBOX
58#include <asm/state.h>
59#endif
60#include <dm/root.h>
61#include <linux/compiler.h>
62
63/*
64 * Pointer to initial global data area
65 *
66 * Here we initialize it if needed.
67 */
68#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
69#undef XTRN_DECLARE_GLOBAL_DATA_PTR
70#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
71DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
72#else
73DECLARE_GLOBAL_DATA_PTR;
74#endif
75
76/*
77 * TODO(sjg@chromium.org): IMO this code should be
78 * refactored to a single function, something like:
79 *
80 * void led_set_state(enum led_colour_t colour, int on);
81 */
82/************************************************************************
83 * Coloured LED functionality
84 ************************************************************************
85 * May be supplied by boards if desired
86 */
87__weak void coloured_LED_init(void) {}
88__weak void red_led_on(void) {}
89__weak void red_led_off(void) {}
90__weak void green_led_on(void) {}
91__weak void green_led_off(void) {}
92__weak void yellow_led_on(void) {}
93__weak void yellow_led_off(void) {}
94__weak void blue_led_on(void) {}
95__weak void blue_led_off(void) {}
96
97/*
98 * Why is gd allocated a register? Prior to reloc it might be better to
99 * just pass it around to each function in this file?
100 *
101 * After reloc one could argue that it is hardly used and doesn't need
102 * to be in a register. Or if it is it should perhaps hold pointers to all
103 * global data for all modules, so that post-reloc we can avoid the massive
104 * literal pool we get on ARM. Or perhaps just encourage each module to use
105 * a structure...
106 */
107
108/*
109 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
110 */
111
112#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
113static int init_func_watchdog_init(void)
114{
115# if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
116 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
117 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
118 defined(CONFIG_IMX_WATCHDOG))
119 hw_watchdog_init();
120# endif
121 puts(" Watchdog enabled\n");
122 WATCHDOG_RESET();
123
124 return 0;
125}
126
127int init_func_watchdog_reset(void)
128{
129 WATCHDOG_RESET();
130
131 return 0;
132}
133#endif /* CONFIG_WATCHDOG */
134
135__weak void board_add_ram_info(int use_default)
136{
137 /* please define platform specific board_add_ram_info() */
138}
139
140static int init_baud_rate(void)
141{
142 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
143 return 0;
144}
145
146static int display_text_info(void)
147{
148#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
149 ulong bss_start, bss_end, text_base;
150
151 bss_start = (ulong)&__bss_start;
152 bss_end = (ulong)&__bss_end;
153
154#ifdef CONFIG_SYS_TEXT_BASE
155 text_base = CONFIG_SYS_TEXT_BASE;
156#else
157 text_base = CONFIG_SYS_MONITOR_BASE;
158#endif
159
160 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
161 text_base, bss_start, bss_end);
162#endif
163
164#ifdef CONFIG_MODEM_SUPPORT
165 debug("Modem Support enabled\n");
166#endif
167#ifdef CONFIG_USE_IRQ
168 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
169 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
170#endif
171
172 return 0;
173}
174
175static int announce_dram_init(void)
176{
177 puts("DRAM: ");
178 return 0;
179}
180
181#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
182static int init_func_ram(void)
183{
184#ifdef CONFIG_BOARD_TYPES
185 int board_type = gd->board_type;
186#else
187 int board_type = 0; /* use dummy arg */
188#endif
189
190 gd->ram_size = initdram(board_type);
191
192 if (gd->ram_size > 0)
193 return 0;
194
195 puts("*** failed ***\n");
196 return 1;
197}
198#endif
199
200static int show_dram_config(void)
201{
202 unsigned long long size;
203
204#ifdef CONFIG_NR_DRAM_BANKS
205 int i;
206
207 debug("\nRAM Configuration:\n");
208 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
209 size += gd->bd->bi_dram[i].size;
210 debug("Bank #%d: %llx ", i,
211 (unsigned long long)(gd->bd->bi_dram[i].start));
212#ifdef DEBUG
213 print_size(gd->bd->bi_dram[i].size, "\n");
214#endif
215 }
216 debug("\nDRAM: ");
217#else
218 size = gd->ram_size;
219#endif
220
221 print_size(size, "");
222 board_add_ram_info(0);
223 putc('\n');
224
225 return 0;
226}
227
228__weak void dram_init_banksize(void)
229{
230#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
231 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
232 gd->bd->bi_dram[0].size = get_effective_memsize();
233#endif
234}
235
236#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
237static int init_func_i2c(void)
238{
239 puts("I2C: ");
240#ifdef CONFIG_SYS_I2C
241 i2c_init_all();
242#else
243 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
244#endif
245 puts("ready\n");
246 return 0;
247}
248#endif
249
250#if defined(CONFIG_HARD_SPI)
251static int init_func_spi(void)
252{
253 puts("SPI: ");
254 spi_init();
255 puts("ready\n");
256 return 0;
257}
258#endif
259
260__maybe_unused
261static int zero_global_data(void)
262{
263 memset((void *)gd, '\0', sizeof(gd_t));
264
265 return 0;
266}
267
268static int setup_mon_len(void)
269{
270#if defined(__ARM__) || defined(__MICROBLAZE__)
271 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
272#elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
273 gd->mon_len = (ulong)&_end - (ulong)_init;
274#elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
275 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
276#elif defined(CONFIG_NDS32)
277 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
278#else
279 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
280 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
281#endif
282 return 0;
283}
284
285__weak int arch_cpu_init(void)
286{
287 return 0;
288}
289
290#ifdef CONFIG_SANDBOX
291static int setup_ram_buf(void)
292{
293 struct sandbox_state *state = state_get_current();
294
295 gd->arch.ram_buf = state->ram_buf;
296 gd->ram_size = state->ram_size;
297
298 return 0;
299}
300#endif
301
302/* Get the top of usable RAM */
303__weak ulong board_get_usable_ram_top(ulong total_size)
304{
305#ifdef CONFIG_SYS_SDRAM_BASE
306 /*
307 * Detect whether we have so much RAM that it goes past the end of our
308 * 32-bit address space. If so, clip the usable RAM so it doesn't.
309 */
310 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
311 /*
312 * Will wrap back to top of 32-bit space when reservations
313 * are made.
314 */
315 return 0;
316#endif
317 return gd->ram_top;
318}
319
320static int setup_dest_addr(void)
321{
322 debug("Monitor len: %08lX\n", gd->mon_len);
323 /*
324 * Ram is setup, size stored in gd !!
325 */
326 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
327#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
328 /* Reserve memory for secure MMU tables, and/or security monitor */
329 gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
330 /*
331 * Record secure memory location. Need recalcuate if memory splits
332 * into banks, or the ram base is not zero.
333 */
334 gd->secure_ram = gd->ram_size;
335#endif
336#if defined(CONFIG_SYS_MEM_TOP_HIDE)
337 /*
338 * Subtract specified amount of memory to hide so that it won't
339 * get "touched" at all by U-Boot. By fixing up gd->ram_size
340 * the Linux kernel should now get passed the now "corrected"
341 * memory size and won't touch it either. This should work
342 * for arch/ppc and arch/powerpc. Only Linux board ports in
343 * arch/powerpc with bootwrapper support, that recalculate the
344 * memory size from the SDRAM controller setup will have to
345 * get fixed.
346 */
347 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
348#endif
349#ifdef CONFIG_SYS_SDRAM_BASE
350 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
351#endif
352 gd->ram_top += get_effective_memsize();
353 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
354 gd->relocaddr = gd->ram_top;
355 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
356#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
357 /*
358 * We need to make sure the location we intend to put secondary core
359 * boot code is reserved and not used by any part of u-boot
360 */
361 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
362 gd->relocaddr = determine_mp_bootpg(NULL);
363 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
364 }
365#endif
366 return 0;
367}
368
369#if defined(CONFIG_SPARC)
370static int reserve_prom(void)
371{
372 /* defined in arch/sparc/cpu/leon?/prom.c */
373 extern void *__prom_start_reloc;
374 int size = 8192; /* page table = 2k, prom = 6k */
375 gd->relocaddr -= size;
376 __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
377 debug("Reserving %dk for PROM and page table at %08lx\n", size,
378 gd->relocaddr);
379 return 0;
380}
381#endif
382
383#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
384static int reserve_logbuffer(void)
385{
386 /* reserve kernel log buffer */
387 gd->relocaddr -= LOGBUFF_RESERVE;
388 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
389 gd->relocaddr);
390 return 0;
391}
392#endif
393
394#ifdef CONFIG_PRAM
395/* reserve protected RAM */
396static int reserve_pram(void)
397{
398 ulong reg;
399
400 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
401 gd->relocaddr -= (reg << 10); /* size is in kB */
402 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
403 gd->relocaddr);
404 return 0;
405}
406#endif /* CONFIG_PRAM */
407
408/* Round memory pointer down to next 4 kB limit */
409static int reserve_round_4k(void)
410{
411 gd->relocaddr &= ~(4096 - 1);
412 return 0;
413}
414
415#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
416 defined(CONFIG_ARM)
417static int reserve_mmu(void)
418{
419 /* reserve TLB table */
420 gd->arch.tlb_size = PGTABLE_SIZE;
421 gd->relocaddr -= gd->arch.tlb_size;
422
423 /* round down to next 64 kB limit */
424 gd->relocaddr &= ~(0x10000 - 1);
425
426 gd->arch.tlb_addr = gd->relocaddr;
427 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
428 gd->arch.tlb_addr + gd->arch.tlb_size);
429 return 0;
430}
431#endif
432
433#ifdef CONFIG_LCD
434static int reserve_lcd(void)
435{
436#ifdef CONFIG_FB_ADDR
437 gd->fb_base = CONFIG_FB_ADDR;
438#else
439 /* reserve memory for LCD display (always full pages) */
440 gd->relocaddr = lcd_setmem(gd->relocaddr);
441 gd->fb_base = gd->relocaddr;
442#endif /* CONFIG_FB_ADDR */
443 return 0;
444}
445#endif /* CONFIG_LCD */
446
447static int reserve_trace(void)
448{
449#ifdef CONFIG_TRACE
450 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
451 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
452 debug("Reserving %dk for trace data at: %08lx\n",
453 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
454#endif
455
456 return 0;
457}
458
459#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
460 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
461 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
462static int reserve_video(void)
463{
464 /* reserve memory for video display (always full pages) */
465 gd->relocaddr = video_setmem(gd->relocaddr);
466 gd->fb_base = gd->relocaddr;
467
468 return 0;
469}
470#endif
471
472static int reserve_uboot(void)
473{
474 /*
475 * reserve memory for U-Boot code, data & bss
476 * round down to next 4 kB limit
477 */
478 gd->relocaddr -= gd->mon_len;
479 gd->relocaddr &= ~(4096 - 1);
480#ifdef CONFIG_E500
481 /* round down to next 64 kB limit so that IVPR stays aligned */
482 gd->relocaddr &= ~(65536 - 1);
483#endif
484
485 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
486 gd->relocaddr);
487
488 gd->start_addr_sp = gd->relocaddr;
489
490 return 0;
491}
492
493#ifndef CONFIG_SPL_BUILD
494/* reserve memory for malloc() area */
495static int reserve_malloc(void)
496{
497 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
498 debug("Reserving %dk for malloc() at: %08lx\n",
499 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
500 return 0;
501}
502
503/* (permanently) allocate a Board Info struct */
504static int reserve_board(void)
505{
506 if (!gd->bd) {
507 gd->start_addr_sp -= sizeof(bd_t);
508 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
509 memset(gd->bd, '\0', sizeof(bd_t));
510 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
511 sizeof(bd_t), gd->start_addr_sp);
512 }
513 return 0;
514}
515#endif
516
517static int setup_machine(void)
518{
519#ifdef CONFIG_MACH_TYPE
520 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
521#endif
522 return 0;
523}
524
525static int reserve_global_data(void)
526{
527 gd->start_addr_sp -= sizeof(gd_t);
528 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
529 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
530 sizeof(gd_t), gd->start_addr_sp);
531 return 0;
532}
533
534static int reserve_fdt(void)
535{
536#ifndef CONFIG_OF_EMBED
537 /*
538 * If the device tree is sitting immediately above our image then we
539 * must relocate it. If it is embedded in the data section, then it
540 * will be relocated with other data.
541 */
542 if (gd->fdt_blob) {
543 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
544
545 gd->start_addr_sp -= gd->fdt_size;
546 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
547 debug("Reserving %lu Bytes for FDT at: %08lx\n",
548 gd->fdt_size, gd->start_addr_sp);
549 }
550#endif
551
552 return 0;
553}
554
555int arch_reserve_stacks(void)
556{
557 return 0;
558}
559
560static int reserve_stacks(void)
561{
562 /* make stack pointer 16-byte aligned */
563 gd->start_addr_sp -= 16;
564 gd->start_addr_sp &= ~0xf;
565
566 /*
567 * let the architecture-specific code tailor gd->start_addr_sp and
568 * gd->irq_sp
569 */
570 return arch_reserve_stacks();
571}
572
573static int display_new_sp(void)
574{
575 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
576
577 return 0;
578}
579
580#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
581static int setup_board_part1(void)
582{
583 bd_t *bd = gd->bd;
584
585 /*
586 * Save local variables to board info struct
587 */
588 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
589 bd->bi_memsize = gd->ram_size; /* size in bytes */
590
591#ifdef CONFIG_SYS_SRAM_BASE
592 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
593 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
594#endif
595
596#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
597 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
598 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
599#endif
600#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
601 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
602#endif
603#if defined(CONFIG_MPC83xx)
604 bd->bi_immrbar = CONFIG_SYS_IMMR;
605#endif
606
607 return 0;
608}
609#endif
610
611#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
612static int setup_board_part2(void)
613{
614 bd_t *bd = gd->bd;
615
616 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
617 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
618#if defined(CONFIG_CPM2)
619 bd->bi_cpmfreq = gd->arch.cpm_clk;
620 bd->bi_brgfreq = gd->arch.brg_clk;
621 bd->bi_sccfreq = gd->arch.scc_clk;
622 bd->bi_vco = gd->arch.vco_out;
623#endif /* CONFIG_CPM2 */
624#if defined(CONFIG_MPC512X)
625 bd->bi_ipsfreq = gd->arch.ips_clk;
626#endif /* CONFIG_MPC512X */
627#if defined(CONFIG_MPC5xxx)
628 bd->bi_ipbfreq = gd->arch.ipb_clk;
629 bd->bi_pcifreq = gd->pci_clk;
630#endif /* CONFIG_MPC5xxx */
631#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
632 bd->bi_pcifreq = gd->pci_clk;
633#endif
634#if defined(CONFIG_EXTRA_CLOCK)
635 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
636 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
637 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
638#endif
639
640 return 0;
641}
642#endif
643
644#ifdef CONFIG_SYS_EXTBDINFO
645static int setup_board_extra(void)
646{
647 bd_t *bd = gd->bd;
648
649 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
650 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
651 sizeof(bd->bi_r_version));
652
653 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
654 bd->bi_plb_busfreq = gd->bus_clk;
655#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
656 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
657 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
658 bd->bi_pci_busfreq = get_PCI_freq();
659 bd->bi_opbfreq = get_OPB_freq();
660#elif defined(CONFIG_XILINX_405)
661 bd->bi_pci_busfreq = get_PCI_freq();
662#endif
663
664 return 0;
665}
666#endif
667
668#ifdef CONFIG_POST
669static int init_post(void)
670{
671 post_bootmode_init();
672 post_run(NULL, POST_ROM | post_bootmode_get(0));
673
674 return 0;
675}
676#endif
677
678static int setup_dram_config(void)
679{
680 /* Ram is board specific, so move it to board code ... */
681 dram_init_banksize();
682
683 return 0;
684}
685
686static int reloc_fdt(void)
687{
688#ifndef CONFIG_OF_EMBED
689 if (gd->flags & GD_FLG_SKIP_RELOC)
690 return 0;
691 if (gd->new_fdt) {
692 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
693 gd->fdt_blob = gd->new_fdt;
694 }
695#endif
696
697 return 0;
698}
699
700static int setup_reloc(void)
701{
702 if (gd->flags & GD_FLG_SKIP_RELOC) {
703 debug("Skipping relocation due to flag\n");
704 return 0;
705 }
706
707#ifdef CONFIG_SYS_TEXT_BASE
708 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
709#ifdef CONFIG_M68K
710 /*
711 * On all ColdFire arch cpu, monitor code starts always
712 * just after the default vector table location, so at 0x400
713 */
714 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
715#endif
716#endif
717 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
718
719 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
720 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
721 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
722 gd->start_addr_sp);
723
724 return 0;
725}
726
727/* ARM calls relocate_code from its crt0.S */
728#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
729
730static int jump_to_copy(void)
731{
732 if (gd->flags & GD_FLG_SKIP_RELOC)
733 return 0;
734 /*
735 * x86 is special, but in a nice way. It uses a trampoline which
736 * enables the dcache if possible.
737 *
738 * For now, other archs use relocate_code(), which is implemented
739 * similarly for all archs. When we do generic relocation, hopefully
740 * we can make all archs enable the dcache prior to relocation.
741 */
742#if defined(CONFIG_X86) || defined(CONFIG_ARC)
743 /*
744 * SDRAM and console are now initialised. The final stack can now
745 * be setup in SDRAM. Code execution will continue in Flash, but
746 * with the stack in SDRAM and Global Data in temporary memory
747 * (CPU cache)
748 */
749 arch_setup_gd(gd->new_gd);
750 board_init_f_r_trampoline(gd->start_addr_sp);
751#else
752 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
753#endif
754
755 return 0;
756}
757#endif
758
759/* Record the board_init_f() bootstage (after arch_cpu_init()) */
760static int mark_bootstage(void)
761{
762 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
763
764 return 0;
765}
766
767static int initf_console_record(void)
768{
769#if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
770 return console_record_init();
771#else
772 return 0;
773#endif
774}
775
776static int initf_dm(void)
777{
778#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
779 int ret;
780
781 ret = dm_init_and_scan(true);
782 if (ret)
783 return ret;
784#endif
785
786 return 0;
787}
788
789/* Architecture-specific memory reservation */
790__weak int reserve_arch(void)
791{
792 return 0;
793}
794
795__weak int arch_cpu_init_dm(void)
796{
797 return 0;
798}
799
800static init_fnc_t init_sequence_f[] = {
801#ifdef CONFIG_SANDBOX
802 setup_ram_buf,
803#endif
804 setup_mon_len,
805#ifdef CONFIG_OF_CONTROL
806 fdtdec_setup,
807#endif
808#ifdef CONFIG_TRACE
809 trace_early_init,
810#endif
811 initf_malloc,
812 initf_console_record,
813#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
814 /* TODO: can this go into arch_cpu_init()? */
815 probecpu,
816#endif
817#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
818 x86_fsp_init,
819#endif
820 arch_cpu_init, /* basic arch cpu dependent setup */
821 initf_dm,
822 arch_cpu_init_dm,
823 mark_bootstage, /* need timer, go after init dm */
824#if defined(CONFIG_BOARD_EARLY_INIT_F)
825 board_early_init_f,
826#endif
827 /* TODO: can any of this go into arch_cpu_init()? */
828#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
829 get_clocks, /* get CPU and bus clocks (etc.) */
830#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
831 && !defined(CONFIG_TQM885D)
832 adjust_sdram_tbs_8xx,
833#endif
834 /* TODO: can we rename this to timer_init()? */
835 init_timebase,
836#endif
837#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
838 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
839 defined(CONFIG_SPARC)
840 timer_init, /* initialize timer */
841#endif
842#ifdef CONFIG_SYS_ALLOC_DPRAM
843#if !defined(CONFIG_CPM2)
844 dpram_init,
845#endif
846#endif
847#if defined(CONFIG_BOARD_POSTCLK_INIT)
848 board_postclk_init,
849#endif
850#if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
851 get_clocks,
852#endif
853 env_init, /* initialize environment */
854#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
855 /* get CPU and bus clocks according to the environment variable */
856 get_clocks_866,
857 /* adjust sdram refresh rate according to the new clock */
858 sdram_adjust_866,
859 init_timebase,
860#endif
861 init_baud_rate, /* initialze baudrate settings */
862 serial_init, /* serial communications setup */
863 console_init_f, /* stage 1 init of console */
864#ifdef CONFIG_SANDBOX
865 sandbox_early_getopt_check,
866#endif
867#ifdef CONFIG_OF_CONTROL
868 fdtdec_prepare_fdt,
869#endif
870 display_options, /* say that we are here */
871 display_text_info, /* show debugging info if required */
872#if defined(CONFIG_MPC8260)
873 prt_8260_rsr,
874 prt_8260_clks,
875#endif /* CONFIG_MPC8260 */
876#if defined(CONFIG_MPC83xx)
877 prt_83xx_rsr,
878#endif
879#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
880 checkcpu,
881#endif
882 print_cpuinfo, /* display cpu info (and speed) */
883#if defined(CONFIG_MPC5xxx)
884 prt_mpc5xxx_clks,
885#endif /* CONFIG_MPC5xxx */
886#if defined(CONFIG_DISPLAY_BOARDINFO)
887 show_board_info,
888#endif
889 INIT_FUNC_WATCHDOG_INIT
890#if defined(CONFIG_MISC_INIT_F)
891 misc_init_f,
892#endif
893 INIT_FUNC_WATCHDOG_RESET
894#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
895 init_func_i2c,
896#endif
897#if defined(CONFIG_HARD_SPI)
898 init_func_spi,
899#endif
900 announce_dram_init,
901 /* TODO: unify all these dram functions? */
902#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
903 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
904 dram_init, /* configure available RAM banks */
905#endif
906#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
907 init_func_ram,
908#endif
909#ifdef CONFIG_POST
910 post_init_f,
911#endif
912 INIT_FUNC_WATCHDOG_RESET
913#if defined(CONFIG_SYS_DRAM_TEST)
914 testdram,
915#endif /* CONFIG_SYS_DRAM_TEST */
916 INIT_FUNC_WATCHDOG_RESET
917
918#ifdef CONFIG_POST
919 init_post,
920#endif
921 INIT_FUNC_WATCHDOG_RESET
922 /*
923 * Now that we have DRAM mapped and working, we can
924 * relocate the code and continue running from DRAM.
925 *
926 * Reserve memory at end of RAM for (top down in that order):
927 * - area that won't get touched by U-Boot and Linux (optional)
928 * - kernel log buffer
929 * - protected RAM
930 * - LCD framebuffer
931 * - monitor code
932 * - board info struct
933 */
934 setup_dest_addr,
935#if defined(CONFIG_BLACKFIN)
936 /* Blackfin u-boot monitor should be on top of the ram */
937 reserve_uboot,
938#endif
939#if defined(CONFIG_SPARC)
940 reserve_prom,
941#endif
942#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
943 reserve_logbuffer,
944#endif
945#ifdef CONFIG_PRAM
946 reserve_pram,
947#endif
948 reserve_round_4k,
949#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
950 defined(CONFIG_ARM)
951 reserve_mmu,
952#endif
953#ifdef CONFIG_LCD
954 reserve_lcd,
955#endif
956 reserve_trace,
957 /* TODO: Why the dependency on CONFIG_8xx? */
958#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
959 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
960 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
961 reserve_video,
962#endif
963#if !defined(CONFIG_BLACKFIN)
964 reserve_uboot,
965#endif
966#ifndef CONFIG_SPL_BUILD
967 reserve_malloc,
968 reserve_board,
969#endif
970 setup_machine,
971 reserve_global_data,
972 reserve_fdt,
973 reserve_arch,
974 reserve_stacks,
975 setup_dram_config,
976 show_dram_config,
977#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
978 setup_board_part1,
979#endif
980#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
981 INIT_FUNC_WATCHDOG_RESET
982 setup_board_part2,
983#endif
984 display_new_sp,
985#ifdef CONFIG_SYS_EXTBDINFO
986 setup_board_extra,
987#endif
988 INIT_FUNC_WATCHDOG_RESET
989 reloc_fdt,
990 setup_reloc,
991#if defined(CONFIG_X86) || defined(CONFIG_ARC)
992 copy_uboot_to_ram,
993 clear_bss,
994 do_elf_reloc_fixups,
995#endif
996#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
997 jump_to_copy,
998#endif
999 NULL,
1000};
1001
1002void board_init_f(ulong boot_flags)
1003{
1004#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1005 /*
1006 * For some archtectures, global data is initialized and used before
1007 * calling this function. The data should be preserved. For others,
1008 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1009 * here to host global data until relocation.
1010 */
1011 gd_t data;
1012
1013 gd = &data;
1014
1015 /*
1016 * Clear global data before it is accessed at debug print
1017 * in initcall_run_list. Otherwise the debug print probably
1018 * get the wrong vaule of gd->have_console.
1019 */
1020 zero_global_data();
1021#endif
1022
1023 gd->flags = boot_flags;
1024 gd->have_console = 0;
1025
1026 if (initcall_run_list(init_sequence_f))
1027 hang();
1028
1029#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1030 !defined(CONFIG_EFI_APP)
1031 /* NOTREACHED - jump_to_copy() does not return */
1032 hang();
1033#endif
1034}
1035
1036#if defined(CONFIG_X86) || defined(CONFIG_ARC)
1037/*
1038 * For now this code is only used on x86.
1039 *
1040 * init_sequence_f_r is the list of init functions which are run when
1041 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1042 * The following limitations must be considered when implementing an
1043 * '_f_r' function:
1044 * - 'static' variables are read-only
1045 * - Global Data (gd->xxx) is read/write
1046 *
1047 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1048 * supported). It _should_, if possible, copy global data to RAM and
1049 * initialise the CPU caches (to speed up the relocation process)
1050 *
1051 * NOTE: At present only x86 uses this route, but it is intended that
1052 * all archs will move to this when generic relocation is implemented.
1053 */
1054static init_fnc_t init_sequence_f_r[] = {
1055 init_cache_f_r,
1056
1057 NULL,
1058};
1059
1060void board_init_f_r(void)
1061{
1062 if (initcall_run_list(init_sequence_f_r))
1063 hang();
1064
1065 /*
1066 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1067 * Transfer execution from Flash to RAM by calculating the address
1068 * of the in-RAM copy of board_init_r() and calling it
1069 */
1070 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1071
1072 /* NOTREACHED - board_init_r() does not return */
1073 hang();
1074}
1075#endif /* CONFIG_X86 */
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