]>
Commit | Line | Data |
---|---|---|
1 | // SPDX-License-Identifier: GPL-2.0+ | |
2 | /* | |
3 | * (C) Copyright 2001 | |
4 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. | |
5 | */ | |
6 | ||
7 | /* | |
8 | * This provides a bit-banged interface to the ethernet MII management | |
9 | * channel. | |
10 | */ | |
11 | ||
12 | #include <dm.h> | |
13 | #include <log.h> | |
14 | #include <miiphy.h> | |
15 | #include <phy.h> | |
16 | #include <linux/delay.h> | |
17 | ||
18 | #include <asm/types.h> | |
19 | #include <linux/list.h> | |
20 | #include <malloc.h> | |
21 | #include <net.h> | |
22 | ||
23 | /* local debug macro */ | |
24 | #undef MII_DEBUG | |
25 | ||
26 | #undef debug | |
27 | #ifdef MII_DEBUG | |
28 | #define debug(fmt, args...) printf(fmt, ##args) | |
29 | #else | |
30 | #define debug(fmt, args...) | |
31 | #endif /* MII_DEBUG */ | |
32 | ||
33 | static LIST_HEAD(mii_devs); | |
34 | static struct mii_dev *current_mii; | |
35 | ||
36 | /* | |
37 | * Lookup the mii_dev struct by the registered device name. | |
38 | */ | |
39 | struct mii_dev *miiphy_get_dev_by_name(const char *devname) | |
40 | { | |
41 | struct list_head *entry; | |
42 | struct mii_dev *dev; | |
43 | ||
44 | if (!devname) { | |
45 | printf("NULL device name!\n"); | |
46 | return NULL; | |
47 | } | |
48 | ||
49 | list_for_each(entry, &mii_devs) { | |
50 | dev = list_entry(entry, struct mii_dev, link); | |
51 | if (strcmp(dev->name, devname) == 0) | |
52 | return dev; | |
53 | } | |
54 | ||
55 | return NULL; | |
56 | } | |
57 | ||
58 | struct mii_dev *mdio_alloc(void) | |
59 | { | |
60 | struct mii_dev *bus; | |
61 | ||
62 | bus = malloc(sizeof(*bus)); | |
63 | if (!bus) | |
64 | return bus; | |
65 | ||
66 | memset(bus, 0, sizeof(*bus)); | |
67 | ||
68 | /* initialize mii_dev struct fields */ | |
69 | INIT_LIST_HEAD(&bus->link); | |
70 | ||
71 | return bus; | |
72 | } | |
73 | ||
74 | void mdio_free(struct mii_dev *bus) | |
75 | { | |
76 | free(bus); | |
77 | } | |
78 | ||
79 | int mdio_register(struct mii_dev *bus) | |
80 | { | |
81 | if (!bus || !bus->read || !bus->write) | |
82 | return -1; | |
83 | ||
84 | /* check if we have unique name */ | |
85 | if (miiphy_get_dev_by_name(bus->name)) { | |
86 | printf("mdio_register: non unique device name '%s'\n", | |
87 | bus->name); | |
88 | return -1; | |
89 | } | |
90 | ||
91 | /* add it to the list */ | |
92 | list_add_tail(&bus->link, &mii_devs); | |
93 | ||
94 | if (!current_mii) | |
95 | current_mii = bus; | |
96 | ||
97 | return 0; | |
98 | } | |
99 | ||
100 | int mdio_register_seq(struct mii_dev *bus, int seq) | |
101 | { | |
102 | int ret; | |
103 | ||
104 | /* Setup a unique name for each mdio bus */ | |
105 | ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq); | |
106 | if (ret < 0) | |
107 | return ret; | |
108 | ||
109 | return mdio_register(bus); | |
110 | } | |
111 | ||
112 | int mdio_unregister(struct mii_dev *bus) | |
113 | { | |
114 | if (!bus) | |
115 | return 0; | |
116 | ||
117 | /* delete it from the list */ | |
118 | list_del(&bus->link); | |
119 | ||
120 | if (current_mii == bus) | |
121 | current_mii = NULL; | |
122 | ||
123 | return 0; | |
124 | } | |
125 | ||
126 | void mdio_list_devices(void) | |
127 | { | |
128 | struct list_head *entry; | |
129 | ||
130 | list_for_each(entry, &mii_devs) { | |
131 | int i; | |
132 | struct mii_dev *bus = list_entry(entry, struct mii_dev, link); | |
133 | ||
134 | printf("%s:\n", bus->name); | |
135 | ||
136 | for (i = 0; i < PHY_MAX_ADDR; i++) { | |
137 | struct phy_device *phydev = bus->phymap[i]; | |
138 | ||
139 | if (phydev) { | |
140 | printf("%x - %s", i, phydev->drv->name); | |
141 | ||
142 | if (phydev->dev) | |
143 | printf(" <--> %s\n", phydev->dev->name); | |
144 | else | |
145 | printf("\n"); | |
146 | } | |
147 | } | |
148 | } | |
149 | } | |
150 | ||
151 | int miiphy_set_current_dev(const char *devname) | |
152 | { | |
153 | struct mii_dev *dev; | |
154 | ||
155 | dev = miiphy_get_dev_by_name(devname); | |
156 | if (dev) { | |
157 | current_mii = dev; | |
158 | return 0; | |
159 | } | |
160 | ||
161 | printf("No such device: %s\n", devname); | |
162 | ||
163 | return 1; | |
164 | } | |
165 | ||
166 | struct mii_dev *mdio_get_current_dev(void) | |
167 | { | |
168 | return current_mii; | |
169 | } | |
170 | ||
171 | struct list_head *mdio_get_list_head(void) | |
172 | { | |
173 | return &mii_devs; | |
174 | } | |
175 | ||
176 | struct phy_device *mdio_phydev_for_ethname(const char *ethname) | |
177 | { | |
178 | struct list_head *entry; | |
179 | struct mii_dev *bus; | |
180 | ||
181 | list_for_each(entry, &mii_devs) { | |
182 | int i; | |
183 | bus = list_entry(entry, struct mii_dev, link); | |
184 | ||
185 | for (i = 0; i < PHY_MAX_ADDR; i++) { | |
186 | if (!bus->phymap[i] || !bus->phymap[i]->dev) | |
187 | continue; | |
188 | ||
189 | if (strcmp(bus->phymap[i]->dev->name, ethname) == 0) | |
190 | return bus->phymap[i]; | |
191 | } | |
192 | } | |
193 | ||
194 | printf("%s is not a known ethernet\n", ethname); | |
195 | return NULL; | |
196 | } | |
197 | ||
198 | const char *miiphy_get_current_dev(void) | |
199 | { | |
200 | if (current_mii) | |
201 | return current_mii->name; | |
202 | ||
203 | return NULL; | |
204 | } | |
205 | ||
206 | static struct mii_dev *miiphy_get_active_dev(const char *devname) | |
207 | { | |
208 | /* If the current mii is the one we want, return it */ | |
209 | if (current_mii) | |
210 | if (strcmp(current_mii->name, devname) == 0) | |
211 | return current_mii; | |
212 | ||
213 | /* Otherwise, set the active one to the one we want */ | |
214 | if (miiphy_set_current_dev(devname)) | |
215 | return NULL; | |
216 | else | |
217 | return current_mii; | |
218 | } | |
219 | ||
220 | /***************************************************************************** | |
221 | * | |
222 | * Read to variable <value> from the PHY attached to device <devname>, | |
223 | * use PHY address <addr> and register <reg>. | |
224 | * | |
225 | * This API is deprecated. Use phy_read on a phy_device found via phy_connect | |
226 | * | |
227 | * Returns: | |
228 | * 0 on success | |
229 | */ | |
230 | int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, | |
231 | unsigned short *value) | |
232 | { | |
233 | struct mii_dev *bus; | |
234 | int ret; | |
235 | ||
236 | bus = miiphy_get_active_dev(devname); | |
237 | if (!bus) | |
238 | return 1; | |
239 | ||
240 | ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg); | |
241 | if (ret < 0) | |
242 | return 1; | |
243 | ||
244 | *value = (unsigned short)ret; | |
245 | return 0; | |
246 | } | |
247 | ||
248 | /***************************************************************************** | |
249 | * | |
250 | * Write <value> to the PHY attached to device <devname>, | |
251 | * use PHY address <addr> and register <reg>. | |
252 | * | |
253 | * This API is deprecated. Use phy_write on a phy_device found by phy_connect | |
254 | * | |
255 | * Returns: | |
256 | * 0 on success | |
257 | */ | |
258 | int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, | |
259 | unsigned short value) | |
260 | { | |
261 | struct mii_dev *bus; | |
262 | ||
263 | bus = miiphy_get_active_dev(devname); | |
264 | if (bus) | |
265 | return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value); | |
266 | ||
267 | return 1; | |
268 | } | |
269 | ||
270 | /***************************************************************************** | |
271 | * | |
272 | * Print out list of registered MII capable devices. | |
273 | */ | |
274 | void miiphy_listdev(void) | |
275 | { | |
276 | struct list_head *entry; | |
277 | struct mii_dev *dev; | |
278 | ||
279 | puts("MII devices: "); | |
280 | list_for_each(entry, &mii_devs) { | |
281 | dev = list_entry(entry, struct mii_dev, link); | |
282 | printf("'%s' ", dev->name); | |
283 | } | |
284 | puts("\n"); | |
285 | ||
286 | if (current_mii) | |
287 | printf("Current device: '%s'\n", current_mii->name); | |
288 | } | |
289 | ||
290 | /***************************************************************************** | |
291 | * | |
292 | * Read the OUI, manufacture's model number, and revision number. | |
293 | * | |
294 | * OUI: 22 bits (unsigned int) | |
295 | * Model: 6 bits (unsigned char) | |
296 | * Revision: 4 bits (unsigned char) | |
297 | * | |
298 | * This API is deprecated. | |
299 | * | |
300 | * Returns: | |
301 | * 0 on success | |
302 | */ | |
303 | int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, | |
304 | unsigned char *model, unsigned char *rev) | |
305 | { | |
306 | unsigned int reg = 0; | |
307 | unsigned short tmp; | |
308 | ||
309 | if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) { | |
310 | debug("PHY ID register 2 read failed\n"); | |
311 | return -1; | |
312 | } | |
313 | reg = tmp; | |
314 | ||
315 | debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg); | |
316 | ||
317 | if (reg == 0xFFFF) { | |
318 | /* No physical device present at this address */ | |
319 | return -1; | |
320 | } | |
321 | ||
322 | if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) { | |
323 | debug("PHY ID register 1 read failed\n"); | |
324 | return -1; | |
325 | } | |
326 | reg |= tmp << 16; | |
327 | debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg); | |
328 | ||
329 | *oui = (reg >> 10); | |
330 | *model = (unsigned char)((reg >> 4) & 0x0000003F); | |
331 | *rev = (unsigned char)(reg & 0x0000000F); | |
332 | return 0; | |
333 | } | |
334 | ||
335 | #ifndef CONFIG_PHYLIB | |
336 | /***************************************************************************** | |
337 | * | |
338 | * Reset the PHY. | |
339 | * | |
340 | * This API is deprecated. Use PHYLIB. | |
341 | * | |
342 | * Returns: | |
343 | * 0 on success | |
344 | */ | |
345 | int miiphy_reset(const char *devname, unsigned char addr) | |
346 | { | |
347 | unsigned short reg; | |
348 | int timeout = 500; | |
349 | ||
350 | if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { | |
351 | debug("PHY status read failed\n"); | |
352 | return -1; | |
353 | } | |
354 | if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) { | |
355 | debug("PHY reset failed\n"); | |
356 | return -1; | |
357 | } | |
358 | #if CONFIG_PHY_RESET_DELAY > 0 | |
359 | udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ | |
360 | #endif | |
361 | /* | |
362 | * Poll the control register for the reset bit to go to 0 (it is | |
363 | * auto-clearing). This should happen within 0.5 seconds per the | |
364 | * IEEE spec. | |
365 | */ | |
366 | reg = 0x8000; | |
367 | while (((reg & 0x8000) != 0) && timeout--) { | |
368 | if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { | |
369 | debug("PHY status read failed\n"); | |
370 | return -1; | |
371 | } | |
372 | udelay(1000); | |
373 | } | |
374 | if ((reg & 0x8000) == 0) { | |
375 | return 0; | |
376 | } else { | |
377 | puts("PHY reset timed out\n"); | |
378 | return -1; | |
379 | } | |
380 | return 0; | |
381 | } | |
382 | #endif /* !PHYLIB */ | |
383 | ||
384 | /***************************************************************************** | |
385 | * | |
386 | * Determine the ethernet speed (10/100/1000). Return 10 on error. | |
387 | */ | |
388 | int miiphy_speed(const char *devname, unsigned char addr) | |
389 | { | |
390 | u16 bmcr, anlpar, adv; | |
391 | ||
392 | #if defined(CONFIG_PHY_GIGE) | |
393 | u16 btsr; | |
394 | ||
395 | /* | |
396 | * Check for 1000BASE-X. If it is supported, then assume that the speed | |
397 | * is 1000. | |
398 | */ | |
399 | if (miiphy_is_1000base_x(devname, addr)) | |
400 | return _1000BASET; | |
401 | ||
402 | /* | |
403 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. | |
404 | */ | |
405 | /* Check for 1000BASE-T. */ | |
406 | if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { | |
407 | printf("PHY 1000BT status"); | |
408 | goto miiphy_read_failed; | |
409 | } | |
410 | if (btsr != 0xFFFF && | |
411 | (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) | |
412 | return _1000BASET; | |
413 | #endif /* CONFIG_PHY_GIGE */ | |
414 | ||
415 | /* Check Basic Management Control Register first. */ | |
416 | if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { | |
417 | printf("PHY speed"); | |
418 | goto miiphy_read_failed; | |
419 | } | |
420 | /* Check if auto-negotiation is on. */ | |
421 | if (bmcr & BMCR_ANENABLE) { | |
422 | /* Get auto-negotiation results. */ | |
423 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { | |
424 | printf("PHY AN speed"); | |
425 | goto miiphy_read_failed; | |
426 | } | |
427 | ||
428 | if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) { | |
429 | puts("PHY AN adv speed"); | |
430 | goto miiphy_read_failed; | |
431 | } | |
432 | return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET; | |
433 | } | |
434 | /* Get speed from basic control settings. */ | |
435 | return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET; | |
436 | ||
437 | miiphy_read_failed: | |
438 | printf(" read failed, assuming 10BASE-T\n"); | |
439 | return _10BASET; | |
440 | } | |
441 | ||
442 | /***************************************************************************** | |
443 | * | |
444 | * Determine full/half duplex. Return half on error. | |
445 | */ | |
446 | int miiphy_duplex(const char *devname, unsigned char addr) | |
447 | { | |
448 | u16 bmcr, anlpar, adv; | |
449 | ||
450 | #if defined(CONFIG_PHY_GIGE) | |
451 | u16 btsr; | |
452 | ||
453 | /* Check for 1000BASE-X. */ | |
454 | if (miiphy_is_1000base_x(devname, addr)) { | |
455 | /* 1000BASE-X */ | |
456 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { | |
457 | printf("1000BASE-X PHY AN duplex"); | |
458 | goto miiphy_read_failed; | |
459 | } | |
460 | } | |
461 | /* | |
462 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. | |
463 | */ | |
464 | /* Check for 1000BASE-T. */ | |
465 | if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { | |
466 | printf("PHY 1000BT status"); | |
467 | goto miiphy_read_failed; | |
468 | } | |
469 | if (btsr != 0xFFFF) { | |
470 | if (btsr & PHY_1000BTSR_1000FD) { | |
471 | return FULL; | |
472 | } else if (btsr & PHY_1000BTSR_1000HD) { | |
473 | return HALF; | |
474 | } | |
475 | } | |
476 | #endif /* CONFIG_PHY_GIGE */ | |
477 | ||
478 | /* Check Basic Management Control Register first. */ | |
479 | if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { | |
480 | puts("PHY duplex"); | |
481 | goto miiphy_read_failed; | |
482 | } | |
483 | /* Check if auto-negotiation is on. */ | |
484 | if (bmcr & BMCR_ANENABLE) { | |
485 | /* Get auto-negotiation results. */ | |
486 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { | |
487 | puts("PHY AN duplex"); | |
488 | goto miiphy_read_failed; | |
489 | } | |
490 | ||
491 | if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) { | |
492 | puts("PHY AN adv duplex"); | |
493 | goto miiphy_read_failed; | |
494 | } | |
495 | return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ? | |
496 | FULL : HALF; | |
497 | } | |
498 | /* Get speed from basic control settings. */ | |
499 | return (bmcr & BMCR_FULLDPLX) ? FULL : HALF; | |
500 | ||
501 | miiphy_read_failed: | |
502 | printf(" read failed, assuming half duplex\n"); | |
503 | return HALF; | |
504 | } | |
505 | ||
506 | /***************************************************************************** | |
507 | * | |
508 | * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/ | |
509 | * 1000BASE-T, or on error. | |
510 | */ | |
511 | int miiphy_is_1000base_x(const char *devname, unsigned char addr) | |
512 | { | |
513 | #if defined(CONFIG_PHY_GIGE) | |
514 | u16 exsr; | |
515 | ||
516 | if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) { | |
517 | printf("PHY extended status read failed, assuming no " | |
518 | "1000BASE-X\n"); | |
519 | return 0; | |
520 | } | |
521 | return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH)); | |
522 | #else | |
523 | return 0; | |
524 | #endif | |
525 | } | |
526 | ||
527 | #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN | |
528 | /***************************************************************************** | |
529 | * | |
530 | * Determine link status | |
531 | */ | |
532 | int miiphy_link(const char *devname, unsigned char addr) | |
533 | { | |
534 | unsigned short reg; | |
535 | ||
536 | /* dummy read; needed to latch some phys */ | |
537 | (void)miiphy_read(devname, addr, MII_BMSR, ®); | |
538 | if (miiphy_read(devname, addr, MII_BMSR, ®)) { | |
539 | puts("MII_BMSR read failed, assuming no link\n"); | |
540 | return 0; | |
541 | } | |
542 | ||
543 | /* Determine if a link is active */ | |
544 | if ((reg & BMSR_LSTATUS) != 0) { | |
545 | return 1; | |
546 | } else { | |
547 | return 0; | |
548 | } | |
549 | } | |
550 | #endif |