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Implement __raw_{read,write}[bwl] on all architectures
[people/ms/u-boot.git] / drivers / mtd / cfi_flash.c
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1/*
2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
7 *
8 * Copyright (C) 2004
9 * Ed Okerson
10 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
32 */
33
34/* The DEBUG define must be before common to enable debugging */
35/* #define DEBUG */
36
37#include <common.h>
38#include <asm/processor.h>
39#include <asm/io.h>
40#include <asm/byteorder.h>
41#include <environment.h>
42#ifdef CFG_FLASH_CFI_DRIVER
43
44/*
45 * This file implements a Common Flash Interface (CFI) driver for
46 * U-Boot.
47 *
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
51 *
52 * References
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
57 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
60 *
61 * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
62 * reading and writing ... (yes there is such a Hardware).
63 */
64
65#ifndef CFG_FLASH_BANKS_LIST
66#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
67#endif
68
69#define FLASH_CMD_CFI 0x98
70#define FLASH_CMD_READ_ID 0x90
71#define FLASH_CMD_RESET 0xff
72#define FLASH_CMD_BLOCK_ERASE 0x20
73#define FLASH_CMD_ERASE_CONFIRM 0xD0
74#define FLASH_CMD_WRITE 0x40
75#define FLASH_CMD_PROTECT 0x60
76#define FLASH_CMD_PROTECT_SET 0x01
77#define FLASH_CMD_PROTECT_CLEAR 0xD0
78#define FLASH_CMD_CLEAR_STATUS 0x50
79#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
80#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
81
82#define FLASH_STATUS_DONE 0x80
83#define FLASH_STATUS_ESS 0x40
84#define FLASH_STATUS_ECLBS 0x20
85#define FLASH_STATUS_PSLBS 0x10
86#define FLASH_STATUS_VPENS 0x08
87#define FLASH_STATUS_PSS 0x04
88#define FLASH_STATUS_DPS 0x02
89#define FLASH_STATUS_R 0x01
90#define FLASH_STATUS_PROTECT 0x01
91
92#define AMD_CMD_RESET 0xF0
93#define AMD_CMD_WRITE 0xA0
94#define AMD_CMD_ERASE_START 0x80
95#define AMD_CMD_ERASE_SECTOR 0x30
96#define AMD_CMD_UNLOCK_START 0xAA
97#define AMD_CMD_UNLOCK_ACK 0x55
98#define AMD_CMD_WRITE_TO_BUFFER 0x25
99#define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
100
101#define AMD_STATUS_TOGGLE 0x40
102#define AMD_STATUS_ERROR 0x20
103
104#define FLASH_OFFSET_MANUFACTURER_ID 0x00
105#define FLASH_OFFSET_DEVICE_ID 0x01
106#define FLASH_OFFSET_DEVICE_ID2 0x0E
107#define FLASH_OFFSET_DEVICE_ID3 0x0F
108#define FLASH_OFFSET_CFI 0x55
109#define FLASH_OFFSET_CFI_ALT 0x555
110#define FLASH_OFFSET_CFI_RESP 0x10
111#define FLASH_OFFSET_PRIMARY_VENDOR 0x13
112/* extended query table primary address */
113#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
114#define FLASH_OFFSET_WTOUT 0x1F
115#define FLASH_OFFSET_WBTOUT 0x20
116#define FLASH_OFFSET_ETOUT 0x21
117#define FLASH_OFFSET_CETOUT 0x22
118#define FLASH_OFFSET_WMAX_TOUT 0x23
119#define FLASH_OFFSET_WBMAX_TOUT 0x24
120#define FLASH_OFFSET_EMAX_TOUT 0x25
121#define FLASH_OFFSET_CEMAX_TOUT 0x26
122#define FLASH_OFFSET_SIZE 0x27
123#define FLASH_OFFSET_INTERFACE 0x28
124#define FLASH_OFFSET_BUFFER_SIZE 0x2A
125#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
126#define FLASH_OFFSET_ERASE_REGIONS 0x2D
127#define FLASH_OFFSET_PROTECT 0x02
128#define FLASH_OFFSET_USER_PROTECTION 0x85
129#define FLASH_OFFSET_INTEL_PROTECTION 0x81
130
131#define CFI_CMDSET_NONE 0
132#define CFI_CMDSET_INTEL_EXTENDED 1
133#define CFI_CMDSET_AMD_STANDARD 2
134#define CFI_CMDSET_INTEL_STANDARD 3
135#define CFI_CMDSET_AMD_EXTENDED 4
136#define CFI_CMDSET_MITSU_STANDARD 256
137#define CFI_CMDSET_MITSU_EXTENDED 257
138#define CFI_CMDSET_SST 258
139
140#ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
141# undef FLASH_CMD_RESET
142# define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
143#endif
144
145typedef union {
146 unsigned char c;
147 unsigned short w;
148 unsigned long l;
149 unsigned long long ll;
150} cfiword_t;
151
152typedef union {
153 volatile unsigned char *cp;
154 volatile unsigned short *wp;
155 volatile unsigned long *lp;
156 volatile unsigned long long *llp;
157} cfiptr_t;
158
159#define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
160
161static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
162
163/* use CFG_MAX_FLASH_BANKS_DETECT if defined */
164#ifdef CFG_MAX_FLASH_BANKS_DETECT
165static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
166flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
167#else
168static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
169flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
170#endif
171
172/*
173 * Check if chip width is defined. If not, start detecting with 8bit.
174 */
175#ifndef CFG_FLASH_CFI_WIDTH
176#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
177#endif
178
179typedef unsigned long flash_sect_t;
180
181/*-----------------------------------------------------------------------
182 */
183#if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
184static flash_info_t *flash_get_info(ulong base)
185{
186 int i;
187 flash_info_t * info = 0;
188
189 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
190 info = & flash_info[i];
191 if (info->size && info->start[0] <= base &&
192 base <= info->start[0] + info->size - 1)
193 break;
194 }
195
196 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
197}
198#endif
199
200/*-----------------------------------------------------------------------
201 * create an address based on the offset and the port width
202 */
203static inline uchar *
204flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
205{
206 return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
207}
208
209/*-----------------------------------------------------------------------
210 * make a proper sized command based on the port and chip widths
211 */
212static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
213{
214 int i;
215 uchar *cp = (uchar *) cmdbuf;
216
217#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
218 for (i = info->portwidth; i > 0; i--)
219#else
220 for (i = 1; i <= info->portwidth; i++)
221#endif
222 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
223}
224
225#ifdef DEBUG
226/*-----------------------------------------------------------------------
227 * Debug support
228 */
229static void print_longlong (char *str, unsigned long long data)
230{
231 int i;
232 char *cp;
233
234 cp = (unsigned char *) &data;
235 for (i = 0; i < 8; i++)
236 sprintf (&str[i * 2], "%2.2x", *cp++);
237}
238
239static void flash_printqry (flash_info_t * info, flash_sect_t sect)
240{
241 cfiptr_t cptr;
242 int x, y;
243
244 for (x = 0; x < 0x40; x += 16U / info->portwidth) {
245 cptr.cp =
246 flash_make_addr (info, sect,
247 x + FLASH_OFFSET_CFI_RESP);
248 debug ("%p : ", cptr.cp);
249 for (y = 0; y < 16; y++) {
250 debug ("%2.2x ", cptr.cp[y]);
251 }
252 debug (" ");
253 for (y = 0; y < 16; y++) {
254 if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
255 debug ("%c", cptr.cp[y]);
256 } else {
257 debug (".");
258 }
259 }
260 debug ("\n");
261 }
262}
263#endif
264
265
266/*-----------------------------------------------------------------------
267 * read a character at a port width address
268 */
269static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
270{
271 uchar *cp;
272
273 cp = flash_make_addr (info, 0, offset);
274#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
275 return (cp[0]);
276#else
277 return (cp[info->portwidth - 1]);
278#endif
279}
280
281/*-----------------------------------------------------------------------
282 * read a short word by swapping for ppc format.
283 */
284static ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect,
285 uint offset)
286{
287 uchar *addr;
288 ushort retval;
289
290#ifdef DEBUG
291 int x;
292#endif
293 addr = flash_make_addr (info, sect, offset);
294
295#ifdef DEBUG
296 debug ("ushort addr is at %p info->portwidth = %d\n", addr,
297 info->portwidth);
298 for (x = 0; x < 2 * info->portwidth; x++) {
299 debug ("addr[%x] = 0x%x\n", x, addr[x]);
300 }
301#endif
302#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
303 retval = ((addr[(info->portwidth)] << 8) | addr[0]);
304#else
305 retval = ((addr[(2 * info->portwidth) - 1] << 8) |
306 addr[info->portwidth - 1]);
307#endif
308
309 debug ("retval = 0x%x\n", retval);
310 return retval;
311}
312
313/*-----------------------------------------------------------------------
314 * read a long word by picking the least significant byte of each maximum
315 * port size word. Swap for ppc format.
316 */
317static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
318 uint offset)
319{
320 uchar *addr;
321 ulong retval;
322
323#ifdef DEBUG
324 int x;
325#endif
326 addr = flash_make_addr (info, sect, offset);
327
328#ifdef DEBUG
329 debug ("long addr is at %p info->portwidth = %d\n", addr,
330 info->portwidth);
331 for (x = 0; x < 4 * info->portwidth; x++) {
332 debug ("addr[%x] = 0x%x\n", x, addr[x]);
333 }
334#endif
335#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
336 retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
337 (addr[(2 * info->portwidth)]) |
338 (addr[(3 * info->portwidth)] << 8);
339#else
340 retval = (addr[(2 * info->portwidth) - 1] << 24) |
341 (addr[(info->portwidth) - 1] << 16) |
342 (addr[(4 * info->portwidth) - 1] << 8) |
343 addr[(3 * info->portwidth) - 1];
344#endif
345 return retval;
346}
347
348/*
349 * Write a proper sized command to the correct address
350 */
351static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
352 uint offset, uchar cmd)
353{
354
355 volatile cfiptr_t addr;
356 cfiword_t cword;
357
358 addr.cp = flash_make_addr (info, sect, offset);
359 flash_make_cmd (info, cmd, &cword);
360 switch (info->portwidth) {
361 case FLASH_CFI_8BIT:
362 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
363 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
364 *addr.cp = cword.c;
365 break;
366 case FLASH_CFI_16BIT:
367 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
368 cmd, cword.w,
369 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
370 *addr.wp = cword.w;
371 break;
372 case FLASH_CFI_32BIT:
373 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
374 cmd, cword.l,
375 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
376 *addr.lp = cword.l;
377 break;
378 case FLASH_CFI_64BIT:
379#ifdef DEBUG
380 {
381 char str[20];
382
383 print_longlong (str, cword.ll);
384
385 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
386 addr.llp, cmd, str,
387 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
388 }
389#endif
390 *addr.llp = cword.ll;
391 break;
392 }
393
394 /* Ensure all the instructions are fully finished */
395 sync();
396}
397
398static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
399{
400 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
401 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
402}
403
404/*-----------------------------------------------------------------------
405 */
406static int flash_isequal (flash_info_t * info, flash_sect_t sect,
407 uint offset, uchar cmd)
408{
409 cfiptr_t cptr;
410 cfiword_t cword;
411 int retval;
412
413 cptr.cp = flash_make_addr (info, sect, offset);
414 flash_make_cmd (info, cmd, &cword);
415
416 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
417 switch (info->portwidth) {
418 case FLASH_CFI_8BIT:
419 debug ("is= %x %x\n", cptr.cp[0], cword.c);
420 retval = (cptr.cp[0] == cword.c);
421 break;
422 case FLASH_CFI_16BIT:
423 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
424 retval = (cptr.wp[0] == cword.w);
425 break;
426 case FLASH_CFI_32BIT:
427 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
428 retval = (cptr.lp[0] == cword.l);
429 break;
430 case FLASH_CFI_64BIT:
431#ifdef DEBUG
432 {
433 char str1[20];
434 char str2[20];
435
436 print_longlong (str1, cptr.llp[0]);
437 print_longlong (str2, cword.ll);
438 debug ("is= %s %s\n", str1, str2);
439 }
440#endif
441 retval = (cptr.llp[0] == cword.ll);
442 break;
443 default:
444 retval = 0;
445 break;
446 }
447 return retval;
448}
449
450/*-----------------------------------------------------------------------
451 */
452static int flash_isset (flash_info_t * info, flash_sect_t sect,
453 uint offset, uchar cmd)
454{
455 cfiptr_t cptr;
456 cfiword_t cword;
457 int retval;
458
459 cptr.cp = flash_make_addr (info, sect, offset);
460 flash_make_cmd (info, cmd, &cword);
461 switch (info->portwidth) {
462 case FLASH_CFI_8BIT:
463 retval = ((cptr.cp[0] & cword.c) == cword.c);
464 break;
465 case FLASH_CFI_16BIT:
466 retval = ((cptr.wp[0] & cword.w) == cword.w);
467 break;
468 case FLASH_CFI_32BIT:
469 retval = ((cptr.lp[0] & cword.l) == cword.l);
470 break;
471 case FLASH_CFI_64BIT:
472 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
473 break;
474 default:
475 retval = 0;
476 break;
477 }
478 return retval;
479}
480
481/*-----------------------------------------------------------------------
482 */
483static int flash_toggle (flash_info_t * info, flash_sect_t sect,
484 uint offset, uchar cmd)
485{
486 cfiptr_t cptr;
487 cfiword_t cword;
488 int retval;
489
490 cptr.cp = flash_make_addr (info, sect, offset);
491 flash_make_cmd (info, cmd, &cword);
492 switch (info->portwidth) {
493 case FLASH_CFI_8BIT:
494 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
495 break;
496 case FLASH_CFI_16BIT:
497 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
498 break;
499 case FLASH_CFI_32BIT:
500 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
501 break;
502 case FLASH_CFI_64BIT:
503 retval = ((cptr.llp[0] & cword.ll) !=
504 (cptr.llp[0] & cword.ll));
505 break;
506 default:
507 retval = 0;
508 break;
509 }
510 return retval;
511}
512
513/*
514 * flash_is_busy - check to see if the flash is busy
515 *
516 * This routine checks the status of the chip and returns true if the
517 * chip is busy.
518 */
519static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
520{
521 int retval;
522
523 switch (info->vendor) {
524 case CFI_CMDSET_INTEL_STANDARD:
525 case CFI_CMDSET_INTEL_EXTENDED:
526 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
527 break;
528 case CFI_CMDSET_AMD_STANDARD:
529 case CFI_CMDSET_AMD_EXTENDED:
530#ifdef CONFIG_FLASH_CFI_LEGACY
531 case CFI_CMDSET_AMD_LEGACY:
532#endif
533 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
534 break;
535 default:
536 retval = 0;
537 }
538 debug ("flash_is_busy: %d\n", retval);
539 return retval;
540}
541
542/*-----------------------------------------------------------------------
543 * wait for XSR.7 to be set. Time out with an error if it does not.
544 * This routine does not set the flash to read-array mode.
545 */
546static int flash_status_check (flash_info_t * info, flash_sect_t sector,
547 ulong tout, char *prompt)
548{
549 ulong start;
550
551#if CFG_HZ != 1000
552 tout *= CFG_HZ/1000;
553#endif
554
555 /* Wait for command completion */
556 start = get_timer (0);
557 while (flash_is_busy (info, sector)) {
558 if (get_timer (start) > tout) {
559 printf ("Flash %s timeout at address %lx data %lx\n",
560 prompt, info->start[sector],
561 flash_read_long (info, sector, 0));
562 flash_write_cmd (info, sector, 0, info->cmd_reset);
563 return ERR_TIMOUT;
564 }
565 udelay (1); /* also triggers watchdog */
566 }
567 return ERR_OK;
568}
569
570/*-----------------------------------------------------------------------
571 * Wait for XSR.7 to be set, if it times out print an error, otherwise
572 * do a full status check.
573 *
574 * This routine sets the flash to read-array mode.
575 */
576static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
577 ulong tout, char *prompt)
578{
579 int retcode;
580
581 retcode = flash_status_check (info, sector, tout, prompt);
582 switch (info->vendor) {
583 case CFI_CMDSET_INTEL_EXTENDED:
584 case CFI_CMDSET_INTEL_STANDARD:
585 if ((retcode == ERR_OK)
586 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
587 retcode = ERR_INVAL;
588 printf ("Flash %s error at address %lx\n", prompt,
589 info->start[sector]);
590 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
591 FLASH_STATUS_PSLBS)) {
592 puts ("Command Sequence Error.\n");
593 } else if (flash_isset (info, sector, 0,
594 FLASH_STATUS_ECLBS)) {
595 puts ("Block Erase Error.\n");
596 retcode = ERR_NOT_ERASED;
597 } else if (flash_isset (info, sector, 0,
598 FLASH_STATUS_PSLBS)) {
599 puts ("Locking Error\n");
600 }
601 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
602 puts ("Block locked.\n");
603 retcode = ERR_PROTECTED;
604 }
605 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
606 puts ("Vpp Low Error.\n");
607 }
608 flash_write_cmd (info, sector, 0, info->cmd_reset);
609 break;
610 default:
611 break;
612 }
613 return retcode;
614}
615
616/*-----------------------------------------------------------------------
617 */
618static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
619{
620#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
621 unsigned short w;
622 unsigned int l;
623 unsigned long long ll;
624#endif
625
626 switch (info->portwidth) {
627 case FLASH_CFI_8BIT:
628 cword->c = c;
629 break;
630 case FLASH_CFI_16BIT:
631#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
632 w = c;
633 w <<= 8;
634 cword->w = (cword->w >> 8) | w;
635#else
636 cword->w = (cword->w << 8) | c;
637#endif
638 break;
639 case FLASH_CFI_32BIT:
640#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
641 l = c;
642 l <<= 24;
643 cword->l = (cword->l >> 8) | l;
644#else
645 cword->l = (cword->l << 8) | c;
646#endif
647 break;
648 case FLASH_CFI_64BIT:
649#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
650 ll = c;
651 ll <<= 56;
652 cword->ll = (cword->ll >> 8) | ll;
653#else
654 cword->ll = (cword->ll << 8) | c;
655#endif
656 break;
657 }
658}
659
660/* loop through the sectors from the highest address when the passed
661 * address is greater or equal to the sector address we have a match
662 */
663static flash_sect_t find_sector (flash_info_t * info, ulong addr)
664{
665 flash_sect_t sector;
666
667 for (sector = info->sector_count - 1; sector >= 0; sector--) {
668 if (addr >= info->start[sector])
669 break;
670 }
671 return sector;
672}
673
674/*-----------------------------------------------------------------------
675 */
676static int flash_write_cfiword (flash_info_t * info, ulong dest,
677 cfiword_t cword)
678{
679 cfiptr_t ctladdr;
680 cfiptr_t cptr;
681 int flag;
682
683 ctladdr.cp = flash_make_addr (info, 0, 0);
684 cptr.cp = (uchar *) dest;
685
686 /* Check if Flash is (sufficiently) erased */
687 switch (info->portwidth) {
688 case FLASH_CFI_8BIT:
689 flag = ((cptr.cp[0] & cword.c) == cword.c);
690 break;
691 case FLASH_CFI_16BIT:
692 flag = ((cptr.wp[0] & cword.w) == cword.w);
693 break;
694 case FLASH_CFI_32BIT:
695 flag = ((cptr.lp[0] & cword.l) == cword.l);
696 break;
697 case FLASH_CFI_64BIT:
698 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
699 break;
700 default:
701 return 2;
702 }
703 if (!flag)
704 return 2;
705
706 /* Disable interrupts which might cause a timeout here */
707 flag = disable_interrupts ();
708
709 switch (info->vendor) {
710 case CFI_CMDSET_INTEL_EXTENDED:
711 case CFI_CMDSET_INTEL_STANDARD:
712 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
713 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
714 break;
715 case CFI_CMDSET_AMD_EXTENDED:
716 case CFI_CMDSET_AMD_STANDARD:
717#ifdef CONFIG_FLASH_CFI_LEGACY
718 case CFI_CMDSET_AMD_LEGACY:
719#endif
720 flash_unlock_seq (info, 0);
721 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
722 break;
723 }
724
725 switch (info->portwidth) {
726 case FLASH_CFI_8BIT:
727 cptr.cp[0] = cword.c;
728 break;
729 case FLASH_CFI_16BIT:
730 cptr.wp[0] = cword.w;
731 break;
732 case FLASH_CFI_32BIT:
733 cptr.lp[0] = cword.l;
734 break;
735 case FLASH_CFI_64BIT:
736 cptr.llp[0] = cword.ll;
737 break;
738 }
739
740 /* re-enable interrupts if necessary */
741 if (flag)
742 enable_interrupts ();
743
744 return flash_full_status_check (info, find_sector (info, dest),
745 info->write_tout, "write");
746}
747
748#ifdef CFG_FLASH_USE_BUFFER_WRITE
749
750static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
751 int len)
752{
753 flash_sect_t sector;
754 int cnt;
755 int retcode;
756 volatile cfiptr_t src;
757 volatile cfiptr_t dst;
758
759 switch (info->vendor) {
760 case CFI_CMDSET_INTEL_STANDARD:
761 case CFI_CMDSET_INTEL_EXTENDED:
762 src.cp = cp;
763 dst.cp = (uchar *) dest;
764 sector = find_sector (info, dest);
765 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
766 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
767 retcode = flash_status_check (info, sector,
768 info->buffer_write_tout,
769 "write to buffer");
770 if (retcode == ERR_OK) {
771 /* reduce the number of loops by the width of
772 * the port */
773 switch (info->portwidth) {
774 case FLASH_CFI_8BIT:
775 cnt = len;
776 break;
777 case FLASH_CFI_16BIT:
778 cnt = len >> 1;
779 break;
780 case FLASH_CFI_32BIT:
781 cnt = len >> 2;
782 break;
783 case FLASH_CFI_64BIT:
784 cnt = len >> 3;
785 break;
786 default:
787 return ERR_INVAL;
788 break;
789 }
790 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
791 while (cnt-- > 0) {
792 switch (info->portwidth) {
793 case FLASH_CFI_8BIT:
794 *dst.cp++ = *src.cp++;
795 break;
796 case FLASH_CFI_16BIT:
797 *dst.wp++ = *src.wp++;
798 break;
799 case FLASH_CFI_32BIT:
800 *dst.lp++ = *src.lp++;
801 break;
802 case FLASH_CFI_64BIT:
803 *dst.llp++ = *src.llp++;
804 break;
805 default:
806 return ERR_INVAL;
807 break;
808 }
809 }
810 flash_write_cmd (info, sector, 0,
811 FLASH_CMD_WRITE_BUFFER_CONFIRM);
812 retcode = flash_full_status_check (
813 info, sector, info->buffer_write_tout,
814 "buffer write");
815 }
816 return retcode;
817
818 case CFI_CMDSET_AMD_STANDARD:
819 case CFI_CMDSET_AMD_EXTENDED:
820 src.cp = cp;
821 dst.cp = (uchar *) dest;
822 sector = find_sector (info, dest);
823
824 flash_unlock_seq(info,0);
825 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
826
827 switch (info->portwidth) {
828 case FLASH_CFI_8BIT:
829 cnt = len;
830 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
831 while (cnt-- > 0) *dst.cp++ = *src.cp++;
832 break;
833 case FLASH_CFI_16BIT:
834 cnt = len >> 1;
835 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
836 while (cnt-- > 0) *dst.wp++ = *src.wp++;
837 break;
838 case FLASH_CFI_32BIT:
839 cnt = len >> 2;
840 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
841 while (cnt-- > 0) *dst.lp++ = *src.lp++;
842 break;
843 case FLASH_CFI_64BIT:
844 cnt = len >> 3;
845 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
846 while (cnt-- > 0) *dst.llp++ = *src.llp++;
847 break;
848 default:
849 return ERR_INVAL;
850 }
851
852 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
853 retcode = flash_full_status_check (info, sector,
854 info->buffer_write_tout,
855 "buffer write");
856 return retcode;
857
858 default:
859 debug ("Unknown Command Set\n");
860 return ERR_INVAL;
861 }
862}
863#endif /* CFG_FLASH_USE_BUFFER_WRITE */
864
865
866/*-----------------------------------------------------------------------
867 */
868int flash_erase (flash_info_t * info, int s_first, int s_last)
869{
870 int rcode = 0;
871 int prot;
872 flash_sect_t sect;
873
874 if (info->flash_id != FLASH_MAN_CFI) {
875 puts ("Can't erase unknown flash type - aborted\n");
876 return 1;
877 }
878 if ((s_first < 0) || (s_first > s_last)) {
879 puts ("- no sectors to erase\n");
880 return 1;
881 }
882
883 prot = 0;
884 for (sect = s_first; sect <= s_last; ++sect) {
885 if (info->protect[sect]) {
886 prot++;
887 }
888 }
889 if (prot) {
890 printf ("- Warning: %d protected sectors will not be erased!\n",
891 prot);
892 } else {
893 putc ('\n');
894 }
895
896
897 for (sect = s_first; sect <= s_last; sect++) {
898 if (info->protect[sect] == 0) { /* not protected */
899 switch (info->vendor) {
900 case CFI_CMDSET_INTEL_STANDARD:
901 case CFI_CMDSET_INTEL_EXTENDED:
902 flash_write_cmd (info, sect, 0,
903 FLASH_CMD_CLEAR_STATUS);
904 flash_write_cmd (info, sect, 0,
905 FLASH_CMD_BLOCK_ERASE);
906 flash_write_cmd (info, sect, 0,
907 FLASH_CMD_ERASE_CONFIRM);
908 break;
909 case CFI_CMDSET_AMD_STANDARD:
910 case CFI_CMDSET_AMD_EXTENDED:
911 flash_unlock_seq (info, sect);
912 flash_write_cmd (info, sect,
913 info->addr_unlock1,
914 AMD_CMD_ERASE_START);
915 flash_unlock_seq (info, sect);
916 flash_write_cmd (info, sect, 0,
917 AMD_CMD_ERASE_SECTOR);
918 break;
919#ifdef CONFIG_FLASH_CFI_LEGACY
920 case CFI_CMDSET_AMD_LEGACY:
921 flash_unlock_seq (info, 0);
922 flash_write_cmd (info, 0, info->addr_unlock1,
923 AMD_CMD_ERASE_START);
924 flash_unlock_seq (info, 0);
925 flash_write_cmd (info, sect, 0,
926 AMD_CMD_ERASE_SECTOR);
927 break;
928#endif
929 default:
930 debug ("Unkown flash vendor %d\n",
931 info->vendor);
932 break;
933 }
934
935 if (flash_full_status_check
936 (info, sect, info->erase_blk_tout, "erase")) {
937 rcode = 1;
938 } else
939 putc ('.');
940 }
941 }
942 puts (" done\n");
943 return rcode;
944}
945
946/*-----------------------------------------------------------------------
947 */
948void flash_print_info (flash_info_t * info)
949{
950 int i;
951
952 if (info->flash_id != FLASH_MAN_CFI) {
953 puts ("missing or unknown FLASH type\n");
954 return;
955 }
956
957 printf ("%s FLASH (%d x %d)",
958 info->name,
959 (info->portwidth << 3), (info->chipwidth << 3));
960 if (info->size < 1024*1024)
961 printf (" Size: %ld kB in %d Sectors\n",
962 info->size >> 10, info->sector_count);
963 else
964 printf (" Size: %ld MB in %d Sectors\n",
965 info->size >> 20, info->sector_count);
966 printf (" ");
967 switch (info->vendor) {
968 case CFI_CMDSET_INTEL_STANDARD:
969 printf ("Intel Standard");
970 break;
971 case CFI_CMDSET_INTEL_EXTENDED:
972 printf ("Intel Extended");
973 break;
974 case CFI_CMDSET_AMD_STANDARD:
975 printf ("AMD Standard");
976 break;
977 case CFI_CMDSET_AMD_EXTENDED:
978 printf ("AMD Extended");
979 break;
980#ifdef CONFIG_FLASH_CFI_LEGACY
981 case CFI_CMDSET_AMD_LEGACY:
982 printf ("AMD Legacy");
983 break;
984#endif
985 default:
986 printf ("Unknown (%d)", info->vendor);
987 break;
988 }
989 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
990 info->manufacturer_id, info->device_id);
991 if (info->device_id == 0x7E) {
992 printf("%04X", info->device_id2);
993 }
994 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
995 info->erase_blk_tout,
996 info->write_tout);
997 if (info->buffer_size > 1) {
998 printf (" Buffer write timeout: %ld ms, "
999 "buffer size: %d bytes\n",
1000 info->buffer_write_tout,
1001 info->buffer_size);
1002 }
1003
1004 puts ("\n Sector Start Addresses:");
1005 for (i = 0; i < info->sector_count; ++i) {
1006 if ((i % 5) == 0)
1007 printf ("\n");
1008#ifdef CFG_FLASH_EMPTY_INFO
1009 int k;
1010 int size;
1011 int erased;
1012 volatile unsigned long *flash;
1013
1014 /*
1015 * Check if whole sector is erased
1016 */
1017 if (i != (info->sector_count - 1))
1018 size = info->start[i + 1] - info->start[i];
1019 else
1020 size = info->start[0] + info->size - info->start[i];
1021 erased = 1;
1022 flash = (volatile unsigned long *) info->start[i];
1023 size = size >> 2; /* divide by 4 for longword access */
1024 for (k = 0; k < size; k++) {
1025 if (*flash++ != 0xffffffff) {
1026 erased = 0;
1027 break;
1028 }
1029 }
1030
1031 /* print empty and read-only info */
1032 printf (" %08lX %c %s ",
1033 info->start[i],
1034 erased ? 'E' : ' ',
1035 info->protect[i] ? "RO" : " ");
1036#else /* ! CFG_FLASH_EMPTY_INFO */
1037 printf (" %08lX %s ",
1038 info->start[i],
1039 info->protect[i] ? "RO" : " ");
1040#endif
1041 }
1042 putc ('\n');
1043 return;
1044}
1045
1046/*-----------------------------------------------------------------------
1047 * Copy memory to flash, returns:
1048 * 0 - OK
1049 * 1 - write timeout
1050 * 2 - Flash not erased
1051 */
1052int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1053{
1054 ulong wp;
1055 ulong cp;
1056 int aln;
1057 cfiword_t cword;
1058 int i, rc;
1059
1060#ifdef CFG_FLASH_USE_BUFFER_WRITE
1061 int buffered_size;
1062#endif
1063 /* get lower aligned address */
1064 /* get lower aligned address */
1065 wp = (addr & ~(info->portwidth - 1));
1066
1067 /* handle unaligned start */
1068 if ((aln = addr - wp) != 0) {
1069 cword.l = 0;
1070 cp = wp;
1071 for (i = 0; i < aln; ++i, ++cp)
1072 flash_add_byte (info, &cword, (*(uchar *) cp));
1073
1074 for (; (i < info->portwidth) && (cnt > 0); i++) {
1075 flash_add_byte (info, &cword, *src++);
1076 cnt--;
1077 cp++;
1078 }
1079 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
1080 flash_add_byte (info, &cword, (*(uchar *) cp));
1081 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1082 return rc;
1083 wp = cp;
1084 }
1085
1086 /* handle the aligned part */
1087#ifdef CFG_FLASH_USE_BUFFER_WRITE
1088 buffered_size = (info->portwidth / info->chipwidth);
1089 buffered_size *= info->buffer_size;
1090 while (cnt >= info->portwidth) {
1091 /* prohibit buffer write when buffer_size is 1 */
1092 if (info->buffer_size == 1) {
1093 cword.l = 0;
1094 for (i = 0; i < info->portwidth; i++)
1095 flash_add_byte (info, &cword, *src++);
1096 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1097 return rc;
1098 wp += info->portwidth;
1099 cnt -= info->portwidth;
1100 continue;
1101 }
1102
1103 /* write buffer until next buffered_size aligned boundary */
1104 i = buffered_size - (wp % buffered_size);
1105 if (i > cnt)
1106 i = cnt;
1107 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1108 return rc;
1109 i -= i & (info->portwidth - 1);
1110 wp += i;
1111 src += i;
1112 cnt -= i;
1113 }
1114#else
1115 while (cnt >= info->portwidth) {
1116 cword.l = 0;
1117 for (i = 0; i < info->portwidth; i++) {
1118 flash_add_byte (info, &cword, *src++);
1119 }
1120 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1121 return rc;
1122 wp += info->portwidth;
1123 cnt -= info->portwidth;
1124 }
1125#endif /* CFG_FLASH_USE_BUFFER_WRITE */
1126 if (cnt == 0) {
1127 return (0);
1128 }
1129
1130 /*
1131 * handle unaligned tail bytes
1132 */
1133 cword.l = 0;
1134 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
1135 flash_add_byte (info, &cword, *src++);
1136 --cnt;
1137 }
1138 for (; i < info->portwidth; ++i, ++cp) {
1139 flash_add_byte (info, &cword, (*(uchar *) cp));
1140 }
1141
1142 return flash_write_cfiword (info, wp, cword);
1143}
1144
1145/*-----------------------------------------------------------------------
1146 */
1147#ifdef CFG_FLASH_PROTECTION
1148
1149int flash_real_protect (flash_info_t * info, long sector, int prot)
1150{
1151 int retcode = 0;
1152
1153 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1154 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1155 if (prot)
1156 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1157 else
1158 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1159
1160 if ((retcode =
1161 flash_full_status_check (info, sector, info->erase_blk_tout,
1162 prot ? "protect" : "unprotect")) == 0) {
1163
1164 info->protect[sector] = prot;
1165
1166 /*
1167 * On some of Intel's flash chips (marked via legacy_unlock)
1168 * unprotect unprotects all locking.
1169 */
1170 if ((prot == 0) && (info->legacy_unlock)) {
1171 flash_sect_t i;
1172
1173 for (i = 0; i < info->sector_count; i++) {
1174 if (info->protect[i])
1175 flash_real_protect (info, i, 1);
1176 }
1177 }
1178 }
1179 return retcode;
1180}
1181
1182/*-----------------------------------------------------------------------
1183 * flash_read_user_serial - read the OneTimeProgramming cells
1184 */
1185void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1186 int len)
1187{
1188 uchar *src;
1189 uchar *dst;
1190
1191 dst = buffer;
1192 src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
1193 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1194 memcpy (dst, src + offset, len);
1195 flash_write_cmd (info, 0, 0, info->cmd_reset);
1196}
1197
1198/*
1199 * flash_read_factory_serial - read the device Id from the protection area
1200 */
1201void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1202 int len)
1203{
1204 uchar *src;
1205
1206 src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1207 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1208 memcpy (buffer, src + offset, len);
1209 flash_write_cmd (info, 0, 0, info->cmd_reset);
1210}
1211
1212#endif /* CFG_FLASH_PROTECTION */
1213
1214
1215/*-----------------------------------------------------------------------
1216 * read jedec ids from device and set corresponding fields in info struct
1217 *
1218 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1219 *
1220*/
1221static void flash_read_jedec_ids (flash_info_t * info)
1222{
1223 info->manufacturer_id = 0;
1224 info->device_id = 0;
1225 info->device_id2 = 0;
1226
1227 switch (info->vendor) {
1228 case CFI_CMDSET_INTEL_STANDARD:
1229 case CFI_CMDSET_INTEL_EXTENDED:
1230 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1231 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1232 udelay(1000); /* some flash are slow to respond */
1233 info->manufacturer_id = flash_read_uchar (info,
1234 FLASH_OFFSET_MANUFACTURER_ID);
1235 info->device_id = flash_read_uchar (info,
1236 FLASH_OFFSET_DEVICE_ID);
1237 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1238 break;
1239 case CFI_CMDSET_AMD_STANDARD:
1240 case CFI_CMDSET_AMD_EXTENDED:
1241 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1242 flash_unlock_seq(info, 0);
1243 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1244 udelay(1000); /* some flash are slow to respond */
1245 info->manufacturer_id = flash_read_uchar (info,
1246 FLASH_OFFSET_MANUFACTURER_ID);
1247 info->device_id = flash_read_uchar (info,
1248 FLASH_OFFSET_DEVICE_ID);
1249 if (info->device_id == 0x7E) {
1250 /* AMD 3-byte (expanded) device ids */
1251 info->device_id2 = flash_read_uchar (info,
1252 FLASH_OFFSET_DEVICE_ID2);
1253 info->device_id2 <<= 8;
1254 info->device_id2 |= flash_read_uchar (info,
1255 FLASH_OFFSET_DEVICE_ID3);
1256 }
1257 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1258 break;
1259 default:
1260 break;
1261 }
1262}
1263
1264#ifdef CONFIG_FLASH_CFI_LEGACY
1265/*-----------------------------------------------------------------------
1266 * Call board code to request info about non-CFI flash.
1267 * board_flash_get_legacy needs to fill in at least:
1268 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1269 */
1270static int flash_detect_legacy(ulong base, int banknum)
1271{
1272 flash_info_t *info = &flash_info[banknum];
1273
1274 if (board_flash_get_legacy(base, banknum, info)) {
1275 /* board code may have filled info completely. If not, we
1276 use JEDEC ID probing. */
1277 if (!info->vendor) {
1278 int modes[] = {
1279 CFI_CMDSET_AMD_STANDARD,
1280 CFI_CMDSET_INTEL_STANDARD
1281 };
1282 int i;
1283
1284 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1285 info->vendor = modes[i];
1286 info->start[0] = base;
1287 if (info->portwidth == FLASH_CFI_8BIT
1288 && info->interface == FLASH_CFI_X8X16) {
1289 info->addr_unlock1 = 0x2AAA;
1290 info->addr_unlock2 = 0x5555;
1291 } else {
1292 info->addr_unlock1 = 0x5555;
1293 info->addr_unlock2 = 0x2AAA;
1294 }
1295 flash_read_jedec_ids(info);
1296 debug("JEDEC PROBE: ID %x %x %x\n",
1297 info->manufacturer_id,
1298 info->device_id,
1299 info->device_id2);
1300 if (jedec_flash_match(info, base))
1301 break;
1302 }
1303 }
1304
1305 switch(info->vendor) {
1306 case CFI_CMDSET_INTEL_STANDARD:
1307 case CFI_CMDSET_INTEL_EXTENDED:
1308 info->cmd_reset = FLASH_CMD_RESET;
1309 break;
1310 case CFI_CMDSET_AMD_STANDARD:
1311 case CFI_CMDSET_AMD_EXTENDED:
1312 case CFI_CMDSET_AMD_LEGACY:
1313 info->cmd_reset = AMD_CMD_RESET;
1314 break;
1315 }
1316 info->flash_id = FLASH_MAN_CFI;
1317 return 1;
1318 }
1319 return 0; /* use CFI */
1320}
1321#else
1322static inline int flash_detect_legacy(ulong base, int banknum)
1323{
1324 return 0; /* use CFI */
1325}
1326#endif
1327
1328/*-----------------------------------------------------------------------
1329 * detect if flash is compatible with the Common Flash Interface (CFI)
1330 * http://www.jedec.org/download/search/jesd68.pdf
1331 */
1332static int __flash_detect_cfi (flash_info_t * info)
1333{
1334 int cfi_offset;
1335
1336 flash_write_cmd (info, 0, 0, info->cmd_reset);
1337 for (cfi_offset=0;
1338 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1339 cfi_offset++) {
1340 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1341 FLASH_CMD_CFI);
1342 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1343 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1344 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1345 info->interface = flash_read_ushort (info, 0,
1346 FLASH_OFFSET_INTERFACE);
1347 info->cfi_offset = flash_offset_cfi[cfi_offset];
1348 debug ("device interface is %d\n",
1349 info->interface);
1350 debug ("found port %d chip %d ",
1351 info->portwidth, info->chipwidth);
1352 debug ("port %d bits chip %d bits\n",
1353 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1354 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1355
1356 /* calculate command offsets as in the Linux driver */
1357 info->addr_unlock1 = 0x555;
1358 info->addr_unlock2 = 0x2aa;
1359
1360 /*
1361 * modify the unlock address if we are
1362 * in compatibility mode
1363 */
1364 if ( /* x8/x16 in x8 mode */
1365 ((info->chipwidth == FLASH_CFI_BY8) &&
1366 (info->interface == FLASH_CFI_X8X16)) ||
1367 /* x16/x32 in x16 mode */
1368 ((info->chipwidth == FLASH_CFI_BY16) &&
1369 (info->interface == FLASH_CFI_X16X32)))
1370 {
1371 info->addr_unlock1 = 0xaaa;
1372 info->addr_unlock2 = 0x555;
1373 }
1374
1375 info->name = "CFI conformant";
1376 return 1;
1377 }
1378 }
1379
1380 return 0;
1381}
1382
1383static int flash_detect_cfi (flash_info_t * info)
1384{
1385 debug ("flash detect cfi\n");
1386
1387 for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1388 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1389 for (info->chipwidth = FLASH_CFI_BY8;
1390 info->chipwidth <= info->portwidth;
1391 info->chipwidth <<= 1)
1392 if (__flash_detect_cfi(info))
1393 return 1;
1394 }
1395 debug ("not found\n");
1396 return 0;
1397}
1398
1399/*
1400 * The following code cannot be run from FLASH!
1401 *
1402 */
1403ulong flash_get_size (ulong base, int banknum)
1404{
1405 flash_info_t *info = &flash_info[banknum];
1406 int i, j;
1407 flash_sect_t sect_cnt;
1408 unsigned long sector;
1409 unsigned long tmp;
1410 int size_ratio;
1411 uchar num_erase_regions;
1412 int erase_region_size;
1413 int erase_region_count;
1414 int geometry_reversed = 0;
1415
1416 info->ext_addr = 0;
1417 info->cfi_version = 0;
1418#ifdef CFG_FLASH_PROTECTION
1419 info->legacy_unlock = 0;
1420#endif
1421
1422 info->start[0] = base;
1423
1424 if (flash_detect_cfi (info)) {
1425 info->vendor = flash_read_ushort (info, 0,
1426 FLASH_OFFSET_PRIMARY_VENDOR);
1427 flash_read_jedec_ids (info);
1428 flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI);
1429 num_erase_regions = flash_read_uchar (info,
1430 FLASH_OFFSET_NUM_ERASE_REGIONS);
1431 info->ext_addr = flash_read_ushort (info, 0,
1432 FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1433 if (info->ext_addr) {
1434 info->cfi_version = (ushort) flash_read_uchar (info,
1435 info->ext_addr + 3) << 8;
1436 info->cfi_version |= (ushort) flash_read_uchar (info,
1437 info->ext_addr + 4);
1438 }
1439#ifdef DEBUG
1440 flash_printqry (info, 0);
1441#endif
1442 switch (info->vendor) {
1443 case CFI_CMDSET_INTEL_STANDARD:
1444 case CFI_CMDSET_INTEL_EXTENDED:
1445 default:
1446 info->cmd_reset = FLASH_CMD_RESET;
1447#ifdef CFG_FLASH_PROTECTION
1448 /* read legacy lock/unlock bit from intel flash */
1449 if (info->ext_addr) {
1450 info->legacy_unlock = flash_read_uchar (info,
1451 info->ext_addr + 5) & 0x08;
1452 }
1453#endif
1454 break;
1455 case CFI_CMDSET_AMD_STANDARD:
1456 case CFI_CMDSET_AMD_EXTENDED:
1457 info->cmd_reset = AMD_CMD_RESET;
1458 /* check if flash geometry needs reversal */
1459 if (num_erase_regions <= 1)
1460 break;
1461 /* reverse geometry if top boot part */
1462 if (info->cfi_version < 0x3131) {
1463 /* CFI < 1.1, try to guess from device id */
1464 if ((info->device_id & 0x80) != 0) {
1465 geometry_reversed = 1;
1466 }
1467 break;
1468 }
1469 /* CFI >= 1.1, deduct from top/bottom flag */
1470 /* note: ext_addr is valid since cfi_version > 0 */
1471 if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1472 geometry_reversed = 1;
1473 }
1474 break;
1475 }
1476
1477 debug ("manufacturer is %d\n", info->vendor);
1478 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1479 debug ("device id is 0x%x\n", info->device_id);
1480 debug ("device id2 is 0x%x\n", info->device_id2);
1481 debug ("cfi version is 0x%04x\n", info->cfi_version);
1482
1483 size_ratio = info->portwidth / info->chipwidth;
1484 /* if the chip is x8/x16 reduce the ratio by half */
1485 if ((info->interface == FLASH_CFI_X8X16)
1486 && (info->chipwidth == FLASH_CFI_BY8)) {
1487 size_ratio >>= 1;
1488 }
1489 debug ("size_ratio %d port %d bits chip %d bits\n",
1490 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1491 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1492 debug ("found %d erase regions\n", num_erase_regions);
1493 sect_cnt = 0;
1494 sector = base;
1495 for (i = 0; i < num_erase_regions; i++) {
1496 if (i > NUM_ERASE_REGIONS) {
1497 printf ("%d erase regions found, only %d used\n",
1498 num_erase_regions, NUM_ERASE_REGIONS);
1499 break;
1500 }
1501 if (geometry_reversed)
1502 tmp = flash_read_long (info, 0,
1503 FLASH_OFFSET_ERASE_REGIONS +
1504 (num_erase_regions - 1 - i) * 4);
1505 else
1506 tmp = flash_read_long (info, 0,
1507 FLASH_OFFSET_ERASE_REGIONS +
1508 i * 4);
1509 erase_region_size =
1510 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1511 tmp >>= 16;
1512 erase_region_count = (tmp & 0xffff) + 1;
1513 debug ("erase_region_count = %d erase_region_size = %d\n",
1514 erase_region_count, erase_region_size);
1515 for (j = 0; j < erase_region_count; j++) {
1516 if (sect_cnt >= CFG_MAX_FLASH_SECT) {
1517 printf("ERROR: too many flash sectors\n");
1518 break;
1519 }
1520 info->start[sect_cnt] = sector;
1521 sector += (erase_region_size * size_ratio);
1522
1523 /*
1524 * Only read protection status from
1525 * supported devices (intel...)
1526 */
1527 switch (info->vendor) {
1528 case CFI_CMDSET_INTEL_EXTENDED:
1529 case CFI_CMDSET_INTEL_STANDARD:
1530 info->protect[sect_cnt] =
1531 flash_isset (info, sect_cnt,
1532 FLASH_OFFSET_PROTECT,
1533 FLASH_STATUS_PROTECT);
1534 break;
1535 default:
1536 /* default: not protected */
1537 info->protect[sect_cnt] = 0;
1538 }
1539
1540 sect_cnt++;
1541 }
1542 }
1543
1544 info->sector_count = sect_cnt;
1545 info->size = 1 << flash_read_uchar (info, FLASH_OFFSET_SIZE);
1546 /* multiply the size by the number of chips */
1547 info->size *= size_ratio;
1548 info->buffer_size = 1 << flash_read_ushort (info, 0,
1549 FLASH_OFFSET_BUFFER_SIZE);
1550 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1551 info->erase_blk_tout = tmp *
1552 (1 << flash_read_uchar (
1553 info, FLASH_OFFSET_EMAX_TOUT));
1554 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1555 (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1556 /* round up when converting to ms */
1557 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0);
1558 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1559 (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1560 /* round up when converting to ms */
1561 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0);
1562 info->flash_id = FLASH_MAN_CFI;
1563 if ((info->interface == FLASH_CFI_X8X16) &&
1564 (info->chipwidth == FLASH_CFI_BY8)) {
1565 /* XXX - Need to test on x8/x16 in parallel. */
1566 info->portwidth >>= 1;
1567 }
1568 }
1569
1570 flash_write_cmd (info, 0, 0, info->cmd_reset);
1571 return (info->size);
1572}
1573
1574/*-----------------------------------------------------------------------
1575 */
1576unsigned long flash_init (void)
1577{
1578 unsigned long size = 0;
1579 int i;
1580
1581#ifdef CFG_FLASH_PROTECTION
1582 char *s = getenv("unlock");
1583#endif
1584
1585 /* Init: no FLASHes known */
1586 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
1587 flash_info[i].flash_id = FLASH_UNKNOWN;
1588
1589 if (!flash_detect_legacy (bank_base[i], i))
1590 flash_get_size (bank_base[i], i);
1591 size += flash_info[i].size;
1592 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
1593#ifndef CFG_FLASH_QUIET_TEST
1594 printf ("## Unknown FLASH on Bank %d "
1595 "- Size = 0x%08lx = %ld MB\n",
1596 i+1, flash_info[i].size,
1597 flash_info[i].size << 20);
1598#endif /* CFG_FLASH_QUIET_TEST */
1599 }
1600#ifdef CFG_FLASH_PROTECTION
1601 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
1602 /*
1603 * Only the U-Boot image and it's environment
1604 * is protected, all other sectors are
1605 * unprotected (unlocked) if flash hardware
1606 * protection is used (CFG_FLASH_PROTECTION)
1607 * and the environment variable "unlock" is
1608 * set to "yes".
1609 */
1610 if (flash_info[i].legacy_unlock) {
1611 int k;
1612
1613 /*
1614 * Disable legacy_unlock temporarily,
1615 * since flash_real_protect would
1616 * relock all other sectors again
1617 * otherwise.
1618 */
1619 flash_info[i].legacy_unlock = 0;
1620
1621 /*
1622 * Legacy unlocking (e.g. Intel J3) ->
1623 * unlock only one sector. This will
1624 * unlock all sectors.
1625 */
1626 flash_real_protect (&flash_info[i], 0, 0);
1627
1628 flash_info[i].legacy_unlock = 1;
1629
1630 /*
1631 * Manually mark other sectors as
1632 * unlocked (unprotected)
1633 */
1634 for (k = 1; k < flash_info[i].sector_count; k++)
1635 flash_info[i].protect[k] = 0;
1636 } else {
1637 /*
1638 * No legancy unlocking -> unlock all sectors
1639 */
1640 flash_protect (FLAG_PROTECT_CLEAR,
1641 flash_info[i].start[0],
1642 flash_info[i].start[0]
1643 + flash_info[i].size - 1,
1644 &flash_info[i]);
1645 }
1646 }
1647#endif /* CFG_FLASH_PROTECTION */
1648 }
1649
1650 /* Monitor protection ON by default */
1651#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
1652 flash_protect (FLAG_PROTECT_SET,
1653 CFG_MONITOR_BASE,
1654 CFG_MONITOR_BASE + monitor_flash_len - 1,
1655 flash_get_info(CFG_MONITOR_BASE));
1656#endif
1657
1658 /* Environment protection ON by default */
1659#ifdef CFG_ENV_IS_IN_FLASH
1660 flash_protect (FLAG_PROTECT_SET,
1661 CFG_ENV_ADDR,
1662 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
1663 flash_get_info(CFG_ENV_ADDR));
1664#endif
1665
1666 /* Redundant environment protection ON by default */
1667#ifdef CFG_ENV_ADDR_REDUND
1668 flash_protect (FLAG_PROTECT_SET,
1669 CFG_ENV_ADDR_REDUND,
1670 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
1671 flash_get_info(CFG_ENV_ADDR_REDUND));
1672#endif
1673 return (size);
1674}
1675
1676#endif /* CFG_FLASH_CFI */
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