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1/*
2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
7 *
8 * Copyright (C) 2004
9 * Ed Okerson
10 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
32 */
33
34/* The DEBUG define must be before common to enable debugging */
35/* #define DEBUG */
36
37#include <common.h>
38#include <asm/processor.h>
39#include <asm/io.h>
40#include <asm/byteorder.h>
41#include <environment.h>
42#include <mtd/cfi_flash.h>
43
44/*
45 * This file implements a Common Flash Interface (CFI) driver for
46 * U-Boot.
47 *
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
51 *
52 * References
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
57 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
60 *
61 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
62 * reading and writing ... (yes there is such a Hardware).
63 */
64
65static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
66static uint flash_verbose = 1;
67
68flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
69
70/*
71 * Check if chip width is defined. If not, start detecting with 8bit.
72 */
73#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
74#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
75#endif
76
77/*
78 * 0xffff is an undefined value for the configuration register. When
79 * this value is returned, the configuration register shall not be
80 * written at all (default mode).
81 */
82static u16 cfi_flash_config_reg(int i)
83{
84#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
85 return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
86#else
87 return 0xffff;
88#endif
89}
90
91#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
92int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
93#endif
94
95static phys_addr_t __cfi_flash_bank_addr(int i)
96{
97 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
98}
99phys_addr_t cfi_flash_bank_addr(int i)
100 __attribute__((weak, alias("__cfi_flash_bank_addr")));
101
102static unsigned long __cfi_flash_bank_size(int i)
103{
104#ifdef CONFIG_SYS_FLASH_BANKS_SIZES
105 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
106#else
107 return 0;
108#endif
109}
110unsigned long cfi_flash_bank_size(int i)
111 __attribute__((weak, alias("__cfi_flash_bank_size")));
112
113static void __flash_write8(u8 value, void *addr)
114{
115 __raw_writeb(value, addr);
116}
117
118static void __flash_write16(u16 value, void *addr)
119{
120 __raw_writew(value, addr);
121}
122
123static void __flash_write32(u32 value, void *addr)
124{
125 __raw_writel(value, addr);
126}
127
128static void __flash_write64(u64 value, void *addr)
129{
130 /* No architectures currently implement __raw_writeq() */
131 *(volatile u64 *)addr = value;
132}
133
134static u8 __flash_read8(void *addr)
135{
136 return __raw_readb(addr);
137}
138
139static u16 __flash_read16(void *addr)
140{
141 return __raw_readw(addr);
142}
143
144static u32 __flash_read32(void *addr)
145{
146 return __raw_readl(addr);
147}
148
149static u64 __flash_read64(void *addr)
150{
151 /* No architectures currently implement __raw_readq() */
152 return *(volatile u64 *)addr;
153}
154
155#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
156void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
157void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
158void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
159void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
160u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
161u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
162u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
163u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
164#else
165#define flash_write8 __flash_write8
166#define flash_write16 __flash_write16
167#define flash_write32 __flash_write32
168#define flash_write64 __flash_write64
169#define flash_read8 __flash_read8
170#define flash_read16 __flash_read16
171#define flash_read32 __flash_read32
172#define flash_read64 __flash_read64
173#endif
174
175/*-----------------------------------------------------------------------
176 */
177#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
178flash_info_t *flash_get_info(ulong base)
179{
180 int i;
181 flash_info_t *info = NULL;
182
183 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
184 info = & flash_info[i];
185 if (info->size && info->start[0] <= base &&
186 base <= info->start[0] + info->size - 1)
187 break;
188 }
189
190 return info;
191}
192#endif
193
194unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
195{
196 if (sect != (info->sector_count - 1))
197 return info->start[sect + 1] - info->start[sect];
198 else
199 return info->start[0] + info->size - info->start[sect];
200}
201
202/*-----------------------------------------------------------------------
203 * create an address based on the offset and the port width
204 */
205static inline void *
206flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
207{
208 unsigned int byte_offset = offset * info->portwidth;
209
210 return (void *)(info->start[sect] + byte_offset);
211}
212
213static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
214 unsigned int offset, void *addr)
215{
216}
217
218/*-----------------------------------------------------------------------
219 * make a proper sized command based on the port and chip widths
220 */
221static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
222{
223 int i;
224 int cword_offset;
225 int cp_offset;
226#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
227 u32 cmd_le = cpu_to_le32(cmd);
228#endif
229 uchar val;
230 uchar *cp = (uchar *) cmdbuf;
231
232 for (i = info->portwidth; i > 0; i--){
233 cword_offset = (info->portwidth-i)%info->chipwidth;
234#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
235 cp_offset = info->portwidth - i;
236 val = *((uchar*)&cmd_le + cword_offset);
237#else
238 cp_offset = i - 1;
239 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
240#endif
241 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
242 }
243}
244
245#ifdef DEBUG
246/*-----------------------------------------------------------------------
247 * Debug support
248 */
249static void print_longlong (char *str, unsigned long long data)
250{
251 int i;
252 char *cp;
253
254 cp = (char *) &data;
255 for (i = 0; i < 8; i++)
256 sprintf (&str[i * 2], "%2.2x", *cp++);
257}
258
259static void flash_printqry (struct cfi_qry *qry)
260{
261 u8 *p = (u8 *)qry;
262 int x, y;
263
264 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
265 debug("%02x : ", x);
266 for (y = 0; y < 16; y++)
267 debug("%2.2x ", p[x + y]);
268 debug(" ");
269 for (y = 0; y < 16; y++) {
270 unsigned char c = p[x + y];
271 if (c >= 0x20 && c <= 0x7e)
272 debug("%c", c);
273 else
274 debug(".");
275 }
276 debug("\n");
277 }
278}
279#endif
280
281
282/*-----------------------------------------------------------------------
283 * read a character at a port width address
284 */
285static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
286{
287 uchar *cp;
288 uchar retval;
289
290 cp = flash_map (info, 0, offset);
291#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
292 retval = flash_read8(cp);
293#else
294 retval = flash_read8(cp + info->portwidth - 1);
295#endif
296 flash_unmap (info, 0, offset, cp);
297 return retval;
298}
299
300/*-----------------------------------------------------------------------
301 * read a word at a port width address, assume 16bit bus
302 */
303static inline ushort flash_read_word (flash_info_t * info, uint offset)
304{
305 ushort *addr, retval;
306
307 addr = flash_map (info, 0, offset);
308 retval = flash_read16 (addr);
309 flash_unmap (info, 0, offset, addr);
310 return retval;
311}
312
313
314/*-----------------------------------------------------------------------
315 * read a long word by picking the least significant byte of each maximum
316 * port size word. Swap for ppc format.
317 */
318static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
319 uint offset)
320{
321 uchar *addr;
322 ulong retval;
323
324#ifdef DEBUG
325 int x;
326#endif
327 addr = flash_map (info, sect, offset);
328
329#ifdef DEBUG
330 debug ("long addr is at %p info->portwidth = %d\n", addr,
331 info->portwidth);
332 for (x = 0; x < 4 * info->portwidth; x++) {
333 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
334 }
335#endif
336#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
337 retval = ((flash_read8(addr) << 16) |
338 (flash_read8(addr + info->portwidth) << 24) |
339 (flash_read8(addr + 2 * info->portwidth)) |
340 (flash_read8(addr + 3 * info->portwidth) << 8));
341#else
342 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
343 (flash_read8(addr + info->portwidth - 1) << 16) |
344 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
345 (flash_read8(addr + 3 * info->portwidth - 1)));
346#endif
347 flash_unmap(info, sect, offset, addr);
348
349 return retval;
350}
351
352/*
353 * Write a proper sized command to the correct address
354 */
355void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
356 uint offset, u32 cmd)
357{
358
359 void *addr;
360 cfiword_t cword;
361
362 addr = flash_map (info, sect, offset);
363 flash_make_cmd (info, cmd, &cword);
364 switch (info->portwidth) {
365 case FLASH_CFI_8BIT:
366 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
367 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
368 flash_write8(cword.c, addr);
369 break;
370 case FLASH_CFI_16BIT:
371 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
372 cmd, cword.w,
373 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
374 flash_write16(cword.w, addr);
375 break;
376 case FLASH_CFI_32BIT:
377 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
378 cmd, cword.l,
379 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
380 flash_write32(cword.l, addr);
381 break;
382 case FLASH_CFI_64BIT:
383#ifdef DEBUG
384 {
385 char str[20];
386
387 print_longlong (str, cword.ll);
388
389 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
390 addr, cmd, str,
391 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
392 }
393#endif
394 flash_write64(cword.ll, addr);
395 break;
396 }
397
398 /* Ensure all the instructions are fully finished */
399 sync();
400
401 flash_unmap(info, sect, offset, addr);
402}
403
404static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
405{
406 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
407 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
408}
409
410/*-----------------------------------------------------------------------
411 */
412static int flash_isequal (flash_info_t * info, flash_sect_t sect,
413 uint offset, uchar cmd)
414{
415 void *addr;
416 cfiword_t cword;
417 int retval;
418
419 addr = flash_map (info, sect, offset);
420 flash_make_cmd (info, cmd, &cword);
421
422 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
423 switch (info->portwidth) {
424 case FLASH_CFI_8BIT:
425 debug ("is= %x %x\n", flash_read8(addr), cword.c);
426 retval = (flash_read8(addr) == cword.c);
427 break;
428 case FLASH_CFI_16BIT:
429 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
430 retval = (flash_read16(addr) == cword.w);
431 break;
432 case FLASH_CFI_32BIT:
433 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
434 retval = (flash_read32(addr) == cword.l);
435 break;
436 case FLASH_CFI_64BIT:
437#ifdef DEBUG
438 {
439 char str1[20];
440 char str2[20];
441
442 print_longlong (str1, flash_read64(addr));
443 print_longlong (str2, cword.ll);
444 debug ("is= %s %s\n", str1, str2);
445 }
446#endif
447 retval = (flash_read64(addr) == cword.ll);
448 break;
449 default:
450 retval = 0;
451 break;
452 }
453 flash_unmap(info, sect, offset, addr);
454
455 return retval;
456}
457
458/*-----------------------------------------------------------------------
459 */
460static int flash_isset (flash_info_t * info, flash_sect_t sect,
461 uint offset, uchar cmd)
462{
463 void *addr;
464 cfiword_t cword;
465 int retval;
466
467 addr = flash_map (info, sect, offset);
468 flash_make_cmd (info, cmd, &cword);
469 switch (info->portwidth) {
470 case FLASH_CFI_8BIT:
471 retval = ((flash_read8(addr) & cword.c) == cword.c);
472 break;
473 case FLASH_CFI_16BIT:
474 retval = ((flash_read16(addr) & cword.w) == cword.w);
475 break;
476 case FLASH_CFI_32BIT:
477 retval = ((flash_read32(addr) & cword.l) == cword.l);
478 break;
479 case FLASH_CFI_64BIT:
480 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
481 break;
482 default:
483 retval = 0;
484 break;
485 }
486 flash_unmap(info, sect, offset, addr);
487
488 return retval;
489}
490
491/*-----------------------------------------------------------------------
492 */
493static int flash_toggle (flash_info_t * info, flash_sect_t sect,
494 uint offset, uchar cmd)
495{
496 void *addr;
497 cfiword_t cword;
498 int retval;
499
500 addr = flash_map (info, sect, offset);
501 flash_make_cmd (info, cmd, &cword);
502 switch (info->portwidth) {
503 case FLASH_CFI_8BIT:
504 retval = flash_read8(addr) != flash_read8(addr);
505 break;
506 case FLASH_CFI_16BIT:
507 retval = flash_read16(addr) != flash_read16(addr);
508 break;
509 case FLASH_CFI_32BIT:
510 retval = flash_read32(addr) != flash_read32(addr);
511 break;
512 case FLASH_CFI_64BIT:
513 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
514 (flash_read32(addr+4) != flash_read32(addr+4)) );
515 break;
516 default:
517 retval = 0;
518 break;
519 }
520 flash_unmap(info, sect, offset, addr);
521
522 return retval;
523}
524
525/*
526 * flash_is_busy - check to see if the flash is busy
527 *
528 * This routine checks the status of the chip and returns true if the
529 * chip is busy.
530 */
531static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
532{
533 int retval;
534
535 switch (info->vendor) {
536 case CFI_CMDSET_INTEL_PROG_REGIONS:
537 case CFI_CMDSET_INTEL_STANDARD:
538 case CFI_CMDSET_INTEL_EXTENDED:
539 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
540 break;
541 case CFI_CMDSET_AMD_STANDARD:
542 case CFI_CMDSET_AMD_EXTENDED:
543#ifdef CONFIG_FLASH_CFI_LEGACY
544 case CFI_CMDSET_AMD_LEGACY:
545#endif
546 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
547 break;
548 default:
549 retval = 0;
550 }
551 debug ("flash_is_busy: %d\n", retval);
552 return retval;
553}
554
555/*-----------------------------------------------------------------------
556 * wait for XSR.7 to be set. Time out with an error if it does not.
557 * This routine does not set the flash to read-array mode.
558 */
559static int flash_status_check (flash_info_t * info, flash_sect_t sector,
560 ulong tout, char *prompt)
561{
562 ulong start;
563
564#if CONFIG_SYS_HZ != 1000
565 if ((ulong)CONFIG_SYS_HZ > 100000)
566 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
567 else
568 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
569#endif
570
571 /* Wait for command completion */
572 reset_timer();
573 start = get_timer (0);
574 while (flash_is_busy (info, sector)) {
575 if (get_timer (start) > tout) {
576 printf ("Flash %s timeout at address %lx data %lx\n",
577 prompt, info->start[sector],
578 flash_read_long (info, sector, 0));
579 flash_write_cmd (info, sector, 0, info->cmd_reset);
580 return ERR_TIMOUT;
581 }
582 udelay (1); /* also triggers watchdog */
583 }
584 return ERR_OK;
585}
586
587/*-----------------------------------------------------------------------
588 * Wait for XSR.7 to be set, if it times out print an error, otherwise
589 * do a full status check.
590 *
591 * This routine sets the flash to read-array mode.
592 */
593static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
594 ulong tout, char *prompt)
595{
596 int retcode;
597
598 retcode = flash_status_check (info, sector, tout, prompt);
599 switch (info->vendor) {
600 case CFI_CMDSET_INTEL_PROG_REGIONS:
601 case CFI_CMDSET_INTEL_EXTENDED:
602 case CFI_CMDSET_INTEL_STANDARD:
603 if ((retcode != ERR_OK)
604 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
605 retcode = ERR_INVAL;
606 printf ("Flash %s error at address %lx\n", prompt,
607 info->start[sector]);
608 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
609 FLASH_STATUS_PSLBS)) {
610 puts ("Command Sequence Error.\n");
611 } else if (flash_isset (info, sector, 0,
612 FLASH_STATUS_ECLBS)) {
613 puts ("Block Erase Error.\n");
614 retcode = ERR_NOT_ERASED;
615 } else if (flash_isset (info, sector, 0,
616 FLASH_STATUS_PSLBS)) {
617 puts ("Locking Error\n");
618 }
619 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
620 puts ("Block locked.\n");
621 retcode = ERR_PROTECTED;
622 }
623 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
624 puts ("Vpp Low Error.\n");
625 }
626 flash_write_cmd (info, sector, 0, info->cmd_reset);
627 break;
628 default:
629 break;
630 }
631 return retcode;
632}
633
634static int use_flash_status_poll(flash_info_t *info)
635{
636#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
637 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
638 info->vendor == CFI_CMDSET_AMD_STANDARD)
639 return 1;
640#endif
641 return 0;
642}
643
644static int flash_status_poll(flash_info_t *info, void *src, void *dst,
645 ulong tout, char *prompt)
646{
647#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
648 ulong start;
649 int ready;
650
651#if CONFIG_SYS_HZ != 1000
652 if ((ulong)CONFIG_SYS_HZ > 100000)
653 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
654 else
655 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
656#endif
657
658 /* Wait for command completion */
659 reset_timer();
660 start = get_timer(0);
661 while (1) {
662 switch (info->portwidth) {
663 case FLASH_CFI_8BIT:
664 ready = flash_read8(dst) == flash_read8(src);
665 break;
666 case FLASH_CFI_16BIT:
667 ready = flash_read16(dst) == flash_read16(src);
668 break;
669 case FLASH_CFI_32BIT:
670 ready = flash_read32(dst) == flash_read32(src);
671 break;
672 case FLASH_CFI_64BIT:
673 ready = flash_read64(dst) == flash_read64(src);
674 break;
675 default:
676 ready = 0;
677 break;
678 }
679 if (ready)
680 break;
681 if (get_timer(start) > tout) {
682 printf("Flash %s timeout at address %lx data %lx\n",
683 prompt, (ulong)dst, (ulong)flash_read8(dst));
684 return ERR_TIMOUT;
685 }
686 udelay(1); /* also triggers watchdog */
687 }
688#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
689 return ERR_OK;
690}
691
692/*-----------------------------------------------------------------------
693 */
694static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
695{
696#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
697 unsigned short w;
698 unsigned int l;
699 unsigned long long ll;
700#endif
701
702 switch (info->portwidth) {
703 case FLASH_CFI_8BIT:
704 cword->c = c;
705 break;
706 case FLASH_CFI_16BIT:
707#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
708 w = c;
709 w <<= 8;
710 cword->w = (cword->w >> 8) | w;
711#else
712 cword->w = (cword->w << 8) | c;
713#endif
714 break;
715 case FLASH_CFI_32BIT:
716#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
717 l = c;
718 l <<= 24;
719 cword->l = (cword->l >> 8) | l;
720#else
721 cword->l = (cword->l << 8) | c;
722#endif
723 break;
724 case FLASH_CFI_64BIT:
725#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
726 ll = c;
727 ll <<= 56;
728 cword->ll = (cword->ll >> 8) | ll;
729#else
730 cword->ll = (cword->ll << 8) | c;
731#endif
732 break;
733 }
734}
735
736/*
737 * Loop through the sector table starting from the previously found sector.
738 * Searches forwards or backwards, dependent on the passed address.
739 */
740static flash_sect_t find_sector (flash_info_t * info, ulong addr)
741{
742 static flash_sect_t saved_sector = 0; /* previously found sector */
743 flash_sect_t sector = saved_sector;
744
745 while ((info->start[sector] < addr)
746 && (sector < info->sector_count - 1))
747 sector++;
748 while ((info->start[sector] > addr) && (sector > 0))
749 /*
750 * also decrements the sector in case of an overshot
751 * in the first loop
752 */
753 sector--;
754
755 saved_sector = sector;
756 return sector;
757}
758
759/*-----------------------------------------------------------------------
760 */
761static int flash_write_cfiword (flash_info_t * info, ulong dest,
762 cfiword_t cword)
763{
764 void *dstaddr = (void *)dest;
765 int flag;
766 flash_sect_t sect = 0;
767 char sect_found = 0;
768
769 /* Check if Flash is (sufficiently) erased */
770 switch (info->portwidth) {
771 case FLASH_CFI_8BIT:
772 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
773 break;
774 case FLASH_CFI_16BIT:
775 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
776 break;
777 case FLASH_CFI_32BIT:
778 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
779 break;
780 case FLASH_CFI_64BIT:
781 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
782 break;
783 default:
784 flag = 0;
785 break;
786 }
787 if (!flag)
788 return ERR_NOT_ERASED;
789
790 /* Disable interrupts which might cause a timeout here */
791 flag = disable_interrupts ();
792
793 switch (info->vendor) {
794 case CFI_CMDSET_INTEL_PROG_REGIONS:
795 case CFI_CMDSET_INTEL_EXTENDED:
796 case CFI_CMDSET_INTEL_STANDARD:
797 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
798 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
799 break;
800 case CFI_CMDSET_AMD_EXTENDED:
801 case CFI_CMDSET_AMD_STANDARD:
802 sect = find_sector(info, dest);
803 flash_unlock_seq (info, sect);
804 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
805 sect_found = 1;
806 break;
807#ifdef CONFIG_FLASH_CFI_LEGACY
808 case CFI_CMDSET_AMD_LEGACY:
809 sect = find_sector(info, dest);
810 flash_unlock_seq (info, 0);
811 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
812 sect_found = 1;
813 break;
814#endif
815 }
816
817 switch (info->portwidth) {
818 case FLASH_CFI_8BIT:
819 flash_write8(cword.c, dstaddr);
820 break;
821 case FLASH_CFI_16BIT:
822 flash_write16(cword.w, dstaddr);
823 break;
824 case FLASH_CFI_32BIT:
825 flash_write32(cword.l, dstaddr);
826 break;
827 case FLASH_CFI_64BIT:
828 flash_write64(cword.ll, dstaddr);
829 break;
830 }
831
832 /* re-enable interrupts if necessary */
833 if (flag)
834 enable_interrupts ();
835
836 if (!sect_found)
837 sect = find_sector (info, dest);
838
839 if (use_flash_status_poll(info))
840 return flash_status_poll(info, &cword, dstaddr,
841 info->write_tout, "write");
842 else
843 return flash_full_status_check(info, sect,
844 info->write_tout, "write");
845}
846
847#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
848
849static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
850 int len)
851{
852 flash_sect_t sector;
853 int cnt;
854 int retcode;
855 void *src = cp;
856 void *dst = (void *)dest;
857 void *dst2 = dst;
858 int flag = 0;
859 uint offset = 0;
860 unsigned int shift;
861 uchar write_cmd;
862
863 switch (info->portwidth) {
864 case FLASH_CFI_8BIT:
865 shift = 0;
866 break;
867 case FLASH_CFI_16BIT:
868 shift = 1;
869 break;
870 case FLASH_CFI_32BIT:
871 shift = 2;
872 break;
873 case FLASH_CFI_64BIT:
874 shift = 3;
875 break;
876 default:
877 retcode = ERR_INVAL;
878 goto out_unmap;
879 }
880
881 cnt = len >> shift;
882
883 while ((cnt-- > 0) && (flag == 0)) {
884 switch (info->portwidth) {
885 case FLASH_CFI_8BIT:
886 flag = ((flash_read8(dst2) & flash_read8(src)) ==
887 flash_read8(src));
888 src += 1, dst2 += 1;
889 break;
890 case FLASH_CFI_16BIT:
891 flag = ((flash_read16(dst2) & flash_read16(src)) ==
892 flash_read16(src));
893 src += 2, dst2 += 2;
894 break;
895 case FLASH_CFI_32BIT:
896 flag = ((flash_read32(dst2) & flash_read32(src)) ==
897 flash_read32(src));
898 src += 4, dst2 += 4;
899 break;
900 case FLASH_CFI_64BIT:
901 flag = ((flash_read64(dst2) & flash_read64(src)) ==
902 flash_read64(src));
903 src += 8, dst2 += 8;
904 break;
905 }
906 }
907 if (!flag) {
908 retcode = ERR_NOT_ERASED;
909 goto out_unmap;
910 }
911
912 src = cp;
913 sector = find_sector (info, dest);
914
915 switch (info->vendor) {
916 case CFI_CMDSET_INTEL_PROG_REGIONS:
917 case CFI_CMDSET_INTEL_STANDARD:
918 case CFI_CMDSET_INTEL_EXTENDED:
919 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
920 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
921 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
922 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
923 flash_write_cmd (info, sector, 0, write_cmd);
924 retcode = flash_status_check (info, sector,
925 info->buffer_write_tout,
926 "write to buffer");
927 if (retcode == ERR_OK) {
928 /* reduce the number of loops by the width of
929 * the port */
930 cnt = len >> shift;
931 flash_write_cmd (info, sector, 0, cnt - 1);
932 while (cnt-- > 0) {
933 switch (info->portwidth) {
934 case FLASH_CFI_8BIT:
935 flash_write8(flash_read8(src), dst);
936 src += 1, dst += 1;
937 break;
938 case FLASH_CFI_16BIT:
939 flash_write16(flash_read16(src), dst);
940 src += 2, dst += 2;
941 break;
942 case FLASH_CFI_32BIT:
943 flash_write32(flash_read32(src), dst);
944 src += 4, dst += 4;
945 break;
946 case FLASH_CFI_64BIT:
947 flash_write64(flash_read64(src), dst);
948 src += 8, dst += 8;
949 break;
950 default:
951 retcode = ERR_INVAL;
952 goto out_unmap;
953 }
954 }
955 flash_write_cmd (info, sector, 0,
956 FLASH_CMD_WRITE_BUFFER_CONFIRM);
957 retcode = flash_full_status_check (
958 info, sector, info->buffer_write_tout,
959 "buffer write");
960 }
961
962 break;
963
964 case CFI_CMDSET_AMD_STANDARD:
965 case CFI_CMDSET_AMD_EXTENDED:
966 flash_unlock_seq(info,0);
967
968#ifdef CONFIG_FLASH_SPANSION_S29WS_N
969 offset = ((unsigned long)dst - info->start[sector]) >> shift;
970#endif
971 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
972 cnt = len >> shift;
973 flash_write_cmd(info, sector, offset, cnt - 1);
974
975 switch (info->portwidth) {
976 case FLASH_CFI_8BIT:
977 while (cnt-- > 0) {
978 flash_write8(flash_read8(src), dst);
979 src += 1, dst += 1;
980 }
981 break;
982 case FLASH_CFI_16BIT:
983 while (cnt-- > 0) {
984 flash_write16(flash_read16(src), dst);
985 src += 2, dst += 2;
986 }
987 break;
988 case FLASH_CFI_32BIT:
989 while (cnt-- > 0) {
990 flash_write32(flash_read32(src), dst);
991 src += 4, dst += 4;
992 }
993 break;
994 case FLASH_CFI_64BIT:
995 while (cnt-- > 0) {
996 flash_write64(flash_read64(src), dst);
997 src += 8, dst += 8;
998 }
999 break;
1000 default:
1001 retcode = ERR_INVAL;
1002 goto out_unmap;
1003 }
1004
1005 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1006 if (use_flash_status_poll(info))
1007 retcode = flash_status_poll(info, src - (1 << shift),
1008 dst - (1 << shift),
1009 info->buffer_write_tout,
1010 "buffer write");
1011 else
1012 retcode = flash_full_status_check(info, sector,
1013 info->buffer_write_tout,
1014 "buffer write");
1015 break;
1016
1017 default:
1018 debug ("Unknown Command Set\n");
1019 retcode = ERR_INVAL;
1020 break;
1021 }
1022
1023out_unmap:
1024 return retcode;
1025}
1026#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1027
1028
1029/*-----------------------------------------------------------------------
1030 */
1031int flash_erase (flash_info_t * info, int s_first, int s_last)
1032{
1033 int rcode = 0;
1034 int prot;
1035 flash_sect_t sect;
1036 int st;
1037
1038 if (info->flash_id != FLASH_MAN_CFI) {
1039 puts ("Can't erase unknown flash type - aborted\n");
1040 return 1;
1041 }
1042 if ((s_first < 0) || (s_first > s_last)) {
1043 puts ("- no sectors to erase\n");
1044 return 1;
1045 }
1046
1047 prot = 0;
1048 for (sect = s_first; sect <= s_last; ++sect) {
1049 if (info->protect[sect]) {
1050 prot++;
1051 }
1052 }
1053 if (prot) {
1054 printf ("- Warning: %d protected sectors will not be erased!\n",
1055 prot);
1056 } else if (flash_verbose) {
1057 putc ('\n');
1058 }
1059
1060
1061 for (sect = s_first; sect <= s_last; sect++) {
1062 if (info->protect[sect] == 0) { /* not protected */
1063 switch (info->vendor) {
1064 case CFI_CMDSET_INTEL_PROG_REGIONS:
1065 case CFI_CMDSET_INTEL_STANDARD:
1066 case CFI_CMDSET_INTEL_EXTENDED:
1067 flash_write_cmd (info, sect, 0,
1068 FLASH_CMD_CLEAR_STATUS);
1069 flash_write_cmd (info, sect, 0,
1070 FLASH_CMD_BLOCK_ERASE);
1071 flash_write_cmd (info, sect, 0,
1072 FLASH_CMD_ERASE_CONFIRM);
1073 break;
1074 case CFI_CMDSET_AMD_STANDARD:
1075 case CFI_CMDSET_AMD_EXTENDED:
1076 flash_unlock_seq (info, sect);
1077 flash_write_cmd (info, sect,
1078 info->addr_unlock1,
1079 AMD_CMD_ERASE_START);
1080 flash_unlock_seq (info, sect);
1081 flash_write_cmd (info, sect, 0,
1082 AMD_CMD_ERASE_SECTOR);
1083 break;
1084#ifdef CONFIG_FLASH_CFI_LEGACY
1085 case CFI_CMDSET_AMD_LEGACY:
1086 flash_unlock_seq (info, 0);
1087 flash_write_cmd (info, 0, info->addr_unlock1,
1088 AMD_CMD_ERASE_START);
1089 flash_unlock_seq (info, 0);
1090 flash_write_cmd (info, sect, 0,
1091 AMD_CMD_ERASE_SECTOR);
1092 break;
1093#endif
1094 default:
1095 debug ("Unkown flash vendor %d\n",
1096 info->vendor);
1097 break;
1098 }
1099
1100 if (use_flash_status_poll(info)) {
1101 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
1102 void *dest;
1103 dest = flash_map(info, sect, 0);
1104 st = flash_status_poll(info, &cword, dest,
1105 info->erase_blk_tout, "erase");
1106 flash_unmap(info, sect, 0, dest);
1107 } else
1108 st = flash_full_status_check(info, sect,
1109 info->erase_blk_tout,
1110 "erase");
1111 if (st)
1112 rcode = 1;
1113 else if (flash_verbose)
1114 putc ('.');
1115 }
1116 }
1117
1118 if (flash_verbose)
1119 puts (" done\n");
1120
1121 return rcode;
1122}
1123
1124#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1125static int sector_erased(flash_info_t *info, int i)
1126{
1127 int k;
1128 int size;
1129 u32 *flash;
1130
1131 /*
1132 * Check if whole sector is erased
1133 */
1134 size = flash_sector_size(info, i);
1135 flash = (u32 *)info->start[i];
1136 /* divide by 4 for longword access */
1137 size = size >> 2;
1138
1139 for (k = 0; k < size; k++) {
1140 if (flash_read32(flash++) != 0xffffffff)
1141 return 0; /* not erased */
1142 }
1143
1144 return 1; /* erased */
1145}
1146#endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1147
1148void flash_print_info (flash_info_t * info)
1149{
1150 int i;
1151
1152 if (info->flash_id != FLASH_MAN_CFI) {
1153 puts ("missing or unknown FLASH type\n");
1154 return;
1155 }
1156
1157 printf ("%s FLASH (%d x %d)",
1158 info->name,
1159 (info->portwidth << 3), (info->chipwidth << 3));
1160 if (info->size < 1024*1024)
1161 printf (" Size: %ld kB in %d Sectors\n",
1162 info->size >> 10, info->sector_count);
1163 else
1164 printf (" Size: %ld MB in %d Sectors\n",
1165 info->size >> 20, info->sector_count);
1166 printf (" ");
1167 switch (info->vendor) {
1168 case CFI_CMDSET_INTEL_PROG_REGIONS:
1169 printf ("Intel Prog Regions");
1170 break;
1171 case CFI_CMDSET_INTEL_STANDARD:
1172 printf ("Intel Standard");
1173 break;
1174 case CFI_CMDSET_INTEL_EXTENDED:
1175 printf ("Intel Extended");
1176 break;
1177 case CFI_CMDSET_AMD_STANDARD:
1178 printf ("AMD Standard");
1179 break;
1180 case CFI_CMDSET_AMD_EXTENDED:
1181 printf ("AMD Extended");
1182 break;
1183#ifdef CONFIG_FLASH_CFI_LEGACY
1184 case CFI_CMDSET_AMD_LEGACY:
1185 printf ("AMD Legacy");
1186 break;
1187#endif
1188 default:
1189 printf ("Unknown (%d)", info->vendor);
1190 break;
1191 }
1192 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1193 info->manufacturer_id);
1194 printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1195 info->device_id);
1196 if (info->device_id == 0x7E) {
1197 printf("%04X", info->device_id2);
1198 }
1199 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1200 info->erase_blk_tout,
1201 info->write_tout);
1202 if (info->buffer_size > 1) {
1203 printf (" Buffer write timeout: %ld ms, "
1204 "buffer size: %d bytes\n",
1205 info->buffer_write_tout,
1206 info->buffer_size);
1207 }
1208
1209 puts ("\n Sector Start Addresses:");
1210 for (i = 0; i < info->sector_count; ++i) {
1211 if (ctrlc())
1212 break;
1213 if ((i % 5) == 0)
1214 putc('\n');
1215#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1216 /* print empty and read-only info */
1217 printf (" %08lX %c %s ",
1218 info->start[i],
1219 sector_erased(info, i) ? 'E' : ' ',
1220 info->protect[i] ? "RO" : " ");
1221#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1222 printf (" %08lX %s ",
1223 info->start[i],
1224 info->protect[i] ? "RO" : " ");
1225#endif
1226 }
1227 putc ('\n');
1228 return;
1229}
1230
1231/*-----------------------------------------------------------------------
1232 * This is used in a few places in write_buf() to show programming
1233 * progress. Making it a function is nasty because it needs to do side
1234 * effect updates to digit and dots. Repeated code is nasty too, so
1235 * we define it once here.
1236 */
1237#ifdef CONFIG_FLASH_SHOW_PROGRESS
1238#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1239 if (flash_verbose) { \
1240 dots -= dots_sub; \
1241 if ((scale > 0) && (dots <= 0)) { \
1242 if ((digit % 5) == 0) \
1243 printf ("%d", digit / 5); \
1244 else \
1245 putc ('.'); \
1246 digit--; \
1247 dots += scale; \
1248 } \
1249 }
1250#else
1251#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1252#endif
1253
1254/*-----------------------------------------------------------------------
1255 * Copy memory to flash, returns:
1256 * 0 - OK
1257 * 1 - write timeout
1258 * 2 - Flash not erased
1259 */
1260int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1261{
1262 ulong wp;
1263 uchar *p;
1264 int aln;
1265 cfiword_t cword;
1266 int i, rc;
1267#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1268 int buffered_size;
1269#endif
1270#ifdef CONFIG_FLASH_SHOW_PROGRESS
1271 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1272 int scale = 0;
1273 int dots = 0;
1274
1275 /*
1276 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1277 */
1278 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1279 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1280 CONFIG_FLASH_SHOW_PROGRESS);
1281 }
1282#endif
1283
1284 /* get lower aligned address */
1285 wp = (addr & ~(info->portwidth - 1));
1286
1287 /* handle unaligned start */
1288 if ((aln = addr - wp) != 0) {
1289 cword.l = 0;
1290 p = (uchar *)wp;
1291 for (i = 0; i < aln; ++i)
1292 flash_add_byte (info, &cword, flash_read8(p + i));
1293
1294 for (; (i < info->portwidth) && (cnt > 0); i++) {
1295 flash_add_byte (info, &cword, *src++);
1296 cnt--;
1297 }
1298 for (; (cnt == 0) && (i < info->portwidth); ++i)
1299 flash_add_byte (info, &cword, flash_read8(p + i));
1300
1301 rc = flash_write_cfiword (info, wp, cword);
1302 if (rc != 0)
1303 return rc;
1304
1305 wp += i;
1306 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1307 }
1308
1309 /* handle the aligned part */
1310#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1311 buffered_size = (info->portwidth / info->chipwidth);
1312 buffered_size *= info->buffer_size;
1313 while (cnt >= info->portwidth) {
1314 /* prohibit buffer write when buffer_size is 1 */
1315 if (info->buffer_size == 1) {
1316 cword.l = 0;
1317 for (i = 0; i < info->portwidth; i++)
1318 flash_add_byte (info, &cword, *src++);
1319 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1320 return rc;
1321 wp += info->portwidth;
1322 cnt -= info->portwidth;
1323 continue;
1324 }
1325
1326 /* write buffer until next buffered_size aligned boundary */
1327 i = buffered_size - (wp % buffered_size);
1328 if (i > cnt)
1329 i = cnt;
1330 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1331 return rc;
1332 i -= i & (info->portwidth - 1);
1333 wp += i;
1334 src += i;
1335 cnt -= i;
1336 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1337 }
1338#else
1339 while (cnt >= info->portwidth) {
1340 cword.l = 0;
1341 for (i = 0; i < info->portwidth; i++) {
1342 flash_add_byte (info, &cword, *src++);
1343 }
1344 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1345 return rc;
1346 wp += info->portwidth;
1347 cnt -= info->portwidth;
1348 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1349 }
1350#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1351
1352 if (cnt == 0) {
1353 return (0);
1354 }
1355
1356 /*
1357 * handle unaligned tail bytes
1358 */
1359 cword.l = 0;
1360 p = (uchar *)wp;
1361 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1362 flash_add_byte (info, &cword, *src++);
1363 --cnt;
1364 }
1365 for (; i < info->portwidth; ++i)
1366 flash_add_byte (info, &cword, flash_read8(p + i));
1367
1368 return flash_write_cfiword (info, wp, cword);
1369}
1370
1371/*-----------------------------------------------------------------------
1372 */
1373#ifdef CONFIG_SYS_FLASH_PROTECTION
1374
1375int flash_real_protect (flash_info_t * info, long sector, int prot)
1376{
1377 int retcode = 0;
1378
1379 switch (info->vendor) {
1380 case CFI_CMDSET_INTEL_PROG_REGIONS:
1381 case CFI_CMDSET_INTEL_STANDARD:
1382 case CFI_CMDSET_INTEL_EXTENDED:
1383 /*
1384 * see errata called
1385 * "Numonyx Axcell P33/P30 Specification Update" :)
1386 */
1387 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
1388 if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
1389 prot)) {
1390 /*
1391 * cmd must come before FLASH_CMD_PROTECT + 20us
1392 * Disable interrupts which might cause a timeout here.
1393 */
1394 int flag = disable_interrupts ();
1395 unsigned short cmd;
1396
1397 if (prot)
1398 cmd = FLASH_CMD_PROTECT_SET;
1399 else
1400 cmd = FLASH_CMD_PROTECT_CLEAR;
1401
1402 flash_write_cmd (info, sector, 0,
1403 FLASH_CMD_PROTECT);
1404 flash_write_cmd (info, sector, 0, cmd);
1405 /* re-enable interrupts if necessary */
1406 if (flag)
1407 enable_interrupts ();
1408 }
1409 break;
1410 case CFI_CMDSET_AMD_EXTENDED:
1411 case CFI_CMDSET_AMD_STANDARD:
1412 /* U-Boot only checks the first byte */
1413 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1414 if (prot) {
1415 flash_unlock_seq (info, 0);
1416 flash_write_cmd (info, 0,
1417 info->addr_unlock1,
1418 ATM_CMD_SOFTLOCK_START);
1419 flash_unlock_seq (info, 0);
1420 flash_write_cmd (info, sector, 0,
1421 ATM_CMD_LOCK_SECT);
1422 } else {
1423 flash_write_cmd (info, 0,
1424 info->addr_unlock1,
1425 AMD_CMD_UNLOCK_START);
1426 if (info->device_id == ATM_ID_BV6416)
1427 flash_write_cmd (info, sector,
1428 0, ATM_CMD_UNLOCK_SECT);
1429 }
1430 }
1431 break;
1432#ifdef CONFIG_FLASH_CFI_LEGACY
1433 case CFI_CMDSET_AMD_LEGACY:
1434 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1435 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1436 if (prot)
1437 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1438 else
1439 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1440#endif
1441 };
1442
1443 /*
1444 * Flash needs to be in status register read mode for
1445 * flash_full_status_check() to work correctly
1446 */
1447 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1448 if ((retcode =
1449 flash_full_status_check (info, sector, info->erase_blk_tout,
1450 prot ? "protect" : "unprotect")) == 0) {
1451
1452 info->protect[sector] = prot;
1453
1454 /*
1455 * On some of Intel's flash chips (marked via legacy_unlock)
1456 * unprotect unprotects all locking.
1457 */
1458 if ((prot == 0) && (info->legacy_unlock)) {
1459 flash_sect_t i;
1460
1461 for (i = 0; i < info->sector_count; i++) {
1462 if (info->protect[i])
1463 flash_real_protect (info, i, 1);
1464 }
1465 }
1466 }
1467 return retcode;
1468}
1469
1470/*-----------------------------------------------------------------------
1471 * flash_read_user_serial - read the OneTimeProgramming cells
1472 */
1473void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1474 int len)
1475{
1476 uchar *src;
1477 uchar *dst;
1478
1479 dst = buffer;
1480 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1481 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1482 memcpy (dst, src + offset, len);
1483 flash_write_cmd (info, 0, 0, info->cmd_reset);
1484 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1485}
1486
1487/*
1488 * flash_read_factory_serial - read the device Id from the protection area
1489 */
1490void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1491 int len)
1492{
1493 uchar *src;
1494
1495 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1496 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1497 memcpy (buffer, src + offset, len);
1498 flash_write_cmd (info, 0, 0, info->cmd_reset);
1499 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1500}
1501
1502#endif /* CONFIG_SYS_FLASH_PROTECTION */
1503
1504/*-----------------------------------------------------------------------
1505 * Reverse the order of the erase regions in the CFI QRY structure.
1506 * This is needed for chips that are either a) correctly detected as
1507 * top-boot, or b) buggy.
1508 */
1509static void cfi_reverse_geometry(struct cfi_qry *qry)
1510{
1511 unsigned int i, j;
1512 u32 tmp;
1513
1514 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1515 tmp = qry->erase_region_info[i];
1516 qry->erase_region_info[i] = qry->erase_region_info[j];
1517 qry->erase_region_info[j] = tmp;
1518 }
1519}
1520
1521/*-----------------------------------------------------------------------
1522 * read jedec ids from device and set corresponding fields in info struct
1523 *
1524 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1525 *
1526 */
1527static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1528{
1529 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1530 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1531 udelay(1000); /* some flash are slow to respond */
1532 info->manufacturer_id = flash_read_uchar (info,
1533 FLASH_OFFSET_MANUFACTURER_ID);
1534 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1535 flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
1536 flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
1537 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1538}
1539
1540static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1541{
1542 info->cmd_reset = FLASH_CMD_RESET;
1543
1544 cmdset_intel_read_jedec_ids(info);
1545 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1546
1547#ifdef CONFIG_SYS_FLASH_PROTECTION
1548 /* read legacy lock/unlock bit from intel flash */
1549 if (info->ext_addr) {
1550 info->legacy_unlock = flash_read_uchar (info,
1551 info->ext_addr + 5) & 0x08;
1552 }
1553#endif
1554
1555 return 0;
1556}
1557
1558static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1559{
1560 ushort bankId = 0;
1561 uchar manuId;
1562
1563 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1564 flash_unlock_seq(info, 0);
1565 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1566 udelay(1000); /* some flash are slow to respond */
1567
1568 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1569 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1570 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1571 bankId += 0x100;
1572 manuId = flash_read_uchar (info,
1573 bankId | FLASH_OFFSET_MANUFACTURER_ID);
1574 }
1575 info->manufacturer_id = manuId;
1576
1577 switch (info->chipwidth){
1578 case FLASH_CFI_8BIT:
1579 info->device_id = flash_read_uchar (info,
1580 FLASH_OFFSET_DEVICE_ID);
1581 if (info->device_id == 0x7E) {
1582 /* AMD 3-byte (expanded) device ids */
1583 info->device_id2 = flash_read_uchar (info,
1584 FLASH_OFFSET_DEVICE_ID2);
1585 info->device_id2 <<= 8;
1586 info->device_id2 |= flash_read_uchar (info,
1587 FLASH_OFFSET_DEVICE_ID3);
1588 }
1589 break;
1590 case FLASH_CFI_16BIT:
1591 info->device_id = flash_read_word (info,
1592 FLASH_OFFSET_DEVICE_ID);
1593 break;
1594 default:
1595 break;
1596 }
1597 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1598}
1599
1600static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1601{
1602 info->cmd_reset = AMD_CMD_RESET;
1603
1604 cmdset_amd_read_jedec_ids(info);
1605 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1606
1607 return 0;
1608}
1609
1610#ifdef CONFIG_FLASH_CFI_LEGACY
1611static void flash_read_jedec_ids (flash_info_t * info)
1612{
1613 info->manufacturer_id = 0;
1614 info->device_id = 0;
1615 info->device_id2 = 0;
1616
1617 switch (info->vendor) {
1618 case CFI_CMDSET_INTEL_PROG_REGIONS:
1619 case CFI_CMDSET_INTEL_STANDARD:
1620 case CFI_CMDSET_INTEL_EXTENDED:
1621 cmdset_intel_read_jedec_ids(info);
1622 break;
1623 case CFI_CMDSET_AMD_STANDARD:
1624 case CFI_CMDSET_AMD_EXTENDED:
1625 cmdset_amd_read_jedec_ids(info);
1626 break;
1627 default:
1628 break;
1629 }
1630}
1631
1632/*-----------------------------------------------------------------------
1633 * Call board code to request info about non-CFI flash.
1634 * board_flash_get_legacy needs to fill in at least:
1635 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1636 */
1637static int flash_detect_legacy(phys_addr_t base, int banknum)
1638{
1639 flash_info_t *info = &flash_info[banknum];
1640
1641 if (board_flash_get_legacy(base, banknum, info)) {
1642 /* board code may have filled info completely. If not, we
1643 use JEDEC ID probing. */
1644 if (!info->vendor) {
1645 int modes[] = {
1646 CFI_CMDSET_AMD_STANDARD,
1647 CFI_CMDSET_INTEL_STANDARD
1648 };
1649 int i;
1650
1651 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1652 info->vendor = modes[i];
1653 info->start[0] =
1654 (ulong)map_physmem(base,
1655 info->portwidth,
1656 MAP_NOCACHE);
1657 if (info->portwidth == FLASH_CFI_8BIT
1658 && info->interface == FLASH_CFI_X8X16) {
1659 info->addr_unlock1 = 0x2AAA;
1660 info->addr_unlock2 = 0x5555;
1661 } else {
1662 info->addr_unlock1 = 0x5555;
1663 info->addr_unlock2 = 0x2AAA;
1664 }
1665 flash_read_jedec_ids(info);
1666 debug("JEDEC PROBE: ID %x %x %x\n",
1667 info->manufacturer_id,
1668 info->device_id,
1669 info->device_id2);
1670 if (jedec_flash_match(info, info->start[0]))
1671 break;
1672 else
1673 unmap_physmem((void *)info->start[0],
1674 MAP_NOCACHE);
1675 }
1676 }
1677
1678 switch(info->vendor) {
1679 case CFI_CMDSET_INTEL_PROG_REGIONS:
1680 case CFI_CMDSET_INTEL_STANDARD:
1681 case CFI_CMDSET_INTEL_EXTENDED:
1682 info->cmd_reset = FLASH_CMD_RESET;
1683 break;
1684 case CFI_CMDSET_AMD_STANDARD:
1685 case CFI_CMDSET_AMD_EXTENDED:
1686 case CFI_CMDSET_AMD_LEGACY:
1687 info->cmd_reset = AMD_CMD_RESET;
1688 break;
1689 }
1690 info->flash_id = FLASH_MAN_CFI;
1691 return 1;
1692 }
1693 return 0; /* use CFI */
1694}
1695#else
1696static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1697{
1698 return 0; /* use CFI */
1699}
1700#endif
1701
1702/*-----------------------------------------------------------------------
1703 * detect if flash is compatible with the Common Flash Interface (CFI)
1704 * http://www.jedec.org/download/search/jesd68.pdf
1705 */
1706static void flash_read_cfi (flash_info_t *info, void *buf,
1707 unsigned int start, size_t len)
1708{
1709 u8 *p = buf;
1710 unsigned int i;
1711
1712 for (i = 0; i < len; i++)
1713 p[i] = flash_read_uchar(info, start + i);
1714}
1715
1716void __flash_cmd_reset(flash_info_t *info)
1717{
1718 /*
1719 * We do not yet know what kind of commandset to use, so we issue
1720 * the reset command in both Intel and AMD variants, in the hope
1721 * that AMD flash roms ignore the Intel command.
1722 */
1723 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1724 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1725}
1726void flash_cmd_reset(flash_info_t *info)
1727 __attribute__((weak,alias("__flash_cmd_reset")));
1728
1729static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1730{
1731 int cfi_offset;
1732
1733 /* Issue FLASH reset command */
1734 flash_cmd_reset(info);
1735
1736 for (cfi_offset=0;
1737 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1738 cfi_offset++) {
1739 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1740 FLASH_CMD_CFI);
1741 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1742 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1743 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1744 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1745 sizeof(struct cfi_qry));
1746 info->interface = le16_to_cpu(qry->interface_desc);
1747
1748 info->cfi_offset = flash_offset_cfi[cfi_offset];
1749 debug ("device interface is %d\n",
1750 info->interface);
1751 debug ("found port %d chip %d ",
1752 info->portwidth, info->chipwidth);
1753 debug ("port %d bits chip %d bits\n",
1754 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1755 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1756
1757 /* calculate command offsets as in the Linux driver */
1758 info->addr_unlock1 = 0x555;
1759 info->addr_unlock2 = 0x2aa;
1760
1761 /*
1762 * modify the unlock address if we are
1763 * in compatibility mode
1764 */
1765 if ( /* x8/x16 in x8 mode */
1766 ((info->chipwidth == FLASH_CFI_BY8) &&
1767 (info->interface == FLASH_CFI_X8X16)) ||
1768 /* x16/x32 in x16 mode */
1769 ((info->chipwidth == FLASH_CFI_BY16) &&
1770 (info->interface == FLASH_CFI_X16X32)))
1771 {
1772 info->addr_unlock1 = 0xaaa;
1773 info->addr_unlock2 = 0x555;
1774 }
1775
1776 info->name = "CFI conformant";
1777 return 1;
1778 }
1779 }
1780
1781 return 0;
1782}
1783
1784static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1785{
1786 debug ("flash detect cfi\n");
1787
1788 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1789 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1790 for (info->chipwidth = FLASH_CFI_BY8;
1791 info->chipwidth <= info->portwidth;
1792 info->chipwidth <<= 1)
1793 if (__flash_detect_cfi(info, qry))
1794 return 1;
1795 }
1796 debug ("not found\n");
1797 return 0;
1798}
1799
1800/*
1801 * Manufacturer-specific quirks. Add workarounds for geometry
1802 * reversal, etc. here.
1803 */
1804static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1805{
1806 /* check if flash geometry needs reversal */
1807 if (qry->num_erase_regions > 1) {
1808 /* reverse geometry if top boot part */
1809 if (info->cfi_version < 0x3131) {
1810 /* CFI < 1.1, try to guess from device id */
1811 if ((info->device_id & 0x80) != 0)
1812 cfi_reverse_geometry(qry);
1813 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1814 /* CFI >= 1.1, deduct from top/bottom flag */
1815 /* note: ext_addr is valid since cfi_version > 0 */
1816 cfi_reverse_geometry(qry);
1817 }
1818 }
1819}
1820
1821static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1822{
1823 int reverse_geometry = 0;
1824
1825 /* Check the "top boot" bit in the PRI */
1826 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1827 reverse_geometry = 1;
1828
1829 /* AT49BV6416(T) list the erase regions in the wrong order.
1830 * However, the device ID is identical with the non-broken
1831 * AT49BV642D they differ in the high byte.
1832 */
1833 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1834 reverse_geometry = !reverse_geometry;
1835
1836 if (reverse_geometry)
1837 cfi_reverse_geometry(qry);
1838}
1839
1840static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1841{
1842 /* check if flash geometry needs reversal */
1843 if (qry->num_erase_regions > 1) {
1844 /* reverse geometry if top boot part */
1845 if (info->cfi_version < 0x3131) {
1846 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
1847 if (info->device_id == 0x22CA ||
1848 info->device_id == 0x2256) {
1849 cfi_reverse_geometry(qry);
1850 }
1851 }
1852 }
1853}
1854
1855/*
1856 * The following code cannot be run from FLASH!
1857 *
1858 */
1859ulong flash_get_size (phys_addr_t base, int banknum)
1860{
1861 flash_info_t *info = &flash_info[banknum];
1862 int i, j;
1863 flash_sect_t sect_cnt;
1864 phys_addr_t sector;
1865 unsigned long tmp;
1866 int size_ratio;
1867 uchar num_erase_regions;
1868 int erase_region_size;
1869 int erase_region_count;
1870 struct cfi_qry qry;
1871 unsigned long max_size;
1872
1873 memset(&qry, 0, sizeof(qry));
1874
1875 info->ext_addr = 0;
1876 info->cfi_version = 0;
1877#ifdef CONFIG_SYS_FLASH_PROTECTION
1878 info->legacy_unlock = 0;
1879#endif
1880
1881 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
1882
1883 if (flash_detect_cfi (info, &qry)) {
1884 info->vendor = le16_to_cpu(qry.p_id);
1885 info->ext_addr = le16_to_cpu(qry.p_adr);
1886 num_erase_regions = qry.num_erase_regions;
1887
1888 if (info->ext_addr) {
1889 info->cfi_version = (ushort) flash_read_uchar (info,
1890 info->ext_addr + 3) << 8;
1891 info->cfi_version |= (ushort) flash_read_uchar (info,
1892 info->ext_addr + 4);
1893 }
1894
1895#ifdef DEBUG
1896 flash_printqry (&qry);
1897#endif
1898
1899 switch (info->vendor) {
1900 case CFI_CMDSET_INTEL_PROG_REGIONS:
1901 case CFI_CMDSET_INTEL_STANDARD:
1902 case CFI_CMDSET_INTEL_EXTENDED:
1903 cmdset_intel_init(info, &qry);
1904 break;
1905 case CFI_CMDSET_AMD_STANDARD:
1906 case CFI_CMDSET_AMD_EXTENDED:
1907 cmdset_amd_init(info, &qry);
1908 break;
1909 default:
1910 printf("CFI: Unknown command set 0x%x\n",
1911 info->vendor);
1912 /*
1913 * Unfortunately, this means we don't know how
1914 * to get the chip back to Read mode. Might
1915 * as well try an Intel-style reset...
1916 */
1917 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1918 return 0;
1919 }
1920
1921 /* Do manufacturer-specific fixups */
1922 switch (info->manufacturer_id) {
1923 case 0x0001:
1924 flash_fixup_amd(info, &qry);
1925 break;
1926 case 0x001f:
1927 flash_fixup_atmel(info, &qry);
1928 break;
1929 case 0x0020:
1930 flash_fixup_stm(info, &qry);
1931 break;
1932 }
1933
1934 debug ("manufacturer is %d\n", info->vendor);
1935 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1936 debug ("device id is 0x%x\n", info->device_id);
1937 debug ("device id2 is 0x%x\n", info->device_id2);
1938 debug ("cfi version is 0x%04x\n", info->cfi_version);
1939
1940 size_ratio = info->portwidth / info->chipwidth;
1941 /* if the chip is x8/x16 reduce the ratio by half */
1942 if ((info->interface == FLASH_CFI_X8X16)
1943 && (info->chipwidth == FLASH_CFI_BY8)) {
1944 size_ratio >>= 1;
1945 }
1946 debug ("size_ratio %d port %d bits chip %d bits\n",
1947 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1948 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1949 info->size = 1 << qry.dev_size;
1950 /* multiply the size by the number of chips */
1951 info->size *= size_ratio;
1952 max_size = cfi_flash_bank_size(banknum);
1953 if (max_size && (info->size > max_size)) {
1954 debug("[truncated from %ldMiB]", info->size >> 20);
1955 info->size = max_size;
1956 }
1957 debug ("found %d erase regions\n", num_erase_regions);
1958 sect_cnt = 0;
1959 sector = base;
1960 for (i = 0; i < num_erase_regions; i++) {
1961 if (i > NUM_ERASE_REGIONS) {
1962 printf ("%d erase regions found, only %d used\n",
1963 num_erase_regions, NUM_ERASE_REGIONS);
1964 break;
1965 }
1966
1967 tmp = le32_to_cpu(qry.erase_region_info[i]);
1968 debug("erase region %u: 0x%08lx\n", i, tmp);
1969
1970 erase_region_count = (tmp & 0xffff) + 1;
1971 tmp >>= 16;
1972 erase_region_size =
1973 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1974 debug ("erase_region_count = %d erase_region_size = %d\n",
1975 erase_region_count, erase_region_size);
1976 for (j = 0; j < erase_region_count; j++) {
1977 if (sector - base >= info->size)
1978 break;
1979 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
1980 printf("ERROR: too many flash sectors\n");
1981 break;
1982 }
1983 info->start[sect_cnt] =
1984 (ulong)map_physmem(sector,
1985 info->portwidth,
1986 MAP_NOCACHE);
1987 sector += (erase_region_size * size_ratio);
1988
1989 /*
1990 * Only read protection status from
1991 * supported devices (intel...)
1992 */
1993 switch (info->vendor) {
1994 case CFI_CMDSET_INTEL_PROG_REGIONS:
1995 case CFI_CMDSET_INTEL_EXTENDED:
1996 case CFI_CMDSET_INTEL_STANDARD:
1997 /*
1998 * Set flash to read-id mode. Otherwise
1999 * reading protected status is not
2000 * guaranteed.
2001 */
2002 flash_write_cmd(info, sect_cnt, 0,
2003 FLASH_CMD_READ_ID);
2004 info->protect[sect_cnt] =
2005 flash_isset (info, sect_cnt,
2006 FLASH_OFFSET_PROTECT,
2007 FLASH_STATUS_PROTECT);
2008 break;
2009 default:
2010 /* default: not protected */
2011 info->protect[sect_cnt] = 0;
2012 }
2013
2014 sect_cnt++;
2015 }
2016 }
2017
2018 info->sector_count = sect_cnt;
2019 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2020 tmp = 1 << qry.block_erase_timeout_typ;
2021 info->erase_blk_tout = tmp *
2022 (1 << qry.block_erase_timeout_max);
2023 tmp = (1 << qry.buf_write_timeout_typ) *
2024 (1 << qry.buf_write_timeout_max);
2025
2026 /* round up when converting to ms */
2027 info->buffer_write_tout = (tmp + 999) / 1000;
2028 tmp = (1 << qry.word_write_timeout_typ) *
2029 (1 << qry.word_write_timeout_max);
2030 /* round up when converting to ms */
2031 info->write_tout = (tmp + 999) / 1000;
2032 info->flash_id = FLASH_MAN_CFI;
2033 if ((info->interface == FLASH_CFI_X8X16) &&
2034 (info->chipwidth == FLASH_CFI_BY8)) {
2035 /* XXX - Need to test on x8/x16 in parallel. */
2036 info->portwidth >>= 1;
2037 }
2038
2039 flash_write_cmd (info, 0, 0, info->cmd_reset);
2040 }
2041
2042 return (info->size);
2043}
2044
2045void flash_set_verbose(uint v)
2046{
2047 flash_verbose = v;
2048}
2049
2050static void cfi_flash_set_config_reg(u32 base, u16 val)
2051{
2052#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2053 /*
2054 * Only set this config register if really defined
2055 * to a valid value (0xffff is invalid)
2056 */
2057 if (val == 0xffff)
2058 return;
2059
2060 /*
2061 * Set configuration register. Data is "encrypted" in the 16 lower
2062 * address bits.
2063 */
2064 flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2065 flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2066
2067 /*
2068 * Finally issue reset-command to bring device back to
2069 * read-array mode
2070 */
2071 flash_write16(FLASH_CMD_RESET, (void *)base);
2072#endif
2073}
2074
2075/*-----------------------------------------------------------------------
2076 */
2077unsigned long flash_init (void)
2078{
2079 unsigned long size = 0;
2080 int i;
2081#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2082 struct apl_s {
2083 ulong start;
2084 ulong size;
2085 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2086#endif
2087
2088#ifdef CONFIG_SYS_FLASH_PROTECTION
2089 /* read environment from EEPROM */
2090 char s[64];
2091 getenv_f("unlock", s, sizeof(s));
2092#endif
2093
2094 /* Init: no FLASHes known */
2095 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2096 flash_info[i].flash_id = FLASH_UNKNOWN;
2097
2098 /* Optionally write flash configuration register */
2099 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2100 cfi_flash_config_reg(i));
2101
2102 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2103 flash_get_size(cfi_flash_bank_addr(i), i);
2104 size += flash_info[i].size;
2105 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2106#ifndef CONFIG_SYS_FLASH_QUIET_TEST
2107 printf ("## Unknown FLASH on Bank %d "
2108 "- Size = 0x%08lx = %ld MB\n",
2109 i+1, flash_info[i].size,
2110 flash_info[i].size >> 20);
2111#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2112 }
2113#ifdef CONFIG_SYS_FLASH_PROTECTION
2114 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2115 /*
2116 * Only the U-Boot image and it's environment
2117 * is protected, all other sectors are
2118 * unprotected (unlocked) if flash hardware
2119 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2120 * and the environment variable "unlock" is
2121 * set to "yes".
2122 */
2123 if (flash_info[i].legacy_unlock) {
2124 int k;
2125
2126 /*
2127 * Disable legacy_unlock temporarily,
2128 * since flash_real_protect would
2129 * relock all other sectors again
2130 * otherwise.
2131 */
2132 flash_info[i].legacy_unlock = 0;
2133
2134 /*
2135 * Legacy unlocking (e.g. Intel J3) ->
2136 * unlock only one sector. This will
2137 * unlock all sectors.
2138 */
2139 flash_real_protect (&flash_info[i], 0, 0);
2140
2141 flash_info[i].legacy_unlock = 1;
2142
2143 /*
2144 * Manually mark other sectors as
2145 * unlocked (unprotected)
2146 */
2147 for (k = 1; k < flash_info[i].sector_count; k++)
2148 flash_info[i].protect[k] = 0;
2149 } else {
2150 /*
2151 * No legancy unlocking -> unlock all sectors
2152 */
2153 flash_protect (FLAG_PROTECT_CLEAR,
2154 flash_info[i].start[0],
2155 flash_info[i].start[0]
2156 + flash_info[i].size - 1,
2157 &flash_info[i]);
2158 }
2159 }
2160#endif /* CONFIG_SYS_FLASH_PROTECTION */
2161 }
2162
2163 /* Monitor protection ON by default */
2164#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2165 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2166 flash_protect (FLAG_PROTECT_SET,
2167 CONFIG_SYS_MONITOR_BASE,
2168 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2169 flash_get_info(CONFIG_SYS_MONITOR_BASE));
2170#endif
2171
2172 /* Environment protection ON by default */
2173#ifdef CONFIG_ENV_IS_IN_FLASH
2174 flash_protect (FLAG_PROTECT_SET,
2175 CONFIG_ENV_ADDR,
2176 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2177 flash_get_info(CONFIG_ENV_ADDR));
2178#endif
2179
2180 /* Redundant environment protection ON by default */
2181#ifdef CONFIG_ENV_ADDR_REDUND
2182 flash_protect (FLAG_PROTECT_SET,
2183 CONFIG_ENV_ADDR_REDUND,
2184 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2185 flash_get_info(CONFIG_ENV_ADDR_REDUND));
2186#endif
2187
2188#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2189 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2190 debug("autoprotecting from %08x to %08x\n",
2191 apl[i].start, apl[i].start + apl[i].size - 1);
2192 flash_protect (FLAG_PROTECT_SET,
2193 apl[i].start,
2194 apl[i].start + apl[i].size - 1,
2195 flash_get_info(apl[i].start));
2196 }
2197#endif
2198
2199#ifdef CONFIG_FLASH_CFI_MTD
2200 cfi_mtd_init();
2201#endif
2202
2203 return (size);
2204}
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