]> git.ipfire.org Git - thirdparty/kernel/stable.git/blame_incremental - drivers/vfio/pci/vfio_pci_private.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
[thirdparty/kernel/stable.git] / drivers / vfio / pci / vfio_pci_private.h
... / ...
CommitLineData
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
4 * Author: Alex Williamson <alex.williamson@redhat.com>
5 *
6 * Derived from original vfio:
7 * Copyright 2010 Cisco Systems, Inc. All rights reserved.
8 * Author: Tom Lyon, pugs@cisco.com
9 */
10
11#include <linux/mutex.h>
12#include <linux/pci.h>
13#include <linux/irqbypass.h>
14#include <linux/types.h>
15
16#ifndef VFIO_PCI_PRIVATE_H
17#define VFIO_PCI_PRIVATE_H
18
19#define VFIO_PCI_OFFSET_SHIFT 40
20
21#define VFIO_PCI_OFFSET_TO_INDEX(off) (off >> VFIO_PCI_OFFSET_SHIFT)
22#define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
23#define VFIO_PCI_OFFSET_MASK (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)
24
25/* Special capability IDs predefined access */
26#define PCI_CAP_ID_INVALID 0xFF /* default raw access */
27#define PCI_CAP_ID_INVALID_VIRT 0xFE /* default virt access */
28
29/* Cap maximum number of ioeventfds per device (arbitrary) */
30#define VFIO_PCI_IOEVENTFD_MAX 1000
31
32struct vfio_pci_ioeventfd {
33 struct list_head next;
34 struct virqfd *virqfd;
35 void __iomem *addr;
36 uint64_t data;
37 loff_t pos;
38 int bar;
39 int count;
40};
41
42struct vfio_pci_irq_ctx {
43 struct eventfd_ctx *trigger;
44 struct virqfd *unmask;
45 struct virqfd *mask;
46 char *name;
47 bool masked;
48 struct irq_bypass_producer producer;
49};
50
51struct vfio_pci_device;
52struct vfio_pci_region;
53
54struct vfio_pci_regops {
55 size_t (*rw)(struct vfio_pci_device *vdev, char __user *buf,
56 size_t count, loff_t *ppos, bool iswrite);
57 void (*release)(struct vfio_pci_device *vdev,
58 struct vfio_pci_region *region);
59 int (*mmap)(struct vfio_pci_device *vdev,
60 struct vfio_pci_region *region,
61 struct vm_area_struct *vma);
62 int (*add_capability)(struct vfio_pci_device *vdev,
63 struct vfio_pci_region *region,
64 struct vfio_info_cap *caps);
65};
66
67struct vfio_pci_region {
68 u32 type;
69 u32 subtype;
70 const struct vfio_pci_regops *ops;
71 void *data;
72 size_t size;
73 u32 flags;
74};
75
76struct vfio_pci_dummy_resource {
77 struct resource resource;
78 int index;
79 struct list_head res_next;
80};
81
82struct vfio_pci_reflck {
83 struct kref kref;
84 struct mutex lock;
85};
86
87struct vfio_pci_device {
88 struct pci_dev *pdev;
89 void __iomem *barmap[PCI_STD_RESOURCE_END + 1];
90 bool bar_mmap_supported[PCI_STD_RESOURCE_END + 1];
91 u8 *pci_config_map;
92 u8 *vconfig;
93 struct perm_bits *msi_perm;
94 spinlock_t irqlock;
95 struct mutex igate;
96 struct vfio_pci_irq_ctx *ctx;
97 int num_ctx;
98 int irq_type;
99 int num_regions;
100 struct vfio_pci_region *region;
101 u8 msi_qmax;
102 u8 msix_bar;
103 u16 msix_size;
104 u32 msix_offset;
105 u32 rbar[7];
106 bool pci_2_3;
107 bool virq_disabled;
108 bool reset_works;
109 bool extended_caps;
110 bool bardirty;
111 bool has_vga;
112 bool needs_reset;
113 bool nointx;
114 bool needs_pm_restore;
115 struct pci_saved_state *pci_saved_state;
116 struct pci_saved_state *pm_save;
117 struct vfio_pci_reflck *reflck;
118 int refcnt;
119 int ioeventfds_nr;
120 struct eventfd_ctx *err_trigger;
121 struct eventfd_ctx *req_trigger;
122 struct list_head dummy_resources_list;
123 struct mutex ioeventfds_lock;
124 struct list_head ioeventfds_list;
125};
126
127#define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX)
128#define is_msi(vdev) (vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX)
129#define is_msix(vdev) (vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX)
130#define is_irq_none(vdev) (!(is_intx(vdev) || is_msi(vdev) || is_msix(vdev)))
131#define irq_is(vdev, type) (vdev->irq_type == type)
132
133extern void vfio_pci_intx_mask(struct vfio_pci_device *vdev);
134extern void vfio_pci_intx_unmask(struct vfio_pci_device *vdev);
135
136extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev,
137 uint32_t flags, unsigned index,
138 unsigned start, unsigned count, void *data);
139
140extern ssize_t vfio_pci_config_rw(struct vfio_pci_device *vdev,
141 char __user *buf, size_t count,
142 loff_t *ppos, bool iswrite);
143
144extern ssize_t vfio_pci_bar_rw(struct vfio_pci_device *vdev, char __user *buf,
145 size_t count, loff_t *ppos, bool iswrite);
146
147extern ssize_t vfio_pci_vga_rw(struct vfio_pci_device *vdev, char __user *buf,
148 size_t count, loff_t *ppos, bool iswrite);
149
150extern long vfio_pci_ioeventfd(struct vfio_pci_device *vdev, loff_t offset,
151 uint64_t data, int count, int fd);
152
153extern int vfio_pci_init_perm_bits(void);
154extern void vfio_pci_uninit_perm_bits(void);
155
156extern int vfio_config_init(struct vfio_pci_device *vdev);
157extern void vfio_config_free(struct vfio_pci_device *vdev);
158
159extern int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
160 unsigned int type, unsigned int subtype,
161 const struct vfio_pci_regops *ops,
162 size_t size, u32 flags, void *data);
163
164extern int vfio_pci_set_power_state(struct vfio_pci_device *vdev,
165 pci_power_t state);
166
167#ifdef CONFIG_VFIO_PCI_IGD
168extern int vfio_pci_igd_init(struct vfio_pci_device *vdev);
169#else
170static inline int vfio_pci_igd_init(struct vfio_pci_device *vdev)
171{
172 return -ENODEV;
173}
174#endif
175#ifdef CONFIG_VFIO_PCI_NVLINK2
176extern int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev);
177extern int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev);
178#else
179static inline int vfio_pci_nvdia_v100_nvlink2_init(struct vfio_pci_device *vdev)
180{
181 return -ENODEV;
182}
183
184static inline int vfio_pci_ibm_npu2_init(struct vfio_pci_device *vdev)
185{
186 return -ENODEV;
187}
188#endif
189#endif /* VFIO_PCI_PRIVATE_H */