| | 1 | /* |
| | 2 | * Copyright (C) 2012 Bluegiga Technologies Oy |
| | 3 | * |
| | 4 | * Authors: |
| | 5 | * Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com> |
| | 6 | * Lauri Hintsala <lauri.hintsala@bluegiga.com> |
| | 7 | * |
| | 8 | * Based on m28evk.h: |
| | 9 | * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> |
| | 10 | * on behalf of DENX Software Engineering GmbH |
| | 11 | * |
| | 12 | * This program is free software; you can redistribute it and/or |
| | 13 | * modify it under the terms of the GNU General Public License as |
| | 14 | * published by the Free Software Foundation; either version 2 of |
| | 15 | * the License, or (at your option) any later version. |
| | 16 | * |
| | 17 | * This program is distributed in the hope that it will be useful, |
| | 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| | 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| | 20 | * GNU General Public License for more details. |
| | 21 | */ |
| | 22 | #ifndef __CONFIG_H |
| | 23 | #define __CONFIG_H |
| | 24 | |
| | 25 | /* SoC configurations */ |
| | 26 | #define CONFIG_MX28 /* i.MX28 SoC */ |
| | 27 | #define CONFIG_MXS_GPIO /* GPIO control */ |
| | 28 | #define CONFIG_SYS_HZ 1000 /* Ticks per second */ |
| | 29 | |
| | 30 | #define MACH_TYPE_APX4DEVKIT 3712 |
| | 31 | #define CONFIG_MACH_TYPE MACH_TYPE_APX4DEVKIT |
| | 32 | |
| | 33 | #include <asm/arch/regs-base.h> |
| | 34 | |
| | 35 | #define CONFIG_SYS_NO_FLASH |
| | 36 | #define CONFIG_BOARD_EARLY_INIT_F |
| | 37 | #define CONFIG_ARCH_CPU_INIT |
| | 38 | #define CONFIG_ARCH_MISC_INIT |
| | 39 | |
| | 40 | /* SPL */ |
| | 41 | #define CONFIG_SPL |
| | 42 | #define CONFIG_SPL_NO_CPU_SUPPORT_CODE |
| | 43 | #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" |
| | 44 | #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" |
| | 45 | #define CONFIG_SPL_LIBCOMMON_SUPPORT |
| | 46 | #define CONFIG_SPL_LIBGENERIC_SUPPORT |
| | 47 | #define CONFIG_SPL_GPIO_SUPPORT |
| | 48 | |
| | 49 | /* U-Boot Commands */ |
| | 50 | #include <config_cmd_default.h> |
| | 51 | #define CONFIG_DISPLAY_CPUINFO |
| | 52 | #define CONFIG_DOS_PARTITION |
| | 53 | |
| | 54 | #define CONFIG_CMD_CACHE |
| | 55 | #define CONFIG_CMD_DATE |
| | 56 | #define CONFIG_CMD_DHCP |
| | 57 | #define CONFIG_CMD_EXT2 |
| | 58 | #define CONFIG_CMD_FAT |
| | 59 | #define CONFIG_CMD_I2C |
| | 60 | #define CONFIG_CMD_MII |
| | 61 | #define CONFIG_CMD_MMC |
| | 62 | #define CONFIG_CMD_NAND |
| | 63 | #define CONFIG_CMD_NET |
| | 64 | #define CONFIG_CMD_NFS |
| | 65 | #define CONFIG_CMD_PING |
| | 66 | #define CONFIG_CMD_SAVEENV |
| | 67 | #define CONFIG_CMD_USB |
| | 68 | |
| | 69 | /* Memory configurations */ |
| | 70 | #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ |
| | 71 | #define PHYS_SDRAM_1 0x40000000 /* Base address */ |
| | 72 | #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ |
| | 73 | #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ |
| | 74 | #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ |
| | 75 | #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ |
| | 76 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| | 77 | |
| | 78 | /* Point initial SP in SRAM so SPL can use it too. */ |
| | 79 | #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 |
| | 80 | #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) |
| | 81 | |
| | 82 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| | 83 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| | 84 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| | 85 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| | 86 | |
| | 87 | /* |
| | 88 | * We need to sacrifice first 4 bytes of RAM here to avoid triggering some |
| | 89 | * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot |
| | 90 | * binary. In case there was more of this mess, 0x100 bytes are skipped. |
| | 91 | */ |
| | 92 | #define CONFIG_SYS_TEXT_BASE 0x40000100 |
| | 93 | |
| | 94 | #define CONFIG_ENV_OVERWRITE |
| | 95 | |
| | 96 | /* U-Boot general configurations */ |
| | 97 | #define CONFIG_SYS_LONGHELP |
| | 98 | #define CONFIG_SYS_PROMPT "=> " |
| | 99 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ |
| | 100 | #define CONFIG_SYS_PBSIZE \ |
| | 101 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| | 102 | /* Print buffer size */ |
| | 103 | #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ |
| | 104 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| | 105 | /* Boot argument buffer size */ |
| | 106 | #define CONFIG_VERSION_VARIABLE /* U-Boot version */ |
| | 107 | #define CONFIG_AUTO_COMPLETE /* Command auto complete */ |
| | 108 | #define CONFIG_CMDLINE_EDITING /* Command history etc. */ |
| | 109 | #define CONFIG_SYS_HUSH_PARSER |
| | 110 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
| | 111 | #define CONFIG_OF_LIBFDT |
| | 112 | #define CONFIG_ENV_IS_IN_NAND |
| | 113 | |
| | 114 | /* Serial Driver */ |
| | 115 | #define CONFIG_PL011_SERIAL |
| | 116 | #define CONFIG_PL011_CLOCK 24000000 |
| | 117 | #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } |
| | 118 | #define CONFIG_CONS_INDEX 0 |
| | 119 | #define CONFIG_BAUDRATE 115200 /* Default baud rate */ |
| | 120 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
| | 121 | |
| | 122 | /* DMA */ |
| | 123 | #define CONFIG_APBH_DMA |
| | 124 | |
| | 125 | /* MMC Driver */ |
| | 126 | #ifdef CONFIG_ENV_IS_IN_MMC |
| | 127 | #define CONFIG_ENV_OFFSET (256 * 1024) |
| | 128 | #define CONFIG_ENV_SIZE (16 * 1024) |
| | 129 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| | 130 | #endif |
| | 131 | |
| | 132 | #ifdef CONFIG_CMD_MMC |
| | 133 | #define CONFIG_MMC |
| | 134 | #define CONFIG_GENERIC_MMC |
| | 135 | #define CONFIG_BOUNCE_BUFFER |
| | 136 | #define CONFIG_MXS_MMC |
| | 137 | #endif |
| | 138 | |
| | 139 | /* NAND Driver */ |
| | 140 | #ifdef CONFIG_ENV_IS_IN_NAND |
| | 141 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) |
| | 142 | #define CONFIG_ENV_SIZE (128 * 1024) |
| | 143 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
| | 144 | #define CONFIG_ENV_RANGE (384 * 1024) |
| | 145 | #define CONFIG_ENV_OFFSET 0x120000 |
| | 146 | #define CONFIG_ENV_OFFSET_REDUND \ |
| | 147 | (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) |
| | 148 | #endif |
| | 149 | |
| | 150 | #ifdef CONFIG_CMD_NAND |
| | 151 | #define CONFIG_NAND_MXS |
| | 152 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| | 153 | #define CONFIG_SYS_NAND_BASE 0x60000000 |
| | 154 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| | 155 | |
| | 156 | #define CONFIG_CMD_UBI |
| | 157 | #define CONFIG_CMD_UBIFS |
| | 158 | #define CONFIG_CMD_MTDPARTS |
| | 159 | #define CONFIG_RBTREE |
| | 160 | #define CONFIG_LZO |
| | 161 | #define CONFIG_MTD_DEVICE |
| | 162 | #define CONFIG_MTD_PARTITIONS |
| | 163 | #define MTDIDS_DEFAULT "nand0=gpmi-nand" |
| | 164 | #define MTDPARTS_DEFAULT \ |
| | 165 | "mtdparts=gpmi-nand:128k(bootstrap),1024k(boot),768k(env),-(root)" |
| | 166 | #else |
| | 167 | #define MTDPARTS_DEFAULT "" |
| | 168 | #endif |
| | 169 | |
| | 170 | /* Ethernet on SOC (FEC) */ |
| | 171 | #ifdef CONFIG_CMD_NET |
| | 172 | #define CONFIG_NET_MULTI |
| | 173 | #define CONFIG_ETHPRIME "FEC" |
| | 174 | #define CONFIG_FEC_MXC |
| | 175 | #define CONFIG_FEC_MXC_PHYADDR 0 |
| | 176 | #define IMX_FEC_BASE MXS_ENET0_BASE |
| | 177 | #define CONFIG_MII |
| | 178 | #define CONFIG_FEC_XCV_TYPE RMII |
| | 179 | #endif |
| | 180 | |
| | 181 | /* USB */ |
| | 182 | #ifdef CONFIG_CMD_USB |
| | 183 | #define CONFIG_USB_EHCI |
| | 184 | #define CONFIG_USB_EHCI_MXS |
| | 185 | #define CONFIG_EHCI_MXS_PORT1 |
| | 186 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
| | 187 | #define CONFIG_EHCI_IS_TDI |
| | 188 | #define CONFIG_USB_STORAGE |
| | 189 | #endif |
| | 190 | |
| | 191 | /* I2C */ |
| | 192 | #ifdef CONFIG_CMD_I2C |
| | 193 | #define CONFIG_I2C_MXS |
| | 194 | #define CONFIG_HARD_I2C |
| | 195 | #define CONFIG_SYS_I2C_SPEED 400000 |
| | 196 | #endif |
| | 197 | |
| | 198 | /* RTC */ |
| | 199 | #if defined(CONFIG_CMD_DATE) |
| | 200 | #define CONFIG_RTC_PCF8563 |
| | 201 | #define CONFIG_SYS_I2C_RTC_ADDR 0x51 |
| | 202 | #endif |
| | 203 | |
| | 204 | /* Boot Linux */ |
| | 205 | #define CONFIG_CMDLINE_TAG |
| | 206 | #define CONFIG_SETUP_MEMORY_TAGS |
| | 207 | #define CONFIG_BOOTDELAY 1 |
| | 208 | #define CONFIG_BOOTFILE "uImage" |
| | 209 | #define CONFIG_BOOTCOMMAND "run bootcmd_nand" |
| | 210 | #define CONFIG_LOADADDR 0x41000000 |
| | 211 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| | 212 | #define CONFIG_SERIAL_TAG |
| | 213 | #define CONFIG_REVISION_TAG |
| | 214 | |
| | 215 | /* Extra Environments */ |
| | 216 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| | 217 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ |
| | 218 | "verify=no\0" \ |
| | 219 | "bootcmd=run bootcmd_nand\0" \ |
| | 220 | "kernelargs=console=tty0 console=ttyAMA0,115200 consoleblank=0\0" \ |
| | 221 | "bootargs_nand=" \ |
| | 222 | "setenv bootargs ${kernelargs} ubi.mtd=3,2048 " \ |
| | 223 | "root=ubi0:rootfs rootfstype=ubifs ${mtdparts} rw\0" \ |
| | 224 | "bootcmd_nand=" \ |
| | 225 | "run bootargs_nand && ubi part root 2048 && " \ |
| | 226 | "ubifsmount ubi:rootfs && ubifsload 41000000 boot/uImage && " \ |
| | 227 | "bootm 41000000\0" \ |
| | 228 | "bootargs_mmc=" \ |
| | 229 | "setenv bootargs ${kernelargs} " \ |
| | 230 | "root=/dev/mmcblk0p2 rootwait ${mtdparts} rw\0" \ |
| | 231 | "bootcmd_mmc=" \ |
| | 232 | "run bootargs_mmc && mmc rescan && " \ |
| | 233 | "ext2load mmc 0:2 41000000 boot/uImage && bootm 41000000\0" \ |
| | 234 | "" |
| | 235 | |
| | 236 | #endif /* __CONFIG_H */ |
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