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1 | /* | |
2 | * U-boot - Configuration file for BF533 STAMP board | |
3 | */ | |
4 | ||
5 | #ifndef __CONFIG_BF533_STAMP_H__ | |
6 | #define __CONFIG_BF533_STAMP_H__ | |
7 | ||
8 | #include <asm/config-pre.h> | |
9 | ||
10 | ||
11 | /* | |
12 | * Processor Settings | |
13 | */ | |
14 | #define CONFIG_BFIN_CPU bf533-0.3 | |
15 | #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS | |
16 | ||
17 | ||
18 | /* | |
19 | * Clock Settings | |
20 | * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV | |
21 | * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV | |
22 | */ | |
23 | /* CONFIG_CLKIN_HZ is any value in Hz */ | |
24 | #define CONFIG_CLKIN_HZ 11059200 | |
25 | /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ | |
26 | /* 1 = CLKIN / 2 */ | |
27 | #define CONFIG_CLKIN_HALF 0 | |
28 | /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ | |
29 | /* 1 = bypass PLL */ | |
30 | #define CONFIG_PLL_BYPASS 0 | |
31 | /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ | |
32 | /* Values can range from 0-63 (where 0 means 64) */ | |
33 | #define CONFIG_VCO_MULT 45 | |
34 | /* CCLK_DIV controls the core clock divider */ | |
35 | /* Values can be 1, 2, 4, or 8 ONLY */ | |
36 | #define CONFIG_CCLK_DIV 1 | |
37 | /* SCLK_DIV controls the system clock divider */ | |
38 | /* Values can range from 1-15 */ | |
39 | #define CONFIG_SCLK_DIV 6 /* note: 1.2 boards can go faster */ | |
40 | ||
41 | ||
42 | /* | |
43 | * Memory Settings | |
44 | */ | |
45 | #define CONFIG_MEM_ADD_WDTH 11 | |
46 | #define CONFIG_MEM_SIZE 128 | |
47 | ||
48 | #define CONFIG_EBIU_SDRRC_VAL 0x268 | |
49 | #define CONFIG_EBIU_SDGCTL_VAL 0x911109 | |
50 | ||
51 | #define CONFIG_EBIU_AMGCTL_VAL 0xFF | |
52 | #define CONFIG_EBIU_AMBCTL0_VAL 0xBBC3BBC3 | |
53 | #define CONFIG_EBIU_AMBCTL1_VAL 0x99B39983 | |
54 | ||
55 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) | |
56 | #define CONFIG_SYS_MALLOC_LEN (384 * 1024) | |
57 | ||
58 | ||
59 | /* | |
60 | * Network Settings | |
61 | */ | |
62 | #define ADI_CMDS_NETWORK 1 | |
63 | #define CONFIG_NET_MULTI | |
64 | #define CONFIG_SMC91111 1 | |
65 | #define CONFIG_SMC91111_BASE 0x20300300 | |
66 | #define SMC91111_EEPROM_INIT() \ | |
67 | do { \ | |
68 | bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF1 | PF0); \ | |
69 | bfin_write_FIO_FLAG_C(PF1); \ | |
70 | bfin_write_FIO_FLAG_S(PF0); \ | |
71 | SSYNC(); \ | |
72 | } while (0) | |
73 | #define CONFIG_HOSTNAME bf533-stamp | |
74 | /* Uncomment next line to use fixed MAC address */ | |
75 | /* #define CONFIG_ETHADDR 02:80:ad:20:31:b8 */ | |
76 | ||
77 | ||
78 | /* | |
79 | * Flash Settings | |
80 | */ | |
81 | #define CONFIG_FLASH_CFI_DRIVER | |
82 | #define CONFIG_SYS_FLASH_BASE 0x20000000 | |
83 | #define CONFIG_SYS_FLASH_CFI | |
84 | #define CONFIG_SYS_FLASH_CFI_AMD_RESET | |
85 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
86 | #define CONFIG_SYS_MAX_FLASH_SECT 67 | |
87 | ||
88 | ||
89 | /* | |
90 | * SPI Settings | |
91 | */ | |
92 | #define CONFIG_BFIN_SPI | |
93 | #define CONFIG_ENV_SPI_MAX_HZ 30000000 | |
94 | #define CONFIG_SF_DEFAULT_SPEED 30000000 | |
95 | #define CONFIG_SPI_FLASH | |
96 | #define CONFIG_SPI_FLASH_ALL | |
97 | ||
98 | ||
99 | /* | |
100 | * Env Storage Settings | |
101 | */ | |
102 | #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) | |
103 | #define CONFIG_ENV_IS_IN_SPI_FLASH | |
104 | #define CONFIG_ENV_OFFSET 0x10000 | |
105 | #define CONFIG_ENV_SIZE 0x2000 | |
106 | #define CONFIG_ENV_SECT_SIZE 0x10000 | |
107 | #else | |
108 | #define CONFIG_ENV_IS_IN_FLASH | |
109 | #define CONFIG_ENV_OFFSET 0x4000 | |
110 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) | |
111 | #define CONFIG_ENV_SIZE 0x2000 | |
112 | #define CONFIG_ENV_SECT_SIZE 0x2000 | |
113 | #endif | |
114 | #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) | |
115 | #define ENV_IS_EMBEDDED | |
116 | #else | |
117 | #define CONFIG_ENV_IS_EMBEDDED_IN_LDR | |
118 | #endif | |
119 | #ifdef ENV_IS_EMBEDDED | |
120 | /* WARNING - the following is hand-optimized to fit within | |
121 | * the sector before the environment sector. If it throws | |
122 | * an error during compilation remove an object here to get | |
123 | * it linked after the configuration sector. | |
124 | */ | |
125 | # define LDS_BOARD_TEXT \ | |
126 | arch/blackfin/lib/libblackfin.o (.text*); \ | |
127 | arch/blackfin/cpu/libblackfin.o (.text*); \ | |
128 | . = DEFINED(env_offset) ? env_offset : .; \ | |
129 | common/env_embedded.o (.text*); | |
130 | #endif | |
131 | ||
132 | ||
133 | /* | |
134 | * I2C Settings | |
135 | */ | |
136 | #define CONFIG_SOFT_I2C | |
137 | #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF3 | |
138 | #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF2 | |
139 | ||
140 | ||
141 | /* | |
142 | * Compact Flash / IDE / ATA Settings | |
143 | */ | |
144 | ||
145 | /* Enabled below option for CF support */ | |
146 | /* #define CONFIG_STAMP_CF */ | |
147 | #if defined(CONFIG_STAMP_CF) | |
148 | #define CONFIG_MISC_INIT_R | |
149 | #define CONFIG_DOS_PARTITION 1 | |
150 | #undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */ | |
151 | #undef CONFIG_IDE_LED /* no led for ide supported */ | |
152 | #undef CONFIG_IDE_RESET /* no reset for ide supported */ | |
153 | ||
154 | #define CONFIG_SYS_IDE_MAXBUS 1 | |
155 | #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS * 1) | |
156 | ||
157 | #define CONFIG_SYS_ATA_BASE_ADDR 0x20200000 | |
158 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 | |
159 | ||
160 | #define CONFIG_SYS_ATA_DATA_OFFSET 0x0020 /* data I/O */ | |
161 | #define CONFIG_SYS_ATA_REG_OFFSET 0x0020 /* normal register accesses */ | |
162 | #define CONFIG_SYS_ATA_ALT_OFFSET 0x0007 /* alternate registers */ | |
163 | ||
164 | #define CONFIG_SYS_ATA_STRIDE 2 | |
165 | ||
166 | #undef CONFIG_EBIU_AMBCTL1_VAL | |
167 | #define CONFIG_EBIU_AMBCTL1_VAL 0x99B3ffc2 | |
168 | #endif | |
169 | ||
170 | ||
171 | /* | |
172 | * Misc Settings | |
173 | */ | |
174 | #define CONFIG_RTC_BFIN | |
175 | #define CONFIG_UART_CONSOLE 0 | |
176 | ||
177 | /* FLASH/ETHERNET uses the same async bank */ | |
178 | #define SHARED_RESOURCES 1 | |
179 | ||
180 | /* define to enable boot progress via leds */ | |
181 | /* #define CONFIG_SHOW_BOOT_PROGRESS */ | |
182 | ||
183 | /* define to enable run status via led */ | |
184 | /* #define CONFIG_STATUS_LED */ | |
185 | #ifdef CONFIG_STATUS_LED | |
186 | #define CONFIG_GPIO_LED | |
187 | #define CONFIG_BOARD_SPECIFIC_LED | |
188 | /* use LED0 to indicate booting/alive */ | |
189 | #define STATUS_LED_BOOT 0 | |
190 | #define STATUS_LED_BIT GPIO_PF2 | |
191 | #define STATUS_LED_STATE STATUS_LED_ON | |
192 | #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 4) | |
193 | /* use LED1 to indicate crash */ | |
194 | #define STATUS_LED_CRASH 1 | |
195 | #define STATUS_LED_BIT1 GPIO_PF3 | |
196 | #define STATUS_LED_STATE1 STATUS_LED_ON | |
197 | #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) | |
198 | /* #define STATUS_LED_BIT2 GPIO_PF4 */ | |
199 | #endif | |
200 | ||
201 | /* define to enable splash screen support */ | |
202 | /* #define CONFIG_VIDEO */ | |
203 | ||
204 | ||
205 | /* | |
206 | * Pull in common ADI header for remaining command/environment setup | |
207 | */ | |
208 | #include <configs/bfin_adi_common.h> | |
209 | ||
210 | #endif |