| | 1 | /* |
| | 2 | * U-Boot - Configuration file for CM-BF527 board |
| | 3 | */ |
| | 4 | |
| | 5 | #ifndef __CONFIG_CM_BF527_H__ |
| | 6 | #define __CONFIG_CM_BF527_H__ |
| | 7 | |
| | 8 | #include <asm/config-pre.h> |
| | 9 | |
| | 10 | /* |
| | 11 | * Processor Settings |
| | 12 | */ |
| | 13 | #define CONFIG_BFIN_CPU bf527-0.0 |
| | 14 | #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA |
| | 15 | |
| | 16 | /* |
| | 17 | * Clock Settings |
| | 18 | * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV |
| | 19 | * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV |
| | 20 | */ |
| | 21 | /* CONFIG_CLKIN_HZ is any value in Hz */ |
| | 22 | #define CONFIG_CLKIN_HZ 25000000 |
| | 23 | /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ |
| | 24 | /* 1 = CLKIN / 2 */ |
| | 25 | #define CONFIG_CLKIN_HALF 0 |
| | 26 | /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ |
| | 27 | /* 1 = bypass PLL */ |
| | 28 | #define CONFIG_PLL_BYPASS 0 |
| | 29 | /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ |
| | 30 | /* Values can range from 0-63 (where 0 means 64) */ |
| | 31 | #define CONFIG_VCO_MULT 21 |
| | 32 | /* CCLK_DIV controls the core clock divider */ |
| | 33 | /* Values can be 1, 2, 4, or 8 ONLY */ |
| | 34 | #define CONFIG_CCLK_DIV 1 |
| | 35 | /* SCLK_DIV controls the system clock divider */ |
| | 36 | /* Values can range from 1-15 */ |
| | 37 | #define CONFIG_SCLK_DIV 4 |
| | 38 | |
| | 39 | /* Decrease core voltage */ |
| | 40 | #define CONFIG_VR_CTL_VAL (VLEV_120 | CLKBUFOE | FREQ_1000) |
| | 41 | |
| | 42 | /* |
| | 43 | * Memory Settings |
| | 44 | */ |
| | 45 | #define CONFIG_MEM_ADD_WDTH 9 |
| | 46 | #define CONFIG_MEM_SIZE 32 |
| | 47 | |
| | 48 | #define CONFIG_EBIU_SDRRC_VAL 0x3f8 |
| | 49 | #define CONFIG_EBIU_SDGCTL_VAL 0x9111cd |
| | 50 | |
| | 51 | #define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) |
| | 52 | #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) |
| | 53 | #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) |
| | 54 | |
| | 55 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) |
| | 56 | #define CONFIG_SYS_MALLOC_LEN (128 * 1024) |
| | 57 | |
| | 58 | /* |
| | 59 | * NAND Settings |
| | 60 | * (can't be used sametime as ethernet) |
| | 61 | */ |
| | 62 | /* #define CONFIG_BFIN_NFC */ |
| | 63 | #ifdef CONFIG_BFIN_NFC |
| | 64 | #define CONFIG_BFIN_NFC_CTL_VAL 0x0033 |
| | 65 | #define CONFIG_SYS_NAND_BASE 0 /* not actually used */ |
| | 66 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| | 67 | #define CONFIG_CMD_NAND |
| | 68 | #endif |
| | 69 | |
| | 70 | /* |
| | 71 | * Network Settings |
| | 72 | */ |
| | 73 | #if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \ |
| | 74 | !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC) |
| | 75 | #define ADI_CMDS_NETWORK 1 |
| | 76 | #define CONFIG_BFIN_MAC |
| | 77 | #define CONFIG_RMII |
| | 78 | #define CONFIG_NETCONSOLE 1 |
| | 79 | #endif |
| | 80 | #define CONFIG_HOSTNAME cm-bf527 |
| | 81 | |
| | 82 | /* |
| | 83 | * Flash Settings |
| | 84 | */ |
| | 85 | #define CONFIG_FLASH_CFI_DRIVER |
| | 86 | #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS |
| | 87 | #define CONFIG_SYS_FLASH_BASE 0x20000000 |
| | 88 | #define CONFIG_SYS_FLASH_CFI |
| | 89 | #define CONFIG_SYS_FLASH_PROTECTION |
| | 90 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| | 91 | #define CONFIG_SYS_MAX_FLASH_SECT 67 |
| | 92 | |
| | 93 | /* |
| | 94 | * Env Storage Settings |
| | 95 | */ |
| | 96 | #define CONFIG_ENV_IS_IN_FLASH 1 |
| | 97 | #define CONFIG_ENV_ADDR 0x20008000 |
| | 98 | #define CONFIG_ENV_OFFSET 0x8000 |
| | 99 | #define CONFIG_ENV_SIZE 0x8000 |
| | 100 | #define CONFIG_ENV_SECT_SIZE 0x8000 |
| | 101 | #define CONFIG_ENV_IS_EMBEDDED_IN_LDR |
| | 102 | |
| | 103 | /* |
| | 104 | * I2C Settings |
| | 105 | */ |
| | 106 | #define CONFIG_SYS_I2C |
| | 107 | #define CONFIG_SYS_I2C_ADI |
| | 108 | |
| | 109 | /* |
| | 110 | * Misc Settings |
| | 111 | */ |
| | 112 | #define CONFIG_MISC_INIT_R |
| | 113 | #define CONFIG_RTC_BFIN |
| | 114 | #define CONFIG_UART_CONSOLE 0 |
| | 115 | #define CONFIG_BOOTCOMMAND "run flashboot" |
| | 116 | #define FLASHBOOT_ENV_SETTINGS \ |
| | 117 | "flashboot=flread 20040000 1000000 300000;" \ |
| | 118 | "bootm 0x1000000\0" |
| | 119 | |
| | 120 | /* |
| | 121 | * Pull in common ADI header for remaining command/environment setup |
| | 122 | */ |
| | 123 | #include <configs/bfin_adi_common.h> |
| | 124 | |
| | 125 | #endif |
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