]>
Commit | Line | Data |
---|---|---|
1 | /* | |
2 | * (C) Copyright 2006-2008 | |
3 | * Texas Instruments. | |
4 | * Richard Woodruff <r-woodruff2@ti.com> | |
5 | * Syed Mohammed Khasim <x0khasim@ti.com> | |
6 | * | |
7 | * (C) Copyright 2012 | |
8 | * Corscience GmbH & Co. KG | |
9 | * Thomas Weber <weber@corscience.de> | |
10 | * | |
11 | * Configuration settings for the Tricorder board. | |
12 | * | |
13 | * SPDX-License-Identifier: GPL-2.0+ | |
14 | */ | |
15 | ||
16 | #ifndef __CONFIG_H | |
17 | #define __CONFIG_H | |
18 | ||
19 | #define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER | |
20 | /* | |
21 | * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM | |
22 | * 64 bytes before this address should be set aside for u-boot.img's | |
23 | * header. That is 0x800FFFC0--0x80100000 should not be used for any | |
24 | * other needs. | |
25 | */ | |
26 | ||
27 | #include <asm/arch/cpu.h> /* get chip and board defs */ | |
28 | #include <asm/arch/omap.h> | |
29 | ||
30 | /* Clock Defines */ | |
31 | #define V_OSCK 26000000 /* Clock output from T2 */ | |
32 | #define V_SCLK (V_OSCK >> 1) | |
33 | ||
34 | #define CONFIG_MISC_INIT_R | |
35 | ||
36 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
37 | #define CONFIG_SETUP_MEMORY_TAGS | |
38 | #define CONFIG_INITRD_TAG | |
39 | #define CONFIG_REVISION_TAG | |
40 | ||
41 | /* Size of malloc() pool */ | |
42 | #define CONFIG_SYS_MALLOC_LEN (1024*1024) | |
43 | ||
44 | /* Hardware drivers */ | |
45 | ||
46 | /* NS16550 Configuration */ | |
47 | #define CONFIG_SYS_NS16550_SERIAL | |
48 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
49 | #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ | |
50 | ||
51 | /* select serial console configuration */ | |
52 | #define CONFIG_CONS_INDEX 3 | |
53 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 | |
54 | #define CONFIG_SERIAL3 3 | |
55 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ | |
56 | 115200} | |
57 | ||
58 | /* I2C */ | |
59 | #define CONFIG_SYS_I2C | |
60 | ||
61 | ||
62 | /* EEPROM */ | |
63 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 | |
64 | #define CONFIG_SYS_EEPROM_BUS_NUM 1 | |
65 | ||
66 | /* TWL4030 */ | |
67 | #define CONFIG_TWL4030_LED | |
68 | ||
69 | /* Board NAND Info */ | |
70 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ | |
71 | ||
72 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ | |
73 | /* to access nand */ | |
74 | #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ | |
75 | /* to access nand at */ | |
76 | /* CS0 */ | |
77 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ | |
78 | /* devices */ | |
79 | #define CONFIG_SYS_NAND_MAX_OOBFREE 2 | |
80 | #define CONFIG_SYS_NAND_MAX_ECCPOS 56 | |
81 | ||
82 | /* needed for ubi */ | |
83 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ | |
84 | #define CONFIG_MTD_PARTITIONS | |
85 | ||
86 | /* Environment information (this is the common part) */ | |
87 | ||
88 | ||
89 | /* hang() the board on panic() */ | |
90 | ||
91 | /* environment placement (for NAND), is different for FLASHCARD but does not | |
92 | * harm there */ | |
93 | #define CONFIG_ENV_OFFSET 0x120000 /* env start */ | |
94 | #define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */ | |
95 | #define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */ | |
96 | #define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */ | |
97 | ||
98 | /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend | |
99 | * value can not be used here! */ | |
100 | #define CONFIG_LOADADDR 0x82000000 | |
101 | ||
102 | #define CONFIG_COMMON_ENV_SETTINGS \ | |
103 | "console=ttyO2,115200n8\0" \ | |
104 | "mmcdev=0\0" \ | |
105 | "vram=3M\0" \ | |
106 | "defaultdisplay=lcd\0" \ | |
107 | "kernelopts=mtdoops.mtddev=3\0" \ | |
108 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ | |
109 | "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ | |
110 | "commonargs=" \ | |
111 | "setenv bootargs console=${console} " \ | |
112 | "${mtdparts} " \ | |
113 | "${kernelopts} " \ | |
114 | "vt.global_cursor_default=0 " \ | |
115 | "vram=${vram} " \ | |
116 | "omapdss.def_disp=${defaultdisplay}\0" | |
117 | ||
118 | #define CONFIG_BOOTCOMMAND "run autoboot" | |
119 | ||
120 | /* specific environment settings for different use cases | |
121 | * FLASHCARD: used to run a rdimage from sdcard to program the device | |
122 | * 'NORMAL': used to boot kernel from sdcard, nand, ... | |
123 | * | |
124 | * The main aim for the FLASHCARD skin is to have an embedded environment | |
125 | * which will not be influenced by any data already on the device. | |
126 | */ | |
127 | #ifdef CONFIG_FLASHCARD | |
128 | /* the rdaddr is 16 MiB before the loadaddr */ | |
129 | #define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0" | |
130 | ||
131 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
132 | CONFIG_COMMON_ENV_SETTINGS \ | |
133 | CONFIG_ENV_RDADDR \ | |
134 | "autoboot=" \ | |
135 | "run commonargs; " \ | |
136 | "setenv bootargs ${bootargs} " \ | |
137 | "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \ | |
138 | "rdinit=/sbin/init; " \ | |
139 | "mmc dev ${mmcdev}; mmc rescan; " \ | |
140 | "fatload mmc ${mmcdev} ${loadaddr} uImage; " \ | |
141 | "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \ | |
142 | "bootm ${loadaddr} ${rdaddr}\0" | |
143 | ||
144 | #else /* CONFIG_FLASHCARD */ | |
145 | ||
146 | #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */ | |
147 | ||
148 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
149 | CONFIG_COMMON_ENV_SETTINGS \ | |
150 | "mmcargs=" \ | |
151 | "run commonargs; " \ | |
152 | "setenv bootargs ${bootargs} " \ | |
153 | "root=/dev/mmcblk0p2 " \ | |
154 | "rootwait " \ | |
155 | "rw\0" \ | |
156 | "nandargs=" \ | |
157 | "run commonargs; " \ | |
158 | "setenv bootargs ${bootargs} " \ | |
159 | "root=ubi0:root " \ | |
160 | "ubi.mtd=7 " \ | |
161 | "rootfstype=ubifs " \ | |
162 | "ro\0" \ | |
163 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ | |
164 | "bootscript=echo Running bootscript from mmc ...; " \ | |
165 | "source ${loadaddr}\0" \ | |
166 | "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ | |
167 | "mmcboot=echo Booting from mmc ...; " \ | |
168 | "run mmcargs; " \ | |
169 | "bootm ${loadaddr}\0" \ | |
170 | "loaduimage_ubi=ubi part ubi; " \ | |
171 | "ubifsmount ubi:root; " \ | |
172 | "ubifsload ${loadaddr} /boot/uImage\0" \ | |
173 | "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \ | |
174 | "nandboot=echo Booting from nand ...; " \ | |
175 | "run nandargs; " \ | |
176 | "run loaduimage_nand; " \ | |
177 | "bootm ${loadaddr}\0" \ | |
178 | "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ | |
179 | "if run loadbootscript; then " \ | |
180 | "run bootscript; " \ | |
181 | "else " \ | |
182 | "if run loaduimage; then " \ | |
183 | "run mmcboot; " \ | |
184 | "else run nandboot; " \ | |
185 | "fi; " \ | |
186 | "fi; " \ | |
187 | "else run nandboot; fi\0" | |
188 | ||
189 | #endif /* CONFIG_FLASHCARD */ | |
190 | ||
191 | /* Miscellaneous configurable options */ | |
192 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ | |
193 | ||
194 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000) | |
195 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ | |
196 | 0x07000000) /* 112 MB */ | |
197 | ||
198 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) | |
199 | ||
200 | /* | |
201 | * OMAP3 has 12 GP timers, they can be driven by the system clock | |
202 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). | |
203 | * This rate is divided by a local divisor. | |
204 | */ | |
205 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) | |
206 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ | |
207 | ||
208 | /* Physical Memory Map */ | |
209 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ | |
210 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 | |
211 | #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 | |
212 | ||
213 | /* NAND and environment organization */ | |
214 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ | |
215 | ||
216 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
217 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 | |
218 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 | |
219 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
220 | CONFIG_SYS_INIT_RAM_SIZE - \ | |
221 | GENERATED_GBL_DATA_SIZE) | |
222 | ||
223 | /* SRAM config */ | |
224 | #define CONFIG_SYS_SRAM_START 0x40200000 | |
225 | #define CONFIG_SYS_SRAM_SIZE 0x10000 | |
226 | ||
227 | /* Defines for SPL */ | |
228 | ||
229 | #define CONFIG_SPL_NAND_BASE | |
230 | #define CONFIG_SPL_NAND_DRIVERS | |
231 | #define CONFIG_SPL_NAND_ECC | |
232 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" | |
233 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 | |
234 | ||
235 | #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ | |
236 | #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ | |
237 | CONFIG_SPL_TEXT_BASE) | |
238 | ||
239 | #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ | |
240 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 | |
241 | ||
242 | /* NAND boot config */ | |
243 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
244 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
245 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
246 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
247 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) | |
248 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
249 | #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ | |
250 | 13, 14, 16, 17, 18, 19, 20, 21, 22, \ | |
251 | 23, 24, 25, 26, 27, 28, 30, 31, 32, \ | |
252 | 33, 34, 35, 36, 37, 38, 39, 40, 41, \ | |
253 | 42, 44, 45, 46, 47, 48, 49, 50, 51, \ | |
254 | 52, 53, 54, 55, 56} | |
255 | ||
256 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
257 | #define CONFIG_SYS_NAND_ECCBYTES 13 | |
258 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW | |
259 | ||
260 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE | |
261 | ||
262 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 | |
263 | #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000 | |
264 | ||
265 | #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 | |
266 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ | |
267 | ||
268 | #define CONFIG_SYS_ALT_MEMTEST | |
269 | #define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000 | |
270 | #endif /* __CONFIG_H */ |