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1 | /* | |
2 | * Copyright 2008,2010 Freescale Semiconductor, Inc | |
3 | * Andy Fleming | |
4 | * | |
5 | * Based (loosely) on the Linux code | |
6 | * | |
7 | * SPDX-License-Identifier: GPL-2.0+ | |
8 | */ | |
9 | ||
10 | #ifndef _MMC_H_ | |
11 | #define _MMC_H_ | |
12 | ||
13 | #include <linux/list.h> | |
14 | #include <linux/sizes.h> | |
15 | #include <linux/compiler.h> | |
16 | #include <part.h> | |
17 | ||
18 | /* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */ | |
19 | #define SD_VERSION_SD (1U << 31) | |
20 | #define MMC_VERSION_MMC (1U << 30) | |
21 | ||
22 | #define MAKE_SDMMC_VERSION(a, b, c) \ | |
23 | ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c)) | |
24 | #define MAKE_SD_VERSION(a, b, c) \ | |
25 | (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c)) | |
26 | #define MAKE_MMC_VERSION(a, b, c) \ | |
27 | (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c)) | |
28 | ||
29 | #define EXTRACT_SDMMC_MAJOR_VERSION(x) \ | |
30 | (((u32)(x) >> 16) & 0xff) | |
31 | #define EXTRACT_SDMMC_MINOR_VERSION(x) \ | |
32 | (((u32)(x) >> 8) & 0xff) | |
33 | #define EXTRACT_SDMMC_CHANGE_VERSION(x) \ | |
34 | ((u32)(x) & 0xff) | |
35 | ||
36 | #define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0) | |
37 | #define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0) | |
38 | #define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0) | |
39 | #define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0) | |
40 | ||
41 | #define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0) | |
42 | #define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0) | |
43 | #define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0) | |
44 | #define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0) | |
45 | #define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0) | |
46 | #define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0) | |
47 | #define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0) | |
48 | #define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0) | |
49 | #define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0) | |
50 | #define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1) | |
51 | #define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0) | |
52 | #define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0) | |
53 | #define MMC_VERSION_5_1 MAKE_MMC_VERSION(5, 1, 0) | |
54 | ||
55 | #define MMC_MODE_HS (1 << 0) | |
56 | #define MMC_MODE_HS_52MHz (1 << 1) | |
57 | #define MMC_MODE_4BIT (1 << 2) | |
58 | #define MMC_MODE_8BIT (1 << 3) | |
59 | #define MMC_MODE_SPI (1 << 4) | |
60 | #define MMC_MODE_DDR_52MHz (1 << 5) | |
61 | ||
62 | #define SD_DATA_4BIT 0x00040000 | |
63 | ||
64 | #define IS_SD(x) ((x)->version & SD_VERSION_SD) | |
65 | #define IS_MMC(x) ((x)->version & MMC_VERSION_MMC) | |
66 | ||
67 | #define MMC_DATA_READ 1 | |
68 | #define MMC_DATA_WRITE 2 | |
69 | ||
70 | #define MMC_CMD_GO_IDLE_STATE 0 | |
71 | #define MMC_CMD_SEND_OP_COND 1 | |
72 | #define MMC_CMD_ALL_SEND_CID 2 | |
73 | #define MMC_CMD_SET_RELATIVE_ADDR 3 | |
74 | #define MMC_CMD_SET_DSR 4 | |
75 | #define MMC_CMD_SWITCH 6 | |
76 | #define MMC_CMD_SELECT_CARD 7 | |
77 | #define MMC_CMD_SEND_EXT_CSD 8 | |
78 | #define MMC_CMD_SEND_CSD 9 | |
79 | #define MMC_CMD_SEND_CID 10 | |
80 | #define MMC_CMD_STOP_TRANSMISSION 12 | |
81 | #define MMC_CMD_SEND_STATUS 13 | |
82 | #define MMC_CMD_SET_BLOCKLEN 16 | |
83 | #define MMC_CMD_READ_SINGLE_BLOCK 17 | |
84 | #define MMC_CMD_READ_MULTIPLE_BLOCK 18 | |
85 | #define MMC_CMD_SET_BLOCK_COUNT 23 | |
86 | #define MMC_CMD_WRITE_SINGLE_BLOCK 24 | |
87 | #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 | |
88 | #define MMC_CMD_ERASE_GROUP_START 35 | |
89 | #define MMC_CMD_ERASE_GROUP_END 36 | |
90 | #define MMC_CMD_ERASE 38 | |
91 | #define MMC_CMD_APP_CMD 55 | |
92 | #define MMC_CMD_SPI_READ_OCR 58 | |
93 | #define MMC_CMD_SPI_CRC_ON_OFF 59 | |
94 | #define MMC_CMD_RES_MAN 62 | |
95 | ||
96 | #define MMC_CMD62_ARG1 0xefac62ec | |
97 | #define MMC_CMD62_ARG2 0xcbaea7 | |
98 | ||
99 | ||
100 | #define SD_CMD_SEND_RELATIVE_ADDR 3 | |
101 | #define SD_CMD_SWITCH_FUNC 6 | |
102 | #define SD_CMD_SEND_IF_COND 8 | |
103 | #define SD_CMD_SWITCH_UHS18V 11 | |
104 | ||
105 | #define SD_CMD_APP_SET_BUS_WIDTH 6 | |
106 | #define SD_CMD_APP_SD_STATUS 13 | |
107 | #define SD_CMD_ERASE_WR_BLK_START 32 | |
108 | #define SD_CMD_ERASE_WR_BLK_END 33 | |
109 | #define SD_CMD_APP_SEND_OP_COND 41 | |
110 | #define SD_CMD_APP_SEND_SCR 51 | |
111 | ||
112 | /* SCR definitions in different words */ | |
113 | #define SD_HIGHSPEED_BUSY 0x00020000 | |
114 | #define SD_HIGHSPEED_SUPPORTED 0x00020000 | |
115 | ||
116 | #define OCR_BUSY 0x80000000 | |
117 | #define OCR_HCS 0x40000000 | |
118 | #define OCR_VOLTAGE_MASK 0x007FFF80 | |
119 | #define OCR_ACCESS_MODE 0x60000000 | |
120 | ||
121 | #define MMC_ERASE_ARG 0x00000000 | |
122 | #define MMC_SECURE_ERASE_ARG 0x80000000 | |
123 | #define MMC_TRIM_ARG 0x00000001 | |
124 | #define MMC_DISCARD_ARG 0x00000003 | |
125 | #define MMC_SECURE_TRIM1_ARG 0x80000001 | |
126 | #define MMC_SECURE_TRIM2_ARG 0x80008000 | |
127 | ||
128 | #define MMC_STATUS_MASK (~0x0206BF7F) | |
129 | #define MMC_STATUS_SWITCH_ERROR (1 << 7) | |
130 | #define MMC_STATUS_RDY_FOR_DATA (1 << 8) | |
131 | #define MMC_STATUS_CURR_STATE (0xf << 9) | |
132 | #define MMC_STATUS_ERROR (1 << 19) | |
133 | ||
134 | #define MMC_STATE_PRG (7 << 9) | |
135 | ||
136 | #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ | |
137 | #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ | |
138 | #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ | |
139 | #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ | |
140 | #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ | |
141 | #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ | |
142 | #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ | |
143 | #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ | |
144 | #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ | |
145 | #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ | |
146 | #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ | |
147 | #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ | |
148 | #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ | |
149 | #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ | |
150 | #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ | |
151 | #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ | |
152 | #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ | |
153 | ||
154 | #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ | |
155 | #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte | |
156 | addressed by index which are | |
157 | 1 in value field */ | |
158 | #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte | |
159 | addressed by index, which are | |
160 | 1 in value field */ | |
161 | #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */ | |
162 | ||
163 | #define SD_SWITCH_CHECK 0 | |
164 | #define SD_SWITCH_SWITCH 1 | |
165 | ||
166 | /* | |
167 | * EXT_CSD fields | |
168 | */ | |
169 | #define EXT_CSD_ENH_START_ADDR 136 /* R/W */ | |
170 | #define EXT_CSD_ENH_SIZE_MULT 140 /* R/W */ | |
171 | #define EXT_CSD_GP_SIZE_MULT 143 /* R/W */ | |
172 | #define EXT_CSD_PARTITION_SETTING 155 /* R/W */ | |
173 | #define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */ | |
174 | #define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* R */ | |
175 | #define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */ | |
176 | #define EXT_CSD_RST_N_FUNCTION 162 /* R/W */ | |
177 | #define EXT_CSD_BKOPS_EN 163 /* R/W & R/W/E */ | |
178 | #define EXT_CSD_WR_REL_PARAM 166 /* R */ | |
179 | #define EXT_CSD_WR_REL_SET 167 /* R/W */ | |
180 | #define EXT_CSD_RPMB_MULT 168 /* RO */ | |
181 | #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ | |
182 | #define EXT_CSD_BOOT_BUS_WIDTH 177 | |
183 | #define EXT_CSD_PART_CONF 179 /* R/W */ | |
184 | #define EXT_CSD_BUS_WIDTH 183 /* R/W */ | |
185 | #define EXT_CSD_HS_TIMING 185 /* R/W */ | |
186 | #define EXT_CSD_REV 192 /* RO */ | |
187 | #define EXT_CSD_CARD_TYPE 196 /* RO */ | |
188 | #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ | |
189 | #define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */ | |
190 | #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ | |
191 | #define EXT_CSD_BOOT_MULT 226 /* RO */ | |
192 | #define EXT_CSD_BKOPS_SUPPORT 502 /* RO */ | |
193 | ||
194 | /* | |
195 | * EXT_CSD field definitions | |
196 | */ | |
197 | ||
198 | #define EXT_CSD_CMD_SET_NORMAL (1 << 0) | |
199 | #define EXT_CSD_CMD_SET_SECURE (1 << 1) | |
200 | #define EXT_CSD_CMD_SET_CPSECURE (1 << 2) | |
201 | ||
202 | #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ | |
203 | #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ | |
204 | #define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2) | |
205 | #define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3) | |
206 | #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ | |
207 | | EXT_CSD_CARD_TYPE_DDR_1_2V) | |
208 | ||
209 | #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ | |
210 | #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ | |
211 | #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ | |
212 | #define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ | |
213 | #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ | |
214 | ||
215 | #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6) | |
216 | #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3) | |
217 | #define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0) | |
218 | #define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0) | |
219 | ||
220 | #define EXT_CSD_BOOT_ACK(x) (x << 6) | |
221 | #define EXT_CSD_BOOT_PART_NUM(x) (x << 3) | |
222 | #define EXT_CSD_PARTITION_ACCESS(x) (x << 0) | |
223 | ||
224 | #define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3) | |
225 | #define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2) | |
226 | #define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x) | |
227 | ||
228 | #define EXT_CSD_PARTITION_SETTING_COMPLETED (1 << 0) | |
229 | ||
230 | #define EXT_CSD_ENH_USR (1 << 0) /* user data area is enhanced */ | |
231 | #define EXT_CSD_ENH_GP(x) (1 << ((x)+1)) /* GP part (x+1) is enhanced */ | |
232 | ||
233 | #define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */ | |
234 | ||
235 | #define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */ | |
236 | #define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */ | |
237 | ||
238 | #define R1_ILLEGAL_COMMAND (1 << 22) | |
239 | #define R1_APP_CMD (1 << 5) | |
240 | ||
241 | #define MMC_RSP_PRESENT (1 << 0) | |
242 | #define MMC_RSP_136 (1 << 1) /* 136 bit response */ | |
243 | #define MMC_RSP_CRC (1 << 2) /* expect valid crc */ | |
244 | #define MMC_RSP_BUSY (1 << 3) /* card may send busy */ | |
245 | #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ | |
246 | ||
247 | #define MMC_RSP_NONE (0) | |
248 | #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) | |
249 | #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ | |
250 | MMC_RSP_BUSY) | |
251 | #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) | |
252 | #define MMC_RSP_R3 (MMC_RSP_PRESENT) | |
253 | #define MMC_RSP_R4 (MMC_RSP_PRESENT) | |
254 | #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) | |
255 | #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) | |
256 | #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) | |
257 | ||
258 | #define MMCPART_NOAVAILABLE (0xff) | |
259 | #define PART_ACCESS_MASK (0x7) | |
260 | #define PART_SUPPORT (0x1) | |
261 | #define ENHNCD_SUPPORT (0x2) | |
262 | #define PART_ENH_ATTRIB (0x1f) | |
263 | ||
264 | /* Maximum block size for MMC */ | |
265 | #define MMC_MAX_BLOCK_LEN 512 | |
266 | ||
267 | /* The number of MMC physical partitions. These consist of: | |
268 | * boot partitions (2), general purpose partitions (4) in MMC v4.4. | |
269 | */ | |
270 | #define MMC_NUM_BOOT_PARTITION 2 | |
271 | #define MMC_PART_RPMB 3 /* RPMB partition number */ | |
272 | ||
273 | /* Driver model support */ | |
274 | ||
275 | /** | |
276 | * struct mmc_uclass_priv - Holds information about a device used by the uclass | |
277 | */ | |
278 | struct mmc_uclass_priv { | |
279 | struct mmc *mmc; | |
280 | }; | |
281 | ||
282 | /** | |
283 | * mmc_get_mmc_dev() - get the MMC struct pointer for a device | |
284 | * | |
285 | * Provided that the device is already probed and ready for use, this value | |
286 | * will be available. | |
287 | * | |
288 | * @dev: Device | |
289 | * @return associated mmc struct pointer if available, else NULL | |
290 | */ | |
291 | struct mmc *mmc_get_mmc_dev(struct udevice *dev); | |
292 | ||
293 | /* End of driver model support */ | |
294 | ||
295 | struct mmc_cid { | |
296 | unsigned long psn; | |
297 | unsigned short oid; | |
298 | unsigned char mid; | |
299 | unsigned char prv; | |
300 | unsigned char mdt; | |
301 | char pnm[7]; | |
302 | }; | |
303 | ||
304 | struct mmc_cmd { | |
305 | ushort cmdidx; | |
306 | uint resp_type; | |
307 | uint cmdarg; | |
308 | uint response[4]; | |
309 | }; | |
310 | ||
311 | struct mmc_data { | |
312 | union { | |
313 | char *dest; | |
314 | const char *src; /* src buffers don't get written to */ | |
315 | }; | |
316 | uint flags; | |
317 | uint blocks; | |
318 | uint blocksize; | |
319 | }; | |
320 | ||
321 | /* forward decl. */ | |
322 | struct mmc; | |
323 | ||
324 | #ifdef CONFIG_DM_MMC_OPS | |
325 | struct dm_mmc_ops { | |
326 | /** | |
327 | * send_cmd() - Send a command to the MMC device | |
328 | * | |
329 | * @dev: Device to receive the command | |
330 | * @cmd: Command to send | |
331 | * @data: Additional data to send/receive | |
332 | * @return 0 if OK, -ve on error | |
333 | */ | |
334 | int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd, | |
335 | struct mmc_data *data); | |
336 | ||
337 | /** | |
338 | * set_ios() - Set the I/O speed/width for an MMC device | |
339 | * | |
340 | * @dev: Device to update | |
341 | * @return 0 if OK, -ve on error | |
342 | */ | |
343 | int (*set_ios)(struct udevice *dev); | |
344 | ||
345 | /** | |
346 | * get_cd() - See whether a card is present | |
347 | * | |
348 | * @dev: Device to check | |
349 | * @return 0 if not present, 1 if present, -ve on error | |
350 | */ | |
351 | int (*get_cd)(struct udevice *dev); | |
352 | ||
353 | /** | |
354 | * get_wp() - See whether a card has write-protect enabled | |
355 | * | |
356 | * @dev: Device to check | |
357 | * @return 0 if write-enabled, 1 if write-protected, -ve on error | |
358 | */ | |
359 | int (*get_wp)(struct udevice *dev); | |
360 | }; | |
361 | ||
362 | #define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops) | |
363 | ||
364 | int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, | |
365 | struct mmc_data *data); | |
366 | int dm_mmc_set_ios(struct udevice *dev); | |
367 | int dm_mmc_get_cd(struct udevice *dev); | |
368 | int dm_mmc_get_wp(struct udevice *dev); | |
369 | ||
370 | /* Transition functions for compatibility */ | |
371 | int mmc_set_ios(struct mmc *mmc); | |
372 | int mmc_getcd(struct mmc *mmc); | |
373 | int mmc_getwp(struct mmc *mmc); | |
374 | ||
375 | #else | |
376 | struct mmc_ops { | |
377 | int (*send_cmd)(struct mmc *mmc, | |
378 | struct mmc_cmd *cmd, struct mmc_data *data); | |
379 | int (*set_ios)(struct mmc *mmc); | |
380 | int (*init)(struct mmc *mmc); | |
381 | int (*getcd)(struct mmc *mmc); | |
382 | int (*getwp)(struct mmc *mmc); | |
383 | }; | |
384 | #endif | |
385 | ||
386 | struct mmc_config { | |
387 | const char *name; | |
388 | #ifndef CONFIG_DM_MMC_OPS | |
389 | const struct mmc_ops *ops; | |
390 | #endif | |
391 | uint host_caps; | |
392 | uint voltages; | |
393 | uint f_min; | |
394 | uint f_max; | |
395 | uint b_max; | |
396 | unsigned char part_type; | |
397 | }; | |
398 | ||
399 | struct sd_ssr { | |
400 | unsigned int au; /* In sectors */ | |
401 | unsigned int erase_timeout; /* In milliseconds */ | |
402 | unsigned int erase_offset; /* In milliseconds */ | |
403 | }; | |
404 | ||
405 | /* | |
406 | * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device | |
407 | * with mmc_get_mmc_dev(). | |
408 | * | |
409 | * TODO struct mmc should be in mmc_private but it's hard to fix right now | |
410 | */ | |
411 | struct mmc { | |
412 | #ifndef CONFIG_BLK | |
413 | struct list_head link; | |
414 | #endif | |
415 | const struct mmc_config *cfg; /* provided configuration */ | |
416 | uint version; | |
417 | void *priv; | |
418 | uint has_init; | |
419 | int high_capacity; | |
420 | uint bus_width; | |
421 | uint clock; | |
422 | uint card_caps; | |
423 | uint ocr; | |
424 | uint dsr; | |
425 | uint dsr_imp; | |
426 | uint scr[2]; | |
427 | uint csd[4]; | |
428 | uint cid[4]; | |
429 | ushort rca; | |
430 | u8 part_support; | |
431 | u8 part_attr; | |
432 | u8 wr_rel_set; | |
433 | char part_config; | |
434 | uint tran_speed; | |
435 | uint read_bl_len; | |
436 | uint write_bl_len; | |
437 | uint erase_grp_size; /* in 512-byte sectors */ | |
438 | uint hc_wp_grp_size; /* in 512-byte sectors */ | |
439 | struct sd_ssr ssr; /* SD status register */ | |
440 | u64 capacity; | |
441 | u64 capacity_user; | |
442 | u64 capacity_boot; | |
443 | u64 capacity_rpmb; | |
444 | u64 capacity_gp[4]; | |
445 | u64 enh_user_start; | |
446 | u64 enh_user_size; | |
447 | #ifndef CONFIG_BLK | |
448 | struct blk_desc block_dev; | |
449 | #endif | |
450 | char op_cond_pending; /* 1 if we are waiting on an op_cond command */ | |
451 | char init_in_progress; /* 1 if we have done mmc_start_init() */ | |
452 | char preinit; /* start init as early as possible */ | |
453 | int ddr_mode; | |
454 | #ifdef CONFIG_DM_MMC | |
455 | struct udevice *dev; /* Device for this MMC controller */ | |
456 | #endif | |
457 | }; | |
458 | ||
459 | struct mmc_hwpart_conf { | |
460 | struct { | |
461 | uint enh_start; /* in 512-byte sectors */ | |
462 | uint enh_size; /* in 512-byte sectors, if 0 no enh area */ | |
463 | unsigned wr_rel_change : 1; | |
464 | unsigned wr_rel_set : 1; | |
465 | } user; | |
466 | struct { | |
467 | uint size; /* in 512-byte sectors */ | |
468 | unsigned enhanced : 1; | |
469 | unsigned wr_rel_change : 1; | |
470 | unsigned wr_rel_set : 1; | |
471 | } gp_part[4]; | |
472 | }; | |
473 | ||
474 | enum mmc_hwpart_conf_mode { | |
475 | MMC_HWPART_CONF_CHECK, | |
476 | MMC_HWPART_CONF_SET, | |
477 | MMC_HWPART_CONF_COMPLETE, | |
478 | }; | |
479 | ||
480 | struct mmc *mmc_create(const struct mmc_config *cfg, void *priv); | |
481 | ||
482 | /** | |
483 | * mmc_bind() - Set up a new MMC device ready for probing | |
484 | * | |
485 | * A child block device is bound with the IF_TYPE_MMC interface type. This | |
486 | * allows the device to be used with CONFIG_BLK | |
487 | * | |
488 | * @dev: MMC device to set up | |
489 | * @mmc: MMC struct | |
490 | * @cfg: MMC configuration | |
491 | * @return 0 if OK, -ve on error | |
492 | */ | |
493 | int mmc_bind(struct udevice *dev, struct mmc *mmc, | |
494 | const struct mmc_config *cfg); | |
495 | void mmc_destroy(struct mmc *mmc); | |
496 | ||
497 | /** | |
498 | * mmc_unbind() - Unbind a MMC device's child block device | |
499 | * | |
500 | * @dev: MMC device | |
501 | * @return 0 if OK, -ve on error | |
502 | */ | |
503 | int mmc_unbind(struct udevice *dev); | |
504 | int mmc_initialize(bd_t *bis); | |
505 | int mmc_init(struct mmc *mmc); | |
506 | int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); | |
507 | void mmc_set_clock(struct mmc *mmc, uint clock); | |
508 | struct mmc *find_mmc_device(int dev_num); | |
509 | int mmc_set_dev(int dev_num); | |
510 | void print_mmc_devices(char separator); | |
511 | ||
512 | /** | |
513 | * get_mmc_num() - get the total MMC device number | |
514 | * | |
515 | * @return 0 if there is no MMC device, else the number of devices | |
516 | */ | |
517 | int get_mmc_num(void); | |
518 | int mmc_switch_part(struct mmc *mmc, unsigned int part_num); | |
519 | int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf, | |
520 | enum mmc_hwpart_conf_mode mode); | |
521 | ||
522 | #ifndef CONFIG_DM_MMC_OPS | |
523 | int mmc_getcd(struct mmc *mmc); | |
524 | int board_mmc_getcd(struct mmc *mmc); | |
525 | int mmc_getwp(struct mmc *mmc); | |
526 | int board_mmc_getwp(struct mmc *mmc); | |
527 | #endif | |
528 | ||
529 | int mmc_set_dsr(struct mmc *mmc, u16 val); | |
530 | /* Function to change the size of boot partition and rpmb partitions */ | |
531 | int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, | |
532 | unsigned long rpmbsize); | |
533 | /* Function to modify the PARTITION_CONFIG field of EXT_CSD */ | |
534 | int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access); | |
535 | /* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */ | |
536 | int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode); | |
537 | /* Function to modify the RST_n_FUNCTION field of EXT_CSD */ | |
538 | int mmc_set_rst_n_function(struct mmc *mmc, u8 enable); | |
539 | /* Functions to read / write the RPMB partition */ | |
540 | int mmc_rpmb_set_key(struct mmc *mmc, void *key); | |
541 | int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *counter); | |
542 | int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk, | |
543 | unsigned short cnt, unsigned char *key); | |
544 | int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk, | |
545 | unsigned short cnt, unsigned char *key); | |
546 | #ifdef CONFIG_CMD_BKOPS_ENABLE | |
547 | int mmc_set_bkops_enable(struct mmc *mmc); | |
548 | #endif | |
549 | ||
550 | /** | |
551 | * Start device initialization and return immediately; it does not block on | |
552 | * polling OCR (operation condition register) status. Then you should call | |
553 | * mmc_init, which would block on polling OCR status and complete the device | |
554 | * initializatin. | |
555 | * | |
556 | * @param mmc Pointer to a MMC device struct | |
557 | * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error. | |
558 | */ | |
559 | int mmc_start_init(struct mmc *mmc); | |
560 | ||
561 | /** | |
562 | * Set preinit flag of mmc device. | |
563 | * | |
564 | * This will cause the device to be pre-inited during mmc_initialize(), | |
565 | * which may save boot time if the device is not accessed until later. | |
566 | * Some eMMC devices take 200-300ms to init, but unfortunately they | |
567 | * must be sent a series of commands to even get them to start preparing | |
568 | * for operation. | |
569 | * | |
570 | * @param mmc Pointer to a MMC device struct | |
571 | * @param preinit preinit flag value | |
572 | */ | |
573 | void mmc_set_preinit(struct mmc *mmc, int preinit); | |
574 | ||
575 | #ifdef CONFIG_MMC_SPI | |
576 | #define mmc_host_is_spi(mmc) ((mmc)->cfg->host_caps & MMC_MODE_SPI) | |
577 | #else | |
578 | #define mmc_host_is_spi(mmc) 0 | |
579 | #endif | |
580 | struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode); | |
581 | ||
582 | void board_mmc_power_init(void); | |
583 | int board_mmc_init(bd_t *bis); | |
584 | int cpu_mmc_init(bd_t *bis); | |
585 | int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr); | |
586 | int mmc_get_env_dev(void); | |
587 | ||
588 | /* Set block count limit because of 16 bit register limit on some hardware*/ | |
589 | #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT | |
590 | #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535 | |
591 | #endif | |
592 | ||
593 | /** | |
594 | * mmc_get_blk_desc() - Get the block descriptor for an MMC device | |
595 | * | |
596 | * @mmc: MMC device | |
597 | * @return block device if found, else NULL | |
598 | */ | |
599 | struct blk_desc *mmc_get_blk_desc(struct mmc *mmc); | |
600 | ||
601 | #endif /* _MMC_H_ */ |