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Commit | Line | Data |
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1 | /* | |
2 | * (C) Copyright 2002 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * SPDX-License-Identifier: GPL-2.0+ | |
6 | */ | |
7 | ||
8 | #include <common.h> | |
9 | ||
10 | /* | |
11 | * CPU test | |
12 | * Load/store multiple word instructions: lmw, stmw | |
13 | * | |
14 | * 27 consecutive words are loaded from a source memory buffer | |
15 | * into GPRs r5 through r31. After that, 27 consecutive words are stored | |
16 | * from the GPRs r5 through r31 into a target memory buffer. The contents | |
17 | * of the source and target buffers are then compared. | |
18 | */ | |
19 | ||
20 | #include <post.h> | |
21 | #include "cpu_asm.h" | |
22 | ||
23 | #if CONFIG_POST & CONFIG_SYS_POST_CPU | |
24 | ||
25 | extern void cpu_post_exec_02(ulong *code, ulong op1, ulong op2); | |
26 | ||
27 | int cpu_post_test_multi(void) | |
28 | { | |
29 | int ret = 0; | |
30 | unsigned int i; | |
31 | ulong src[27], dst[27]; | |
32 | int flag = disable_interrupts(); | |
33 | ||
34 | ulong code[] = { | |
35 | ASM_LMW(5, 3, 0), /* lmw r5, 0(r3) */ | |
36 | ASM_STMW(5, 4, 0), /* stmr r5, 0(r4) */ | |
37 | ASM_BLR, /* blr */ | |
38 | }; | |
39 | ||
40 | for (i = 0; i < ARRAY_SIZE(src); ++i) { | |
41 | src[i] = i; | |
42 | dst[i] = 0; | |
43 | } | |
44 | ||
45 | cpu_post_exec_02(code, (ulong) src, (ulong) dst); | |
46 | ||
47 | ret = memcmp(src, dst, sizeof(dst)) == 0 ? 0 : -1; | |
48 | ||
49 | if (ret != 0) | |
50 | post_log("Error at multi test !\n"); | |
51 | ||
52 | if (flag) | |
53 | enable_interrupts(); | |
54 | ||
55 | return ret; | |
56 | } | |
57 | ||
58 | #endif |