Bindings/arm/arm,vexpress-juno.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: ARM Versatile Express and Juno Boards
   8
   9 maintainers:
  10   - Sudeep Holla <sudeep.holla@arm.com>
  11   - Linus Walleij <linus.walleij@linaro.org>
  12
  13 description: |+
  14   ARM's Versatile Express platform were built as reference designs for exploring
  15   multicore Cortex-A class systems. The Versatile Express family contains both
  16   32 bit (Aarch32) and 64 bit (Aarch64) systems.
  17
  18   The board consist of a motherboard and one or more daughterboards (tiles). The
  19   motherboard provides a set of peripherals. Processor and RAM "live" on the
  20   tiles.
  21
  22   The motherboard and each core tile should be described by a separate Device
  23   Tree source file, with the tile's description including the motherboard file
  24   using an include directive. As the motherboard can be initialized in one of
  25   two different configurations ("memory maps"), care must be taken to include
  26   the correct one.
  27
  28   When a new generation of boards were introduced under the name "Juno", these
  29   shared to many common characteristics with the Versatile Express that the
  30   "arm,vexpress" compatible was retained in the root node, and these are
  31   included in this binding schema as well.
  32
  33   The root node indicates the CPU SoC on the core tile, and this
  34   is a daughterboard to the main motherboard. The name used in the compatible
  35   string shall match the name given in the core tile's technical reference
  36   manual, followed by "arm,vexpress" as an additional compatible value. If
  37   further subvariants are released of the core tile, even more fine-granular
  38   compatible strings with up to three compatible strings are used.
  39
  40 properties:
  41   $nodename:
  42     const: '/'
  43   compatible:
  44     oneOf:
  45       - description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores
  46           in MPCore configuration in a test chip on the core tile. See ARM
  47           DUI 0448I. This was the first Versatile Express platform.
  48         items:
  49           - const: arm,vexpress,v2p-ca9
  50           - const: arm,vexpress
  51       - description: CoreTile Express A5x2 (V2P-CA5s) has 2 Cortex A5 CPU cores
  52           in a test chip on the core tile. It is intended to evaluate NEON, FPU
  53           and Jazelle support in the Cortex A5 family. See ARM DUI 0541C.
  54         items:
  55           - const: arm,vexpress,v2p-ca5s
  56           - const: arm,vexpress
  57       - description: Coretile Express A15x2 (V2P-CA15) has 2 Cortex A15 CPU
  58           cores in a MPCore configuration in a test chip on the core tile. See
  59           ARM DUI 0604F.
  60         items:
  61           - const: arm,vexpress,v2p-ca15
  62           - const: arm,vexpress
  63       - description: CoreTile Express A15x4 (V2P-CA15, HBI-0237A) has 4 Cortex
  64           A15 CPU cores in a test chip on the core tile. This is the first test
  65           chip called "TC1".
  66         items:
  67           - const: arm,vexpress,v2p-ca15,tc1
  68           - const: arm,vexpress,v2p-ca15
  69           - const: arm,vexpress
  70       - description: Coretile Express A15x2 A7x3 (V2P-CA15_A7) has 2 Cortex A15
  71           CPU cores and 3 Cortex A7 cores in a big.LITTLE MPCore configuration
  72           in a test chip on the core tile. See ARM DDI 0503I.
  73         items:
  74           - const: arm,vexpress,v2p-ca15_a7
  75           - const: arm,vexpress
  76       - description: LogicTile Express 20MG (V2F-1XV7) has 2 Cortex A53 CPU
  77           cores in a test chip on the core tile. See ARM DDI 0498D.
  78         items:
  79           - const: arm,vexpress,v2f-1xv7,ca53x2
  80           - const: arm,vexpress,v2f-1xv7
  81           - const: arm,vexpress
  82       - description: Arm Versatile Express Juno "r0" (the first Juno board,
  83           V2M-Juno) was introduced as a vehicle for evaluating big.LITTLE on
  84           AArch64 CPU cores. It has 2 Cortex A57 CPU cores and 4 Cortex A53
  85           cores in a big.LITTLE configuration. It also features the MALI T624
  86           GPU. See ARM document 100113_0000_07_en.
  87         items:
  88           - const: arm,juno
  89           - const: arm,vexpress
  90       - description: Arm Versatile Express Juno r1 Development Platform
  91           (V2M-Juno r1) was introduced mainly aimed at development of PCIe
  92           based systems. Juno r1 also has support for AXI masters placed on
  93           the TLX connectors to join the coherency domain. Otherwise it is the
  94           same configuration as Juno r0. See ARM document 100122_0100_06_en.
  95         items:
  96           - const: arm,juno-r1
  97           - const: arm,juno
  98           - const: arm,vexpress
  99       - description: Arm Versatile Express Juno r2 Development Platform
 100           (V2M-Juno r2). It has the same feature set as Juno r0 and r1. See
 101           ARM document 100114_0200_04_en.
 102         items:
 103           - const: arm,juno-r2
 104           - const: arm,juno
 105           - const: arm,vexpress
 106       - description: Arm AEMv8a Versatile Express Real-Time System Model
 107           (VE RTSM) is a programmers view of the Versatile Express with Arm
 108           v8A hardware. See ARM DUI 0575D.
 109         items:
 110           - const: arm,rtsm_ve,aemv8a
 111           - const: arm,vexpress
 112       - description: Arm FVP (Fixed Virtual Platform) base model revision C
 113           See ARM Document 100964_1190_00_en.
 114         items:
 115           - const: arm,fvp-base-revc
 116           - const: arm,vexpress
 117       - description: Arm Foundation model for Aarch64
 118         items:
 119           - const: arm,foundation-aarch64
 120           - const: arm,vexpress
 121
 122   arm,vexpress,position:
 123     description: When daughterboards are stacked on one site, their position
 124       in the stack be be described this attribute.
 125     $ref: /schemas/types.yaml#/definitions/uint32
 126     minimum: 0
 127     maximum: 3
 128
 129   arm,vexpress,dcc:
 130     description: When describing tiles consisting of more than one DCC, its
 131       number can be specified with this attribute.
 132     $ref: /schemas/types.yaml#/definitions/uint32
 133     minimum: 0
 134     maximum: 3
 135
 136 patternProperties:
 137   "^bus@[0-9a-f]+$":
 138     description: Static Memory Bus (SMB) node, if this exists it describes
 139       the connection between the motherboard and any tiles. Sometimes the
 140       compatible is placed directly under this node, sometimes it is placed
 141       in a subnode named "motherboard-bus". Sometimes the compatible includes
 142       "arm,vexpress,v2?-p1" sometimes (on software models) is is just
 143       "simple-bus". If the compatible is placed in the "motherboard-bus" node,
 144       it is stricter and always has two compatibles.
 145     type: object
 146     $ref: /schemas/simple-bus.yaml
 147     unevaluatedProperties: false
 148
 149     properties:
 150       compatible:
 151         oneOf:
 152           - items:
 153               - enum:
 154                   - arm,vexpress,v2m-p1
 155                   - arm,vexpress,v2p-p1
 156               - const: simple-bus
 157           - const: simple-bus
 158
 159     patternProperties:
 160       '^motherboard-bus@':
 161         type: object
 162         description: The motherboard description provides a single "motherboard"
 163           node using 2 address cells corresponding to the Static Memory Bus
 164           used between the motherboard and the tile. The first cell defines the
 165           Chip Select (CS) line number, the second cell address offset within
 166           the CS. All interrupt lines between the motherboard and the tile
 167           are active high and are described using single cell.
 168         properties:
 169           "#address-cells":
 170             const: 2
 171           "#size-cells":
 172             const: 1
 173           ranges: true
 174
 175           compatible:
 176             items:
 177               - enum:
 178                   - arm,vexpress,v2m-p1
 179                   - arm,vexpress,v2p-p1
 180               - const: simple-bus
 181           arm,v2m-memory-map:
 182             description: This describes the memory map type.
 183             $ref: /schemas/types.yaml#/definitions/string
 184             enum:
 185               - rs1
 186               - rs2
 187
 188           arm,hbi:
 189             $ref: /schemas/types.yaml#/definitions/uint32
 190             description: This indicates the ARM HBI (Hardware Board ID), this is
 191               ARM's unique board model ID, visible on the PCB's silkscreen.
 192
 193           arm,vexpress,site:
 194             description: As Versatile Express can be configured in number of physically
 195               different setups, the device tree should describe platform topology.
 196               For this reason the root node and main motherboard node must define this
 197               property, describing the physical location of the children nodes.
 198               0 means motherboard site, while 1 and 2 are daughterboard sites, and
 199               0xf means "sisterboard" which is the site containing the main CPU tile.
 200             $ref: /schemas/types.yaml#/definitions/uint32
 201             minimum: 0
 202             maximum: 15
 203
 204         required:
 205           - compatible
 206
 207         additionalProperties:
 208           type: object
 209
 210     required:
 211       - compatible
 212
 213 allOf:
 214   - if:
 215       properties:
 216         compatible:
 217           contains:
 218             enum:
 219               - arm,vexpress,v2p-ca9
 220               - arm,vexpress,v2p-ca5s
 221               - arm,vexpress,v2p-ca15
 222               - arm,vexpress,v2p-ca15_a7
 223               - arm,vexpress,v2f-1xv7,ca53x2
 224     then:
 225       required:
 226         - arm,hbi
 227
 228 additionalProperties: true
 229
 230 ...