Bindings/clock/amlogic,s4-peripherals-clkc.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 # Copyright (C) 2022-2023 Amlogic, Inc. All rights reserved
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/clock/amlogic,s4-peripherals-clkc.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: Amlogic S4 Peripherals Clock Controller
   9
  10 maintainers:
  11   - Yu Tu <yu.tu@amlogic.com>
  12
  13 properties:
  14   compatible:
  15     const: amlogic,s4-peripherals-clkc
  16
  17   reg:
  18     maxItems: 1
  19
  20   clocks:
  21     minItems: 14
  22     items:
  23       - description: input fixed pll div2
  24       - description: input fixed pll div2p5
  25       - description: input fixed pll div3
  26       - description: input fixed pll div4
  27       - description: input fixed pll div5
  28       - description: input fixed pll div7
  29       - description: input hifi pll
  30       - description: input gp0 pll
  31       - description: input mpll0
  32       - description: input mpll1
  33       - description: input mpll2
  34       - description: input mpll3
  35       - description: input hdmi pll
  36       - description: input oscillator (usually at 24MHz)
  37       - description: input external 32kHz reference (optional)
  38
  39   clock-names:
  40     minItems: 14
  41     items:
  42       - const: fclk_div2
  43       - const: fclk_div2p5
  44       - const: fclk_div3
  45       - const: fclk_div4
  46       - const: fclk_div5
  47       - const: fclk_div7
  48       - const: hifi_pll
  49       - const: gp0_pll
  50       - const: mpll0
  51       - const: mpll1
  52       - const: mpll2
  53       - const: mpll3
  54       - const: hdmi_pll
  55       - const: xtal
  56       - const: ext_32k
  57
  58   "#clock-cells":
  59     const: 1
  60
  61 required:
  62   - compatible
  63   - reg
  64   - clocks
  65   - clock-names
  66   - "#clock-cells"
  67
  68 additionalProperties: false
  69
  70 examples:
  71   - |
  72     #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h>
  73
  74     clkc_periphs: clock-controller@fe000000 {
  75       compatible = "amlogic,s4-peripherals-clkc";
  76       reg = <0xfe000000 0x49c>;
  77       clocks = <&clkc_pll 3>,
  78               <&clkc_pll 13>,
  79               <&clkc_pll 5>,
  80               <&clkc_pll 7>,
  81               <&clkc_pll 9>,
  82               <&clkc_pll 11>,
  83               <&clkc_pll 17>,
  84               <&clkc_pll 15>,
  85               <&clkc_pll 25>,
  86               <&clkc_pll 27>,
  87               <&clkc_pll 29>,
  88               <&clkc_pll 31>,
  89               <&clkc_pll 20>,
  90               <&xtal>;
  91       clock-names = "fclk_div2", "fclk_div2p5", "fclk_div3", "fclk_div4",
  92                     "fclk_div5", "fclk_div7", "hifi_pll", "gp0_pll",
  93                     "mpll0", "mpll1", "mpll2", "mpll3", "hdmi_pll", "xtal";
  94       #clock-cells = <1>;
  95     };
  96 ...