1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8M Family Clock Control Module
10 - Anson Huang <Anson.Huang@nxp.com>
13 NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock
14 controller, which generates and supplies to all modules.
41 The clock consumer should specify the desired clock by having the clock
42 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h
43 for the full list of i.MX8M clock IDs.
62 - description: 32k osc
63 - description: 25m osc
64 - description: 27m osc
65 - description: ext1 clock input
66 - description: ext2 clock input
67 - description: ext3 clock input
68 - description: ext4 clock input
82 - description: 32k osc
83 - description: 24m osc
84 - description: ext1 clock input
85 - description: ext2 clock input
86 - description: ext3 clock input
87 - description: ext4 clock input
98 additionalProperties: false
101 # Clock Control Module node:
103 clock-controller@30380000 {
104 compatible = "fsl,imx8mm-ccm";
105 reg = <0x30380000 0x10000>;
107 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
108 <&clk_ext3>, <&clk_ext4>;
109 clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
110 "clk_ext3", "clk_ext4";
114 clock-controller@30380000 {
115 compatible = "fsl,imx8mq-ccm";
116 reg = <0x30380000 0x10000>;
118 clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>,
119 <&clk_ext2>, <&clk_ext3>, <&clk_ext4>;
120 clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1",
121 "clk_ext2", "clk_ext3", "clk_ext4";