1 # SPDX-License-Identifier: GPL-2.0-only
4 $id: http://devicetree.org/schemas/clock/qcom,lcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm LPASS Clock & Reset Controller
10 - Bjorn Andersson <andersson@kernel.org>
41 additionalProperties: false
55 - description: Board PXO source
56 - description: PLL 4 Vote clock
57 - description: MI2S codec clock
58 - description: Mic I2S codec clock
59 - description: Mic I2S spare clock
60 - description: Speaker I2S codec clock
61 - description: Speaker I2S spare clock
62 - description: PCM codec clock
68 - const: mi2s_codec_clk
69 - const: codec_i2s_mic_codec_clk
70 - const: spare_i2s_mic_codec_clk
71 - const: codec_i2s_spkr_codec_clk
72 - const: spare_i2s_spkr_codec_clk
73 - const: pcm_codec_clk
89 - description: Board CXO source
90 - description: PLL 4 Vote clock
91 - description: MI2S codec clock
92 - description: Mic I2S codec clock
93 - description: Mic I2S spare clock
94 - description: Speaker I2S codec clock
95 - description: Speaker I2S spare clock
96 - description: PCM codec clock
102 - const: mi2s_codec_clk
103 - const: codec_i2s_mic_codec_clk
104 - const: spare_i2s_mic_codec_clk
105 - const: codec_i2s_spkr_codec_clk
106 - const: spare_i2s_spkr_codec_clk
107 - const: pcm_codec_clk
115 clock-controller@28000000 {
116 compatible = "qcom,lcc-ipq8064";
117 reg = <0x28000000 0x1000>;