Bindings/display/bridge/renesas,lvds.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/bridge/renesas,lvds.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Renesas R-Car LVDS Encoder
   8
   9 maintainers:
  10   - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
  11
  12 description: |
  13   These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
  14   Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
  15
  16 properties:
  17   compatible:
  18     enum:
  19       - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders
  20       - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders
  21       - renesas,r8a7744-lvds # for RZ/G1N compatible LVDS encoders
  22       - renesas,r8a774a1-lvds # for RZ/G2M compatible LVDS encoders
  23       - renesas,r8a774b1-lvds # for RZ/G2N compatible LVDS encoders
  24       - renesas,r8a774c0-lvds # for RZ/G2E compatible LVDS encoders
  25       - renesas,r8a774e1-lvds # for RZ/G2H compatible LVDS encoders
  26       - renesas,r8a7790-lvds # for R-Car H2 compatible LVDS encoders
  27       - renesas,r8a7791-lvds # for R-Car M2-W compatible LVDS encoders
  28       - renesas,r8a7793-lvds # for R-Car M2-N compatible LVDS encoders
  29       - renesas,r8a7795-lvds # for R-Car H3 compatible LVDS encoders
  30       - renesas,r8a7796-lvds # for R-Car M3-W compatible LVDS encoders
  31       - renesas,r8a77961-lvds # for R-Car M3-W+ compatible LVDS encoders
  32       - renesas,r8a77965-lvds # for R-Car M3-N compatible LVDS encoders
  33       - renesas,r8a77970-lvds # for R-Car V3M compatible LVDS encoders
  34       - renesas,r8a77980-lvds # for R-Car V3H compatible LVDS encoders
  35       - renesas,r8a77990-lvds # for R-Car E3 compatible LVDS encoders
  36       - renesas,r8a77995-lvds # for R-Car D3 compatible LVDS encoders
  37
  38   reg:
  39     maxItems: 1
  40
  41   clocks:
  42     minItems: 1
  43     maxItems: 4
  44
  45   clock-names:
  46     minItems: 1
  47     maxItems: 4
  48
  49   resets:
  50     maxItems: 1
  51
  52   ports:
  53     $ref: /schemas/graph.yaml#/properties/ports
  54
  55     properties:
  56       port@0:
  57         $ref: /schemas/graph.yaml#/properties/port
  58         description: Parallel RGB input port
  59
  60       port@1:
  61         $ref: /schemas/graph.yaml#/properties/port
  62         description: LVDS output port
  63
  64     required:
  65       - port@0
  66       - port@1
  67
  68   power-domains:
  69     maxItems: 1
  70
  71   renesas,companion:
  72     $ref: /schemas/types.yaml#/definitions/phandle
  73     description:
  74       phandle to the companion LVDS encoder. This property is mandatory
  75       for the first LVDS encoder on R-Car D3 and E3, and RZ/G2E SoCs, and shall
  76       point to the second encoder to be used as a companion in dual-link mode.
  77       It shall not be set for any other LVDS encoder.
  78
  79 required:
  80   - compatible
  81   - reg
  82   - clocks
  83   - power-domains
  84   - resets
  85   - ports
  86
  87 if:
  88   properties:
  89     compatible:
  90       enum:
  91         - renesas,r8a774c0-lvds
  92         - renesas,r8a77990-lvds
  93         - renesas,r8a77995-lvds
  94 then:
  95   properties:
  96     clocks:
  97       minItems: 1
  98       items:
  99         - description: Functional clock
 100         - description: EXTAL input clock
 101         - description: DU_DOTCLKIN0 input clock
 102         - description: DU_DOTCLKIN1 input clock
 103
 104     clock-names:
 105       minItems: 1
 106       items:
 107         - const: fck
 108         # The LVDS encoder can use the EXTAL or DU_DOTCLKINx clocks.
 109         # These clocks are optional.
 110         - enum:
 111             - extal
 112             - dclkin.0
 113             - dclkin.1
 114         - enum:
 115             - extal
 116             - dclkin.0
 117             - dclkin.1
 118         - enum:
 119             - extal
 120             - dclkin.0
 121             - dclkin.1
 122
 123   required:
 124     - clock-names
 125
 126 else:
 127   properties:
 128     clocks:
 129       items:
 130         - description: Functional clock
 131
 132     clock-names:
 133       items:
 134         - const: fck
 135
 136     renesas,companion: false
 137
 138 additionalProperties: false
 139
 140 examples:
 141   - |
 142     #include <dt-bindings/clock/renesas-cpg-mssr.h>
 143     #include <dt-bindings/power/r8a7795-sysc.h>
 144
 145     lvds@feb90000 {
 146         compatible = "renesas,r8a7795-lvds";
 147         reg = <0xfeb90000 0x14>;
 148         clocks = <&cpg CPG_MOD 727>;
 149         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 150         resets = <&cpg 727>;
 151
 152         ports {
 153             #address-cells = <1>;
 154             #size-cells = <0>;
 155
 156             port@0 {
 157                 reg = <0>;
 158                 lvds_in: endpoint {
 159                     remote-endpoint = <&du_out_lvds0>;
 160                 };
 161             };
 162             port@1 {
 163                 reg = <1>;
 164                 lvds_out: endpoint {
 165                     remote-endpoint = <&panel_in>;
 166                 };
 167             };
 168         };
 169     };
 170
 171   - |
 172     #include <dt-bindings/clock/renesas-cpg-mssr.h>
 173     #include <dt-bindings/power/r8a77990-sysc.h>
 174
 175     lvds0: lvds@feb90000 {
 176         compatible = "renesas,r8a77990-lvds";
 177         reg = <0xfeb90000 0x20>;
 178         clocks = <&cpg CPG_MOD 727>,
 179                  <&x13_clk>,
 180                  <&extal_clk>;
 181         clock-names = "fck", "dclkin.0", "extal";
 182         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 183         resets = <&cpg 727>;
 184
 185         renesas,companion = <&lvds1>;
 186
 187         ports {
 188             #address-cells = <1>;
 189             #size-cells = <0>;
 190
 191             port@0 {
 192                 reg = <0>;
 193                 lvds0_in: endpoint {
 194                     remote-endpoint = <&du_out_lvds0>;
 195                 };
 196             };
 197             port@1 {
 198                 reg = <1>;
 199                 lvds0_out: endpoint {
 200                     remote-endpoint = <&panel_in1>;
 201                 };
 202             };
 203         };
 204     };
 205
 206     lvds1: lvds@feb90100 {
 207         compatible = "renesas,r8a77990-lvds";
 208         reg = <0xfeb90100 0x20>;
 209         clocks = <&cpg CPG_MOD 727>,
 210                  <&x13_clk>,
 211                  <&extal_clk>;
 212         clock-names = "fck", "dclkin.0", "extal";
 213         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 214         resets = <&cpg 726>;
 215
 216         ports {
 217             #address-cells = <1>;
 218             #size-cells = <0>;
 219
 220             port@0 {
 221                 reg = <0>;
 222                 lvds1_in: endpoint {
 223                     remote-endpoint = <&du_out_lvds1>;
 224                 };
 225             };
 226             port@1 {
 227                 reg = <1>;
 228                 lvds1_out: endpoint {
 229                     remote-endpoint = <&panel_in2>;
 230                 };
 231             };
 232         };
 233     };
 234
 235 ...