Bindings/dsp/fsl,dsp.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: NXP i.MX8 DSP core
   8
   9 maintainers:
  10   - Daniel Baluta <daniel.baluta@nxp.com>
  11   - Shengjiu Wang <shengjiu.wang@nxp.com>
  12
  13 description: |
  14   Some boards from i.MX8 family contain a DSP core used for
  15   advanced pre- and post- audio processing.
  16
  17 properties:
  18   compatible:
  19     enum:
  20       - fsl,imx8qxp-dsp
  21       - fsl,imx8qm-dsp
  22       - fsl,imx8mp-dsp
  23       - fsl,imx8ulp-dsp
  24       - fsl,imx8qxp-hifi4
  25       - fsl,imx8qm-hifi4
  26       - fsl,imx8mp-hifi4
  27       - fsl,imx8ulp-hifi4
  28
  29   reg:
  30     maxItems: 1
  31
  32   clocks:
  33     items:
  34       - description: ipg clock
  35       - description: ocram clock
  36       - description: core clock
  37       - description: debug interface clock
  38       - description: message unit clock
  39     minItems: 3
  40
  41   clock-names:
  42     items:
  43       - const: ipg
  44       - const: ocram
  45       - const: core
  46       - const: debug
  47       - const: mu
  48     minItems: 3
  49
  50   power-domains:
  51     description:
  52       List of phandle and PM domain specifier as documented in
  53       Documentation/devicetree/bindings/power/power_domain.txt
  54     minItems: 1
  55     maxItems: 4
  56
  57   mboxes:
  58     description:
  59       List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB
  60       or - 1 channel for TX, 1 channel for RX, 1 channel for RXDB
  61       (see mailbox/fsl,mu.txt)
  62     minItems: 3
  63     maxItems: 4
  64
  65   mbox-names:
  66     minItems: 3
  67     maxItems: 4
  68
  69   memory-region:
  70     description:
  71       phandle to a node describing reserved memory (System RAM memory)
  72       used by DSP (see bindings/reserved-memory/reserved-memory.txt)
  73     minItems: 1
  74     maxItems: 4
  75
  76   firmware-name:
  77     description: |
  78       Default name of the firmware to load to the remote processor.
  79
  80   fsl,dsp-ctrl:
  81     $ref: /schemas/types.yaml#/definitions/phandle
  82     description:
  83       Phandle to syscon block which provide access for processor enablement
  84
  85 required:
  86   - compatible
  87   - reg
  88   - clocks
  89   - clock-names
  90   - power-domains
  91   - mboxes
  92   - mbox-names
  93   - memory-region
  94
  95 allOf:
  96   - if:
  97       properties:
  98         compatible:
  99           contains:
 100             enum:
 101               - fsl,imx8qxp-dsp
 102               - fsl,imx8qm-dsp
 103               - fsl,imx8qxp-hifi4
 104               - fsl,imx8qm-hifi4
 105     then:
 106       properties:
 107         power-domains:
 108           minItems: 4
 109     else:
 110       properties:
 111         power-domains:
 112           maxItems: 1
 113
 114   - if:
 115       properties:
 116         compatible:
 117           contains:
 118             enum:
 119               - fsl,imx8qxp-hifi4
 120               - fsl,imx8qm-hifi4
 121               - fsl,imx8mp-hifi4
 122               - fsl,imx8ulp-hifi4
 123     then:
 124       properties:
 125         memory-region:
 126           minItems: 4
 127         mboxes:
 128           maxItems: 3
 129         mbox-names:
 130           items:
 131             - const: tx
 132             - const: rx
 133             - const: rxdb
 134     else:
 135       properties:
 136         memory-region:
 137           maxItems: 1
 138         mboxes:
 139           minItems: 4
 140         mbox-names:
 141           items:
 142             - const: txdb0
 143             - const: txdb1
 144             - const: rxdb0
 145             - const: rxdb1
 146
 147 additionalProperties: false
 148
 149 examples:
 150   - |
 151     #include <dt-bindings/firmware/imx/rsrc.h>
 152     #include <dt-bindings/clock/imx8-clock.h>
 153     dsp@596e8000 {
 154         compatible = "fsl,imx8qxp-dsp";
 155         reg = <0x596e8000 0x88000>;
 156         clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>,
 157                  <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>,
 158                  <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>;
 159         clock-names = "ipg", "ocram", "core";
 160         power-domains = <&pd IMX_SC_R_MU_13A>,
 161                         <&pd IMX_SC_R_MU_13B>,
 162                         <&pd IMX_SC_R_DSP>,
 163                         <&pd IMX_SC_R_DSP_RAM>;
 164         mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
 165         mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
 166         memory-region = <&dsp_reserved>;
 167     };
 168   - |
 169     #include <dt-bindings/clock/imx8mp-clock.h>
 170     dsp_reserved: dsp@92400000 {
 171       reg = <0x92400000 0x1000000>;
 172       no-map;
 173     };
 174     dsp_vdev0vring0: vdev0vring0@942f0000 {
 175       reg = <0x942f0000 0x8000>;
 176       no-map;
 177     };
 178     dsp_vdev0vring1: vdev0vring1@942f8000 {
 179       reg = <0x942f8000 0x8000>;
 180       no-map;
 181     };
 182     dsp_vdev0buffer: vdev0buffer@94300000 {
 183       compatible = "shared-dma-pool";
 184       reg = <0x94300000 0x100000>;
 185       no-map;
 186     };
 187
 188     dsp: dsp@3b6e8000 {
 189       compatible = "fsl,imx8mp-hifi4";
 190       reg = <0x3b6e8000 0x88000>;
 191       clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>,
 192                <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG>,
 193                <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>,
 194                <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT>;
 195       clock-names = "ipg", "ocram", "core", "debug";
 196       firmware-name = "imx/dsp/hifi4.bin";
 197       power-domains = <&audiomix_pd>;
 198       mbox-names = "tx", "rx", "rxdb";
 199       mboxes = <&mu2 0 0>,
 200                <&mu2 1 0>,
 201                <&mu2 3 0>;
 202       memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
 203                       <&dsp_vdev0vring1>, <&dsp_reserved>;
 204       fsl,dsp-ctrl = <&audio_blk_ctrl>;
 205     };