1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson Local I/O Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips and
14 Loongson-2K1000 chip, as the primary package interrupt controller which
15 can route local I/O interrupt to interrupt lines of cores.
18 - $ref: /schemas/interrupt-controller.yaml#
23 - loongson,liointc-1.0
24 - loongson,liointc-1.0a
25 - loongson,liointc-2.0
37 interrupt-controller: true
41 Interrupt source of the CPU interrupts.
46 description: List of names for the parent interrupts.
57 loongson,parent_int_map:
59 This property points how the children interrupts will be mapped into CPU
60 interrupt lines. Each cell refers to a parent interrupt line from 0 to 3
61 and each bit in the cell refers to a child interrupt from 0 to 31.
62 If a CPU interrupt line didn't connect with liointc, then keep its
64 $ref: /schemas/types.yaml#/definitions/uint32-array
72 - interrupt-controller
74 - loongson,parent_int_map
77 unevaluatedProperties: false
84 - loongson,liointc-2.0
101 iointc: interrupt-controller@3ff01400 {
102 compatible = "loongson,liointc-1.0";
103 reg = <0x3ff01400 0x64>;
105 interrupt-controller;
106 #interrupt-cells = <2>;
108 interrupt-parent = <&cpuintc>;
109 interrupts = <2>, <3>;
110 interrupt-names = "int0", "int1";
112 loongson,parent_int_map = <0xf0ffffff>, /* int0 */
113 <0x0f000000>, /* int1 */
114 <0x00000000>, /* int2 */
115 <0x00000000>; /* int3 */