Bindings/mmc/amlogic,meson-gx-mmc.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-gx-mmc.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Amlogic SD / eMMC controller for S905/GXBB family SoCs
   8
   9 description:
  10   The MMC 5.1 compliant host controller on Amlogic provides the
  11   interface for SD, eMMC and SDIO devices
  12
  13 maintainers:
  14   - Neil Armstrong <neil.armstrong@linaro.org>
  15
  16 allOf:
  17   - $ref: mmc-controller.yaml#
  18
  19 properties:
  20   compatible:
  21     oneOf:
  22       - const: amlogic,meson-axg-mmc
  23       - items:
  24           - const: amlogic,meson-gx-mmc
  25           - const: amlogic,meson-gxbb-mmc
  26
  27   reg:
  28     maxItems: 1
  29
  30   interrupts:
  31     minItems: 1
  32     items:
  33       - description: mmc controller instance
  34       - description: card detect
  35
  36   clocks:
  37     maxItems: 3
  38
  39   clock-names:
  40     items:
  41       - const: core
  42       - const: clkin0
  43       - const: clkin1
  44
  45   resets:
  46     maxItems: 1
  47
  48   amlogic,dram-access-quirk:
  49     type: boolean
  50     description:
  51       set when controller's internal DMA engine cannot access the DRAM memory,
  52       like on the G12A dedicated SDIO controller.
  53
  54 required:
  55   - compatible
  56   - reg
  57   - interrupts
  58   - clocks
  59   - clock-names
  60   - resets
  61
  62 unevaluatedProperties: false
  63
  64 examples:
  65   - |
  66     #include <dt-bindings/interrupt-controller/irq.h>
  67     #include <dt-bindings/interrupt-controller/arm-gic.h>
  68     mmc@70000 {
  69         compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
  70         reg = <0x70000 0x2000>;
  71         interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
  72         clocks = <&clk_mmc>, <&xtal>, <&clk_div>;
  73         clock-names = "core", "clkin0", "clkin1";
  74         pinctrl-0 = <&emm_pins>;
  75         resets = <&reset_mmc>;
  76     };