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1 * Freescale Enhanced Secure Digital Host Controller (eSDHC)
2
3 The Enhanced Secure Digital Host Controller provides an interface
4 for MMC, SD, and SDIO types of memory cards.
5
6 This file documents differences between the core properties described
7 by mmc.txt and the properties used by the sdhci-esdhc driver.
8
9 Required properties:
10 - compatible : should be "fsl,esdhc", or "fsl,<chip>-esdhc".
11 Possible compatibles for PowerPC:
12 "fsl,mpc8536-esdhc"
13 "fsl,mpc8378-esdhc"
14 "fsl,p2020-esdhc"
15 "fsl,p4080-esdhc"
16 "fsl,t1040-esdhc"
17 "fsl,t4240-esdhc"
18 Possible compatibles for ARM:
19 "fsl,ls1012a-esdhc"
20 "fsl,ls1028a-esdhc"
21 "fsl,ls1088a-esdhc"
22 "fsl,ls1043a-esdhc"
23 "fsl,ls1046a-esdhc"
24 "fsl,ls2080a-esdhc"
25 - clock-frequency : specifies eSDHC base clock frequency.
26
27 Optional properties:
28 - sdhci,wp-inverted : specifies that eSDHC controller reports
29 inverted write-protect state; New devices should use the generic
30 "wp-inverted" property.
31 - sdhci,1-bit-only : specifies that a controller can only handle
32 1-bit data transfers. New devices should use the generic
33 "bus-width = <1>" property.
34 - sdhci,auto-cmd12: specifies that a controller can only handle auto
35 CMD12.
36 - voltage-ranges : two cells are required, first cell specifies minimum
37 slot voltage (mV), second cell specifies maximum slot voltage (mV).
38 Several ranges could be specified.
39 - little-endian : If the host controller is little-endian mode, specify
40 this property. The default endian mode is big-endian.
41
42 Example:
43
44 sdhci@2e000 {
45 compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
46 reg = <0x2e000 0x1000>;
47 interrupts = <42 0x8>;
48 interrupt-parent = <&ipic>;
49 /* Filled in by U-Boot */
50 clock-frequency = <0>;
51 voltage-ranges = <3300 3300>;
52 };