Bindings/net/can/allwinner,sun4i-a10-can.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/can/allwinner,sun4i-a10-can.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Allwinner A10 CAN Controller
   8
   9 maintainers:
  10   - Chen-Yu Tsai <wens@csie.org>
  11   - Maxime Ripard <mripard@kernel.org>
  12
  13 allOf:
  14   - $ref: can-controller.yaml#
  15
  16 properties:
  17   compatible:
  18     oneOf:
  19       - items:
  20           - const: allwinner,sun7i-a20-can
  21           - const: allwinner,sun4i-a10-can
  22       - const: allwinner,sun4i-a10-can
  23       - const: allwinner,sun8i-r40-can
  24       - const: allwinner,sun20i-d1-can
  25
  26   reg:
  27     maxItems: 1
  28
  29   interrupts:
  30     maxItems: 1
  31
  32   clocks:
  33     maxItems: 1
  34
  35   resets:
  36     maxItems: 1
  37
  38 if:
  39   properties:
  40     compatible:
  41       enum:
  42         - allwinner,sun8i-r40-can
  43         - allwinner,sun20i-d1-can
  44
  45 then:
  46   required:
  47     - resets
  48
  49 required:
  50   - compatible
  51   - reg
  52   - interrupts
  53   - clocks
  54
  55 additionalProperties: false
  56
  57 examples:
  58   - |
  59     #include <dt-bindings/interrupt-controller/arm-gic.h>
  60     #include <dt-bindings/clock/sun7i-a20-ccu.h>
  61
  62     can0: can@1c2bc00 {
  63         compatible = "allwinner,sun7i-a20-can",
  64                      "allwinner,sun4i-a10-can";
  65         reg = <0x01c2bc00 0x400>;
  66         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
  67         clocks = <&ccu CLK_APB1_CAN>;
  68     };
  69   - |
  70     #define RST_BUS_CAN         68
  71     #define CLK_BUS_CAN         91
  72     can1: can@1c2bc00 {
  73         compatible = "allwinner,sun8i-r40-can";
  74         reg = <0x01c2bc00 0x400>;
  75         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
  76         clocks = <&ccu CLK_BUS_CAN>;
  77         resets = <&ccu RST_BUS_CAN>;
  78     };
  79
  80 ...