Bindings/net/wireless/mediatek,mt76.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/net/wireless/mediatek,mt76.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: MediaTek mt76 wireless devices
   9
  10 maintainers:
  11   - Felix Fietkau <nbd@nbd.name>
  12   - Lorenzo Bianconi <lorenzo@kernel.org>
  13   - Ryder Lee <ryder.lee@mediatek.com>
  14
  15 description: |
  16   This node provides properties for configuring the MediaTek mt76xx
  17   wireless device. The node is expected to be specified as a child
  18   node of the PCI controller to which the wireless chip is connected.
  19   Alternatively, it can specify the wireless part of the MT7628/MT7688
  20   or MT7622/MT7986 SoC.
  21
  22 allOf:
  23   - $ref: ieee80211.yaml#
  24
  25 properties:
  26   compatible:
  27     enum:
  28       - mediatek,mt76
  29       - mediatek,mt7628-wmac
  30       - mediatek,mt7622-wmac
  31       - mediatek,mt7981-wmac
  32       - mediatek,mt7986-wmac
  33
  34   reg:
  35     minItems: 1
  36     maxItems: 3
  37     description:
  38       MT7986 should contain 3 regions consys, dcm, and sku, in this order.
  39
  40   interrupts:
  41     maxItems: 1
  42
  43   power-domains:
  44     maxItems: 1
  45
  46   memory-region:
  47     maxItems: 1
  48
  49   resets:
  50     maxItems: 1
  51     description:
  52       Specify the consys reset for mt7986.
  53
  54   reset-names:
  55     const: consys
  56
  57   clocks:
  58     maxItems: 2
  59     description:
  60       Specify the consys clocks for mt7986.
  61
  62   clock-names:
  63     items:
  64       - const: mcu
  65       - const: ap2conn
  66
  67   mediatek,infracfg:
  68     $ref: /schemas/types.yaml#/definitions/phandle
  69     description:
  70       Phandle to the infrastructure bus fabric syscon node.
  71       This property is MT7622 specific
  72
  73   ieee80211-freq-limit: true
  74
  75   nvmem-cells:
  76     items:
  77       - description: NVMEM cell with EEPROM
  78
  79   nvmem-cell-names:
  80     items:
  81       - const: eeprom
  82
  83   mediatek,eeprom-data:
  84     $ref: /schemas/types.yaml#/definitions/uint32-array
  85     description:
  86       EEPROM data embedded as array.
  87
  88   mediatek,mtd-eeprom:
  89     $ref: /schemas/types.yaml#/definitions/phandle-array
  90     items:
  91       - items:
  92           - description: phandle to MTD partition
  93           - description: offset containing EEPROM data
  94     description:
  95       Phandle to a MTD partition + offset containing EEPROM data
  96     deprecated: true
  97
  98   big-endian:
  99     $ref: /schemas/types.yaml#/definitions/flag
 100     description:
 101       Specify if the radio eeprom partition is written in big-endian
 102
 103   mediatek,eeprom-merge-otp:
 104     type: boolean
 105     description:
 106       Merge EEPROM data with OTP data. Can be used on boards where the flash
 107       calibration data is generic and specific calibration data should be
 108       pulled from the OTP ROM
 109
 110   mediatek,disable-radar-background:
 111     type: boolean
 112     description:
 113       Disable/enable radar/CAC detection running on a dedicated offchannel
 114       chain available on some hw.
 115       Background radar/CAC detection allows to avoid the CAC downtime
 116       switching on a different channel during CAC detection on the selected
 117       radar channel.
 118
 119   led:
 120     type: object
 121     $ref: /schemas/leds/common.yaml#
 122     additionalProperties: false
 123     properties:
 124       led-active-low:
 125         description:
 126           LED is enabled with ground signal.
 127         type: boolean
 128
 129       led-sources:
 130         maxItems: 1
 131
 132   power-limits:
 133     type: object
 134     additionalProperties: false
 135     patternProperties:
 136       "^r[0-9]+":
 137         type: object
 138         additionalProperties: false
 139         properties:
 140           regdomain:
 141             $ref: /schemas/types.yaml#/definitions/string
 142             description:
 143               Regdomain refers to a legal regulatory region. Different
 144               countries define different levels of allowable transmitter
 145               power, time that a channel can be occupied, and different
 146               available channels
 147             enum:
 148               - FCC
 149               - ETSI
 150               - JP
 151
 152         patternProperties:
 153           "^txpower-[256]g$":
 154             type: object
 155             additionalProperties: false
 156             patternProperties:
 157               "^b[0-9]+$":
 158                 type: object
 159                 additionalProperties: false
 160                 properties:
 161                   channels:
 162                     $ref: /schemas/types.yaml#/definitions/uint32-array
 163                     minItems: 2
 164                     maxItems: 2
 165                     description:
 166                       Pairs of first and last channel number of the selected
 167                       band
 168
 169                   rates-cck:
 170                     $ref: /schemas/types.yaml#/definitions/uint8-array
 171                     minItems: 4
 172                     maxItems: 4
 173                     description:
 174                       4 half-dBm per-rate power limit values
 175
 176                   rates-ofdm:
 177                     $ref: /schemas/types.yaml#/definitions/uint8-array
 178                     minItems: 8
 179                     maxItems: 8
 180                     description:
 181                       8 half-dBm per-rate power limit values
 182
 183                   rates-mcs:
 184                     $ref: /schemas/types.yaml#/definitions/uint8-matrix
 185                     description:
 186                       Sets of per-rate power limit values for 802.11n/802.11ac
 187                       rates for multiple channel bandwidth settings.
 188                       Each set starts with the number of channel bandwidth
 189                       settings for which the rate set applies, followed by
 190                       either 8 or 10 power limit values. The order of the
 191                       channel bandwidth settings is 20, 40, 80 and 160 MHz.
 192                     maxItems: 4
 193                     items:
 194                       minItems: 9
 195                       maxItems: 11
 196
 197                   rates-ru:
 198                     $ref: /schemas/types.yaml#/definitions/uint8-matrix
 199                     description:
 200                       Sets of per-rate power limit values for 802.11ax rates
 201                       for multiple channel bandwidth or resource unit settings.
 202                       Each set starts with the number of channel bandwidth or
 203                       resource unit settings for which the rate set applies,
 204                       followed by 12 power limit values. The order of the
 205                       channel resource unit settings is RU26, RU52, RU106,
 206                       RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160.
 207                     items:
 208                       minItems: 13
 209                       maxItems: 13
 210
 211                   txs-delta:
 212                     $ref: /schemas/types.yaml#/definitions/uint32-array
 213                     description:
 214                       Half-dBm power delta for different numbers of antennas
 215
 216 required:
 217   - compatible
 218   - reg
 219
 220 unevaluatedProperties: false
 221
 222 examples:
 223   - |
 224     pcie0 {
 225       #address-cells = <3>;
 226       #size-cells = <2>;
 227       wifi@0,0 {
 228         compatible = "mediatek,mt76";
 229         reg = <0x0000 0 0 0 0>;
 230         ieee80211-freq-limit = <5000000 6000000>;
 231         mediatek,mtd-eeprom = <&factory 0x8000>;
 232         big-endian;
 233
 234         led {
 235           led-sources = <2>;
 236         };
 237
 238         power-limits {
 239           r0 {
 240             regdomain = "FCC";
 241             txpower-5g {
 242                b0 {
 243                    channels = <36 48>;
 244                    rates-ofdm = /bits/ 8 <23 23 23 23 23 23 23 23>;
 245                    rates-mcs = /bits/ 8 <1 23 23 23 23 23 23 23 23 23 23>,
 246                                /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22>;
 247                    rates-ru = /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22 22 22>,
 248                               /bits/ 8 <4 20 20 20 20 20 20 20 20 20 20 20 20>;
 249                };
 250                b1 {
 251                    channels = <100 181>;
 252                    rates-ofdm = /bits/ 8 <14 14 14 14 14 14 14 14>;
 253                    rates-mcs = /bits/ 8  <4 14 14 14 14 14 14 14 14 14 14>;
 254                    txs-delta = <12 9 6>;
 255                    rates-ru = /bits/ 8  <7 14 14 14 14 14 14 14 14 14 14 14 14>;
 256                };
 257              };
 258           };
 259         };
 260       };
 261     };
 262
 263   - |
 264     wifi@10300000 {
 265       compatible = "mediatek,mt7628-wmac";
 266       reg = <0x10300000 0x100000>;
 267
 268       interrupt-parent = <&cpuintc>;
 269       interrupts = <6>;
 270
 271       nvmem-cells = <&eeprom>;
 272       nvmem-cell-names = "eeprom";
 273     };
 274
 275   - |
 276     #include <dt-bindings/interrupt-controller/arm-gic.h>
 277     #include <dt-bindings/interrupt-controller/irq.h>
 278     wifi@18000000 {
 279       compatible = "mediatek,mt7622-wmac";
 280       reg = <0x10300000 0x100000>;
 281       interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>;
 282
 283       mediatek,infracfg = <&infracfg>;
 284
 285       power-domains = <&scpsys 3>;
 286     };
 287
 288   - |
 289     wifi@18000000 {
 290         compatible = "mediatek,mt7986-wmac";
 291         resets = <&watchdog 23>;
 292         reset-names = "consys";
 293         reg = <0x18000000 0x1000000>,
 294               <0x10003000 0x1000>,
 295               <0x11d10000 0x1000>;
 296         interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
 297         clocks = <&topckgen 50>,
 298                  <&topckgen 62>;
 299         clock-names = "mcu", "ap2conn";
 300         memory-region = <&wmcpu_emi>;
 301     };