Bindings/pci/faraday,ftpci100.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pci/faraday,ftpci100.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Faraday Technology FTPCI100 PCI Host Bridge
   8
   9 maintainers:
  10   - Linus Walleij <linus.walleij@linaro.org>
  11
  12 description: |
  13     This PCI bridge is found inside that Cortina Systems Gemini SoC platform and
  14     is a generic IP block from Faraday Technology. It exists in two variants:
  15     plain and dual PCI. The plain version embeds a cascading interrupt controller
  16     into the host bridge. The dual version routes the interrupts to the host
  17     chips interrupt controller.
  18     The host controller appear on the PCI bus with vendor ID 0x159b (Faraday
  19     Technology) and product ID 0x4321.
  20     I/O space considerations:
  21     The plain variant has 128MiB of non-prefetchable memory space, whereas the
  22     "dual" variant has 64MiB. Take this into account when describing the ranges.
  23
  24     Interrupt map considerations:
  25
  26     The "dual" variant will get INT A, B, C, D from the system interrupt controller
  27     and should point to respective interrupt in that controller in its interrupt-map.
  28
  29     The code which is the only documentation of how the Faraday PCI (the non-dual
  30     variant) interrupts assigns the default interrupt mapping/swizzling has
  31     typically been like this, doing the swizzling on the interrupt controller side
  32     rather than in the interconnect:
  33
  34     interrupt-map-mask = <0xf800 0 0 7>;
  35     interrupt-map =
  36         <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
  37         <0x4800 0 0 2 &pci_intc 1>,
  38         <0x4800 0 0 3 &pci_intc 2>,
  39         <0x4800 0 0 4 &pci_intc 3>,
  40         <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
  41         <0x5000 0 0 2 &pci_intc 2>,
  42         <0x5000 0 0 3 &pci_intc 3>,
  43         <0x5000 0 0 4 &pci_intc 0>,
  44         <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
  45         <0x5800 0 0 2 &pci_intc 3>,
  46         <0x5800 0 0 3 &pci_intc 0>,
  47         <0x5800 0 0 4 &pci_intc 1>,
  48         <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
  49         <0x6000 0 0 2 &pci_intc 0>,
  50         <0x6000 0 0 3 &pci_intc 1>,
  51         <0x6000 0 0 4 &pci_intc 2>;
  52
  53 allOf:
  54   - $ref: /schemas/pci/pci-bus.yaml#
  55
  56 properties:
  57   compatible:
  58     oneOf:
  59       - items:
  60           - const: cortina,gemini-pci
  61           - const: faraday,ftpci100
  62       - items:
  63           - const: cortina,gemini-pci-dual
  64           - const: faraday,ftpci100-dual
  65       - const: faraday,ftpci100
  66       - const: faraday,ftpci100-dual
  67
  68   reg:
  69     maxItems: 1
  70
  71   "#address-cells":
  72     const: 3
  73
  74   "#interrupt-cells":
  75     const: 1
  76
  77   ranges:
  78     minItems: 2
  79
  80   dma-ranges:
  81     minItems: 3
  82     description: |
  83       three ranges for the inbound memory region. The ranges must
  84       be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB, 64MB,
  85       128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked as
  86       pre-fetchable.
  87
  88   clocks:
  89     items:
  90       - description: peripheral clock (PCLK)
  91       - description: PCI clock (PCICLK).
  92     description: |
  93       If these are not present, they are assumed to be
  94       hard-wired enabled and always on. The PCI clock will be 33 or 66 MHz.
  95
  96   clock-names:
  97     items:
  98       - const: PCLK
  99       - const: PCICLK
 100
 101   interrupt-controller:
 102     type: object
 103
 104 required:
 105   - reg
 106   - compatible
 107   - "#interrupt-cells"
 108   - interrupt-map-mask
 109   - interrupt-map
 110   - dma-ranges
 111
 112 if:
 113   properties:
 114     compatible:
 115       contains:
 116         const: faraday,ftpci100
 117 then:
 118   required:
 119     - interrupt-controller
 120
 121 unevaluatedProperties: false
 122
 123 examples:
 124   - |
 125     #include <dt-bindings/interrupt-controller/irq.h>
 126     pci@50000000 {
 127       compatible = "cortina,gemini-pci", "faraday,ftpci100";
 128       reg = <0x50000000 0x100>;
 129       device_type = "pci";
 130       #address-cells = <3>;
 131       #size-cells = <2>;
 132       #interrupt-cells = <1>;
 133
 134       bus-range = <0x00 0xff>;
 135       ranges = /* 1MiB I/O space 0x50000000-0x500fffff */
 136         <0x01000000 0 0          0x50000000 0 0x00100000>,
 137         /* 128MiB non-prefetchable memory 0x58000000-0x5fffffff */
 138         <0x02000000 0 0x58000000 0x58000000 0 0x08000000>;
 139
 140       /* DMA ranges */
 141       dma-ranges =
 142         /* 128MiB at 0x00000000-0x07ffffff */
 143         <0x02000000 0 0x00000000 0x00000000 0 0x08000000>,
 144         /* 64MiB at 0x00000000-0x03ffffff */
 145         <0x02000000 0 0x00000000 0x00000000 0 0x04000000>,
 146         /* 64MiB at 0x00000000-0x03ffffff */
 147         <0x02000000 0 0x00000000 0x00000000 0 0x04000000>;
 148
 149       interrupt-map-mask = <0xf800 0 0 7>;
 150       interrupt-map =
 151         <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
 152         <0x4800 0 0 2 &pci_intc 1>,
 153         <0x4800 0 0 3 &pci_intc 2>,
 154         <0x4800 0 0 4 &pci_intc 3>,
 155         <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
 156         <0x5000 0 0 2 &pci_intc 2>,
 157         <0x5000 0 0 3 &pci_intc 3>,
 158         <0x5000 0 0 4 &pci_intc 0>,
 159         <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
 160         <0x5800 0 0 2 &pci_intc 3>,
 161         <0x5800 0 0 3 &pci_intc 0>,
 162         <0x5800 0 0 4 &pci_intc 1>,
 163         <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
 164         <0x6000 0 0 2 &pci_intc 0>,
 165         <0x6000 0 0 3 &pci_intc 0>,
 166         <0x6000 0 0 4 &pci_intc 0>;
 167       pci_intc: interrupt-controller {
 168         interrupt-parent = <&intcon>;
 169         interrupt-controller;
 170         interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
 171         #address-cells = <0>;
 172         #interrupt-cells = <1>;
 173       };
 174     };