1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7280 SoC LPASS LPI TLMM
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
14 (LPASS) Low Power Island (LPI) of Qualcomm SC7280 SoC.
18 const: qcom,sc7280-lpass-lpi-pinctrl
26 description: Specifying the pin number and flags, as defined in
27 include/dt-bindings/gpio/gpio.h
36 - $ref: "#/$defs/qcom-sc7280-lpass-state"
39 $ref: "#/$defs/qcom-sc7280-lpass-state"
40 additionalProperties: false
43 qcom-sc7280-lpass-state:
46 Pinctrl node's client devices use subnodes for desired pin configuration.
47 Client device subnodes use below standard properties.
48 $ref: /schemas/pinctrl/pincfg-node.yaml
53 List of gpio pins affected by the properties specified in this
57 - pattern: "^gpio([0-9]|1[0-4])$"
62 enum: [ gpio, swr_tx_clk, qua_mi2s_sclk, swr_tx_data, qua_mi2s_ws,
63 qua_mi2s_data, swr_rx_clk, swr_rx_data, dmic1_clk, i2s1_clk,
64 dmic1_data, i2s1_ws, dmic2_clk, dmic2_data, i2s1_data,
65 i2s2_clk, wsa_swr_clk, i2s2_ws, wsa_swr_data, dmic3_clk,
66 dmic3_data, i2s2_data ]
68 Specify the alternative function to be configured for the specified
72 enum: [2, 4, 6, 8, 10, 12, 14, 16]
75 Selects the drive strength for the specified pins, in mA.
82 1: Higher Slew rate (faster edges)
83 2: Lower Slew rate (slower edges)
84 3: Reserved (No adjustments)
97 additionalProperties: false
106 additionalProperties: false
110 lpass_tlmm: pinctrl@33c0000 {
111 compatible = "qcom,sc7280-lpass-lpi-pinctrl";
112 reg = <0x33c0000 0x20000>,
116 gpio-ranges = <&lpass_tlmm 0 0 15>;
121 function = "dmic1_clk";
124 dmic01-clk-sleep-pins {
126 function = "dmic1_clk";
130 tx-swr-data-sleep-state {
131 pins = "gpio1", "gpio2", "gpio14";
132 function = "swr_tx_data";