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1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm SC7280 SoC LPASS LPI TLMM
8
9 maintainers:
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11
12 description:
13 Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
14 (LPASS) Low Power Island (LPI) of Qualcomm SC7280 SoC.
15
16 properties:
17 compatible:
18 const: qcom,sc7280-lpass-lpi-pinctrl
19
20 reg:
21 maxItems: 2
22
23 gpio-controller: true
24
25 "#gpio-cells":
26 description: Specifying the pin number and flags, as defined in
27 include/dt-bindings/gpio/gpio.h
28 const: 2
29
30 gpio-ranges:
31 maxItems: 1
32
33 patternProperties:
34 "-state$":
35 oneOf:
36 - $ref: "#/$defs/qcom-sc7280-lpass-state"
37 - patternProperties:
38 "-pins$":
39 $ref: "#/$defs/qcom-sc7280-lpass-state"
40 additionalProperties: false
41
42 $defs:
43 qcom-sc7280-lpass-state:
44 type: object
45 description:
46 Pinctrl node's client devices use subnodes for desired pin configuration.
47 Client device subnodes use below standard properties.
48 $ref: /schemas/pinctrl/pincfg-node.yaml
49
50 properties:
51 pins:
52 description:
53 List of gpio pins affected by the properties specified in this
54 subnode.
55 items:
56 oneOf:
57 - pattern: "^gpio([0-9]|1[0-4])$"
58 minItems: 1
59 maxItems: 15
60
61 function:
62 enum: [ gpio, swr_tx_clk, qua_mi2s_sclk, swr_tx_data, qua_mi2s_ws,
63 qua_mi2s_data, swr_rx_clk, swr_rx_data, dmic1_clk, i2s1_clk,
64 dmic1_data, i2s1_ws, dmic2_clk, dmic2_data, i2s1_data,
65 i2s2_clk, wsa_swr_clk, i2s2_ws, wsa_swr_data, dmic3_clk,
66 dmic3_data, i2s2_data ]
67 description:
68 Specify the alternative function to be configured for the specified
69 pins.
70
71 drive-strength:
72 enum: [2, 4, 6, 8, 10, 12, 14, 16]
73 default: 2
74 description:
75 Selects the drive strength for the specified pins, in mA.
76
77 slew-rate:
78 enum: [0, 1, 2, 3]
79 default: 0
80 description: |
81 0: No adjustments
82 1: Higher Slew rate (faster edges)
83 2: Lower Slew rate (slower edges)
84 3: Reserved (No adjustments)
85
86 bias-pull-down: true
87 bias-pull-up: true
88 bias-bus-hold: true
89 bias-disable: true
90 output-high: true
91 output-low: true
92
93 required:
94 - pins
95 - function
96
97 additionalProperties: false
98
99 required:
100 - compatible
101 - reg
102 - gpio-controller
103 - "#gpio-cells"
104 - gpio-ranges
105
106 additionalProperties: false
107
108 examples:
109 - |
110 lpass_tlmm: pinctrl@33c0000 {
111 compatible = "qcom,sc7280-lpass-lpi-pinctrl";
112 reg = <0x33c0000 0x20000>,
113 <0x3550000 0x10000>;
114 gpio-controller;
115 #gpio-cells = <2>;
116 gpio-ranges = <&lpass_tlmm 0 0 15>;
117
118 dmic01-state {
119 dmic01-clk-pins {
120 pins = "gpio6";
121 function = "dmic1_clk";
122 };
123
124 dmic01-clk-sleep-pins {
125 pins = "gpio6";
126 function = "dmic1_clk";
127 };
128 };
129
130 tx-swr-data-sleep-state {
131 pins = "gpio1", "gpio2", "gpio14";
132 function = "swr_tx_data";
133 };
134 };