Bindings/pinctrl/realtek,rtd1619b-pinctrl.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 # Copyright 2023 Realtek Semiconductor Corporation
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/pinctrl/realtek,rtd1619b-pinctrl.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: Realtek DHC RTD1619B Pin Controller
   9
  10 maintainers:
  11   - TY Chang <tychang@realtek.com>
  12
  13 description:
  14   The Realtek DHC RTD1619B is a high-definition media processor SoC. The
  15   RTD1619B pin controller is used to control pin function, pull up/down
  16   resistor, drive strength, schmitt trigger and power source.
  17
  18 properties:
  19   compatible:
  20     const: realtek,rtd1619b-pinctrl
  21
  22   reg:
  23     maxItems: 1
  24
  25 patternProperties:
  26   '-pins$':
  27     type: object
  28     allOf:
  29       - $ref: pincfg-node.yaml#
  30       - $ref: pinmux-node.yaml#
  31
  32     properties:
  33       pins:
  34         items:
  35           enum: [ gpio_0, gpio_1, gpio_2, gpio_3, gpio_4, gpio_5, gpio_6, gpio_7,
  36                   gpio_8, gpio_9, gpio_10, gpio_11, gpio_12, gpio_13, gpio_14,
  37                   gpio_15, gpio_16, gpio_17, gpio_18, gpio_19, gpio_20, gpio_21,
  38                   gpio_22, gpio_23, usb_cc2, gpio_25, gpio_26, gpio_27, gpio_28,
  39                   gpio_29, gpio_30, gpio_31, gpio_32, gpio_33, gpio_34, gpio_35,
  40                   hif_data, hif_en, hif_rdy, hif_clk, gpio_40, gpio_41, gpio_42,
  41                   gpio_43, gpio_44, gpio_45, gpio_46, gpio_47, gpio_48, gpio_49,
  42                   gpio_50, usb_cc1, gpio_52, gpio_53, ir_rx, ur0_rx, ur0_tx,
  43                   gpio_57, gpio_58, gpio_59, gpio_60, gpio_61, gpio_62, gpio_63,
  44                   gpio_64, gpio_65, gpio_66, gpio_67, gpio_68, gpio_69, gpio_70,
  45                   gpio_71, gpio_72, gpio_73, gpio_74, gpio_75, gpio_76, emmc_cmd,
  46                   spi_ce_n, spi_sck, spi_so, spi_si, emmc_rst_n, emmc_dd_sb,
  47                   emmc_clk, emmc_data_0, emmc_data_1, emmc_data_2, emmc_data_3,
  48                   emmc_data_4, emmc_data_5, emmc_data_6, emmc_data_7, ur2_loc,
  49                   gspi_loc, sdio_loc, hi_loc, hi_width, sf_en, arm_trace_dbg_en,
  50                   pwm_01_open_drain_en_loc0, pwm_23_open_drain_en_loc0,
  51                   pwm_01_open_drain_en_loc1, pwm_23_open_drain_en_loc1,
  52                   ejtag_acpu_loc, ejtag_vcpu_loc, ejtag_scpu_loc, dmic_loc,
  53                   iso_gspi_loc, ejtag_ve3_loc, ejtag_aucpu0_loc, ejtag_aucpu1_loc ]
  54
  55       function:
  56         enum: [ gpio, nf, nf_spi, spi, pmic, spdif, spdif_coaxial, spdif_optical_loc0,
  57                 spdif_optical_loc1, emmc_spi, emmc, sc1, uart0, uart1, uart2_loc0, uart2_loc1,
  58                 gspi_loc1, iso_gspi_loc1, i2c0, i2c1, i2c3, i2c4, i2c5, pwm0, pwm1, pwm2,
  59                 pwm3, etn_led, etn_phy, etn_clk, sc0, vfd, gspi_loc0, iso_gspi_loc0, pcie1,
  60                 pcie2, sd, sdio_loc0, sdio_loc1, hi, hi_m, dc_fan, pll_test_loc0, pll_test_loc1,
  61                 usb_cc1, usb_cc2, ir_rx, tdm_ai_loc0, tdm_ai_loc1, dmic_loc0, dmic_loc1,
  62                 ai_loc0, ai_loc1, tp0, tp1, ao, uart2_disable, gspi_disable, sdio_disable,
  63                 hi_loc_disable, hi_loc0, hi_width_disable, hi_width_1bit, vtc_i2si_loc0,
  64                 vtc_tdm_loc0, vtc_dmic_loc0, vtc_i2si_loc1, vtc_tdm_loc1, vtc_dmic_loc1,
  65                 vtc_i2so, ve3_ejtag_loc0, aucpu0_ejtag_loc0, aucpu1_ejtag_loc0, ve3_ejtag_loc1,
  66                 aucpu0_ejtag_loc1, aucpu1_ejtag_loc1, ve3_ejtag_loc2, aucpu0_ejtag_loc2,
  67                 aucpu1_ejtag_loc2, scpu_ejtag_loc0, acpu_ejtag_loc0, vcpu_ejtag_loc0,
  68                 scpu_ejtag_loc1, acpu_ejtag_loc1, vcpu_ejtag_loc1, scpu_ejtag_loc2,
  69                 acpu_ejtag_loc2, vcpu_ejtag_loc2, ve3_ejtag_disable, aucpu0_ejtag_disable,
  70                 aucpu1_ejtag_disable, acpu_ejtag_disable, vcpu_ejtag_disable,
  71                 scpu_ejtag_disable, iso_gspi_disable, sf_disable, sf_enable,
  72                 arm_trace_debug_disable, arm_trace_debug_enable, pwm_normal, pwm_open_drain,
  73                 standby_dbg, test_loop_dis ]
  74
  75       drive-strength:
  76         enum: [4, 8]
  77
  78       bias-pull-down: true
  79
  80       bias-pull-up: true
  81
  82       bias-disable: true
  83
  84       input-schmitt-enable: true
  85
  86       input-schmitt-disable: true
  87
  88       drive-push-pull: true
  89
  90       power-source:
  91         description: |
  92           Valid arguments are described as below:
  93           0: power supply of 1.8V
  94           1: power supply of 3.3V
  95         enum: [0, 1]
  96
  97       realtek,drive-strength-p:
  98         description: |
  99           Some of pins can be driven using the P-MOS and N-MOS transistor to
 100           achieve finer adjustments. The block-diagram representation is as
 101           follows:
 102                          VDD
 103                           |
 104                       ||--+
 105                +-----o||     P-MOS-FET
 106                |      ||--+
 107           IN --+          +----- out
 108                |      ||--+
 109                +------||     N-MOS-FET
 110                       ||--+
 111                           |
 112                          GND
 113           The driving strength of the P-MOS/N-MOS transistors impacts the
 114           waveform's rise/fall times. Greater driving strength results in
 115           shorter rise/fall times. Each P-MOS and N-MOS transistor offers
 116           8 configurable levels (0 to 7), with higher values indicating
 117           greater driving strength, contributing to achieving the desired
 118           speed.
 119
 120           The realtek,drive-strength-p is used to control the driving strength
 121           of the P-MOS output.
 122         $ref: /schemas/types.yaml#/definitions/uint32
 123         minimum: 0
 124         maximum: 7
 125
 126       realtek,drive-strength-n:
 127         description: |
 128           Similar to the realtek,drive-strength-p, the realtek,drive-strength-n
 129           is used to control the driving strength of the N-MOS output.
 130         $ref: /schemas/types.yaml#/definitions/uint32
 131         minimum: 0
 132         maximum: 7
 133
 134       realtek,duty-cycle:
 135         description: |
 136           An integer describing the level to adjust output duty cycle, controlling
 137           the proportion of positive and negative waveforms in nanoseconds.
 138           Valid arguments are described as below:
 139           0: 0ns
 140           2: + 0.25ns
 141           3: + 0.5ns
 142           4: -0.25ns
 143           5: -0.5ns
 144         $ref: /schemas/types.yaml#/definitions/uint32
 145         enum: [ 0, 2, 3, 4, 5 ]
 146
 147     required:
 148       - pins
 149
 150     additionalProperties: false
 151
 152 required:
 153   - compatible
 154   - reg
 155
 156 additionalProperties: false
 157
 158 examples:
 159   - |
 160      pinctrl@4e000 {
 161          compatible = "realtek,rtd1619b-pinctrl";
 162          reg = <0x4e000 0x130>;
 163
 164          emmc-hs200-pins {
 165              pins = "emmc_clk",
 166                     "emmc_cmd",
 167                     "emmc_data_0",
 168                     "emmc_data_1",
 169                     "emmc_data_2",
 170                     "emmc_data_3",
 171                     "emmc_data_4",
 172                     "emmc_data_5",
 173                     "emmc_data_6",
 174                     "emmc_data_7";
 175              function = "emmc";
 176              realtek,drive-strength-p = <0x2>;
 177              realtek,drive-strength-n = <0x2>;
 178          };
 179
 180          i2c-0-pins {
 181              pins = "gpio_12",
 182                     "gpio_13";
 183              function = "i2c0";
 184              drive-strength = <4>;
 185          };
 186      };