1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MN DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the display and MIPI CSI
15 peripherals located in the DISP domain of the SoC.
20 - const: fsl,imx8mn-disp-blk-ctrl
26 '#power-domain-cells':
49 - const: disp_axi_root
50 - const: disp_apb_root
67 additionalProperties: false
71 #include <dt-bindings/clock/imx8mn-clock.h>
72 #include <dt-bindings/power/imx8mn-power.h>
75 compatible = "fsl,imx8mn-disp-blk-ctrl", "syscon";
76 reg = <0x32e28000 0x100>;
77 power-domains = <&pgc_dispmix>, <&pgc_dispmix>,
78 <&pgc_dispmix>, <&pgc_mipi>,
80 power-domain-names = "bus", "isi", "lcdif", "mipi-dsi",
82 clocks = <&clk IMX8MN_CLK_DISP_AXI>,
83 <&clk IMX8MN_CLK_DISP_APB>,
84 <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
85 <&clk IMX8MN_CLK_DISP_APB_ROOT>,
86 <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
87 <&clk IMX8MN_CLK_DISP_APB_ROOT>,
88 <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>,
89 <&clk IMX8MN_CLK_DSI_CORE>,
90 <&clk IMX8MN_CLK_DSI_PHY_REF>,
91 <&clk IMX8MN_CLK_CSI1_PHY_REF>,
92 <&clk IMX8MN_CLK_CAMERA_PIXEL_ROOT>;
93 clock-names = "disp_axi", "disp_apb", "disp_axi_root", "disp_apb_root",
94 "lcdif-axi", "lcdif-apb", "lcdif-pix", "dsi-pclk",
95 "dsi-ref", "csi-aclk", "csi-pclk";
96 #power-domain-cells = <1>;