1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-spdif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra20 S/PDIF Controller
10 The S/PDIF controller supports both input and output in serial audio
11 digital interface format. The input controller can digitally recover
12 a clock from the received stream. The S/PDIF controller is also used
13 to generate the embedded audio for HDMI output channel.
16 - Thierry Reding <treding@nvidia.com>
17 - Jon Hunter <jonathanh@nvidia.com>
20 - $ref: dai-common.yaml#
24 const: nvidia,tegra20-spdif
54 nvidia,fixed-parent-rate:
56 Specifies whether board prefers parent clock to stay at a fixed rate.
57 This allows multiple Tegra20 audio components work simultaneously by
58 limiting number of supportable audio rates.
72 unevaluatedProperties: false
77 compatible = "nvidia,tegra20-spdif";
78 reg = <0x70002400 0x200>;
80 clocks = <&clk 99>, <&clk 98>;
81 clock-names = "out", "in";
83 dmas = <&apbdma 3>, <&apbdma 3>;
84 dma-names = "rx", "tx";
85 #sound-dai-cells = <0>;