Bindings/sound/rockchip,i2s-tdm.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Rockchip I2S/TDM Controller
   8
   9 description:
  10   The Rockchip I2S/TDM Controller is a Time Division Multiplexed
  11   audio interface found in various Rockchip SoCs, allowing up
  12   to 8 channels of audio over a serial interface.
  13
  14 maintainers:
  15   - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
  16
  17 allOf:
  18   - $ref: dai-common.yaml#
  19
  20 properties:
  21   compatible:
  22     enum:
  23       - rockchip,px30-i2s-tdm
  24       - rockchip,rk1808-i2s-tdm
  25       - rockchip,rk3308-i2s-tdm
  26       - rockchip,rk3568-i2s-tdm
  27       - rockchip,rk3588-i2s-tdm
  28       - rockchip,rv1126-i2s-tdm
  29
  30   reg:
  31     maxItems: 1
  32
  33   interrupts:
  34     maxItems: 1
  35
  36   dmas:
  37     minItems: 1
  38     maxItems: 2
  39
  40   dma-names:
  41     minItems: 1
  42     maxItems: 2
  43     items:
  44       enum:
  45         - rx
  46         - tx
  47
  48   clocks:
  49     minItems: 3
  50     items:
  51       - description: clock for TX
  52       - description: clock for RX
  53       - description: AHB clock driving the interface
  54       - description:
  55           Parent clock for mclk_tx (only required when using mclk-calibrate)
  56       - description:
  57           Parent clock for mclk_rx (only required when using mclk-calibrate)
  58       - description:
  59           Clock for sample rates that are an integer multiple of 8000
  60           (only required when using mclk-calibrate)
  61       - description:
  62           Clock for sample rates that are an integer multiple of 11025
  63           (only required when using mclk-calibrate)
  64
  65   clock-names:
  66     minItems: 3
  67     items:
  68       - const: mclk_tx
  69       - const: mclk_rx
  70       - const: hclk
  71       - const: mclk_tx_src
  72       - const: mclk_rx_src
  73       - const: mclk_root0
  74       - const: mclk_root1
  75
  76   resets:
  77     minItems: 1
  78     maxItems: 2
  79     description: resets for the tx and rx directions
  80
  81   reset-names:
  82     minItems: 1
  83     maxItems: 2
  84     items:
  85       enum:
  86         - tx-m
  87         - rx-m
  88
  89   port:
  90     $ref: audio-graph-port.yaml#
  91     unevaluatedProperties: false
  92
  93   power-domains:
  94     maxItems: 1
  95
  96   rockchip,grf:
  97     $ref: /schemas/types.yaml#/definitions/phandle
  98     description:
  99       The phandle of the syscon node for the GRF register.
 100
 101   rockchip,trcm-sync-tx-only:
 102     type: boolean
 103     description: Use TX BCLK/LRCK for both TX and RX.
 104
 105   rockchip,trcm-sync-rx-only:
 106     type: boolean
 107     description: Use RX BCLK/LRCK for both TX and RX.
 108
 109   "#sound-dai-cells":
 110     const: 0
 111
 112   rockchip,i2s-rx-route:
 113     $ref: /schemas/types.yaml#/definitions/uint32-array
 114     description:
 115       Defines the mapping of I2S RX sdis to I2S data bus lines.
 116       By default, they are mapped one-to-one.
 117       rockchip,i2s-rx-route = <3> would mean sdi3 is receiving from data0.
 118     maxItems: 4
 119     items:
 120       enum: [0, 1, 2, 3]
 121
 122   rockchip,i2s-tx-route:
 123     $ref: /schemas/types.yaml#/definitions/uint32-array
 124     description:
 125       Defines the mapping of I2S TX sdos to I2S data bus lines.
 126       By default, they are mapped one-to-one.
 127       rockchip,i2s-tx-route = <3> would mean sdo3 is sending to data0.
 128     maxItems: 4
 129     items:
 130       enum: [0, 1, 2, 3]
 131
 132   rockchip,io-multiplex:
 133     description:
 134       Specify that the GPIO lines on the I2S bus are multiplexed such that
 135       the direction (input/output) needs to be dynamically adjusted.
 136     type: boolean
 137
 138
 139 required:
 140   - compatible
 141   - reg
 142   - interrupts
 143   - dmas
 144   - dma-names
 145   - clocks
 146   - clock-names
 147   - resets
 148   - reset-names
 149   - "#sound-dai-cells"
 150
 151 unevaluatedProperties: false
 152
 153 examples:
 154   - |
 155     #include <dt-bindings/clock/rk3568-cru.h>
 156     #include <dt-bindings/interrupt-controller/arm-gic.h>
 157     #include <dt-bindings/interrupt-controller/irq.h>
 158     #include <dt-bindings/pinctrl/rockchip.h>
 159
 160     bus {
 161         #address-cells = <2>;
 162         #size-cells = <2>;
 163         i2s@fe410000 {
 164             compatible = "rockchip,rk3568-i2s-tdm";
 165             reg = <0x0 0xfe410000 0x0 0x1000>;
 166             interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 167             clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>,
 168                      <&cru HCLK_I2S1_8CH>;
 169             clock-names = "mclk_tx", "mclk_rx", "hclk";
 170             dmas = <&dmac1 3>, <&dmac1 2>;
 171             dma-names = "rx", "tx";
 172             resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>;
 173             reset-names = "tx-m", "rx-m";
 174             rockchip,trcm-sync-tx-only;
 175             rockchip,grf = <&grf>;
 176             #sound-dai-cells = <0>;
 177             pinctrl-names = "default";
 178             pinctrl-0 =
 179                 <&i2s1m0_sclktx
 180                 &i2s1m0_sclkrx
 181                 &i2s1m0_lrcktx
 182                 &i2s1m0_lrckrx
 183                 &i2s1m0_sdi0
 184                 &i2s1m0_sdi1
 185                 &i2s1m0_sdi2
 186                 &i2s1m0_sdi3
 187                 &i2s1m0_sdo0
 188                 &i2s1m0_sdo1
 189                 &i2s1m0_sdo2
 190                 &i2s1m0_sdo3>;
 191         };
 192     };