1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung SoC I2S controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - $ref: dai-common.yaml#
19 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
21 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
22 secondary FIFO, s/w reset control and internal mux for root clock
25 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
26 playback, stereo channel capture, secondary FIFO using internal
27 or external DMA, s/w reset control, internal mux for root clock
28 source and 7.1 channel TDM support for playback; TDM (Time division
29 multiplexing) is to allow transfer of multiple channel audio data on
32 samsung,exynos7-i2s: with all the available features of Exynos5 I2S.
33 Exynos7 I2S has 7.1 channel TDM support for capture, secondary FIFO
34 with only external DMA and more number of root clock sampling
37 samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports
38 stereo channels. Exynos7 I2S1 upgraded to 5.1 multichannel with
39 slightly modified bit offsets.
41 tesla,fsd-i2s: for 8/16/24bit stereo channel I2S for playback and
42 capture, secondary FIFO using external DMA, s/w reset control,
43 internal mux for root clock source with all root clock sampling
44 frequencies supported by Exynos7 I2S and 7.1 channel TDM support
45 for playback and capture TDM (Time division multiplexing) to allow
46 transfer of multiple channel audio data on single data line.
51 - samsung,exynos5420-i2s
53 - samsung,exynos7-i2s1
57 - samsung,exynos5433-i2s
58 - const: samsung,exynos7-i2s
95 - items: # for I2S1 and I2S2
99 "iis" is the I2S bus clock and i2s_opclk0, i2s_opclk1 are sources
100 of the root clock. I2S0 has internal mux to select the source
101 of root clock and I2S1 and I2S2 doesn't have any such mux.
115 description: Names of the CDCLK I2S output clocks.
121 $ref: /schemas/types.yaml#/definitions/uint32
123 Internal DMA register base address of the audio
124 subsystem (used in secondary sound source).
140 unevaluatedProperties: false
144 #include <dt-bindings/clock/exynos-audss-clk.h>
147 compatible = "samsung,s5pv210-i2s";
148 reg = <0x03830000 0x100>;
152 dma-names = "tx", "rx", "tx-sec";
153 clocks = <&clock_audss EXYNOS_I2S_BUS>,
154 <&clock_audss EXYNOS_I2S_BUS>,
155 <&clock_audss EXYNOS_SCLK_I2S>;
156 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
158 samsung,idma-addr = <0x03000000>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&i2s0_bus>;
161 #sound-dai-cells = <1>;