Bindings/spi/brcm,bcm63xx-hsspi.yaml

   1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/spi/brcm,bcm63xx-hsspi.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Broadcom Broadband SoC High Speed SPI controller
   8
   9 maintainers:
  10   - William Zhang <william.zhang@broadcom.com>
  11   - Kursad Oney <kursad.oney@broadcom.com>
  12   - Jonas Gorski <jonas.gorski@gmail.com>
  13
  14 description: |
  15   Broadcom Broadband SoC supports High Speed SPI master controller since the
  16   early MIPS based chips such as BCM6328 and BCM63268.  This initial rev 1.0
  17   controller was carried over to recent ARM based chips, such as BCM63138,
  18   BCM4908 and BCM6858. The old MIPS based chip should continue to use the
  19   brcm,bcm6328-hsspi compatible string. The recent ARM based chip is required to
  20   use the brcm,bcmbca-hsspi-v1.0 as part of its compatible string list as
  21   defined below to match the specific chip along with ip revision info.
  22
  23   This rev 1.0 controller has a limitation that can not keep the chip select line
  24   active between the SPI transfers within the same SPI message. This can
  25   terminate the transaction to some SPI devices prematurely. The issue can be
  26   worked around by either the controller's prepend mode or using the dummy chip
  27   select workaround. Driver automatically picks the suitable mode based on
  28   transfer type so it is transparent to the user.
  29
  30   The newer SoCs such as BCM6756, BCM4912 and BCM6855 include an updated SPI
  31   controller rev 1.1 that add the capability to allow the driver to control chip
  32   select explicitly. This solves the issue in the old controller.
  33
  34 properties:
  35   compatible:
  36     oneOf:
  37       - const: brcm,bcm6328-hsspi
  38       - items:
  39           - enum:
  40               - brcm,bcm47622-hsspi
  41               - brcm,bcm4908-hsspi
  42               - brcm,bcm63138-hsspi
  43               - brcm,bcm63146-hsspi
  44               - brcm,bcm63148-hsspi
  45               - brcm,bcm63158-hsspi
  46               - brcm,bcm63178-hsspi
  47               - brcm,bcm6846-hsspi
  48               - brcm,bcm6856-hsspi
  49               - brcm,bcm6858-hsspi
  50               - brcm,bcm6878-hsspi
  51           - const: brcm,bcmbca-hsspi-v1.0
  52       - items:
  53           - enum:
  54               - brcm,bcm4912-hsspi
  55               - brcm,bcm6756-hsspi
  56               - brcm,bcm6813-hsspi
  57               - brcm,bcm6855-hsspi
  58           - const: brcm,bcmbca-hsspi-v1.1
  59
  60   reg:
  61     items:
  62       - description: main registers
  63       - description: miscellaneous control registers
  64     minItems: 1
  65
  66   reg-names:
  67     items:
  68       - const: hsspi
  69       - const: spim-ctrl
  70     minItems: 1
  71
  72   clocks:
  73     items:
  74       - description: SPI master reference clock
  75       - description: SPI master pll clock
  76
  77   clock-names:
  78     items:
  79       - const: hsspi
  80       - const: pll
  81
  82   interrupts:
  83     maxItems: 1
  84
  85 required:
  86   - compatible
  87   - reg
  88   - clocks
  89   - clock-names
  90   - interrupts
  91
  92 allOf:
  93   - $ref: spi-controller.yaml#
  94   - if:
  95       properties:
  96         compatible:
  97           contains:
  98             enum:
  99               - brcm,bcm6328-hsspi
 100               - brcm,bcmbca-hsspi-v1.0
 101     then:
 102       properties:
 103         reg:
 104           maxItems: 1
 105         reg-names:
 106           maxItems: 1
 107     else:
 108       properties:
 109         reg:
 110           minItems: 2
 111           maxItems: 2
 112         reg-names:
 113           minItems: 2
 114           maxItems: 2
 115       required:
 116         - reg-names
 117
 118 unevaluatedProperties: false
 119
 120 examples:
 121   - |
 122     #include <dt-bindings/interrupt-controller/arm-gic.h>
 123     spi@ff801000 {
 124         compatible = "brcm,bcm6756-hsspi", "brcm,bcmbca-hsspi-v1.1";
 125         reg = <0xff801000 0x1000>,
 126               <0xff802610 0x4>;
 127         reg-names = "hsspi", "spim-ctrl";
 128         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 129         clocks = <&hsspi>, <&hsspi_pll>;
 130         clock-names = "hsspi", "pll";
 131         num-cs = <8>;
 132         #address-cells = <1>;
 133         #size-cells = <0>;
 134     };