Bindings/usb/qcom,dwc3.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm SuperSpeed DWC3 USB SoC controller
   8
   9 maintainers:
  10   - Wesley Cheng <quic_wcheng@quicinc.com>
  11
  12 properties:
  13   compatible:
  14     items:
  15       - enum:
  16           - qcom,ipq4019-dwc3
  17           - qcom,ipq5018-dwc3
  18           - qcom,ipq5332-dwc3
  19           - qcom,ipq6018-dwc3
  20           - qcom,ipq8064-dwc3
  21           - qcom,ipq8074-dwc3
  22           - qcom,ipq9574-dwc3
  23           - qcom,msm8953-dwc3
  24           - qcom,msm8994-dwc3
  25           - qcom,msm8996-dwc3
  26           - qcom,msm8998-dwc3
  27           - qcom,qcm2290-dwc3
  28           - qcom,qcs404-dwc3
  29           - qcom,sa8775p-dwc3
  30           - qcom,sc7180-dwc3
  31           - qcom,sc7280-dwc3
  32           - qcom,sc8280xp-dwc3
  33           - qcom,sdm660-dwc3
  34           - qcom,sdm670-dwc3
  35           - qcom,sdm845-dwc3
  36           - qcom,sdx55-dwc3
  37           - qcom,sdx65-dwc3
  38           - qcom,sdx75-dwc3
  39           - qcom,sm4250-dwc3
  40           - qcom,sm6115-dwc3
  41           - qcom,sm6125-dwc3
  42           - qcom,sm6350-dwc3
  43           - qcom,sm6375-dwc3
  44           - qcom,sm8150-dwc3
  45           - qcom,sm8250-dwc3
  46           - qcom,sm8350-dwc3
  47           - qcom,sm8450-dwc3
  48           - qcom,sm8550-dwc3
  49           - qcom,sm8650-dwc3
  50           - qcom,x1e80100-dwc3
  51       - const: qcom,dwc3
  52
  53   reg:
  54     description: Offset and length of register set for QSCRATCH wrapper
  55     maxItems: 1
  56
  57   "#address-cells":
  58     enum: [ 1, 2 ]
  59
  60   "#size-cells":
  61     enum: [ 1, 2 ]
  62
  63   ranges: true
  64
  65   power-domains:
  66     description: specifies a phandle to PM domain provider node
  67     maxItems: 1
  68
  69   required-opps:
  70     maxItems: 1
  71
  72   clocks:
  73     description: |
  74       Several clocks are used, depending on the variant. Typical ones are::
  75        - cfg_noc:: System Config NOC clock.
  76        - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >=
  77                 60MHz for HS operation.
  78        - iface:: System bus AXI clock.
  79        - sleep:: Sleep clock, used for wakeup when USB3 core goes into low
  80                  power mode (U3).
  81        - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host
  82                      mode. Its frequency should be 19.2MHz.
  83     minItems: 1
  84     maxItems: 9
  85
  86   clock-names:
  87     minItems: 1
  88     maxItems: 9
  89
  90   resets:
  91     maxItems: 1
  92
  93   interconnects:
  94     maxItems: 2
  95
  96   interconnect-names:
  97     items:
  98       - const: usb-ddr
  99       - const: apps-usb
 100
 101   interrupts:
 102     description: |
 103       Different types of interrupts are used based on HS PHY used on target:
 104         - pwr_event: Used for wakeup based on other power events.
 105         - hs_phY_irq: Apart from DP/DM/QUSB2 PHY interrupts, there is
 106                        hs_phy_irq which is not triggered by default and its
 107                        functionality is mutually exclusive to that of
 108                        {dp/dm}_hs_phy_irq and qusb2_phy_irq.
 109         - qusb2_phy: SoCs with QUSB2 PHY do not have separate DP/DM IRQs and
 110                       expose only a single IRQ whose behavior can be modified
 111                       by the QUSB2PHY_INTR_CTRL register. The required DPSE/
 112                       DMSE configuration is done in QUSB2PHY_INTR_CTRL register
 113                       of PHY address space.
 114         - {dp/dm}_hs_phy_irq: These IRQ's directly reflect changes on the DP/
 115                                DM pads of the SoC. These are used for wakeup
 116                                only on SoCs with non-QUSB2 targets with
 117                                exception of SDM670/SDM845/SM6350.
 118         - ss_phy_irq: Used for remote wakeup in Super Speed mode of operation.
 119     minItems: 2
 120     maxItems: 5
 121
 122   interrupt-names:
 123     minItems: 2
 124     maxItems: 5
 125
 126   qcom,select-utmi-as-pipe-clk:
 127     description:
 128       If present, disable USB3 pipe_clk requirement.
 129       Used when dwc3 operates without SSPHY and only
 130       HS/FS/LS modes are supported.
 131     type: boolean
 132
 133   wakeup-source: true
 134
 135 # Required child node:
 136
 137 patternProperties:
 138   "^usb@[0-9a-f]+$":
 139     $ref: snps,dwc3.yaml#
 140     unevaluatedProperties: false
 141
 142     properties:
 143       wakeup-source: false
 144
 145 required:
 146   - compatible
 147   - reg
 148   - "#address-cells"
 149   - "#size-cells"
 150   - ranges
 151   - clocks
 152   - clock-names
 153   - interrupts
 154   - interrupt-names
 155
 156 allOf:
 157   - if:
 158       properties:
 159         compatible:
 160           contains:
 161             enum:
 162               - qcom,ipq4019-dwc3
 163     then:
 164       properties:
 165         clocks:
 166           maxItems: 3
 167         clock-names:
 168           items:
 169             - const: core
 170             - const: sleep
 171             - const: mock_utmi
 172
 173   - if:
 174       properties:
 175         compatible:
 176           contains:
 177             enum:
 178               - qcom,ipq8064-dwc3
 179     then:
 180       properties:
 181         clocks:
 182           items:
 183             - description: Master/Core clock, has to be >= 125 MHz
 184                 for SS operation and >= 60MHz for HS operation.
 185         clock-names:
 186           items:
 187             - const: core
 188
 189   - if:
 190       properties:
 191         compatible:
 192           contains:
 193             enum:
 194               - qcom,ipq9574-dwc3
 195               - qcom,msm8953-dwc3
 196               - qcom,msm8996-dwc3
 197               - qcom,msm8998-dwc3
 198               - qcom,sa8775p-dwc3
 199               - qcom,sc7180-dwc3
 200               - qcom,sc7280-dwc3
 201               - qcom,sdm670-dwc3
 202               - qcom,sdm845-dwc3
 203               - qcom,sdx55-dwc3
 204               - qcom,sdx65-dwc3
 205               - qcom,sdx75-dwc3
 206               - qcom,sm6350-dwc3
 207     then:
 208       properties:
 209         clocks:
 210           maxItems: 5
 211         clock-names:
 212           items:
 213             - const: cfg_noc
 214             - const: core
 215             - const: iface
 216             - const: sleep
 217             - const: mock_utmi
 218
 219   - if:
 220       properties:
 221         compatible:
 222           contains:
 223             enum:
 224               - qcom,ipq6018-dwc3
 225     then:
 226       properties:
 227         clocks:
 228           minItems: 3
 229           maxItems: 4
 230         clock-names:
 231           oneOf:
 232             - items:
 233                 - const: core
 234                 - const: sleep
 235                 - const: mock_utmi
 236             - items:
 237                 - const: cfg_noc
 238                 - const: core
 239                 - const: sleep
 240                 - const: mock_utmi
 241
 242   - if:
 243       properties:
 244         compatible:
 245           contains:
 246             enum:
 247               - qcom,ipq8074-dwc3
 248     then:
 249       properties:
 250         clocks:
 251           maxItems: 4
 252         clock-names:
 253           items:
 254             - const: cfg_noc
 255             - const: core
 256             - const: sleep
 257             - const: mock_utmi
 258
 259   - if:
 260       properties:
 261         compatible:
 262           contains:
 263             enum:
 264               - qcom,ipq5018-dwc3
 265               - qcom,ipq5332-dwc3
 266               - qcom,msm8994-dwc3
 267               - qcom,qcs404-dwc3
 268     then:
 269       properties:
 270         clocks:
 271           maxItems: 4
 272         clock-names:
 273           items:
 274             - const: core
 275             - const: iface
 276             - const: sleep
 277             - const: mock_utmi
 278
 279   - if:
 280       properties:
 281         compatible:
 282           contains:
 283             enum:
 284               - qcom,sc8280xp-dwc3
 285               - qcom,x1e80100-dwc3
 286     then:
 287       properties:
 288         clocks:
 289           maxItems: 9
 290         clock-names:
 291           items:
 292             - const: cfg_noc
 293             - const: core
 294             - const: iface
 295             - const: sleep
 296             - const: mock_utmi
 297             - const: noc_aggr
 298             - const: noc_aggr_north
 299             - const: noc_aggr_south
 300             - const: noc_sys
 301
 302   - if:
 303       properties:
 304         compatible:
 305           contains:
 306             enum:
 307               - qcom,sdm660-dwc3
 308     then:
 309       properties:
 310         clocks:
 311           minItems: 4
 312           maxItems: 5
 313         clock-names:
 314           oneOf:
 315             - items:
 316                 - const: cfg_noc
 317                 - const: core
 318                 - const: iface
 319                 - const: sleep
 320                 - const: mock_utmi
 321             - items:
 322                 - const: cfg_noc
 323                 - const: core
 324                 - const: sleep
 325                 - const: mock_utmi
 326
 327   - if:
 328       properties:
 329         compatible:
 330           contains:
 331             enum:
 332               - qcom,qcm2290-dwc3
 333               - qcom,sm6115-dwc3
 334               - qcom,sm6125-dwc3
 335               - qcom,sm8150-dwc3
 336               - qcom,sm8250-dwc3
 337               - qcom,sm8450-dwc3
 338               - qcom,sm8550-dwc3
 339               - qcom,sm8650-dwc3
 340     then:
 341       properties:
 342         clocks:
 343           minItems: 6
 344         clock-names:
 345           items:
 346             - const: cfg_noc
 347             - const: core
 348             - const: iface
 349             - const: sleep
 350             - const: mock_utmi
 351             - const: xo
 352
 353   - if:
 354       properties:
 355         compatible:
 356           contains:
 357             enum:
 358               - qcom,sm8350-dwc3
 359     then:
 360       properties:
 361         clocks:
 362           minItems: 5
 363           maxItems: 6
 364         clock-names:
 365           minItems: 5
 366           items:
 367             - const: cfg_noc
 368             - const: core
 369             - const: iface
 370             - const: sleep
 371             - const: mock_utmi
 372             - const: xo
 373
 374   - if:
 375       properties:
 376         compatible:
 377           contains:
 378             enum:
 379               - qcom,ipq5018-dwc3
 380               - qcom,ipq6018-dwc3
 381               - qcom,ipq8074-dwc3
 382               - qcom,msm8953-dwc3
 383               - qcom,msm8998-dwc3
 384     then:
 385       properties:
 386         interrupts:
 387           minItems: 2
 388           maxItems: 3
 389         interrupt-names:
 390           items:
 391             - const: pwr_event
 392             - const: qusb2_phy
 393             - const: ss_phy_irq
 394
 395   - if:
 396       properties:
 397         compatible:
 398           contains:
 399             enum:
 400               - qcom,msm8996-dwc3
 401               - qcom,qcs404-dwc3
 402               - qcom,sdm660-dwc3
 403               - qcom,sm6115-dwc3
 404               - qcom,sm6125-dwc3
 405     then:
 406       properties:
 407         interrupts:
 408           minItems: 3
 409           maxItems: 4
 410         interrupt-names:
 411           items:
 412             - const: pwr_event
 413             - const: qusb2_phy
 414             - const: hs_phy_irq
 415             - const: ss_phy_irq
 416
 417   - if:
 418       properties:
 419         compatible:
 420           contains:
 421             enum:
 422               - qcom,ipq5332-dwc3
 423               - qcom,x1e80100-dwc3
 424     then:
 425       properties:
 426         interrupts:
 427           maxItems: 4
 428         interrupt-names:
 429           items:
 430             - const: pwr_event
 431             - const: dp_hs_phy_irq
 432             - const: dm_hs_phy_irq
 433             - const: ss_phy_irq
 434
 435   - if:
 436       properties:
 437         compatible:
 438           contains:
 439             enum:
 440               - qcom,ipq4019-dwc3
 441               - qcom,ipq8064-dwc3
 442               - qcom,msm8994-dwc3
 443               - qcom,sa8775p-dwc3
 444               - qcom,sc7180-dwc3
 445               - qcom,sc7280-dwc3
 446               - qcom,sc8280xp-dwc3
 447               - qcom,sdm670-dwc3
 448               - qcom,sdm845-dwc3
 449               - qcom,sdx55-dwc3
 450               - qcom,sdx65-dwc3
 451               - qcom,sdx75-dwc3
 452               - qcom,sm4250-dwc3
 453               - qcom,sm6350-dwc3
 454               - qcom,sm8150-dwc3
 455               - qcom,sm8250-dwc3
 456               - qcom,sm8350-dwc3
 457               - qcom,sm8450-dwc3
 458               - qcom,sm8550-dwc3
 459               - qcom,sm8650-dwc3
 460     then:
 461       properties:
 462         interrupts:
 463           minItems: 4
 464           maxItems: 5
 465         interrupt-names:
 466           items:
 467             - const: pwr_event
 468             - const: hs_phy_irq
 469             - const: dp_hs_phy_irq
 470             - const: dm_hs_phy_irq
 471             - const: ss_phy_irq
 472
 473 additionalProperties: false
 474
 475 examples:
 476   - |
 477     #include <dt-bindings/clock/qcom,gcc-sdm845.h>
 478     #include <dt-bindings/interrupt-controller/arm-gic.h>
 479     #include <dt-bindings/interrupt-controller/irq.h>
 480     soc {
 481         #address-cells = <2>;
 482         #size-cells = <2>;
 483
 484         usb@a6f8800 {
 485             compatible = "qcom,sdm845-dwc3", "qcom,dwc3";
 486             reg = <0 0x0a6f8800 0 0x400>;
 487
 488             #address-cells = <2>;
 489             #size-cells = <2>;
 490             ranges;
 491             clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
 492                      <&gcc GCC_USB30_PRIM_MASTER_CLK>,
 493                      <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
 494                      <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
 495                      <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
 496             clock-names = "cfg_noc",
 497                           "core",
 498                           "iface",
 499                           "sleep",
 500                           "mock_utmi";
 501
 502             assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
 503                           <&gcc GCC_USB30_PRIM_MASTER_CLK>;
 504             assigned-clock-rates = <19200000>, <150000000>;
 505
 506             interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
 507                          <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 508                          <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>,
 509                          <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>,
 510                          <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>;
 511             interrupt-names = "pwr_event", "hs_phy_irq",
 512                           "dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq";
 513
 514             power-domains = <&gcc USB30_PRIM_GDSC>;
 515
 516             resets = <&gcc GCC_USB30_PRIM_BCR>;
 517
 518             usb@a600000 {
 519                 compatible = "snps,dwc3";
 520                 reg = <0 0x0a600000 0 0xcd00>;
 521                 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 522                 iommus = <&apps_smmu 0x740 0>;
 523                 snps,dis_u2_susphy_quirk;
 524                 snps,dis_enblslpm_quirk;
 525                 phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
 526                 phy-names = "usb2-phy", "usb3-phy";
 527             };
 528         };
 529     };