Documentation/devicetree/bindings/sound/fsl,ssi.txt

   1 Freescale Synchronous Serial Interface
   2
   3 The SSI is a serial device that communicates with audio codecs.  It can
   4 be programmed in AC97, I2S, left-justified, or right-justified modes.
   5
   6 Required properties:
   7 - compatible:       Compatible list, should contain one of the following
   8                     compatibles:
   9                       fsl,mpc8610-ssi
  10                       fsl,imx51-ssi
  11                       fsl,imx35-ssi
  12                       fsl,imx21-ssi
  13 - cell-index:       The SSI, <0> = SSI1, <1> = SSI2, and so on.
  14 - reg:              Offset and length of the register set for the device.
  15 - interrupts:       <a b> where a is the interrupt number and b is a
  16                     field that represents an encoding of the sense and
  17                     level information for the interrupt.  This should be
  18                     encoded based on the information in section 2)
  19                     depending on the type of interrupt controller you
  20                     have.
  21 - interrupt-parent: The phandle for the interrupt controller that
  22                     services interrupts for this device.
  23 - fsl,fifo-depth:   The number of elements in the transmit and receive FIFOs.
  24                     This number is the maximum allowed value for SFCSR[TFWM0].
  25  - clocks:          "ipg" - Required clock for the SSI unit
  26                     "baud" - Required clock for SSI master mode. Otherwise this
  27                       clock is not used
  28
  29 Required are also ac97 link bindings if ac97 is used. See
  30 Documentation/devicetree/bindings/sound/soc-ac97link.txt for the necessary
  31 bindings.
  32
  33 Optional properties:
  34 - codec-handle:     Phandle to a 'codec' node that defines an audio
  35                     codec connected to this SSI.  This node is typically
  36                     a child of an I2C or other control node.
  37 - fsl,fiq-stream-filter: Bool property. Disabled DMA and use FIQ instead to
  38                     filter the codec stream. This is necessary for some boards
  39                     where an incompatible codec is connected to this SSI, e.g.
  40                     on pca100 and pcm043.
  41 - dmas:             Generic dma devicetree binding as described in
  42                     Documentation/devicetree/bindings/dma/dma.txt.
  43 - dma-names:        Two dmas have to be defined, "tx" and "rx", if fsl,imx-fiq
  44                     is not defined.
  45 - fsl,mode:         The operating mode for the AC97 interface only.
  46                     "ac97-slave" - AC97 mode, SSI is clock slave
  47                     "ac97-master" - AC97 mode, SSI is clock master
  48 - fsl,ssi-asynchronous:
  49                     If specified, the SSI is to be programmed in asynchronous
  50                     mode.  In this mode, pins SRCK, STCK, SRFS, and STFS must
  51                     all be connected to valid signals.  In synchronous mode,
  52                     SRCK and SRFS are ignored.  Asynchronous mode allows
  53                     playback and capture to use different sample sizes and
  54                     sample rates.  Some drivers may require that SRCK and STCK
  55                     be connected together, and SRFS and STFS be connected
  56                     together.  This would still allow different sample sizes,
  57                     but not different sample rates.
  58 - fsl,playback-dma: Phandle to a node for the DMA channel to use for
  59                     playback of audio.  This is typically dictated by SOC
  60                     design.  See the notes below.
  61                     Only used on Power Architecture.
  62 - fsl,capture-dma:  Phandle to a node for the DMA channel to use for
  63                     capture (recording) of audio.  This is typically dictated
  64                     by SOC design.  See the notes below.
  65                     Only used on Power Architecture.
  66
  67 Child 'codec' node required properties:
  68 - compatible:       Compatible list, contains the name of the codec
  69
  70 Child 'codec' node optional properties:
  71 - clock-frequency:  The frequency of the input clock, which typically comes
  72                     from an on-board dedicated oscillator.
  73
  74 Notes on fsl,playback-dma and fsl,capture-dma:
  75
  76 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
  77 and capture.  On the MPC8610, for example, SSI1 must use DMA channel 0 for
  78 playback and DMA channel 1 for capture.  SSI2 must use DMA channel 2 for
  79 playback and DMA channel 3 for capture.  The developer can choose which
  80 DMA controller to use, but the channels themselves are hard-wired.  The
  81 purpose of these two properties is to represent this hardware design.
  82
  83 The device tree nodes for the DMA channels that are referenced by
  84 "fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with
  85 "fsl,ssi-dma-channel".  The SOC-specific compatible string (e.g.
  86 "fsl,mpc8610-dma-channel") can remain.  If these nodes are left as
  87 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA
  88 drivers (fsldma) will attempt to use them, and it will conflict with the
  89 sound drivers.