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1 config ARCH_MAP_SYSMEM
2 depends on SANDBOX
3 def_bool y
4
5 config CREATE_ARCH_SYMLINK
6 bool
7
8 config HAVE_ARCH_IOREMAP
9 bool
10
11 config SYS_CACHE_SHIFT_4
12 bool
13
14 config SYS_CACHE_SHIFT_5
15 bool
16
17 config SYS_CACHE_SHIFT_6
18 bool
19
20 config SYS_CACHE_SHIFT_7
21 bool
22
23 config SYS_CACHELINE_SIZE
24 int
25 default 128 if SYS_CACHE_SHIFT_7
26 default 64 if SYS_CACHE_SHIFT_6
27 default 32 if SYS_CACHE_SHIFT_5
28 default 16 if SYS_CACHE_SHIFT_4
29 # Fall-back for MIPS
30 default 32 if MIPS
31
32 config LINKER_LIST_ALIGN
33 int
34 default 32 if SANDBOX
35 default 8 if ARM64 || X86
36 default 4
37 help
38 Force the each linker list to be aligned to this boundary. This
39 is required if ll_entry_get() is used, since otherwise the linker
40 may add padding into the table, thus breaking it.
41 See linker_lists.rst for full details.
42
43 choice
44 prompt "Architecture select"
45 default SANDBOX
46
47 config ARC
48 bool "ARC architecture"
49 select ARC_TIMER
50 select CLK
51 select DM
52 select HAVE_PRIVATE_LIBGCC
53 select SUPPORT_OF_CONTROL
54 select SYS_CACHE_SHIFT_7
55 select TIMER
56
57 config ARM
58 bool "ARM architecture"
59 select ARCH_SUPPORTS_LTO
60 select CREATE_ARCH_SYMLINK
61 select HAVE_PRIVATE_LIBGCC if !ARM64
62 select SUPPORT_ACPI
63 select SUPPORT_OF_CONTROL
64
65 config M68K
66 bool "M68000 architecture"
67 select HAVE_PRIVATE_LIBGCC
68 select NEEDS_MANUAL_RELOC
69 select SYS_BOOT_GET_CMDLINE
70 select SYS_BOOT_GET_KBD
71 select SYS_CACHE_SHIFT_4
72 select SUPPORT_OF_CONTROL
73
74 config MICROBLAZE
75 bool "MicroBlaze architecture"
76 select SUPPORT_OF_CONTROL
77 imply CMD_TIMER
78 imply SPL_REGMAP if SPL
79 imply SPL_TIMER if SPL
80 imply TIMER
81 imply XILINX_TIMER
82
83 config MIPS
84 bool "MIPS architecture"
85 select HAVE_ARCH_IOREMAP
86 select HAVE_PRIVATE_LIBGCC
87 select SUPPORT_OF_CONTROL
88 select SPL_SEPARATE_BSS if SPL
89
90 config NIOS2
91 bool "Nios II architecture"
92 select CPU
93 select DM
94 imply DM_EVENT
95 select OF_CONTROL
96 select SUPPORT_OF_CONTROL
97 imply CMD_DM
98
99 config PPC
100 bool "PowerPC architecture"
101 select HAVE_PRIVATE_LIBGCC
102 select SUPPORT_OF_CONTROL
103 select SYS_BOOT_GET_CMDLINE
104 select SYS_BOOT_GET_KBD
105
106 config RISCV
107 bool "RISC-V architecture"
108 select CREATE_ARCH_SYMLINK
109 select SUPPORT_OF_CONTROL
110 select OF_CONTROL
111 select DM
112 select SPL_SEPARATE_BSS if SPL
113 imply DM_SERIAL
114 imply DM_ETH
115 imply DM_EVENT
116 imply DM_MMC
117 imply DM_SPI
118 imply DM_SPI_FLASH
119 imply BLK
120 imply CLK
121 imply MTD
122 imply TIMER
123 imply CMD_DM
124 imply SPL_DM
125 imply SPL_OF_CONTROL
126 imply SPL_LIBCOMMON_SUPPORT
127 imply SPL_LIBGENERIC_SUPPORT
128 imply SPL_SERIAL
129 imply SPL_TIMER
130
131 config SANDBOX
132 bool "Sandbox"
133 select ARCH_SUPPORTS_LTO
134 select BOARD_LATE_INIT
135 select BZIP2
136 select CMD_POWEROFF
137 select DM
138 select DM_FUZZING_ENGINE
139 select DM_GPIO
140 select DM_I2C
141 select DM_KEYBOARD
142 select DM_MMC
143 select DM_SERIAL
144 select DM_SPI
145 select DM_SPI_FLASH
146 select GZIP_COMPRESSED
147 select HAVE_BLOCK_DEVICE
148 select LZO
149 select OF_BOARD_SETUP
150 select PCI_ENDPOINT
151 select SPI
152 select SUPPORT_OF_CONTROL
153 select SYSRESET_CMD_POWEROFF
154 select SYS_CACHE_SHIFT_4
155 select IRQ
156 select SUPPORT_EXTENSION_SCAN
157 select SUPPORT_ACPI
158 imply BITREVERSE
159 select BLOBLIST
160 imply LTO
161 imply CMD_DM
162 imply CMD_EXCEPTION
163 imply CMD_GETTIME
164 imply CMD_HASH
165 imply CMD_IO
166 imply CMD_IOTRACE
167 imply CMD_LZMADEC
168 imply CMD_SATA
169 imply CMD_SF
170 imply CMD_SF_TEST
171 imply CRC32_VERIFY
172 imply FAT_WRITE
173 imply FIRMWARE
174 imply FUZZING_ENGINE_SANDBOX
175 imply HASH_VERIFY
176 imply LZMA
177 imply TEE
178 imply AVB_VERIFY
179 imply LIBAVB
180 imply CMD_AVB
181 imply PARTITION_TYPE_GUID
182 imply SCP03
183 imply CMD_SCP03
184 imply UDP_FUNCTION_FASTBOOT
185 imply VIRTIO_MMIO
186 imply VIRTIO_PCI
187 imply VIRTIO_SANDBOX
188 imply VIRTIO_BLK
189 imply VIRTIO_NET
190 imply DM_SOUND
191 imply PCI_SANDBOX_EP
192 imply PCH
193 imply PHYLIB
194 imply DM_MDIO
195 imply DM_MDIO_MUX
196 imply ACPI_PMC
197 imply ACPI_PMC_SANDBOX
198 imply CMD_PMC
199 imply CMD_CLONE
200 imply SILENT_CONSOLE
201 imply BOOTARGS_SUBST
202 imply PHY_FIXED
203 imply DM_DSA
204 imply CMD_EXTENSION
205 imply KEYBOARD
206 imply PHYSMEM
207 imply GENERATE_ACPI_TABLE
208 imply BINMAN
209
210 config SH
211 bool "SuperH architecture"
212 select HAVE_PRIVATE_LIBGCC
213 select SUPPORT_OF_CONTROL
214
215 config X86
216 bool "x86 architecture"
217 select SUPPORT_SPL
218 select SUPPORT_TPL
219 select CREATE_ARCH_SYMLINK
220 select DM
221 select HAVE_ARCH_IOMAP
222 select HAVE_PRIVATE_LIBGCC
223 select OF_CONTROL
224 select PCI
225 select SUPPORT_ACPI
226 select SUPPORT_OF_CONTROL
227 select SYS_CACHE_SHIFT_6
228 select TIMER
229 select USE_PRIVATE_LIBGCC
230 select X86_TSC_TIMER
231 select IRQ
232 imply HAS_ROM if X86_RESET_VECTOR
233 imply BLK
234 imply CMD_DM
235 imply CMD_FPGA_LOADMK
236 imply CMD_GETTIME
237 imply CMD_IO
238 imply CMD_IRQ
239 imply CMD_PCI
240 imply CMD_SF
241 imply CMD_SF_TEST
242 imply CMD_ZBOOT
243 imply DM_ETH
244 imply DM_EVENT
245 imply DM_GPIO
246 imply DM_KEYBOARD
247 imply DM_MMC
248 imply DM_RTC
249 imply DM_SCSI
250 imply DM_SERIAL
251 imply DM_SPI
252 imply DM_SPI_FLASH
253 imply DM_USB
254 imply DM_VIDEO
255 imply SYSRESET
256 imply SPL_SYSRESET
257 imply SYSRESET_X86
258 imply USB_ETHER_ASIX
259 imply USB_ETHER_SMSC95XX
260 imply USB_HOST_ETHER
261 imply PCH
262 imply PHYSMEM
263 imply RTC_MC146818
264 imply ACPIGEN if !QEMU && !EFI_APP
265 imply SYSINFO if GENERATE_SMBIOS_TABLE
266 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
267 imply TIMESTAMP
268
269 # Thing to enable for when SPL/TPL are enabled: SPL
270 imply SPL_DM
271 imply SPL_OF_LIBFDT
272 imply SPL_DRIVERS_MISC
273 imply SPL_GPIO
274 imply SPL_PINCTRL
275 imply SPL_LIBCOMMON_SUPPORT
276 imply SPL_LIBGENERIC_SUPPORT
277 imply SPL_SERIAL
278 imply SPL_SPI_FLASH_SUPPORT
279 imply SPL_SPI
280 imply SPL_OF_CONTROL
281 imply SPL_TIMER
282 imply SPL_REGMAP
283 imply SPL_SYSCON
284 # TPL
285 imply TPL_DM
286 imply TPL_DRIVERS_MISC
287 imply TPL_GPIO
288 imply TPL_PINCTRL
289 imply TPL_LIBCOMMON_SUPPORT
290 imply TPL_LIBGENERIC_SUPPORT
291 imply TPL_SERIAL
292 imply TPL_OF_CONTROL
293 imply TPL_TIMER
294 imply TPL_REGMAP
295 imply TPL_SYSCON
296
297 config XTENSA
298 bool "Xtensa architecture"
299 select CREATE_ARCH_SYMLINK
300 select SUPPORT_OF_CONTROL
301
302 endchoice
303
304 config SYS_ARCH
305 string
306 help
307 This option should contain the architecture name to build the
308 appropriate arch/<CONFIG_SYS_ARCH> directory.
309 All the architectures should specify this option correctly.
310
311 config SYS_CPU
312 string
313 help
314 This option should contain the CPU name to build the correct
315 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
316
317 This is optional. For those targets without the CPU directory,
318 leave this option empty.
319
320 config SYS_SOC
321 string
322 help
323 This option should contain the SoC name to build the directory
324 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
325
326 This is optional. For those targets without the SoC directory,
327 leave this option empty.
328
329 config SYS_VENDOR
330 string
331 help
332 This option should contain the vendor name of the target board.
333 If it is set and
334 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
335 directory is compiled.
336 If CONFIG_SYS_BOARD is also set, the sources under
337 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
338
339 This is optional. For those targets without the vendor directory,
340 leave this option empty.
341
342 config SYS_BOARD
343 string
344 help
345 This option should contain the name of the target board.
346 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
347 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
348 whether CONFIG_SYS_VENDOR is set or not.
349
350 This is optional. For those targets without the board directory,
351 leave this option empty.
352
353 config SYS_CONFIG_NAME
354 string
355 help
356 This option should contain the base name of board header file.
357 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
358 should be included from include/config.h.
359
360 config SYS_DISABLE_DCACHE_OPS
361 bool
362 help
363 This option disables dcache flush and dcache invalidation
364 operations. For example, on coherent systems where cache
365 operatios are not required, enable this option to avoid them.
366 Note that, its up to the individual architectures to implement
367 this functionality.
368
369 config SYS_IMMR
370 hex "Address for the Internal Memory-Mapped Registers (IMMR) window"
371 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
372 default 0xFF000000 if MPC8xx
373 default 0xF0000000 if ARCH_MPC8313
374 default 0xE0000000 if MPC83xx && !ARCH_MPC8313
375 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
376 default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \
377 ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \
378 ARCH_P2020
379 default SYS_CCSRBAR_DEFAULT
380 help
381 Address for the Internal Memory-Mapped Registers (IMMR) window used
382 to configure the features of many Freescale / NXP SoCs.
383
384 config SKIP_LOWLEVEL_INIT
385 bool "Skip the calls to certain low level initialization functions"
386 depends on ARM || MIPS || RISCV
387 help
388 If enabled, then certain low level initializations (like setting up
389 the memory controller) are omitted and/or U-Boot does not relocate
390 itself into RAM.
391 Normally this variable MUST NOT be defined. The only exception is
392 when U-Boot is loaded (to RAM) by some other boot loader or by a
393 debugger which performs these initializations itself.
394
395 config SPL_SKIP_LOWLEVEL_INIT
396 bool "Skip the calls to certain low level initialization functions"
397 depends on SPL && (ARM || MIPS || RISCV)
398 help
399 If enabled, then certain low level initializations (like setting up
400 the memory controller) are omitted and/or U-Boot does not relocate
401 itself into RAM.
402 Normally this variable MUST NOT be defined. The only exception is
403 when U-Boot is loaded (to RAM) by some other boot loader or by a
404 debugger which performs these initializations itself.
405
406 config TPL_SKIP_LOWLEVEL_INIT
407 bool "Skip the calls to certain low level initialization functions"
408 depends on SPL && ARM
409 help
410 If enabled, then certain low level initializations (like setting up
411 the memory controller) are omitted and/or U-Boot does not relocate
412 itself into RAM.
413 Normally this variable MUST NOT be defined. The only exception is
414 when U-Boot is loaded (to RAM) by some other boot loader or by a
415 debugger which performs these initializations itself.
416
417 config SKIP_LOWLEVEL_INIT_ONLY
418 bool "Skip the call to lowlevel_init during early boot ONLY"
419 depends on ARM
420 help
421 This allows just the call to lowlevel_init() to be skipped. The
422 normal CP15 init (such as enabling the instruction cache) is still
423 performed.
424
425 config SPL_SKIP_LOWLEVEL_INIT_ONLY
426 bool "Skip the call to lowlevel_init during early boot ONLY"
427 depends on SPL && ARM
428 help
429 This allows just the call to lowlevel_init() to be skipped. The
430 normal CP15 init (such as enabling the instruction cache) is still
431 performed.
432
433 config TPL_SKIP_LOWLEVEL_INIT_ONLY
434 bool "Skip the call to lowlevel_init during early boot ONLY"
435 depends on TPL && ARM
436 help
437 This allows just the call to lowlevel_init() to be skipped. The
438 normal CP15 init (such as enabling the instruction cache) is still
439 performed.
440
441 source "arch/arc/Kconfig"
442 source "arch/arm/Kconfig"
443 source "arch/m68k/Kconfig"
444 source "arch/microblaze/Kconfig"
445 source "arch/mips/Kconfig"
446 source "arch/nios2/Kconfig"
447 source "arch/powerpc/Kconfig"
448 source "arch/sandbox/Kconfig"
449 source "arch/sh/Kconfig"
450 source "arch/x86/Kconfig"
451 source "arch/xtensa/Kconfig"
452 source "arch/riscv/Kconfig"
453
454 if ARM || M68K || PPC
455
456 source "arch/Kconfig.nxp"
457
458 endif
459
460 source "board/keymile/Kconfig"
461
462 if MIPS || MICROBLAZE
463
464 choice
465 prompt "Endianness selection"
466 help
467 Some MIPS boards can be configured for either little or big endian
468 byte order. These modes require different U-Boot images. In general there
469 is one preferred byteorder for a particular system but some systems are
470 just as commonly used in the one or the other endianness.
471
472 config SYS_BIG_ENDIAN
473 bool "Big endian"
474 depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE
475
476 config SYS_LITTLE_ENDIAN
477 bool "Little endian"
478 depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE
479
480 endchoice
481
482 endif