arch/Kconfig

   1 config ARCH_MAP_SYSMEM
   2         depends on SANDBOX
   3         def_bool y
   4
   5 config CREATE_ARCH_SYMLINK
   6         bool
   7
   8 config HAVE_ARCH_IOREMAP
   9         bool
  10
  11 config SYS_CACHE_SHIFT_4
  12         bool
  13
  14 config SYS_CACHE_SHIFT_5
  15         bool
  16
  17 config SYS_CACHE_SHIFT_6
  18         bool
  19
  20 config SYS_CACHE_SHIFT_7
  21         bool
  22
  23 config SYS_CACHELINE_SIZE
  24         int
  25         default 128 if SYS_CACHE_SHIFT_7
  26         default 64 if SYS_CACHE_SHIFT_6
  27         default 32 if SYS_CACHE_SHIFT_5
  28         default 16 if SYS_CACHE_SHIFT_4
  29         # Fall-back for MIPS
  30         default 32 if MIPS
  31
  32 config LINKER_LIST_ALIGN
  33         int
  34         default 32 if SANDBOX
  35         default 8 if ARM64 || X86
  36         default 4
  37         help
  38           Force the each linker list to be aligned to this boundary. This
  39           is required if ll_entry_get() is used, since otherwise the linker
  40           may add padding into the table, thus breaking it.
  41           See linker_lists.rst for full details.
  42
  43 choice
  44         prompt "Architecture select"
  45         default SANDBOX
  46
  47 config ARC
  48         bool "ARC architecture"
  49         select ARC_TIMER
  50         select CLK
  51         select DM
  52         select HAVE_PRIVATE_LIBGCC
  53         select SUPPORT_OF_CONTROL
  54         select SYS_CACHE_SHIFT_7
  55         select TIMER
  56         select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN
  57         select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN
  58
  59 config ARM
  60         bool "ARM architecture"
  61         select ARCH_SUPPORTS_LTO
  62         select CREATE_ARCH_SYMLINK
  63         select HAVE_PRIVATE_LIBGCC if !ARM64
  64         select SUPPORT_ACPI
  65         select SUPPORT_OF_CONTROL
  66
  67 config M68K
  68         bool "M68000 architecture"
  69         select HAVE_PRIVATE_LIBGCC
  70         select USE_PRIVATE_LIBGCC
  71         select SYS_BOOT_GET_CMDLINE
  72         select SYS_BOOT_GET_KBD
  73         select SYS_CACHE_SHIFT_4
  74         select SUPPORT_OF_CONTROL
  75
  76 config MICROBLAZE
  77         bool "MicroBlaze architecture"
  78         select SUPPORT_OF_CONTROL
  79         imply CMD_TIMER
  80         imply SPL_REGMAP if SPL
  81         imply SPL_TIMER if SPL
  82         imply TIMER
  83         imply XILINX_TIMER
  84
  85 config MIPS
  86         bool "MIPS architecture"
  87         select HAVE_ARCH_IOREMAP
  88         select HAVE_PRIVATE_LIBGCC
  89         select SUPPORT_OF_CONTROL
  90         select SPL_SEPARATE_BSS if SPL
  91
  92 config NIOS2
  93         bool "Nios II architecture"
  94         select CPU
  95         select DM
  96         select DM_EVENT
  97         select OF_CONTROL
  98         select SUPPORT_OF_CONTROL
  99         imply CMD_DM
 100
 101 config PPC
 102         bool "PowerPC architecture"
 103         select HAVE_PRIVATE_LIBGCC
 104         select SUPPORT_OF_CONTROL
 105         select SYS_BOOT_GET_CMDLINE
 106         select SYS_BOOT_GET_KBD
 107
 108 config RISCV
 109         bool "RISC-V architecture"
 110         select CREATE_ARCH_SYMLINK
 111         select SUPPORT_ACPI
 112         select SUPPORT_OF_CONTROL
 113         select OF_CONTROL
 114         select DM
 115         select DM_EVENT
 116         imply SPL_SEPARATE_BSS if SPL
 117         imply DM_SERIAL
 118         imply DM_MMC
 119         imply DM_SPI
 120         imply DM_SPI_FLASH
 121         imply BLK
 122         imply CLK
 123         imply MTD
 124         imply TIMER
 125         imply CMD_DM
 126         imply SPL_DM
 127         imply SPL_OF_CONTROL
 128         imply SPL_LIBCOMMON_SUPPORT
 129         imply SPL_LIBGENERIC_SUPPORT
 130         imply SPL_SERIAL
 131         imply SPL_TIMER
 132
 133 config SANDBOX
 134         bool "Sandbox"
 135         select ARCH_SUPPORTS_LTO
 136         select BOARD_LATE_INIT
 137         select BZIP2
 138         select CMD_POWEROFF if CMDLINE
 139         select DM
 140         select DM_EVENT
 141         select DM_FUZZING_ENGINE
 142         select DM_GPIO
 143         select DM_I2C
 144         select DM_KEYBOARD
 145         select DM_MMC
 146         select DM_SERIAL
 147         select DM_SPI
 148         select DM_SPI_FLASH
 149         select GZIP_COMPRESSED
 150         select IO_TRACE
 151         select LZO
 152         select MTD
 153         select OF_BOARD_SETUP
 154         select PCI_ENDPOINT
 155         select SPI
 156         select SUPPORT_OF_CONTROL
 157         select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
 158         select SYS_CACHE_SHIFT_4
 159         select IRQ
 160         select SUPPORT_EXTENSION_SCAN if CMDLINE
 161         select SUPPORT_ACPI
 162         imply BITREVERSE
 163         select BLOBLIST
 164         imply LTO
 165         imply CMD_DM
 166         imply CMD_EXCEPTION
 167         imply CMD_GETTIME
 168         imply CMD_HASH
 169         imply CMD_IO
 170         imply CMD_IOTRACE
 171         imply CMD_LZMADEC
 172         imply CMD_SF
 173         imply CMD_SF_TEST
 174         imply CRC32_VERIFY
 175         imply FAT_WRITE
 176         imply FIRMWARE
 177         imply FUZZING_ENGINE_SANDBOX
 178         imply HASH_VERIFY
 179         imply LZMA
 180         imply TEE
 181         imply AVB_VERIFY
 182         imply LIBAVB
 183         imply CMD_AVB
 184         imply PARTITION_TYPE_GUID
 185         imply SCP03
 186         imply CMD_SCP03
 187         imply UDP_FUNCTION_FASTBOOT
 188         imply VIRTIO_MMIO
 189         imply VIRTIO_PCI
 190         imply VIRTIO_SANDBOX
 191         imply VIRTIO_BLK
 192         imply VIRTIO_NET
 193         imply DM_SOUND
 194         imply PCI_SANDBOX_EP
 195         imply PCH
 196         imply PHYLIB
 197         imply DM_MDIO
 198         imply DM_MDIO_MUX
 199         imply ACPI
 200         imply ACPI_PMC
 201         imply ACPI_PMC_SANDBOX
 202         imply CMD_PMC
 203         imply CMD_CLONE
 204         imply SILENT_CONSOLE
 205         imply BOOTARGS_SUBST
 206         imply PHY_FIXED
 207         imply DM_DSA
 208         imply CMD_EXTENSION
 209         imply KEYBOARD
 210         imply PHYSMEM
 211         imply GENERATE_ACPI_TABLE
 212         imply BINMAN
 213         imply CMD_MBR
 214         imply CMD_MMC
 215         imply BOOTSTD_DEFAULTS if BOOTSTD_FULL && CMDLINE
 216         imply BOOTMETH_DISTRO if BOOTSTD_FULL && CMDLINE
 217         imply CMD_SYSBOOT if BOOTSTD_FULL
 218
 219 config SH
 220         bool "SuperH architecture"
 221         select HAVE_PRIVATE_LIBGCC
 222         select SUPPORT_OF_CONTROL
 223
 224 config X86
 225         bool "x86 architecture"
 226         select SUPPORT_SPL
 227         select SUPPORT_TPL
 228         select CREATE_ARCH_SYMLINK
 229         select DM
 230         select HAVE_ARCH_IOMAP
 231         select HAVE_PRIVATE_LIBGCC
 232         select OF_CONTROL
 233         select PCI
 234         select SUPPORT_ACPI
 235         select SUPPORT_OF_CONTROL
 236         select SYS_CACHE_SHIFT_6
 237         select TIMER
 238         select USE_PRIVATE_LIBGCC
 239         select X86_TSC_TIMER
 240         select IRQ
 241         imply HAS_ROM if X86_RESET_VECTOR
 242         imply BLK
 243         imply CMD_DM
 244         imply CMD_FPGA_LOADMK
 245         imply CMD_GETTIME
 246         imply CMD_IO
 247         imply CMD_IRQ
 248         imply CMD_PCI
 249         imply CMD_SF
 250         imply CMD_SF_TEST
 251         imply CMD_ZBOOT
 252         imply DM_GPIO
 253         imply DM_KEYBOARD
 254         imply DM_MMC
 255         imply DM_RTC
 256         imply SCSI
 257         imply DM_SERIAL
 258         imply MTD
 259         imply DM_SPI
 260         imply DM_SPI_FLASH
 261         imply DM_USB
 262         imply LAST_STAGE_INIT
 263         imply VIDEO
 264         imply SYSRESET
 265         imply SPL_SYSRESET
 266         imply SYSRESET_X86
 267         imply USB_ETHER_ASIX
 268         imply USB_ETHER_SMSC95XX
 269         imply USB_HOST_ETHER
 270         imply PCH
 271         imply PHYSMEM
 272         imply RTC_MC146818
 273         imply ACPI
 274         imply ACPIGEN if !QEMU && !EFI_APP
 275         imply SYSINFO if GENERATE_SMBIOS_TABLE
 276         imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
 277         imply TIMESTAMP
 278
 279         # Thing to enable for when SPL/TPL are enabled: SPL
 280         imply SPL_DM
 281         imply SPL_OF_LIBFDT
 282         imply SPL_DRIVERS_MISC
 283         imply SPL_GPIO
 284         imply SPL_PINCTRL
 285         imply SPL_LIBCOMMON_SUPPORT
 286         imply SPL_LIBGENERIC_SUPPORT
 287         imply SPL_SERIAL
 288         imply SPL_SPI_FLASH_SUPPORT
 289         imply SPL_SPI
 290         imply SPL_OF_CONTROL
 291         imply SPL_TIMER
 292         imply SPL_REGMAP
 293         imply SPL_SYSCON
 294         # TPL
 295         imply TPL_DM
 296         imply TPL_DRIVERS_MISC
 297         imply TPL_GPIO
 298         imply TPL_PINCTRL
 299         imply TPL_LIBCOMMON_SUPPORT
 300         imply TPL_LIBGENERIC_SUPPORT
 301         imply TPL_SERIAL
 302         imply TPL_OF_CONTROL
 303         imply TPL_TIMER
 304         imply TPL_REGMAP
 305         imply TPL_SYSCON
 306
 307 config XTENSA
 308         bool "Xtensa architecture"
 309         select CREATE_ARCH_SYMLINK
 310         select SUPPORT_OF_CONTROL
 311
 312 endchoice
 313
 314 config SYS_ARCH
 315         string
 316         help
 317           This option should contain the architecture name to build the
 318           appropriate arch/<CONFIG_SYS_ARCH> directory.
 319           All the architectures should specify this option correctly.
 320
 321 config SYS_CPU
 322         string
 323         help
 324           This option should contain the CPU name to build the correct
 325           arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
 326
 327           This is optional.  For those targets without the CPU directory,
 328           leave this option empty.
 329
 330 config SYS_SOC
 331         string
 332         help
 333           This option should contain the SoC name to build the directory
 334           arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
 335
 336           This is optional.  For those targets without the SoC directory,
 337           leave this option empty.
 338
 339 config SYS_VENDOR
 340         string
 341         help
 342           This option should contain the vendor name of the target board.
 343           If it is set and
 344           board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
 345           directory is compiled.
 346           If CONFIG_SYS_BOARD is also set, the sources under
 347           board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
 348
 349           This is optional.  For those targets without the vendor directory,
 350           leave this option empty.
 351
 352 config SYS_BOARD
 353         string
 354         help
 355           This option should contain the name of the target board.
 356           If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
 357           or board/<CONFIG_SYS_BOARD> directory is compiled depending on
 358           whether CONFIG_SYS_VENDOR is set or not.
 359
 360           This is optional.  For those targets without the board directory,
 361           leave this option empty.
 362
 363 config SYS_CONFIG_NAME
 364         string "Board header file" if ARCH_MESON || ARCH_VERSAL || \
 365                 ARCH_VERSAL_NET || ARCH_ZYNQ || ARCH_ZYNQMP || \
 366                 ARCH_ZYNQMP_R5 || MICROBLAZE || NIOS2
 367         default "meson64" if ARCH_MESON
 368         default "microblaze-generic" if MICROBLAZE
 369         default "xilinx_versal" if ARCH_VERSAL
 370         default "xilinx_versal_net" if ARCH_VERSAL_NET
 371         default "xilinx_zynqmp" if ARCH_ZYNQMP
 372         default "xilinx_zynqmp_r5" if ARCH_ZYNQMP_R5
 373         default "zynq-common" if ARCH_ZYNQ
 374         help
 375           This option should contain the base name of board header file.
 376           The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
 377           should be included from include/config.h.
 378
 379 config SYS_DISABLE_DCACHE_OPS
 380         bool
 381         help
 382          This option disables dcache flush and dcache invalidation
 383          operations. For example, on coherent systems where cache
 384          operatios are not required, enable this option to avoid them.
 385          Note that, its up to the individual architectures to implement
 386          this functionality.
 387
 388 config SYS_IMMR
 389         hex "Address for the Internal Memory-Mapped Registers (IMMR) window"
 390         depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
 391         default 0xFF000000 if MPC8xx
 392         default 0xF0000000 if ARCH_MPC8313
 393         default 0xE0000000 if MPC83xx && !ARCH_MPC8313
 394         default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
 395         default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \
 396                               ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \
 397                               ARCH_P2020
 398         default SYS_CCSRBAR_DEFAULT
 399         help
 400           Address for the Internal Memory-Mapped Registers (IMMR) window used
 401           to configure the features of many Freescale / NXP SoCs.
 402
 403 config MONITOR_IS_IN_RAM
 404         bool "U-Boot is loaded in to RAM by a pre-loader"
 405         depends on M68K || NIOS2
 406
 407 menu "Skipping low level initialization functions"
 408         depends on ARM || MIPS || RISCV
 409
 410 config SKIP_LOWLEVEL_INIT
 411         bool "Skip calls to certain low level initialization functions"
 412         help
 413           If enabled, then certain low level initializations (like setting up
 414           the memory controller) are omitted and/or U-Boot does not relocate
 415           itself into RAM.
 416           Normally this variable MUST NOT be defined. The only exception is
 417           when U-Boot is loaded (to RAM) by some other boot loader or by a
 418           debugger which performs these initializations itself.
 419
 420 config SPL_SKIP_LOWLEVEL_INIT
 421         bool "Skip calls to certain low level initialization functions in SPL"
 422         depends on SPL
 423         help
 424           If enabled, then certain low level initializations (like setting up
 425           the memory controller) are omitted and/or U-Boot does not relocate
 426           itself into RAM.
 427           Normally this variable MUST NOT be defined. The only exception is
 428           when U-Boot is loaded (to RAM) by some other boot loader or by a
 429           debugger which performs these initializations itself.
 430
 431 config TPL_SKIP_LOWLEVEL_INIT
 432         bool "Skip calls to certain low level initialization functions in TPL"
 433         depends on SPL && ARM
 434         help
 435           If enabled, then certain low level initializations (like setting up
 436           the memory controller) are omitted and/or U-Boot does not relocate
 437           itself into RAM.
 438           Normally this variable MUST NOT be defined. The only exception is
 439           when U-Boot is loaded (to RAM) by some other boot loader or by a
 440           debugger which performs these initializations itself.
 441
 442 config SKIP_LOWLEVEL_INIT_ONLY
 443         bool "Skip call to lowlevel_init during early boot ONLY"
 444         depends on ARM
 445         help
 446           This allows just the call to lowlevel_init() to be skipped. The
 447           normal CP15 init (such as enabling the instruction cache) is still
 448           performed.
 449
 450 config SPL_SKIP_LOWLEVEL_INIT_ONLY
 451         bool "Skip call to lowlevel_init during early SPL boot ONLY"
 452         depends on SPL && ARM
 453         help
 454           This allows just the call to lowlevel_init() to be skipped. The
 455           normal CP15 init (such as enabling the instruction cache) is still
 456           performed.
 457
 458 config TPL_SKIP_LOWLEVEL_INIT_ONLY
 459         bool "Skip call to lowlevel_init during early TPL boot ONLY"
 460         depends on TPL && ARM
 461         help
 462           This allows just the call to lowlevel_init() to be skipped. The
 463           normal CP15 init (such as enabling the instruction cache) is still
 464           performed.
 465
 466 endmenu
 467
 468 config SYS_HAS_NONCACHED_MEMORY
 469         bool "Enable reserving a non-cached memory area for drivers"
 470         depends on (ARM || MIPS) && (RTL8169 || MEDIATEK_ETH)
 471         help
 472           This is useful for drivers that would otherwise require a lot of
 473           explicit cache maintenance. For some drivers it's also impossible to
 474           properly maintain the cache. For example if the regions that need to
 475           be flushed are not a multiple of the cache-line size, *and* padding
 476           cannot be allocated between the regions to align them (i.e.  if the
 477           HW requires a contiguous array of regions, and the size of each
 478           region is not cache-aligned), then a flush of one region may result
 479           in overwriting data that hardware has written to another region in
 480           the same cache-line. This can happen for example in network drivers
 481           where descriptors for buffers are typically smaller than the CPU
 482           cache-line (e.g.  16 bytes vs. 32 or 64 bytes).
 483
 484 config SYS_NONCACHED_MEMORY
 485         hex "Size in bytes of the non-cached memory area"
 486         depends on SYS_HAS_NONCACHED_MEMORY
 487         default 0x100000
 488         help
 489           Size of non-cached memory area. This area of memory will be typically
 490           located right below the malloc() area and mapped uncached in the MMU.
 491
 492 source "arch/arc/Kconfig"
 493 source "arch/arm/Kconfig"
 494 source "arch/m68k/Kconfig"
 495 source "arch/microblaze/Kconfig"
 496 source "arch/mips/Kconfig"
 497 source "arch/nios2/Kconfig"
 498 source "arch/powerpc/Kconfig"
 499 source "arch/sandbox/Kconfig"
 500 source "arch/sh/Kconfig"
 501 source "arch/x86/Kconfig"
 502 source "arch/xtensa/Kconfig"
 503 source "arch/riscv/Kconfig"
 504
 505 if ARM || M68K || PPC
 506
 507 source "arch/Kconfig.nxp"
 508
 509 endif
 510
 511 source "board/keymile/Kconfig"
 512
 513 if MIPS || MICROBLAZE
 514
 515 choice
 516         prompt "Endianness selection"
 517         help
 518           Some MIPS boards can be configured for either little or big endian
 519           byte order. These modes require different U-Boot images. In general there
 520           is one preferred byteorder for a particular system but some systems are
 521           just as commonly used in the one or the other endianness.
 522
 523 config SYS_BIG_ENDIAN
 524         bool "Big endian"
 525         depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE
 526
 527 config SYS_LITTLE_ENDIAN
 528         bool "Little endian"
 529         depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE
 530
 531 endchoice
 532
 533 endif