1 /* SPDX-License-Identifier: GPL-2.0 */
3 #ifndef __ASM_ARC_ENTRY_ARCV2_H
4 #define __ASM_ARC_ENTRY_ARCV2_H
6 #include <asm/asm-offsets.h>
7 #include <asm/dsp-impl.h>
8 #include <asm/irqflags-arcv2.h>
9 #include <asm/thread_info.h> /* For THREAD_SIZE */
12 * Interrupt/Exception stack layout (pt_regs) for ARCv2
13 * (End of struct aligned to end of page [unless nested])
17 * manual --------------------- manual
29 * hw autosave ---------------------
43 * ---------------------
44 * hw autosave | pc / eret |
45 * mandatory | stat32 / erstatus |
46 * ---------------------
49 /*------------------------------------------------------------------------*/
50 .macro INTERRUPT_PROLOGUE
52 ; (A
) Before jumping to Interrupt Vector
, hardware micro
-ops did following
:
53 ; 1. SP
auto-switched to kernel mode stack
54 ; 2. STATUS32
.Z flag set
if in U mode at time of
interrupt (U
:1,K
:0)
55 ; 3. Auto save
: (mandatory
) Push PC
and STAT32 on stack
56 ; hardware does even
if CONFIG_ARC_IRQ_NO_AUTOSAVE
57 ; 4. Auto save
: (optional
) r0
-r11
, blink
, LPE
,LPS
,LPC
, JLI
,LDI
,EI
59 ; (B
) Manually saved some regs
: r12
,r25
,r30
, sp
,fp
,gp
, ACCL pair
61 #ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
62 ; carve pt_regs on
stack (case #3), PC/STAT32 already on stack
63 sub sp
, sp
, SZ_PT_REGS
- 8
67 ; carve pt_regs on
stack (case #4), which grew partially already
74 /*------------------------------------------------------------------------*/
75 .macro EXCEPTION_PROLOGUE
77 ; (A
) Before jumping to Exception Vector
, hardware micro
-ops did following
:
78 ; 1. SP
auto-switched to kernel mode stack
79 ; 2. STATUS32
.Z flag set
if in U mode at time of
exception (U
:1,K
:0)
81 ; (B
) Manually save the complete reg file below
83 sub sp
, sp
, SZ_PT_REGS
; carve pt_regs
85 ; _HARD saves r10 clobbered by _SOFT as scratch hence comes first
98 ST2 r10
, r11
, PT_event
100 ; OUTPUT
: r10 has ECR expected by EV_Trap
103 /*------------------------------------------------------------------------
104 * This macro saves the registers manually which would normally be autosaved
105 * by hardware on taken interrupts. It is used by
106 * - exception handlers (which don't have autosave)
107 * - interrupt autosave disabled due to CONFIG_ARC_IRQ_NO_AUTOSAVE
109 .macro __SAVE_REGFILE_HARD
118 st blink
, [sp
, PT_blink
]
124 st lp_count
, [sp
, PT_lpc
]
126 ; skip JLI
, LDI
, EI
for now
129 /*------------------------------------------------------------------------
130 * This macros saves a bunch of other registers which can't be autosaved for
132 * - r12: the last caller saved scratch reg since hardware saves in pairs so r0-r11
133 * - r30: free reg, used by gcc as scratch
134 * - ACCL/ACCH pair when they exist
136 .macro __SAVE_REGFILE_SOFT
138 ST2 gp
, fp
, PT_r26
; gp (r26
), fp (r27
)
140 st r12
, [sp
, PT_sp
+ 4]
141 st r30
, [sp
, PT_sp
+ 8]
143 ; Saving pt_regs
->sp correctly requires some extra work due to the way
144 ; Auto stack
switch works
145 ; - U mode
: retrieve it from AUX_USER_SP
146 ; - K mode
: add the offset from current SP where H
/w starts
auto push
148 ; 1. Utilize the fact that Z bit is set
if Intr taken in U mode
149 ; 2. Upon entry SP is always
saved (for any inspection
, unwinding etc
),
150 ; but on
return, restored only
if U mode
152 lr r10
, [AUX_USER_SP
] ; U mode SP
154 ; ISA requires ADD
.nz to have same dest
and src reg operands
156 add
.nz r10
, r10
, SZ_PT_REGS
; K mode SP
158 st r10
, [sp
, PT_sp
] ; SP (pt_regs
->sp
)
160 #ifdef CONFIG_ARC_CURR_IN_REG
161 st r25
, [sp
, PT_user_r25
]
162 GET_CURR_TASK_ON_CPU r25
165 #ifdef CONFIG_ARC_HAS_ACCL_REGS
169 /* clobbers r10, r11 registers pair */
173 /*------------------------------------------------------------------------*/
174 .macro __RESTORE_REGFILE_SOFT
176 LD2 gp
, fp
, PT_r26
; gp (r26
), fp (r27
)
181 ; Restore
SP (into AUX_USER_SP
) only
if returning to U mode
182 ; - for K mode
, it will be implicitly restored as stack is unwound
183 ; - Z flag set on K is inverse of what hardware does on interrupt entry
184 ; but that doesn
't really matter
187 ld r10, [sp, PT_sp] ; SP (pt_regs->sp)
188 sr r10, [AUX_USER_SP]
191 #ifdef CONFIG_ARC_CURR_IN_REG
192 ld r25, [sp, PT_user_r25]
195 /* clobbers r10, r11 registers pair */
196 DSP_RESTORE_REGFILE_IRQ
198 #ifdef CONFIG_ARC_HAS_ACCL_REGS
203 /*------------------------------------------------------------------------*/
204 .macro __RESTORE_REGFILE_HARD
206 ld blink, [sp, PT_blink]
212 ld r10, [sp, PT_lpc] ; lp_count can't be target of LD
224 /*------------------------------------------------------------------------*/
225 .macro INTERRUPT_EPILOGUE
227 ; INPUT
: r0 has STAT32 of calling context
228 ; INPUT
: Z flag set
if returning to K mode
230 ; _SOFT clobbers r10 restored by _HARD hence the order
232 __RESTORE_REGFILE_SOFT
234 #ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
235 __RESTORE_REGFILE_HARD
236 add sp
, sp
, SZ_PT_REGS
- 8
243 /*------------------------------------------------------------------------*/
244 .macro EXCEPTION_EPILOGUE
246 ; INPUT
: r0 has STAT32 of calling context
248 btst r0
, STATUS_U_BIT
; Z flag set
if K
, used in restoring SP
250 ld r10
, [sp
, PT_event
+ 4]
257 __RESTORE_REGFILE_SOFT
258 __RESTORE_REGFILE_HARD
260 add sp
, sp
, SZ_PT_REGS
263 .macro FAKE_RET_FROM_EXCPN
265 bic r9
, r9
, STATUS_AE_MASK
266 or r9
, r9
, STATUS_IE_MASK
270 /* Get thread_info of "current" tsk */
271 .macro GET_CURR_THR_INFO_FROM_SP reg
272 bmskn
\reg
, sp
, THREAD_SHIFT
- 1
275 /* Get CPU-ID of this core */
276 .macro GET_CPU_ID reg
278 xbfu
\reg
, \reg
, 0xE8 /* 00111 01000 */