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1 menu "ARM architecture"
2 depends on ARM
3
4 config SYS_ARCH
5 default "arm"
6
7 config ARM64
8 bool
9 select 64BIT
10 select PHYS_64BIT
11 select SYS_CACHE_SHIFT_6
12 imply SPL_SEPARATE_BSS
13
14 config ARM64_CRC32
15 bool "Enable support for CRC32 instruction"
16 depends on ARM64 && CC_IS_GCC
17 default y
18 help
19 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
20 This is faster than software crc32 calculation. This instruction may
21 not be present on all ARMv8.0, but is always present on ARMv8.1 and
22 newer.
23
24 config COUNTER_FREQUENCY
25 int "Timer clock frequency"
26 depends on ARM64 || CPU_V7A
27 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
28 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
29 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
30 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
31 default 100000000 if ARCH_ZYNQMP
32 default 200000000 if ARCH_SOCFPGA && ARM64 && TARGET_SOCFPGA_AGILEX5
33 default 0
34 help
35 For platforms with ARMv8-A and ARMv7-A which features a system
36 counter, those platforms needs software to program the counter
37 frequency. Setup time clock frequency for certain platform.
38 0 means no need to configure the system counter frequency.
39 For platforms needs the frequency set in U-Boot with a
40 pre-defined value, should have the macro defined as a non-zero value.
41
42 config POSITION_INDEPENDENT
43 bool "Generate position-independent pre-relocation code"
44 depends on ARM64 || CPU_V7A
45 help
46 U-Boot expects to be linked to a specific hard-coded address, and to
47 be loaded to and run from that address. This option lifts that
48 restriction, thus allowing the code to be loaded to and executed from
49 almost any 4K aligned address. This logic relies on the relocation
50 information that is embedded in the binary to support U-Boot
51 relocating itself to the top-of-RAM later during execution.
52
53 config INIT_SP_RELATIVE
54 bool "Specify the early stack pointer relative to the .bss section"
55 depends on ARM64
56 default n if ARCH_QEMU
57 default y if POSITION_INDEPENDENT
58 help
59 U-Boot typically uses a hard-coded value for the stack pointer
60 before relocation. Enable this option to instead calculate the
61 initial SP at run-time. This is useful to avoid hard-coding addresses
62 into U-Boot, so that it can be loaded and executed at arbitrary
63 addresses and thus avoid using arbitrary addresses at runtime.
64
65 If this option is enabled, the early stack pointer is set to
66 &_bss_start with a offset value added. The offset is specified by
67 SYS_INIT_SP_BSS_OFFSET.
68
69 config SYS_INIT_SP_BSS_OFFSET
70 int "Early stack offset from the .bss base address"
71 depends on ARM64
72 depends on INIT_SP_RELATIVE
73 default 524288
74 help
75 This option's value is the offset added to &_bss_start in order to
76 calculate the stack pointer. This offset should be large enough so
77 that the early malloc region, global data (gd), and early stack usage
78 do not overlap any appended DTB.
79
80 config SPL_SYS_NO_VECTOR_TABLE
81 depends on SPL
82 bool
83
84 config SPL_USE_SEPARATE_FAULT_HANDLERS
85 bool "Use separate fault handlers instead of a single common one"
86 depends on !SPL_SYS_NO_VECTOR_TABLE && !ARM64 && !CPU_V7M
87 help
88 Instead of a common fault handler, generate a separate one for
89 undefined_instruction, software_interrupt, prefetch_abort etc.
90 This is for debugging purposes, when you want to set breakpoints
91 on them separately.
92
93 config LINUX_KERNEL_IMAGE_HEADER
94 depends on ARM64
95 bool
96 help
97 Place a Linux kernel image header at the start of the U-Boot binary.
98 The format of the header is described in the Linux kernel source at
99 Documentation/arm64/booting.txt. This feature is useful since the
100 image header reports the amount of memory (BSS and similar) that
101 U-Boot needs to use, but which isn't part of the binary.
102
103 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
104 depends on LINUX_KERNEL_IMAGE_HEADER
105 hex
106 help
107 The value subtracted from CONFIG_TEXT_BASE to calculate the
108 TEXT_OFFSET value written to the Linux kernel image header.
109
110 config GICV2
111 bool
112
113 config GICV3
114 bool
115
116 config GIC_V3_ITS
117 bool "ARM GICV3 ITS"
118 select IRQ
119 help
120 ARM GICV3 Interrupt translation service (ITS).
121 Basic support for programming locality specific peripheral
122 interrupts (LPI) configuration tables and enable LPI tables.
123 LPI configuration table can be used by u-boot or Linux.
124 ARM GICV3 has limitation, once the LPI table is enabled, LPI
125 configuration table can not be re-programmed, unless GICV3 reset.
126
127 config GICV3_SUPPORT_GIC600
128 bool "ARM GICV3 GIC600 SUPPORT"
129 help
130 ARM GIC-600 IP complies with ARM GICv3 architecture, but among others,
131 implements a power control register in the Redistributor frame.This
132 register must be programmed to mark the frame as powered on, before
133 accessing other registers in the frame. Rest of initialization sequence
134 remains the same.
135
136 config STATIC_RELA
137 bool
138 default y if ARM64
139
140 config DMA_ADDR_T_64BIT
141 bool
142 default y if ARM64
143
144 config HAS_VBAR
145 bool
146
147 config HAS_THUMB2
148 bool
149
150 config GPIO_EXTRA_HEADER
151 bool
152
153 # Used for compatibility with asm files copied from the kernel
154 config ARM_ASM_UNIFIED
155 bool
156 default y
157
158 # Used for compatibility with asm files copied from the kernel
159 config THUMB2_KERNEL
160 bool
161
162 config SYS_ICACHE_OFF
163 bool "Do not enable icache"
164 help
165 Do not enable instruction cache in U-Boot.
166
167 config SPL_SYS_ICACHE_OFF
168 bool "Do not enable icache in SPL"
169 depends on SPL
170 default SYS_ICACHE_OFF
171 help
172 Do not enable instruction cache in SPL.
173
174 config SYS_DCACHE_OFF
175 bool "Do not enable dcache"
176 help
177 Do not enable data cache in U-Boot.
178
179 config SPL_SYS_DCACHE_OFF
180 bool "Do not enable dcache in SPL"
181 depends on SPL
182 default SYS_DCACHE_OFF
183 help
184 Do not enable data cache in SPL.
185
186 config SYS_ARM_CACHE_CP15
187 bool "CP15 based cache enabling support"
188 help
189 Select this if your processor suports enabling caches by using
190 CP15 registers.
191
192 config SYS_ARM_MMU
193 bool "MMU-based Paged Memory Management Support"
194 select SYS_ARM_CACHE_CP15
195 help
196 Select if you want MMU-based virtualised addressing space
197 support via paged memory management.
198
199 config SYS_ARM_MPU
200 bool 'Use the ARM v7 PMSA Compliant MPU'
201 help
202 Some ARM systems without an MMU have instead a Memory Protection
203 Unit (MPU) that defines the type and permissions for regions of
204 memory.
205 If your CPU has an MPU then you should choose 'y' here unless you
206 know that you do not want to use the MPU.
207
208 # If set, the workarounds for these ARM errata are applied early during U-Boot
209 # startup. Note that in general these options force the workarounds to be
210 # applied; no CPU-type/version detection exists, unlike the similar options in
211 # the Linux kernel. Do not set these options unless they apply! Also note that
212 # the following can be machine-specific errata. These do have ability to
213 # provide rudimentary version and machine-specific checks, but expect no
214 # product checks:
215 # CONFIG_ARM_ERRATA_430973
216 # CONFIG_ARM_ERRATA_454179
217 # CONFIG_ARM_ERRATA_621766
218 # CONFIG_ARM_ERRATA_798870
219 # CONFIG_ARM_ERRATA_801819
220 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
221 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
222
223 config ARM_ERRATA_430973
224 bool
225
226 config ARM_ERRATA_454179
227 bool
228
229 config ARM_ERRATA_621766
230 bool
231
232 config ARM_ERRATA_716044
233 bool
234
235 config ARM_ERRATA_725233
236 bool
237
238 config ARM_ERRATA_742230
239 bool
240
241 config ARM_ERRATA_743622
242 bool
243
244 config ARM_ERRATA_751472
245 bool
246
247 config ARM_ERRATA_761320
248 bool
249
250 config ARM_ERRATA_773022
251 bool
252
253 config ARM_ERRATA_774769
254 bool
255
256 config ARM_ERRATA_794072
257 bool
258
259 config ARM_ERRATA_798870
260 bool
261
262 config ARM_ERRATA_801819
263 bool
264
265 config ARM_ERRATA_826974
266 bool
267
268 config ARM_ERRATA_828024
269 bool
270
271 config ARM_ERRATA_829520
272 bool
273
274 config ARM_ERRATA_833069
275 bool
276
277 config ARM_ERRATA_833471
278 bool
279
280 config ARM_ERRATA_845369
281 bool
282
283 config ARM_ERRATA_852421
284 bool
285
286 config ARM_ERRATA_852423
287 bool
288
289 config ARM_ERRATA_855873
290 bool
291
292 config ARM_CORTEX_A8_CVE_2017_5715
293 bool
294
295 config ARM_CORTEX_A15_CVE_2017_5715
296 bool
297
298 config CPU_ARM720T
299 bool
300 select SYS_CACHE_SHIFT_5
301 imply SYS_ARM_MMU
302
303 config CPU_ARM920T
304 bool
305 select SYS_CACHE_SHIFT_5
306 imply SYS_ARM_MMU
307
308 config CPU_ARM926EJS
309 bool
310 select SYS_CACHE_SHIFT_5
311 imply SYS_ARM_MMU
312 imply SPL_SEPARATE_BSS
313
314 config CPU_ARM946ES
315 bool
316 select SYS_CACHE_SHIFT_5
317 imply SYS_ARM_MMU
318
319 config CPU_ARM1136
320 bool
321 select SYS_CACHE_SHIFT_5
322 imply SYS_ARM_MMU
323 imply SPL_SEPARATE_BSS
324
325 config CPU_ARM1176
326 bool
327 select HAS_VBAR
328 select SYS_CACHE_SHIFT_5
329 imply SYS_ARM_MMU
330
331 config CPU_V7A
332 bool
333 select HAS_THUMB2
334 select HAS_VBAR
335 select SYS_CACHE_SHIFT_6
336 imply SYS_ARM_MMU
337
338 config CPU_V7M
339 bool
340 select HAS_THUMB2
341 select SYS_ARM_MPU
342 select SYS_CACHE_SHIFT_5
343 select SYS_THUMB_BUILD
344 select THUMB2_KERNEL
345
346 config CPU_V7R
347 bool
348 select HAS_THUMB2
349 select SYS_ARM_CACHE_CP15
350 select SYS_ARM_MPU
351 select SYS_CACHE_SHIFT_6
352
353 config SYS_CPU
354 default "arm720t" if CPU_ARM720T
355 default "arm920t" if CPU_ARM920T
356 default "arm926ejs" if CPU_ARM926EJS
357 default "arm946es" if CPU_ARM946ES
358 default "arm1136" if CPU_ARM1136
359 default "arm1176" if CPU_ARM1176
360 default "armv7" if CPU_V7A
361 default "armv7" if CPU_V7R
362 default "armv7m" if CPU_V7M
363 default "armv8" if ARM64
364
365 config SYS_ARM_ARCH
366 int
367 default 4 if CPU_ARM720T
368 default 4 if CPU_ARM920T
369 default 5 if CPU_ARM926EJS
370 default 5 if CPU_ARM946ES
371 default 6 if CPU_ARM1136
372 default 6 if CPU_ARM1176
373 default 7 if CPU_V7A
374 default 7 if CPU_V7M
375 default 7 if CPU_V7R
376 default 8 if ARM64
377
378 choice
379 prompt "Select the ARM data write cache policy"
380 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMNS || RZA1
381 default SYS_ARM_CACHE_WRITEBACK
382
383 config SYS_ARM_CACHE_WRITEBACK
384 bool "Write-back (WB)"
385 help
386 A write updates the cache only and marks the cache line as dirty.
387 External memory is updated only when the line is evicted or explicitly
388 cleaned.
389
390 config SYS_ARM_CACHE_WRITETHROUGH
391 bool "Write-through (WT)"
392 help
393 A write updates both the cache and the external memory system.
394 This does not mark the cache line as dirty.
395
396 config SYS_ARM_CACHE_WRITEALLOC
397 bool "Write allocation (WA)"
398 help
399 A cache line is allocated on a write miss. This means that executing a
400 store instruction on the processor might cause a burst read to occur.
401 There is a linefill to obtain the data for the cache line, before the
402 write is performed.
403 endchoice
404
405 config ARCH_VERY_EARLY_INIT
406 bool
407
408 config SPL_ARCH_VERY_EARLY_INIT
409 bool
410
411 config ARCH_CPU_INIT
412 bool "Enable ARCH_CPU_INIT"
413 help
414 Some architectures require a call to arch_cpu_init().
415 Say Y here to enable it
416
417 config SYS_ARCH_TIMER
418 bool "ARM Generic Timer support"
419 depends on CPU_V7A || ARM64
420 default y if ARM64
421 help
422 The ARM Generic Timer (aka arch-timer) provides an architected
423 interface to a timer source on an SoC.
424 It is mandatory for ARMv8 implementation and widely available
425 on ARMv7 systems.
426
427 config ARM_SMCCC
428 bool "Support for ARM SMC Calling Convention (SMCCC)"
429 depends on CPU_V7A || ARM64
430 select ARM_PSCI_FW
431 help
432 Say Y here if you want to enable ARM SMC Calling Convention.
433 This should be enabled if U-Boot needs to communicate with system
434 firmware (for example, PSCI) according to SMCCC.
435
436 config SYS_THUMB_BUILD
437 bool "Build U-Boot using the Thumb instruction set"
438 depends on !ARM64
439 help
440 Use this flag to build U-Boot using the Thumb instruction set for
441 ARM architectures. Thumb instruction set provides better code
442 density. For ARM architectures that support Thumb2 this flag will
443 result in Thumb2 code generated by GCC.
444
445 config SPL_SYS_THUMB_BUILD
446 bool "Build SPL using the Thumb instruction set"
447 default y if SYS_THUMB_BUILD
448 depends on !ARM64 && SPL
449 help
450 Use this flag to build SPL using the Thumb instruction set for
451 ARM architectures. Thumb instruction set provides better code
452 density. For ARM architectures that support Thumb2 this flag will
453 result in Thumb2 code generated by GCC.
454
455 config TPL_SYS_THUMB_BUILD
456 bool "Build TPL using the Thumb instruction set"
457 default y if SYS_THUMB_BUILD
458 depends on TPL && !ARM64
459 help
460 Use this flag to build TPL using the Thumb instruction set for
461 ARM architectures. Thumb instruction set provides better code
462 density. For ARM architectures that support Thumb2 this flag will
463 result in Thumb2 code generated by GCC.
464
465 config SYS_L2_PL310
466 bool "ARM PL310 L2 cache controller"
467 help
468 Enable support for ARM PL310 L2 cache controller in U-Boot
469
470 config SPL_SYS_L2_PL310
471 bool "ARM PL310 L2 cache controller in SPL"
472 help
473 Enable support for ARM PL310 L2 cache controller in SPL
474
475 config SYS_L2CACHE_OFF
476 bool "L2cache off"
477 help
478 If SoC does not support L2CACHE or one does not want to enable
479 L2CACHE, choose this option.
480
481 config ENABLE_ARM_SOC_BOOT0_HOOK
482 bool "prepare BOOT0 header"
483 help
484 If the SoC's BOOT0 requires a header area filled with (magic)
485 values, then choose this option, and create a file included as
486 <asm/arch/boot0.h> which contains the required assembler code.
487
488 config USE_ARCH_MEMCPY
489 bool "Use an assembly optimized implementation of memcpy"
490 default y if !ARM64
491 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
492 help
493 Enable the generation of an optimized version of memcpy.
494 Such an implementation may be faster under some conditions
495 but may increase the binary size.
496
497 config SPL_USE_ARCH_MEMCPY
498 bool "Use an assembly optimized implementation of memcpy for SPL"
499 default y if USE_ARCH_MEMCPY
500 depends on SPL
501 help
502 Enable the generation of an optimized version of memcpy.
503 Such an implementation may be faster under some conditions
504 but may increase the binary size.
505
506 config TPL_USE_ARCH_MEMCPY
507 bool "Use an assembly optimized implementation of memcpy for TPL"
508 default y if USE_ARCH_MEMCPY
509 depends on TPL
510 help
511 Enable the generation of an optimized version of memcpy.
512 Such an implementation may be faster under some conditions
513 but may increase the binary size.
514
515 config USE_ARCH_MEMMOVE
516 bool "Use an assembly optimized implementation of memmove" if !ARM64
517 default USE_ARCH_MEMCPY if ARM64
518 depends on ARM64
519 help
520 Enable the generation of an optimized version of memmove.
521 Such an implementation may be faster under some conditions
522 but may increase the binary size.
523
524 config SPL_USE_ARCH_MEMMOVE
525 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
526 default SPL_USE_ARCH_MEMCPY if ARM64
527 depends on SPL && ARM64
528 help
529 Enable the generation of an optimized version of memmove.
530 Such an implementation may be faster under some conditions
531 but may increase the binary size.
532
533 config TPL_USE_ARCH_MEMMOVE
534 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
535 default TPL_USE_ARCH_MEMCPY if ARM64
536 depends on TPL && ARM64
537 help
538 Enable the generation of an optimized version of memmove.
539 Such an implementation may be faster under some conditions
540 but may increase the binary size.
541
542 config USE_ARCH_MEMSET
543 bool "Use an assembly optimized implementation of memset"
544 default y if !ARM64
545 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
546 help
547 Enable the generation of an optimized version of memset.
548 Such an implementation may be faster under some conditions
549 but may increase the binary size.
550
551 config SPL_USE_ARCH_MEMSET
552 bool "Use an assembly optimized implementation of memset for SPL"
553 default y if USE_ARCH_MEMSET
554 depends on SPL
555 help
556 Enable the generation of an optimized version of memset.
557 Such an implementation may be faster under some conditions
558 but may increase the binary size.
559
560 config TPL_USE_ARCH_MEMSET
561 bool "Use an assembly optimized implementation of memset for TPL"
562 default y if USE_ARCH_MEMSET
563 depends on TPL
564 help
565 Enable the generation of an optimized version of memset.
566 Such an implementation may be faster under some conditions
567 but may increase the binary size.
568
569 config ARM64_SUPPORT_AARCH32
570 bool "ARM64 system support AArch32 execution state"
571 depends on ARM64
572 default y if !TARGET_THUNDERX_88XX
573 help
574 This ARM64 system supports AArch32 execution state.
575
576 config IPROC
577 bool
578
579 config S5P
580 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
581
582 choice
583 prompt "Target select"
584 default TARGET_HIKEY
585
586 config ARCH_AT91
587 bool "Atmel AT91"
588 select GPIO_EXTRA_HEADER
589 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
590 select SPL_SEPARATE_BSS if SPL
591 imply SYS_THUMB_BUILD
592
593 config ARCH_DAVINCI
594 bool "TI DaVinci"
595 select CPU_ARM926EJS
596 select GPIO_EXTRA_HEADER
597 select SPL_DM_SPI if SPL
598 imply CMD_SAVES
599 help
600 Support for TI's DaVinci platform.
601
602 config ARCH_HISTB
603 bool "Hisilicon HiSTB SoCs"
604 select DM
605 select DM_SERIAL
606 select OF_CONTROL
607 select PL01X_SERIAL
608 imply CMD_DM
609 help
610 Support for HiSTB SoCs.
611
612 config ARCH_KIRKWOOD
613 bool "Marvell Kirkwood"
614 select ARCH_MISC_INIT
615 select BOARD_EARLY_INIT_F
616 select CPU_ARM926EJS
617 select GPIO_EXTRA_HEADER
618 select TIMER
619
620 config ARCH_MVEBU
621 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
622 select ARCH_EARLY_INIT_R if ARM64
623 select DM
624 select DM_SERIAL
625 select DM_SPI
626 select DM_SPI_FLASH
627 select GPIO_EXTRA_HEADER
628 select MTD
629 select SPL_DM_SPI if SPL
630 select SPL_DM_SPI_FLASH if SPL
631 select SPL_TIMER if SPL
632 select TIMER if !ARM64
633 select OF_CONTROL
634 select OF_SEPARATE
635 select SPI
636 imply CMD_DM
637
638 config ARCH_ORION5X
639 bool "Marvell Orion"
640 select CPU_ARM926EJS
641 select GPIO_EXTRA_HEADER
642 select SPL_SEPARATE_BSS if SPL
643 select TIMER
644
645 config ARCH_BCM283X
646 bool "Broadcom BCM283X family"
647 select DM
648 select DM_GPIO
649 select DM_SERIAL
650 select GPIO_EXTRA_HEADER
651 select OF_CONTROL
652 select PL01X_SERIAL
653 select SERIAL_SEARCH_ALL
654 imply CMD_DM
655 imply FAT_WRITE
656
657 config ARCH_BCMSTB
658 bool "Broadcom BCM7XXX family"
659 select CPU_V7A
660 select DM
661 select GPIO_EXTRA_HEADER
662 select OF_CONTROL
663 imply CMD_DM
664 imply OF_HAS_PRIOR_STAGE
665 help
666 This enables support for Broadcom ARM-based set-top box
667 chipsets, including the 7445 family of chips.
668
669 config ARCH_BCMBCA
670 bool "Broadcom broadband chip family"
671 select DM
672 select OF_CONTROL
673 imply CMD_DM
674
675 config TARGET_VEXPRESS_CA9X4
676 bool "Support vexpress_ca9x4"
677 select CPU_V7A
678 select PL01X_SERIAL
679
680 config TARGET_BCMNS
681 bool "Support Broadcom Northstar"
682 select CPU_V7A
683 select DM
684 select DM_GPIO
685 select DM_SERIAL
686 select OF_CONTROL
687 select TIMER
688 select SYS_NS16550
689 select ARM_GLOBAL_TIMER
690 imply SYS_THUMB_BUILD
691 imply MTD_RAW_NAND
692 imply NAND_BRCMNAND
693 imply NAND_BRCMNAND_IPROC
694 help
695 Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit
696 ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094,
697 BCM5301x etc.
698
699 config TARGET_BCMNS3
700 bool "Support Broadcom NS3"
701 select ARM64
702 select BOARD_LATE_INIT
703 help
704 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
705 ARMv8 Cortex-A72 processors targeting a broad range of networking
706 applications.
707
708 config ARCH_EXYNOS
709 bool "Samsung EXYNOS"
710 select DM
711 select DM_GPIO
712 select DM_I2C
713 select DM_KEYBOARD
714 select DM_SERIAL
715 select DM_SPI
716 select DM_SPI_FLASH
717 select MTD
718 select SPI
719 select GPIO_EXTRA_HEADER
720 imply SYS_THUMB_BUILD
721 imply CMD_DM
722 imply FAT_WRITE
723
724 config ARCH_S5PC1XX
725 bool "Samsung S5PC1XX"
726 select CPU_V7A
727 select DM
728 select DM_GPIO
729 select DM_I2C
730 select DM_SERIAL
731 select GPIO_EXTRA_HEADER
732 imply CMD_DM
733
734 config ARCH_HIGHBANK
735 bool "Calxeda Highbank"
736 select CPU_V7A
737 select PL01X_SERIAL
738 select DM
739 select DM_SERIAL
740 select OF_CONTROL
741 select CLK
742 select CLK_CCF
743 select AHCI
744 select PHYS_64BIT
745 select TIMER
746 select SP804_TIMER
747 imply OF_HAS_PRIOR_STAGE
748
749 config ARCH_INTEGRATOR
750 bool "ARM Ltd. Integrator family"
751 select DM
752 select DM_SERIAL
753 select GPIO_EXTRA_HEADER
754 select PL01X_SERIAL
755 imply CMD_DM
756
757 config ARCH_IPQ40XX
758 bool "Qualcomm IPQ40xx SoCs"
759 select CPU_V7A
760 select DM
761 select DM_GPIO
762 select DM_SERIAL
763 select DM_RESET
764 select GPIO_EXTRA_HEADER
765 select MSM_SMEM
766 select PINCTRL
767 select CLK
768 select SMEM
769 select OF_CONTROL
770 select CLK_QCOM_IPQ4019
771 select PINCTRL_QCOM_IPQ4019
772 imply CMD_DM
773
774 config ARCH_KEYSTONE
775 bool "TI Keystone"
776 select CMD_DDR3
777 select CMD_POWEROFF
778 select CPU_V7A
779 select DDR_SPD
780 select SPL_BOARD_INIT if SPL
781 select SUPPORT_SPL
782 select SYS_ARCH_TIMER
783 select SYS_THUMB_BUILD
784 imply CMD_MTDPARTS
785 imply CMD_NFS
786 imply CMD_SAVES
787 imply DM_I2C
788 imply FIT
789 imply SOC_TI
790 imply TI_KEYSTONE_SERDES
791
792 config ARCH_K3
793 bool "Texas Instruments' K3 Architecture"
794 select SPL
795 select SUPPORT_SPL
796 select FIT
797 select REGEX
798 select FIT_SIGNATURE if ARM64
799 imply TI_SECURE_DEVICE
800
801 config ARCH_OMAP2PLUS
802 bool "TI OMAP2+"
803 select CPU_V7A
804 select GPIO_EXTRA_HEADER
805 select SPL_BOARD_INIT if SPL
806 select SPL_STACK_R if SPL
807 select SUPPORT_SPL
808 imply TI_SYSC if DM && OF_CONTROL
809 imply FIT
810 imply SPL_SEPARATE_BSS
811
812 config ARCH_MESON
813 bool "Amlogic Meson"
814 select GPIO_EXTRA_HEADER
815 imply DISTRO_DEFAULTS
816 imply DM_RNG
817 help
818 Support for the Meson SoC family developed by Amlogic Inc.,
819 targeted at media players and tablet computers. We currently
820 support the S905 (GXBaby) 64-bit SoC.
821
822 config ARCH_MEDIATEK
823 bool "MediaTek SoCs"
824 select DM
825 select GPIO_EXTRA_HEADER
826 select OF_CONTROL
827 select SPL_DM if SPL
828 select SPL_LIBCOMMON_SUPPORT if SPL
829 select SPL_LIBGENERIC_SUPPORT if SPL
830 select SPL_OF_CONTROL if SPL
831 select SUPPORT_SPL
832 help
833 Support for the MediaTek SoCs family developed by MediaTek Inc.
834 Please refer to doc/README.mediatek for more information.
835
836 config ARCH_LPC32XX
837 bool "NXP LPC32xx platform"
838 select CPU_ARM926EJS
839 select DM
840 select DM_GPIO
841 select DM_SERIAL
842 select GPIO_EXTRA_HEADER
843 select SPL_DM if SPL
844 select SUPPORT_SPL
845 imply CMD_DM
846
847 config ARCH_IMX8
848 bool "NXP i.MX8 platform"
849 select ARM64
850 select SYS_FSL_HAS_SEC
851 select SYS_FSL_SEC_COMPAT_4
852 select SYS_FSL_SEC_LE
853 select DM
854 select DM_EVENT
855 select GPIO_EXTRA_HEADER
856 select MACH_IMX
857 select OF_CONTROL
858 select ENABLE_ARM_SOC_BOOT0_HOOK
859
860 config ARCH_IMX8M
861 bool "NXP i.MX8M platform"
862 select ARM64
863 select GPIO_EXTRA_HEADER
864 select MACH_IMX
865 select SYS_FSL_HAS_SEC
866 select SYS_FSL_SEC_COMPAT_4
867 select SYS_FSL_SEC_LE
868 select SYS_I2C_MXC
869 select DM
870 select DM_EVENT if CLK
871 select SUPPORT_SPL
872 imply CMD_DM
873
874 config ARCH_IMX8ULP
875 bool "NXP i.MX8ULP platform"
876 select ARM64
877 select DM
878 select DM_EVENT
879 select MACH_IMX
880 select OF_CONTROL
881 select SUPPORT_SPL
882 select GPIO_EXTRA_HEADER
883 select MISC
884 select IMX_ELE
885 imply CMD_DM
886
887 config ARCH_IMX9
888 bool "NXP i.MX9 platform"
889 select ARM64
890 select DM
891 select DM_EVENT
892 select MACH_IMX
893 select SUPPORT_SPL
894 select GPIO_EXTRA_HEADER
895 select MISC
896 select IMX_ELE
897 imply CMD_DM
898
899 config ARCH_IMXRT
900 bool "NXP i.MXRT platform"
901 select CPU_V7M
902 select DM
903 select DM_SERIAL
904 select GPIO_EXTRA_HEADER
905 select MACH_IMX
906 select SUPPORT_SPL
907 imply CMD_DM
908
909 config ARCH_MX23
910 bool "NXP i.MX23 family"
911 select CPU_ARM926EJS
912 select GPIO_EXTRA_HEADER
913 select MACH_IMX
914 select SUPPORT_SPL
915
916 config ARCH_MX28
917 bool "NXP i.MX28 family"
918 select CPU_ARM926EJS
919 select GPIO_EXTRA_HEADER
920 select MACH_IMX
921 select SUPPORT_SPL
922
923 config ARCH_MX31
924 bool "NXP i.MX31 family"
925 select CPU_ARM1136
926 select GPIO_EXTRA_HEADER
927 select MACH_IMX
928
929 config ARCH_MX7ULP
930 bool "NXP MX7ULP"
931 select BOARD_POSTCLK_INIT
932 select CPU_V7A
933 select GPIO_EXTRA_HEADER
934 select MACH_IMX
935 select SYS_FSL_HAS_SEC
936 select SYS_FSL_SEC_COMPAT_4
937 select SYS_FSL_SEC_LE
938 select ROM_UNIFIED_SECTIONS
939 imply MXC_GPIO
940 imply SYS_THUMB_BUILD
941
942 config ARCH_MX7
943 bool "Freescale MX7"
944 select ARCH_MISC_INIT
945 select CPU_V7A
946 select GPIO_EXTRA_HEADER
947 select MACH_IMX
948 select MXC_GPT_HCLK
949 select SYS_FSL_HAS_SEC
950 select SYS_FSL_SEC_COMPAT_4
951 select SYS_FSL_SEC_LE
952 imply BOARD_EARLY_INIT_F
953 imply MXC_GPIO
954 imply SYS_THUMB_BUILD
955
956 config ARCH_MX6
957 bool "Freescale MX6"
958 select BOARD_POSTCLK_INIT
959 select CPU_V7A
960 select GPIO_EXTRA_HEADER
961 select MACH_IMX
962 select MXC_GPT_HCLK
963 select SYS_FSL_HAS_SEC
964 select SYS_FSL_SEC_COMPAT_4
965 select SYS_FSL_SEC_LE
966 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
967 imply MXC_GPIO
968 imply SYS_THUMB_BUILD
969 imply SPL_SEPARATE_BSS
970
971 config ARCH_MX5
972 bool "Freescale MX5"
973 select BOARD_EARLY_INIT_F
974 select CPU_V7A
975 select GPIO_EXTRA_HEADER
976 select MACH_IMX
977 imply MXC_GPIO
978
979 config ARCH_NEXELL
980 bool "Nexell S5P4418/S5P6818 SoC"
981 select ENABLE_ARM_SOC_BOOT0_HOOK
982 select DM
983 select GPIO_EXTRA_HEADER
984
985 config ARCH_NPCM
986 bool "Support Nuvoton SoCs"
987 select DM
988 select OF_CONTROL
989 imply CMD_DM
990
991 config ARCH_APPLE
992 bool "Apple SoCs"
993 select ARM64
994 select CLK
995 select CMD_PCI
996 select CMD_USB
997 select DM
998 select DM_GPIO
999 select DM_KEYBOARD
1000 select DM_MAILBOX
1001 select DM_RESET
1002 select DM_SERIAL
1003 select DM_SPI
1004 select DM_USB
1005 select VIDEO
1006 select IOMMU
1007 select LINUX_KERNEL_IMAGE_HEADER
1008 select MTD
1009 select OF_BOARD_SETUP
1010 select OF_CONTROL
1011 select PCI
1012 select PHY
1013 select PINCTRL
1014 select POSITION_INDEPENDENT
1015 select POWER_DOMAIN
1016 select REGMAP
1017 select SPI
1018 select SYSCON
1019 select SYSRESET
1020 select SYSRESET_WATCHDOG
1021 select SYSRESET_WATCHDOG_AUTO
1022 select USB
1023 imply CMD_DM
1024 imply CMD_GPT
1025 imply DISTRO_DEFAULTS
1026 imply OF_HAS_PRIOR_STAGE
1027
1028 config ARCH_OWL
1029 bool "Actions Semi OWL SoCs"
1030 select DM
1031 select DM_SERIAL
1032 select GPIO_EXTRA_HEADER
1033 select OWL_SERIAL
1034 select CLK
1035 select CLK_OWL
1036 select OF_CONTROL
1037 select SYS_RELOC_GD_ENV_ADDR
1038 imply CMD_DM
1039
1040 config ARCH_QEMU
1041 bool "QEMU Virtual Platform"
1042 select DM
1043 select DM_SERIAL
1044 select OF_CONTROL
1045 select PL01X_SERIAL
1046 imply CMD_DM
1047 imply DM_RNG
1048 imply DM_RTC
1049 imply RTC_PL031
1050 imply OF_HAS_PRIOR_STAGE
1051 imply VIDEO
1052 imply VIDEO_BOCHS
1053 imply SYS_WHITE_ON_BLACK
1054 imply SYS_CONSOLE_IS_IN_ENV
1055 imply PRE_CONSOLE_BUFFER
1056 imply USB
1057 imply USB_XHCI_HCD
1058 imply USB_XHCI_PCI
1059 imply USB_KEYBOARD
1060 imply CMD_USB
1061
1062 config ARCH_RENESAS
1063 bool "Renesas ARM SoCs"
1064 select DM
1065 select DM_SERIAL
1066 select GPIO_EXTRA_HEADER
1067 select LTO
1068 imply BOARD_EARLY_INIT_F
1069 imply CMD_DM
1070 imply FAT_WRITE
1071 imply SYS_THUMB_BUILD
1072 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1073
1074 config ARCH_SNAPDRAGON
1075 bool "Qualcomm Snapdragon SoCs"
1076 select ARM64
1077 select DM
1078 select DM_GPIO
1079 select DM_SERIAL
1080 select DM_RESET
1081 select POWER_DOMAIN
1082 select GPIO_EXTRA_HEADER
1083 select MSM_SMEM
1084 select OF_CONTROL
1085 select OF_SEPARATE
1086 select SMEM
1087 select SPMI
1088 select BOARD_LATE_INIT
1089 select OF_BOARD
1090 select SAVE_PREV_BL_FDT_ADDR
1091 select LINUX_KERNEL_IMAGE_HEADER
1092 imply CMD_DM
1093
1094 config ARCH_SOCFPGA
1095 bool "Altera SOCFPGA family"
1096 select ARCH_EARLY_INIT_R
1097 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1098 select ARM64 if TARGET_SOCFPGA_SOC64
1099 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1100 select DM
1101 select DM_SERIAL
1102 select GICV2
1103 select GPIO_EXTRA_HEADER
1104 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1105 select OF_CONTROL
1106 select SPL_DM_RESET if DM_RESET
1107 select SPL_DM_SERIAL
1108 select SPL_LIBCOMMON_SUPPORT
1109 select SPL_LIBGENERIC_SUPPORT
1110 select SPL_OF_CONTROL
1111 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1112 select SPL_DRIVERS_MISC if TARGET_SOCFPGA_SOC64
1113 select SPL_SOCFPGA_DT_REG if TARGET_SOCFPGA_SOC64
1114 select SPL_SERIAL
1115 select SPL_SYSRESET
1116 select SPL_WATCHDOG
1117 select SUPPORT_SPL
1118 select SYS_NS16550
1119 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1120 select SYSRESET
1121 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1122 select SYSRESET_SOCFPGA_SOC64 if !TARGET_SOCFPGA_AGILEX5 && \
1123 TARGET_SOCFPGA_SOC64
1124 imply CMD_DM
1125 imply CMD_MTDPARTS
1126 imply CRC32_VERIFY
1127 imply DM_SPI
1128 imply DM_SPI_FLASH
1129 imply FAT_WRITE
1130 imply MTD
1131 imply SPL
1132 imply SPL_DM
1133 imply SPL_DM_SPI
1134 imply SPL_DM_SPI_FLASH
1135 imply SPL_LIBDISK_SUPPORT
1136 imply SPL_MMC
1137 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1138 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1139 imply SPL_SPI_FLASH_SUPPORT
1140 imply SPL_SPI
1141 imply L2X0_CACHE
1142
1143 config ARCH_SUNXI
1144 bool "Support sunxi (Allwinner) SoCs"
1145 select BINMAN
1146 select CMD_GPIO
1147 select CMD_MMC if MMC
1148 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1149 select CLK
1150 select DM
1151 select DM_GPIO
1152 select DM_I2C if I2C
1153 select DM_SPI if SPI
1154 select DM_SPI_FLASH if SPI && MTD
1155 select DM_KEYBOARD
1156 select DM_MMC if MMC
1157 select DM_SERIAL
1158 select OF_BOARD_SETUP
1159 select OF_CONTROL
1160 select OF_SEPARATE
1161 select PINCTRL
1162 select SPECIFY_CONSOLE_INDEX
1163 select SPL_SEPARATE_BSS if SPL
1164 select SPL_STACK_R if SPL
1165 select SPL_SYS_MALLOC_SIMPLE if SPL
1166 select SPL_SYS_THUMB_BUILD if SPL && !ARM64
1167 select SUNXI_GPIO
1168 select SYS_NS16550
1169 select SYS_THUMB_BUILD if !ARM64
1170 select USB if DISTRO_DEFAULTS
1171 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1172 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1173 select SPL_USE_TINY_PRINTF if SPL
1174 select USE_PREBOOT
1175 select SYS_RELOC_GD_ENV_ADDR
1176 imply BOARD_LATE_INIT
1177 imply CMD_DM
1178 imply CMD_GPT
1179 imply CMD_UBI if MTD_RAW_NAND
1180 imply DISTRO_DEFAULTS
1181 imply DM_REGULATOR
1182 imply DM_REGULATOR_FIXED
1183 imply FAT_WRITE
1184 imply FIT
1185 imply OF_LIBFDT_OVERLAY
1186 imply PRE_CONSOLE_BUFFER
1187 imply SPL_GPIO
1188 imply SPL_LIBCOMMON_SUPPORT
1189 imply SPL_LIBGENERIC_SUPPORT
1190 imply SPL_MMC if MMC
1191 imply SPL_POWER
1192 imply SPL_SERIAL
1193 imply SYSRESET
1194 imply SYSRESET_WATCHDOG
1195 imply SYSRESET_WATCHDOG_AUTO
1196 imply USB_GADGET
1197 imply WDT
1198
1199 config ARCH_U8500
1200 bool "ST-Ericsson U8500 Series"
1201 select CPU_V7A
1202 select DM
1203 select DM_GPIO
1204 select DM_MMC if MMC
1205 select DM_SERIAL
1206 select DM_USB_GADGET if DM_USB
1207 select OF_CONTROL
1208 select SYSRESET
1209 select TIMER
1210 imply AB8500_USB_PHY
1211 imply ARM_PL180_MMCI
1212 imply CLK
1213 imply DM_PMIC
1214 imply DM_RTC
1215 imply NOMADIK_GPIO
1216 imply NOMADIK_MTU_TIMER
1217 imply PHY
1218 imply PL01X_SERIAL
1219 imply PMIC_AB8500
1220 imply RTC_PL031
1221 imply SYS_THUMB_BUILD
1222 imply SYSRESET_SYSCON
1223
1224 config ARCH_VERSAL
1225 bool "Support Xilinx Versal Platform"
1226 select ARM64
1227 select CLK
1228 select DM
1229 select DM_MMC if MMC
1230 select DM_SERIAL
1231 select GICV3
1232 select OF_CONTROL
1233 select SOC_DEVICE
1234 imply BOARD_LATE_INIT
1235 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1236
1237 config ARCH_VERSAL_NET
1238 bool "Support Xilinx Versal NET Platform"
1239 select ARM64
1240 select CLK
1241 select DM
1242 select DM_MMC if MMC
1243 select DM_SERIAL
1244 select OF_CONTROL
1245 imply BOARD_LATE_INIT
1246 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1247
1248 config ARCH_VF610
1249 bool "Freescale Vybrid"
1250 select CPU_V7A
1251 select GPIO_EXTRA_HEADER
1252 select IOMUX_SHARE_CONF_REG
1253 select MACH_IMX
1254 select SYS_FSL_ERRATUM_ESDHC111
1255 imply CMD_MTDPARTS
1256 imply MTD_RAW_NAND
1257
1258 config ARCH_ZYNQ
1259 bool "Xilinx Zynq based platform"
1260 select ARM_TWD_TIMER
1261 select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA)
1262 select CLK
1263 select CLK_ZYNQ
1264 select CPU_V7A
1265 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1266 select DM
1267 select DM_MMC if MMC
1268 select DM_SERIAL
1269 select DM_SPI
1270 select DM_SPI_FLASH
1271 select OF_CONTROL
1272 select MTD
1273 select SPI
1274 select SPL_BOARD_INIT if SPL
1275 select SPL_CLK if SPL
1276 select SPL_DM if SPL
1277 select SPL_DM_SPI if SPL
1278 select SPL_DM_SPI_FLASH if SPL
1279 select SPL_OF_CONTROL if SPL
1280 select SPL_SEPARATE_BSS if SPL
1281 select SPL_TIMER if SPL
1282 select SUPPORT_SPL
1283 select TIMER
1284 imply BOARD_LATE_INIT
1285 imply CMD_CLK
1286 imply CMD_DM
1287 imply CMD_SPL
1288 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1289 imply FAT_WRITE
1290
1291 config ARCH_ZYNQMP_R5
1292 bool "Xilinx ZynqMP R5 based platform"
1293 select CLK
1294 select CPU_V7R
1295 select DM
1296 select DM_MMC if MMC
1297 select DM_SERIAL
1298 select OF_CONTROL
1299 imply CMD_DM
1300 imply DM_USB_GADGET
1301
1302 config ARCH_ZYNQMP
1303 bool "Xilinx ZynqMP based platform"
1304 select ARM64
1305 select CLK
1306 select DM
1307 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1308 imply DM_MAILBOX
1309 select DM_MMC if MMC
1310 select DM_SERIAL
1311 select MTD
1312 select DM_SPI if SPI
1313 select DM_SPI_FLASH if DM_SPI
1314 imply FIRMWARE
1315 select GICV2
1316 select OF_CONTROL
1317 select SPL_BOARD_INIT if SPL
1318 select SPL_CLK if SPL
1319 select SPL_DM if SPL
1320 select SPL_DM_SPI if SPI && SPL_DM
1321 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1322 select SPL_DM_MAILBOX if SPL
1323 imply SPL_FIRMWARE if SPL
1324 select SPL_SEPARATE_BSS if SPL
1325 select SUPPORT_SPL
1326 imply ZYNQMP_IPI if DM_MAILBOX
1327 select SOC_DEVICE
1328 imply BOARD_LATE_INIT
1329 imply CMD_DM
1330 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1331 imply FAT_WRITE
1332 imply MP
1333 imply DM_USB_GADGET
1334 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1335
1336 config ARCH_TEGRA
1337 bool "NVIDIA Tegra"
1338 select GPIO_EXTRA_HEADER
1339 imply DISTRO_DEFAULTS
1340 imply FAT_WRITE
1341 imply SPL_TIMER if SPL
1342
1343 config ARCH_VEXPRESS64
1344 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1345 select ARM64
1346 select DM
1347 select DM_SERIAL
1348 select PL01X_SERIAL
1349 select OF_CONTROL
1350 select CLK
1351 select BLK
1352 select MTD_NOR_FLASH if MTD
1353 select FLASH_CFI_DRIVER if MTD
1354 select ENV_IS_IN_FLASH if MTD
1355 imply DISTRO_DEFAULTS
1356
1357 config TARGET_CORSTONE1000
1358 bool "Support Corstone1000 Platform"
1359 select ARM64
1360 select PL01X_SERIAL
1361 select DM
1362
1363 config TARGET_TOTAL_COMPUTE
1364 bool "Support Total Compute Platform"
1365 select ARM64
1366 select PL01X_SERIAL
1367 select DM
1368 select DM_SERIAL
1369 select DM_MMC
1370 select DM_GPIO
1371
1372 config TARGET_LS2080A_EMU
1373 bool "Support ls2080a_emu"
1374 select ARCH_LS2080A
1375 select ARM64
1376 select ARMV8_MULTIENTRY
1377 select FSL_DDR_SYNC_REFRESH
1378 select GPIO_EXTRA_HEADER
1379 help
1380 Support for Freescale LS2080A_EMU platform.
1381 The LS2080A Development System (EMULATOR) is a pre-silicon
1382 development platform that supports the QorIQ LS2080A
1383 Layerscape Architecture processor.
1384
1385 config TARGET_LS1088AQDS
1386 bool "Support ls1088aqds"
1387 select ARCH_LS1088A
1388 select ARM64
1389 select ARMV8_MULTIENTRY
1390 select ARCH_SUPPORT_TFABOOT
1391 select BOARD_LATE_INIT
1392 select GPIO_EXTRA_HEADER
1393 select SUPPORT_SPL
1394 select FSL_DDR_INTERACTIVE if !SD_BOOT
1395 help
1396 Support for NXP LS1088AQDS platform.
1397 The LS1088A Development System (QDS) is a high-performance
1398 development platform that supports the QorIQ LS1088A
1399 Layerscape Architecture processor.
1400
1401 config TARGET_LS2080AQDS
1402 bool "Support ls2080aqds"
1403 select ARCH_LS2080A
1404 select ARM64
1405 select ARMV8_MULTIENTRY
1406 select ARCH_SUPPORT_TFABOOT
1407 select BOARD_LATE_INIT
1408 select GPIO_EXTRA_HEADER
1409 select SUPPORT_SPL
1410 imply SCSI
1411 imply SCSI_AHCI
1412 select FSL_DDR_BIST
1413 select FSL_DDR_INTERACTIVE if !SPL
1414 help
1415 Support for Freescale LS2080AQDS platform.
1416 The LS2080A Development System (QDS) is a high-performance
1417 development platform that supports the QorIQ LS2080A
1418 Layerscape Architecture processor.
1419
1420 config TARGET_LS2080ARDB
1421 bool "Support ls2080ardb"
1422 select ARCH_LS2080A
1423 select ARM64
1424 select ARMV8_MULTIENTRY
1425 select ARCH_SUPPORT_TFABOOT
1426 select BOARD_LATE_INIT
1427 select SUPPORT_SPL
1428 select FSL_DDR_BIST
1429 select FSL_DDR_INTERACTIVE if !SPL
1430 select GPIO_EXTRA_HEADER
1431 imply SCSI
1432 imply SCSI_AHCI
1433 help
1434 Support for Freescale LS2080ARDB platform.
1435 The LS2080A Reference design board (RDB) is a high-performance
1436 development platform that supports the QorIQ LS2080A
1437 Layerscape Architecture processor.
1438
1439 config TARGET_LS2081ARDB
1440 bool "Support ls2081ardb"
1441 select ARCH_LS2080A
1442 select ARM64
1443 select ARMV8_MULTIENTRY
1444 select BOARD_LATE_INIT
1445 select GPIO_EXTRA_HEADER
1446 select SUPPORT_SPL
1447 help
1448 Support for Freescale LS2081ARDB platform.
1449 The LS2081A Reference design board (RDB) is a high-performance
1450 development platform that supports the QorIQ LS2081A/LS2041A
1451 Layerscape Architecture processor.
1452
1453 config TARGET_LX2160ARDB
1454 bool "Support lx2160ardb"
1455 select ARCH_LX2160A
1456 select ARM64
1457 select ARMV8_MULTIENTRY
1458 select ARCH_SUPPORT_TFABOOT
1459 select BOARD_LATE_INIT
1460 select GPIO_EXTRA_HEADER
1461 help
1462 Support for NXP LX2160ARDB platform.
1463 The lx2160ardb (LX2160A Reference design board (RDB)
1464 is a high-performance development platform that supports the
1465 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1466
1467 config TARGET_LX2160AQDS
1468 bool "Support lx2160aqds"
1469 select ARCH_LX2160A
1470 select ARM64
1471 select ARMV8_MULTIENTRY
1472 select ARCH_SUPPORT_TFABOOT
1473 select BOARD_LATE_INIT
1474 select GPIO_EXTRA_HEADER
1475 help
1476 Support for NXP LX2160AQDS platform.
1477 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1478 is a high-performance development platform that supports the
1479 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1480
1481 config TARGET_LX2162AQDS
1482 bool "Support lx2162aqds"
1483 select ARCH_LX2162A
1484 select ARCH_MISC_INIT
1485 select ARM64
1486 select ARMV8_MULTIENTRY
1487 select ARCH_SUPPORT_TFABOOT
1488 select BOARD_LATE_INIT
1489 select GPIO_EXTRA_HEADER
1490 help
1491 Support for NXP LX2162AQDS platform.
1492 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1493
1494 config TARGET_HIKEY
1495 bool "Support HiKey 96boards Consumer Edition Platform"
1496 select ARM64
1497 select DM
1498 select DM_GPIO
1499 select DM_SERIAL
1500 select GPIO_EXTRA_HEADER
1501 select OF_CONTROL
1502 select PL01X_SERIAL
1503 select SPECIFY_CONSOLE_INDEX
1504 imply CMD_DM
1505 help
1506 Support for HiKey 96boards platform. It features a HI6220
1507 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1508
1509 config TARGET_HIKEY960
1510 bool "Support HiKey960 96boards Consumer Edition Platform"
1511 select ARM64
1512 select DM
1513 select DM_SERIAL
1514 select GPIO_EXTRA_HEADER
1515 select OF_CONTROL
1516 select PL01X_SERIAL
1517 imply CMD_DM
1518 help
1519 Support for HiKey960 96boards platform. It features a HI3660
1520 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1521
1522 config TARGET_POPLAR
1523 bool "Support Poplar 96boards Enterprise Edition Platform"
1524 select ARM64
1525 select DM
1526 select DM_SERIAL
1527 select GPIO_EXTRA_HEADER
1528 select OF_CONTROL
1529 select PL01X_SERIAL
1530 imply CMD_DM
1531 help
1532 Support for Poplar 96boards EE platform. It features a HI3798cv200
1533 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1534 making it capable of running any commercial set-top solution based on
1535 Linux or Android.
1536
1537 config TARGET_LS1012AQDS
1538 bool "Support ls1012aqds"
1539 select ARCH_LS1012A
1540 select ARM64
1541 select ARCH_SUPPORT_TFABOOT
1542 select BOARD_LATE_INIT
1543 select GPIO_EXTRA_HEADER
1544 help
1545 Support for Freescale LS1012AQDS platform.
1546 The LS1012A Development System (QDS) is a high-performance
1547 development platform that supports the QorIQ LS1012A
1548 Layerscape Architecture processor.
1549
1550 config TARGET_LS1012ARDB
1551 bool "Support ls1012ardb"
1552 select ARCH_LS1012A
1553 select ARM64
1554 select ARCH_SUPPORT_TFABOOT
1555 select BOARD_LATE_INIT
1556 select GPIO_EXTRA_HEADER
1557 imply SCSI
1558 imply SCSI_AHCI
1559 help
1560 Support for Freescale LS1012ARDB platform.
1561 The LS1012A Reference design board (RDB) is a high-performance
1562 development platform that supports the QorIQ LS1012A
1563 Layerscape Architecture processor.
1564
1565 config TARGET_LS1012A2G5RDB
1566 bool "Support ls1012a2g5rdb"
1567 select ARCH_LS1012A
1568 select ARM64
1569 select ARCH_SUPPORT_TFABOOT
1570 select BOARD_LATE_INIT
1571 select GPIO_EXTRA_HEADER
1572 imply SCSI
1573 help
1574 Support for Freescale LS1012A2G5RDB platform.
1575 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1576 development platform that supports the QorIQ LS1012A
1577 Layerscape Architecture processor.
1578
1579 config TARGET_LS1012AFRWY
1580 bool "Support ls1012afrwy"
1581 select ARCH_LS1012A
1582 select ARM64
1583 select ARCH_SUPPORT_TFABOOT
1584 select BOARD_LATE_INIT
1585 select GPIO_EXTRA_HEADER
1586 imply SCSI
1587 imply SCSI_AHCI
1588 help
1589 Support for Freescale LS1012AFRWY platform.
1590 The LS1012A FRWY board (FRWY) is a high-performance
1591 development platform that supports the QorIQ LS1012A
1592 Layerscape Architecture processor.
1593
1594 config TARGET_LS1012AFRDM
1595 bool "Support ls1012afrdm"
1596 select ARCH_LS1012A
1597 select ARM64
1598 select ARCH_SUPPORT_TFABOOT
1599 select GPIO_EXTRA_HEADER
1600 help
1601 Support for Freescale LS1012AFRDM platform.
1602 The LS1012A Freedom board (FRDM) is a high-performance
1603 development platform that supports the QorIQ LS1012A
1604 Layerscape Architecture processor.
1605
1606 config TARGET_LS1028AQDS
1607 bool "Support ls1028aqds"
1608 select ARCH_LS1028A
1609 select ARM64
1610 select ARMV8_MULTIENTRY
1611 select ARCH_SUPPORT_TFABOOT
1612 select BOARD_LATE_INIT
1613 select GPIO_EXTRA_HEADER
1614 help
1615 Support for Freescale LS1028AQDS platform
1616 The LS1028A Development System (QDS) is a high-performance
1617 development platform that supports the QorIQ LS1028A
1618 Layerscape Architecture processor.
1619
1620 config TARGET_LS1028ARDB
1621 bool "Support ls1028ardb"
1622 select ARCH_LS1028A
1623 select ARM64
1624 select ARMV8_MULTIENTRY
1625 select ARCH_SUPPORT_TFABOOT
1626 select BOARD_LATE_INIT
1627 select GPIO_EXTRA_HEADER
1628 help
1629 Support for Freescale LS1028ARDB platform
1630 The LS1028A Development System (RDB) is a high-performance
1631 development platform that supports the QorIQ LS1028A
1632 Layerscape Architecture processor.
1633
1634 config TARGET_LS1088ARDB
1635 bool "Support ls1088ardb"
1636 select ARCH_LS1088A
1637 select ARM64
1638 select ARMV8_MULTIENTRY
1639 select ARCH_SUPPORT_TFABOOT
1640 select BOARD_LATE_INIT
1641 select SUPPORT_SPL
1642 select FSL_DDR_INTERACTIVE if !SD_BOOT
1643 select GPIO_EXTRA_HEADER
1644 help
1645 Support for NXP LS1088ARDB platform.
1646 The LS1088A Reference design board (RDB) is a high-performance
1647 development platform that supports the QorIQ LS1088A
1648 Layerscape Architecture processor.
1649
1650 config TARGET_LS1021AQDS
1651 bool "Support ls1021aqds"
1652 select ARCH_LS1021A
1653 select ARCH_SUPPORT_PSCI
1654 select BOARD_EARLY_INIT_F
1655 select BOARD_LATE_INIT
1656 select CPU_V7A
1657 select CPU_V7_HAS_NONSEC
1658 select CPU_V7_HAS_VIRT
1659 select LS1_DEEP_SLEEP
1660 select PEN_ADDR_BIG_ENDIAN
1661 select SUPPORT_SPL
1662 select SYS_FSL_DDR
1663 select FSL_DDR_INTERACTIVE
1664 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1665 select GPIO_EXTRA_HEADER
1666 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1667 imply SCSI
1668
1669 config TARGET_LS1021ATWR
1670 bool "Support ls1021atwr"
1671 select ARCH_LS1021A
1672 select ARCH_SUPPORT_PSCI
1673 select BOARD_EARLY_INIT_F
1674 select BOARD_LATE_INIT
1675 select CPU_V7A
1676 select CPU_V7_HAS_NONSEC
1677 select CPU_V7_HAS_VIRT
1678 select LS1_DEEP_SLEEP
1679 select PEN_ADDR_BIG_ENDIAN
1680 select SUPPORT_SPL
1681 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1682 select GPIO_EXTRA_HEADER
1683 imply SCSI
1684
1685 config TARGET_PG_WCOM_SELI8
1686 bool "Support Hitachi-Powergrids SELI8 service unit card"
1687 select ARCH_LS1021A
1688 select ARCH_SUPPORT_PSCI
1689 select BOARD_EARLY_INIT_F
1690 select BOARD_LATE_INIT
1691 select CPU_V7A
1692 select CPU_V7_HAS_NONSEC
1693 select CPU_V7_HAS_VIRT
1694 select SYS_FSL_DDR
1695 select FSL_DDR_INTERACTIVE
1696 select GPIO_EXTRA_HEADER
1697 select VENDOR_KM
1698 imply SCSI
1699 help
1700 Support for Hitachi-Powergrids SELI8 service unit card.
1701 SELI8 is a QorIQ LS1021a based service unit card used
1702 in XMC20 and FOX615 product families.
1703
1704 config TARGET_PG_WCOM_EXPU1
1705 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1706 select ARCH_LS1021A
1707 select ARCH_SUPPORT_PSCI
1708 select BOARD_EARLY_INIT_F
1709 select BOARD_LATE_INIT
1710 select CPU_V7A
1711 select CPU_V7_HAS_NONSEC
1712 select CPU_V7_HAS_VIRT
1713 select SYS_FSL_DDR
1714 select FSL_DDR_INTERACTIVE
1715 select VENDOR_KM
1716 imply SCSI
1717 help
1718 Support for Hitachi-Powergrids EXPU1 service unit card.
1719 EXPU1 is a QorIQ LS1021a based service unit card used
1720 in XMC20 and FOX615 product families.
1721
1722 config TARGET_LS1021ATSN
1723 bool "Support ls1021atsn"
1724 select ARCH_LS1021A
1725 select ARCH_SUPPORT_PSCI
1726 select BOARD_EARLY_INIT_F
1727 select BOARD_LATE_INIT
1728 select CPU_V7A
1729 select CPU_V7_HAS_NONSEC
1730 select CPU_V7_HAS_VIRT
1731 select LS1_DEEP_SLEEP
1732 select SUPPORT_SPL
1733 select GPIO_EXTRA_HEADER
1734 imply SCSI
1735
1736 config TARGET_LS1021AIOT
1737 bool "Support ls1021aiot"
1738 select ARCH_LS1021A
1739 select ARCH_SUPPORT_PSCI
1740 select BOARD_LATE_INIT
1741 select CPU_V7A
1742 select CPU_V7_HAS_NONSEC
1743 select CPU_V7_HAS_VIRT
1744 select PEN_ADDR_BIG_ENDIAN
1745 select SUPPORT_SPL
1746 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1747 select GPIO_EXTRA_HEADER
1748 imply SCSI
1749 help
1750 Support for Freescale LS1021AIOT platform.
1751 The LS1021A Freescale board (IOT) is a high-performance
1752 development platform that supports the QorIQ LS1021A
1753 Layerscape Architecture processor.
1754
1755 config TARGET_LS1043AQDS
1756 bool "Support ls1043aqds"
1757 select ARCH_LS1043A
1758 select ARM64
1759 select ARMV8_MULTIENTRY
1760 select ARCH_SUPPORT_TFABOOT
1761 select BOARD_EARLY_INIT_F
1762 select BOARD_LATE_INIT
1763 select SUPPORT_SPL
1764 select FSL_DDR_INTERACTIVE if !SPL
1765 select FSL_DSPI if !SPL_NO_DSPI
1766 select DM_SPI_FLASH if FSL_DSPI
1767 select GPIO_EXTRA_HEADER
1768 imply SCSI
1769 imply SCSI_AHCI
1770 help
1771 Support for Freescale LS1043AQDS platform.
1772
1773 config TARGET_LS1043ARDB
1774 bool "Support ls1043ardb"
1775 select ARCH_LS1043A
1776 select ARM64
1777 select ARMV8_MULTIENTRY
1778 select ARCH_SUPPORT_TFABOOT
1779 select BOARD_EARLY_INIT_F
1780 select BOARD_LATE_INIT
1781 select SUPPORT_SPL
1782 select FSL_DSPI if !SPL_NO_DSPI
1783 select DM_SPI_FLASH if FSL_DSPI
1784 select GPIO_EXTRA_HEADER
1785 help
1786 Support for Freescale LS1043ARDB platform.
1787
1788 config TARGET_LS1046AQDS
1789 bool "Support ls1046aqds"
1790 select ARCH_LS1046A
1791 select ARM64
1792 select ARMV8_MULTIENTRY
1793 select ARCH_SUPPORT_TFABOOT
1794 select BOARD_EARLY_INIT_F
1795 select BOARD_LATE_INIT
1796 select DM_SPI_FLASH if DM_SPI
1797 select SUPPORT_SPL
1798 select FSL_DDR_BIST if !SPL
1799 select FSL_DDR_INTERACTIVE if !SPL
1800 select FSL_DDR_INTERACTIVE if !SPL
1801 select GPIO_EXTRA_HEADER
1802 imply SCSI
1803 help
1804 Support for Freescale LS1046AQDS platform.
1805 The LS1046A Development System (QDS) is a high-performance
1806 development platform that supports the QorIQ LS1046A
1807 Layerscape Architecture processor.
1808
1809 config TARGET_LS1046ARDB
1810 bool "Support ls1046ardb"
1811 select ARCH_LS1046A
1812 select ARM64
1813 select ARMV8_MULTIENTRY
1814 select ARCH_SUPPORT_TFABOOT
1815 select BOARD_EARLY_INIT_F
1816 select BOARD_LATE_INIT
1817 select DM_SPI_FLASH if DM_SPI
1818 select POWER_MC34VR500
1819 select SUPPORT_SPL
1820 select FSL_DDR_BIST
1821 select FSL_DDR_INTERACTIVE if !SPL
1822 select GPIO_EXTRA_HEADER
1823 imply SCSI
1824 help
1825 Support for Freescale LS1046ARDB platform.
1826 The LS1046A Reference Design Board (RDB) is a high-performance
1827 development platform that supports the QorIQ LS1046A
1828 Layerscape Architecture processor.
1829
1830 config TARGET_LS1046AFRWY
1831 bool "Support ls1046afrwy"
1832 select ARCH_LS1046A
1833 select ARM64
1834 select ARMV8_MULTIENTRY
1835 select ARCH_SUPPORT_TFABOOT
1836 select BOARD_EARLY_INIT_F
1837 select BOARD_LATE_INIT
1838 select DM_SPI_FLASH if DM_SPI
1839 select GPIO_EXTRA_HEADER
1840 imply SCSI
1841 help
1842 Support for Freescale LS1046AFRWY platform.
1843 The LS1046A Freeway Board (FRWY) is a high-performance
1844 development platform that supports the QorIQ LS1046A
1845 Layerscape Architecture processor.
1846
1847 config TARGET_SL28
1848 bool "Support sl28"
1849 select ARCH_LS1028A
1850 select ARM64
1851 select ARMV8_MULTIENTRY
1852 select SUPPORT_SPL
1853 select BINMAN
1854 select DM
1855 select DM_GPIO
1856 select DM_I2C
1857 select DM_MMC
1858 select MTD
1859 select DM_SPI_FLASH
1860 select DM_MDIO
1861 select PCI
1862 select DM_RNG
1863 select DM_RTC
1864 select SCSI
1865 select DM_SERIAL
1866 select DM_SPI
1867 select GPIO_EXTRA_HEADER
1868 select SPL_DM if SPL
1869 select SPL_DM_SPI if SPL
1870 select SPL_DM_SPI_FLASH if SPL
1871 select SPL_DM_I2C if SPL
1872 select SPL_DM_MMC if SPL
1873 select SPL_DM_SERIAL if SPL
1874 help
1875 Support for Kontron SMARC-sAL28 board.
1876
1877 config TARGET_TEN64
1878 bool "Support ten64"
1879 select ARCH_LS1088A
1880 select ARCH_MISC_INIT
1881 select ARM64
1882 select ARMV8_MULTIENTRY
1883 select ARCH_SUPPORT_TFABOOT
1884 select BOARD_LATE_INIT
1885 select SUPPORT_SPL
1886 select FSL_DDR_INTERACTIVE if !SD_BOOT
1887 select GPIO_EXTRA_HEADER
1888 help
1889 Support for Traverse Technologies Ten64 board, based
1890 on NXP LS1088A.
1891
1892 config ARCH_UNIPHIER
1893 bool "Socionext UniPhier SoCs"
1894 select BOARD_LATE_INIT
1895 select DM
1896 select DM_GPIO
1897 select DM_I2C
1898 select DM_MMC
1899 select DM_MTD
1900 select DM_RESET
1901 select DM_SERIAL
1902 select OF_BOARD_SETUP
1903 select OF_CONTROL
1904 select OF_LIBFDT
1905 select PINCTRL
1906 select SPL_BOARD_INIT if SPL
1907 select SPL_DM if SPL
1908 select SPL_LIBCOMMON_SUPPORT if SPL
1909 select SPL_LIBGENERIC_SUPPORT if SPL
1910 select SPL_OF_CONTROL if SPL
1911 select SPL_PINCTRL if SPL
1912 select SUPPORT_SPL
1913 imply CMD_DM
1914 imply DISTRO_DEFAULTS
1915 imply FAT_WRITE
1916 help
1917 Support for UniPhier SoC family developed by Socionext Inc.
1918 (formerly, System LSI Business Division of Panasonic Corporation)
1919
1920 config ARCH_SYNQUACER
1921 bool "Socionext SynQuacer SoCs"
1922 select ARM64
1923 select DM
1924 select GIC_V3
1925 select PSCI_RESET
1926 select SYSRESET
1927 select SYSRESET_PSCI
1928 select OF_CONTROL
1929 help
1930 Support for SynQuacer SoC family developed by Socionext Inc.
1931 This SoC is used on 96boards EE DeveloperBox.
1932
1933 config ARCH_STM32
1934 bool "Support STMicroelectronics STM32 MCU with cortex M"
1935 select CPU_V7M
1936 select DM
1937 select DM_SERIAL
1938 imply CMD_DM
1939
1940 config ARCH_STI
1941 bool "Support STMicroelectronics SoCs"
1942 select BLK
1943 select CPU_V7A
1944 select DM
1945 select DM_MMC
1946 select DM_RESET
1947 select DM_SERIAL
1948 imply CMD_DM
1949 help
1950 Support for STMicroelectronics STiH407/10 SoC family.
1951 This SoC is used on Linaro 96Board STiH410-B2260
1952
1953 config ARCH_STM32MP
1954 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1955 select ARCH_MISC_INIT
1956 select ARCH_SUPPORT_TFABOOT
1957 select BOARD_LATE_INIT
1958 select CLK
1959 select DM
1960 select DM_GPIO
1961 select DM_RESET
1962 select DM_SERIAL
1963 select MISC
1964 select OF_CONTROL
1965 select OF_LIBFDT
1966 select OF_SYSTEM_SETUP
1967 select PINCTRL
1968 select REGMAP
1969 select SYSCON
1970 select SYSRESET
1971 select SYS_THUMB_BUILD if !ARM64
1972 imply SPL_SYSRESET
1973 imply CMD_DM
1974 imply CMD_POWEROFF
1975 imply OF_LIBFDT_OVERLAY
1976 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1977 imply USE_PREBOOT
1978 imply TIMESTAMP
1979 help
1980 Support for STM32MP SoC family developed by STMicroelectronics,
1981 MPUs based on ARM cortex A core
1982 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1983 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1984 chain.
1985 SPL is the unsecure FSBL for the basic boot chain.
1986
1987 config ARCH_ROCKCHIP
1988 bool "Support Rockchip SoCs"
1989 select BLK
1990 select BINMAN if SPL_OPTEE || SPL
1991 select DM
1992 select DM_GPIO
1993 select DM_I2C
1994 select DM_MMC
1995 select DM_PWM
1996 select DM_REGULATOR
1997 select DM_SERIAL
1998 select DM_SPI
1999 select DM_SPI_FLASH
2000 select DM_USB_GADGET if USB_DWC3_GADGET
2001 select ENABLE_ARM_SOC_BOOT0_HOOK
2002 select OF_CONTROL
2003 select MTD
2004 select SPI
2005 select SPL_DM if SPL
2006 select SPL_DM_SPI if SPL
2007 select SPL_DM_SPI_FLASH if SPL
2008 select SYS_MALLOC_F
2009 select SYS_THUMB_BUILD if !ARM64
2010 imply ADC
2011 imply CMD_DM
2012 imply DEBUG_UART_BOARD_INIT
2013 imply BOOTSTD_DEFAULTS
2014 imply FAT_WRITE
2015 imply SARADC_ROCKCHIP
2016 imply SPL_SYSRESET
2017 imply SPL_SYS_MALLOC_SIMPLE
2018 imply SYS_NS16550
2019 imply TPL_SYSRESET
2020 imply USB_FUNCTION_FASTBOOT
2021
2022 config ARCH_OCTEONTX
2023 bool "Support OcteonTX SoCs"
2024 select CLK
2025 select DM
2026 select GPIO_EXTRA_HEADER
2027 select ARM64
2028 select OF_CONTROL
2029 select OF_LIVE
2030 select BOARD_LATE_INIT
2031 select SYS_CACHE_SHIFT_7
2032 select SYS_PCI_64BIT if PCI
2033 imply OF_HAS_PRIOR_STAGE
2034
2035 config ARCH_OCTEONTX2
2036 bool "Support OcteonTX2 SoCs"
2037 select CLK
2038 select DM
2039 select GPIO_EXTRA_HEADER
2040 select ARM64
2041 select OF_CONTROL
2042 select OF_LIVE
2043 select BOARD_LATE_INIT
2044 select SYS_CACHE_SHIFT_7
2045 select SYS_PCI_64BIT if PCI
2046 imply OF_HAS_PRIOR_STAGE
2047
2048 config TARGET_THUNDERX_88XX
2049 bool "Support ThunderX 88xx"
2050 select ARM64
2051 select GPIO_EXTRA_HEADER
2052 select OF_CONTROL
2053 select PL01X_SERIAL
2054 select SYS_CACHE_SHIFT_7
2055
2056 config ARCH_ASPEED
2057 bool "Support Aspeed SoCs"
2058 select DM
2059 select OF_CONTROL
2060 imply CMD_DM
2061
2062 config TARGET_DURIAN
2063 bool "Support Phytium Durian Platform"
2064 select ARM64
2065 select GPIO_EXTRA_HEADER
2066 help
2067 Support for durian platform.
2068 It has 2GB Sdram, uart and pcie.
2069
2070 config TARGET_POMELO
2071 bool "Support Phytium Pomelo Platform"
2072 select ARM64
2073 select DM
2074 select AHCI
2075 select SCSI_AHCI
2076 select AHCI_PCI
2077 select BLK
2078 select PCI
2079 select DM_PCI
2080 select SCSI
2081 select DM_SERIAL
2082 imply CMD_PCI
2083 help
2084 Support for pomelo platform.
2085 It has 8GB Sdram, uart and pcie.
2086
2087 config TARGET_PE2201
2088 bool "Support Phytium PE2201 Platform"
2089 select ARM64
2090 help
2091 Support for pe2201 platform.It has 2GB Sdram, uart and pcie.
2092
2093 config TARGET_PRESIDIO_ASIC
2094 bool "Support Cortina Presidio ASIC Platform"
2095 select ARM64
2096 select GICV2
2097
2098 config TARGET_XENGUEST_ARM64
2099 bool "Xen guest ARM64"
2100 select ARM64
2101 select XEN
2102 select OF_CONTROL
2103 select LINUX_KERNEL_IMAGE_HEADER
2104 select XEN_SERIAL
2105 imply OF_HAS_PRIOR_STAGE
2106
2107 config ARCH_GXP
2108 bool "Support HPE GXP SoCs"
2109 select DM
2110 select OF_CONTROL
2111 imply CMD_DM
2112
2113 endchoice
2114
2115 config SUPPORT_PASSING_ATAGS
2116 bool "Support pre-devicetree ATAG-based booting"
2117 depends on !ARM64
2118 imply SETUP_MEMORY_TAGS
2119 help
2120 Support for booting older Linux kernels, using ATAGs rather than
2121 passing a devicetree. This is option is rarely used, and the
2122 semantics are defined at
2123 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2124
2125 config SETUP_MEMORY_TAGS
2126 bool "Pass memory size information via ATAG"
2127 depends on SUPPORT_PASSING_ATAGS
2128
2129 config CMDLINE_TAG
2130 bool "Pass Linux kernel cmdline via ATAG"
2131 depends on SUPPORT_PASSING_ATAGS
2132
2133 config INITRD_TAG
2134 bool "Pass initrd starting point and size via ATAG"
2135 depends on SUPPORT_PASSING_ATAGS
2136
2137 config REVISION_TAG
2138 bool "Pass system revision via ATAG"
2139 depends on SUPPORT_PASSING_ATAGS
2140
2141 config SERIAL_TAG
2142 bool "Pass system serial number via ATAG"
2143 depends on SUPPORT_PASSING_ATAGS
2144
2145 config STATIC_MACH_TYPE
2146 bool "Statically define the Machine ID number"
2147 default y if TARGET_DS109 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2148 help
2149 When booting via ATAGs, enable this option if we know the correct
2150 machine ID number to use at compile time. Some systems will be
2151 passed the number dynamically by whatever loads U-Boot.
2152
2153 config MACH_TYPE
2154 int "Machine ID number"
2155 depends on STATIC_MACH_TYPE
2156 default 527 if TARGET_DS109
2157 default 3036 if TARGET_DS414
2158 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2159 help
2160 When booting via ATAGs, the machine type must be passed as a number.
2161 For the full list see https://www.arm.linux.org.uk/developer/machines
2162
2163 config ARCH_SUPPORT_TFABOOT
2164 bool
2165
2166 config TFABOOT
2167 bool "Support for booting from TF-A"
2168 depends on ARCH_SUPPORT_TFABOOT
2169 help
2170 Some platforms support the setup of secure registers (for instance
2171 for CPU errata handling) or provide secure services like PSCI.
2172 Those services could also be provided by other firmware parts
2173 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2174 does not need to (and cannot) execute this code.
2175 Enabling this option will make a U-Boot binary that is relying
2176 on other firmware layers to provide secure functionality.
2177
2178 config TI_SECURE_DEVICE
2179 bool "HS Device Type Support"
2180 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2181 help
2182 If a high secure (HS) device type is being used, this config
2183 must be set. This option impacts various aspects of the
2184 build system (to create signed boot images that can be
2185 authenticated) and the code. See the doc/README.ti-secure
2186 file for further details.
2187
2188 config SYS_KWD_CONFIG
2189 string "kwbimage config file path"
2190 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2191 default "arch/arm/mach-mvebu/kwbimage.cfg"
2192 help
2193 Path within the source directory to the kwbimage.cfg file to use
2194 when packaging the U-Boot image for use.
2195
2196 source "arch/arm/mach-apple/Kconfig"
2197
2198 source "arch/arm/mach-aspeed/Kconfig"
2199
2200 source "arch/arm/mach-at91/Kconfig"
2201
2202 source "arch/arm/mach-bcm283x/Kconfig"
2203
2204 source "arch/arm/mach-bcmbca/Kconfig"
2205
2206 source "arch/arm/mach-bcmstb/Kconfig"
2207
2208 source "arch/arm/mach-davinci/Kconfig"
2209
2210 source "arch/arm/mach-exynos/Kconfig"
2211
2212 source "arch/arm/mach-hpe/gxp/Kconfig"
2213
2214 source "arch/arm/mach-highbank/Kconfig"
2215
2216 source "arch/arm/mach-histb/Kconfig"
2217
2218 source "arch/arm/mach-integrator/Kconfig"
2219
2220 source "arch/arm/mach-ipq40xx/Kconfig"
2221
2222 source "arch/arm/mach-k3/Kconfig"
2223
2224 source "arch/arm/mach-keystone/Kconfig"
2225
2226 source "arch/arm/mach-kirkwood/Kconfig"
2227
2228 source "arch/arm/mach-lpc32xx/Kconfig"
2229
2230 source "arch/arm/mach-mvebu/Kconfig"
2231
2232 source "arch/arm/mach-octeontx/Kconfig"
2233
2234 source "arch/arm/mach-octeontx2/Kconfig"
2235
2236 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2237
2238 source "arch/arm/mach-imx/mx3/Kconfig"
2239
2240 source "arch/arm/mach-imx/mx5/Kconfig"
2241
2242 source "arch/arm/mach-imx/mx6/Kconfig"
2243
2244 source "arch/arm/mach-imx/mx7/Kconfig"
2245
2246 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2247
2248 source "arch/arm/mach-imx/imx8/Kconfig"
2249
2250 source "arch/arm/mach-imx/imx8m/Kconfig"
2251
2252 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2253
2254 source "arch/arm/mach-imx/imx9/Kconfig"
2255
2256 source "arch/arm/mach-imx/imxrt/Kconfig"
2257
2258 source "arch/arm/mach-imx/mxs/Kconfig"
2259
2260 source "arch/arm/mach-omap2/Kconfig"
2261
2262 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2263
2264 source "arch/arm/mach-orion5x/Kconfig"
2265
2266 source "arch/arm/mach-owl/Kconfig"
2267
2268 source "arch/arm/mach-renesas/Kconfig"
2269
2270 source "arch/arm/mach-meson/Kconfig"
2271
2272 source "arch/arm/mach-mediatek/Kconfig"
2273
2274 source "arch/arm/mach-qemu/Kconfig"
2275
2276 source "arch/arm/mach-rockchip/Kconfig"
2277
2278 source "arch/arm/mach-s5pc1xx/Kconfig"
2279
2280 source "arch/arm/mach-snapdragon/Kconfig"
2281
2282 source "arch/arm/mach-socfpga/Kconfig"
2283
2284 source "arch/arm/mach-sti/Kconfig"
2285
2286 source "arch/arm/mach-stm32/Kconfig"
2287
2288 source "arch/arm/mach-stm32mp/Kconfig"
2289
2290 source "arch/arm/mach-sunxi/Kconfig"
2291
2292 source "arch/arm/mach-tegra/Kconfig"
2293
2294 source "arch/arm/mach-u8500/Kconfig"
2295
2296 source "arch/arm/mach-uniphier/Kconfig"
2297
2298 source "arch/arm/cpu/armv7/vf610/Kconfig"
2299
2300 source "arch/arm/mach-zynq/Kconfig"
2301
2302 source "arch/arm/mach-zynqmp/Kconfig"
2303
2304 source "arch/arm/mach-versal/Kconfig"
2305
2306 source "arch/arm/mach-versal-net/Kconfig"
2307
2308 source "arch/arm/mach-zynqmp-r5/Kconfig"
2309
2310 source "arch/arm/cpu/armv7/Kconfig"
2311
2312 source "arch/arm/cpu/armv8/Kconfig"
2313
2314 source "arch/arm/mach-imx/Kconfig"
2315
2316 source "arch/arm/mach-nexell/Kconfig"
2317
2318 source "arch/arm/mach-npcm/Kconfig"
2319
2320 source "board/armltd/total_compute/Kconfig"
2321 source "board/armltd/corstone1000/Kconfig"
2322 source "board/bosch/shc/Kconfig"
2323 source "board/bosch/guardian/Kconfig"
2324 source "board/Marvell/octeontx/Kconfig"
2325 source "board/Marvell/octeontx2/Kconfig"
2326 source "board/armltd/vexpress/Kconfig"
2327 source "board/armltd/vexpress64/Kconfig"
2328 source "board/cortina/presidio-asic/Kconfig"
2329 source "board/broadcom/bcmns/Kconfig"
2330 source "board/broadcom/bcmns3/Kconfig"
2331 source "board/cavium/thunderx/Kconfig"
2332 source "board/eets/pdu001/Kconfig"
2333 source "board/emulation/qemu-arm/Kconfig"
2334 source "board/freescale/ls2080aqds/Kconfig"
2335 source "board/freescale/ls2080ardb/Kconfig"
2336 source "board/freescale/ls1088a/Kconfig"
2337 source "board/freescale/ls1028a/Kconfig"
2338 source "board/freescale/ls1021aqds/Kconfig"
2339 source "board/freescale/ls1043aqds/Kconfig"
2340 source "board/freescale/ls1021atwr/Kconfig"
2341 source "board/freescale/ls1021atsn/Kconfig"
2342 source "board/freescale/ls1021aiot/Kconfig"
2343 source "board/freescale/ls1046aqds/Kconfig"
2344 source "board/freescale/ls1043ardb/Kconfig"
2345 source "board/freescale/ls1046ardb/Kconfig"
2346 source "board/freescale/ls1046afrwy/Kconfig"
2347 source "board/freescale/ls1012aqds/Kconfig"
2348 source "board/freescale/ls1012ardb/Kconfig"
2349 source "board/freescale/ls1012afrdm/Kconfig"
2350 source "board/freescale/lx2160a/Kconfig"
2351 source "board/grinn/chiliboard/Kconfig"
2352 source "board/hisilicon/hikey/Kconfig"
2353 source "board/hisilicon/hikey960/Kconfig"
2354 source "board/hisilicon/poplar/Kconfig"
2355 source "board/isee/igep003x/Kconfig"
2356 source "board/kontron/sl28/Kconfig"
2357 source "board/myir/mys_6ulx/Kconfig"
2358 source "board/samsung/common/Kconfig"
2359 source "board/siemens/common/Kconfig"
2360 source "board/seeed/npi_imx6ull/Kconfig"
2361 source "board/socionext/developerbox/Kconfig"
2362 source "board/tcl/sl50/Kconfig"
2363 source "board/traverse/ten64/Kconfig"
2364 source "board/variscite/dart_6ul/Kconfig"
2365 source "board/vscom/baltos/Kconfig"
2366 source "board/phytium/durian/Kconfig"
2367 source "board/phytium/pomelo/Kconfig"
2368 source "board/phytium/pe2201/Kconfig"
2369 source "board/xen/xenguest_arm64/Kconfig"
2370
2371 source "arch/arm/Kconfig.debug"
2372
2373 endmenu