]> git.ipfire.org Git - thirdparty/u-boot.git/blob - arch/arm/Kconfig
stv0991: Remove stv0991 board and architecture code
[thirdparty/u-boot.git] / arch / arm / Kconfig
1 menu "ARM architecture"
2 depends on ARM
3
4 config SYS_ARCH
5 default "arm"
6
7 config ARM64
8 bool
9 select 64BIT
10 select PHYS_64BIT
11 select SYS_CACHE_SHIFT_6
12 imply SPL_SEPARATE_BSS
13
14 config ARM64_CRC32
15 bool "Enable support for CRC32 instruction"
16 depends on ARM64 && CC_IS_GCC
17 default y
18 help
19 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
20 This is faster than software crc32 calculation. This instruction may
21 not be present on all ARMv8.0, but is always present on ARMv8.1 and
22 newer.
23
24 config COUNTER_FREQUENCY
25 int "Timer clock frequency"
26 depends on ARM64 || CPU_V7A
27 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
28 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
29 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
30 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
31 default 100000000 if ARCH_ZYNQMP
32 default 0
33 help
34 For platforms with ARMv8-A and ARMv7-A which features a system
35 counter, those platforms needs software to program the counter
36 frequency. Setup time clock frequency for certain platform.
37 0 means no need to configure the system counter frequency.
38 For platforms needs the frequency set in U-Boot with a
39 pre-defined value, should have the macro defined as a non-zero value.
40
41 config POSITION_INDEPENDENT
42 bool "Generate position-independent pre-relocation code"
43 depends on ARM64 || CPU_V7A
44 help
45 U-Boot expects to be linked to a specific hard-coded address, and to
46 be loaded to and run from that address. This option lifts that
47 restriction, thus allowing the code to be loaded to and executed from
48 almost any 4K aligned address. This logic relies on the relocation
49 information that is embedded in the binary to support U-Boot
50 relocating itself to the top-of-RAM later during execution.
51
52 config INIT_SP_RELATIVE
53 bool "Specify the early stack pointer relative to the .bss section"
54 depends on ARM64
55 default n if ARCH_QEMU
56 default y if POSITION_INDEPENDENT
57 help
58 U-Boot typically uses a hard-coded value for the stack pointer
59 before relocation. Enable this option to instead calculate the
60 initial SP at run-time. This is useful to avoid hard-coding addresses
61 into U-Boot, so that it can be loaded and executed at arbitrary
62 addresses and thus avoid using arbitrary addresses at runtime.
63
64 If this option is enabled, the early stack pointer is set to
65 &_bss_start with a offset value added. The offset is specified by
66 SYS_INIT_SP_BSS_OFFSET.
67
68 config SYS_INIT_SP_BSS_OFFSET
69 int "Early stack offset from the .bss base address"
70 depends on ARM64
71 depends on INIT_SP_RELATIVE
72 default 524288
73 help
74 This option's value is the offset added to &_bss_start in order to
75 calculate the stack pointer. This offset should be large enough so
76 that the early malloc region, global data (gd), and early stack usage
77 do not overlap any appended DTB.
78
79 config SPL_SYS_NO_VECTOR_TABLE
80 depends on SPL
81 bool
82
83 config SPL_USE_SEPARATE_FAULT_HANDLERS
84 bool "Use separate fault handlers instead of a single common one"
85 depends on !SPL_SYS_NO_VECTOR_TABLE && !ARM64 && !CPU_V7M
86 help
87 Instead of a common fault handler, generate a separate one for
88 undefined_instruction, software_interrupt, prefetch_abort etc.
89 This is for debugging purposes, when you want to set breakpoints
90 on them separately.
91
92 config LINUX_KERNEL_IMAGE_HEADER
93 depends on ARM64
94 bool
95 help
96 Place a Linux kernel image header at the start of the U-Boot binary.
97 The format of the header is described in the Linux kernel source at
98 Documentation/arm64/booting.txt. This feature is useful since the
99 image header reports the amount of memory (BSS and similar) that
100 U-Boot needs to use, but which isn't part of the binary.
101
102 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
103 depends on LINUX_KERNEL_IMAGE_HEADER
104 hex
105 help
106 The value subtracted from CONFIG_TEXT_BASE to calculate the
107 TEXT_OFFSET value written to the Linux kernel image header.
108
109 config GICV2
110 bool
111
112 config GICV3
113 bool
114
115 config GIC_V3_ITS
116 bool "ARM GICV3 ITS"
117 select IRQ
118 help
119 ARM GICV3 Interrupt translation service (ITS).
120 Basic support for programming locality specific peripheral
121 interrupts (LPI) configuration tables and enable LPI tables.
122 LPI configuration table can be used by u-boot or Linux.
123 ARM GICV3 has limitation, once the LPI table is enabled, LPI
124 configuration table can not be re-programmed, unless GICV3 reset.
125
126 config STATIC_RELA
127 bool
128 default y if ARM64
129
130 config DMA_ADDR_T_64BIT
131 bool
132 default y if ARM64
133
134 config HAS_VBAR
135 bool
136
137 config HAS_THUMB2
138 bool
139
140 config GPIO_EXTRA_HEADER
141 bool
142
143 # Used for compatibility with asm files copied from the kernel
144 config ARM_ASM_UNIFIED
145 bool
146 default y
147
148 # Used for compatibility with asm files copied from the kernel
149 config THUMB2_KERNEL
150 bool
151
152 config SYS_ICACHE_OFF
153 bool "Do not enable icache"
154 help
155 Do not enable instruction cache in U-Boot.
156
157 config SPL_SYS_ICACHE_OFF
158 bool "Do not enable icache in SPL"
159 depends on SPL
160 default SYS_ICACHE_OFF
161 help
162 Do not enable instruction cache in SPL.
163
164 config SYS_DCACHE_OFF
165 bool "Do not enable dcache"
166 help
167 Do not enable data cache in U-Boot.
168
169 config SPL_SYS_DCACHE_OFF
170 bool "Do not enable dcache in SPL"
171 depends on SPL
172 default SYS_DCACHE_OFF
173 help
174 Do not enable data cache in SPL.
175
176 config SYS_ARM_CACHE_CP15
177 bool "CP15 based cache enabling support"
178 help
179 Select this if your processor suports enabling caches by using
180 CP15 registers.
181
182 config SYS_ARM_MMU
183 bool "MMU-based Paged Memory Management Support"
184 select SYS_ARM_CACHE_CP15
185 help
186 Select if you want MMU-based virtualised addressing space
187 support via paged memory management.
188
189 config SYS_ARM_MPU
190 bool 'Use the ARM v7 PMSA Compliant MPU'
191 help
192 Some ARM systems without an MMU have instead a Memory Protection
193 Unit (MPU) that defines the type and permissions for regions of
194 memory.
195 If your CPU has an MPU then you should choose 'y' here unless you
196 know that you do not want to use the MPU.
197
198 # If set, the workarounds for these ARM errata are applied early during U-Boot
199 # startup. Note that in general these options force the workarounds to be
200 # applied; no CPU-type/version detection exists, unlike the similar options in
201 # the Linux kernel. Do not set these options unless they apply! Also note that
202 # the following can be machine-specific errata. These do have ability to
203 # provide rudimentary version and machine-specific checks, but expect no
204 # product checks:
205 # CONFIG_ARM_ERRATA_430973
206 # CONFIG_ARM_ERRATA_454179
207 # CONFIG_ARM_ERRATA_621766
208 # CONFIG_ARM_ERRATA_798870
209 # CONFIG_ARM_ERRATA_801819
210 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
211 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
212
213 config ARM_ERRATA_430973
214 bool
215
216 config ARM_ERRATA_454179
217 bool
218
219 config ARM_ERRATA_621766
220 bool
221
222 config ARM_ERRATA_716044
223 bool
224
225 config ARM_ERRATA_725233
226 bool
227
228 config ARM_ERRATA_742230
229 bool
230
231 config ARM_ERRATA_743622
232 bool
233
234 config ARM_ERRATA_751472
235 bool
236
237 config ARM_ERRATA_761320
238 bool
239
240 config ARM_ERRATA_773022
241 bool
242
243 config ARM_ERRATA_774769
244 bool
245
246 config ARM_ERRATA_794072
247 bool
248
249 config ARM_ERRATA_798870
250 bool
251
252 config ARM_ERRATA_801819
253 bool
254
255 config ARM_ERRATA_826974
256 bool
257
258 config ARM_ERRATA_828024
259 bool
260
261 config ARM_ERRATA_829520
262 bool
263
264 config ARM_ERRATA_833069
265 bool
266
267 config ARM_ERRATA_833471
268 bool
269
270 config ARM_ERRATA_845369
271 bool
272
273 config ARM_ERRATA_852421
274 bool
275
276 config ARM_ERRATA_852423
277 bool
278
279 config ARM_ERRATA_855873
280 bool
281
282 config ARM_CORTEX_A8_CVE_2017_5715
283 bool
284
285 config ARM_CORTEX_A15_CVE_2017_5715
286 bool
287
288 config CPU_ARM720T
289 bool
290 select SYS_CACHE_SHIFT_5
291 imply SYS_ARM_MMU
292
293 config CPU_ARM920T
294 bool
295 select SYS_CACHE_SHIFT_5
296 imply SYS_ARM_MMU
297
298 config CPU_ARM926EJS
299 bool
300 select SYS_CACHE_SHIFT_5
301 imply SYS_ARM_MMU
302 imply SPL_SEPARATE_BSS
303
304 config CPU_ARM946ES
305 bool
306 select SYS_CACHE_SHIFT_5
307 imply SYS_ARM_MMU
308
309 config CPU_ARM1136
310 bool
311 select SYS_CACHE_SHIFT_5
312 imply SYS_ARM_MMU
313 imply SPL_SEPARATE_BSS
314
315 config CPU_ARM1176
316 bool
317 select HAS_VBAR
318 select SYS_CACHE_SHIFT_5
319 imply SYS_ARM_MMU
320
321 config CPU_V7A
322 bool
323 select HAS_THUMB2
324 select HAS_VBAR
325 select SYS_CACHE_SHIFT_6
326 imply SYS_ARM_MMU
327
328 config CPU_V7M
329 bool
330 select HAS_THUMB2
331 select SYS_ARM_MPU
332 select SYS_CACHE_SHIFT_5
333 select SYS_THUMB_BUILD
334 select THUMB2_KERNEL
335
336 config CPU_V7R
337 bool
338 select HAS_THUMB2
339 select SYS_ARM_CACHE_CP15
340 select SYS_ARM_MPU
341 select SYS_CACHE_SHIFT_6
342
343 config SYS_CPU
344 default "arm720t" if CPU_ARM720T
345 default "arm920t" if CPU_ARM920T
346 default "arm926ejs" if CPU_ARM926EJS
347 default "arm946es" if CPU_ARM946ES
348 default "arm1136" if CPU_ARM1136
349 default "arm1176" if CPU_ARM1176
350 default "armv7" if CPU_V7A
351 default "armv7" if CPU_V7R
352 default "armv7m" if CPU_V7M
353 default "armv8" if ARM64
354
355 config SYS_ARM_ARCH
356 int
357 default 4 if CPU_ARM720T
358 default 4 if CPU_ARM920T
359 default 5 if CPU_ARM926EJS
360 default 5 if CPU_ARM946ES
361 default 6 if CPU_ARM1136
362 default 6 if CPU_ARM1176
363 default 7 if CPU_V7A
364 default 7 if CPU_V7M
365 default 7 if CPU_V7R
366 default 8 if ARM64
367
368 choice
369 prompt "Select the ARM data write cache policy"
370 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMNS || RZA1
371 default SYS_ARM_CACHE_WRITEBACK
372
373 config SYS_ARM_CACHE_WRITEBACK
374 bool "Write-back (WB)"
375 help
376 A write updates the cache only and marks the cache line as dirty.
377 External memory is updated only when the line is evicted or explicitly
378 cleaned.
379
380 config SYS_ARM_CACHE_WRITETHROUGH
381 bool "Write-through (WT)"
382 help
383 A write updates both the cache and the external memory system.
384 This does not mark the cache line as dirty.
385
386 config SYS_ARM_CACHE_WRITEALLOC
387 bool "Write allocation (WA)"
388 help
389 A cache line is allocated on a write miss. This means that executing a
390 store instruction on the processor might cause a burst read to occur.
391 There is a linefill to obtain the data for the cache line, before the
392 write is performed.
393 endchoice
394
395 config ARCH_VERY_EARLY_INIT
396 bool
397
398 config SPL_ARCH_VERY_EARLY_INIT
399 bool
400
401 config ARCH_CPU_INIT
402 bool "Enable ARCH_CPU_INIT"
403 help
404 Some architectures require a call to arch_cpu_init().
405 Say Y here to enable it
406
407 config SYS_ARCH_TIMER
408 bool "ARM Generic Timer support"
409 depends on CPU_V7A || ARM64
410 default y if ARM64
411 help
412 The ARM Generic Timer (aka arch-timer) provides an architected
413 interface to a timer source on an SoC.
414 It is mandatory for ARMv8 implementation and widely available
415 on ARMv7 systems.
416
417 config ARM_SMCCC
418 bool "Support for ARM SMC Calling Convention (SMCCC)"
419 depends on CPU_V7A || ARM64
420 select ARM_PSCI_FW
421 help
422 Say Y here if you want to enable ARM SMC Calling Convention.
423 This should be enabled if U-Boot needs to communicate with system
424 firmware (for example, PSCI) according to SMCCC.
425
426 config SYS_THUMB_BUILD
427 bool "Build U-Boot using the Thumb instruction set"
428 depends on !ARM64
429 help
430 Use this flag to build U-Boot using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
434
435 config SPL_SYS_THUMB_BUILD
436 bool "Build SPL using the Thumb instruction set"
437 default y if SYS_THUMB_BUILD
438 depends on !ARM64 && SPL
439 help
440 Use this flag to build SPL using the Thumb instruction set for
441 ARM architectures. Thumb instruction set provides better code
442 density. For ARM architectures that support Thumb2 this flag will
443 result in Thumb2 code generated by GCC.
444
445 config TPL_SYS_THUMB_BUILD
446 bool "Build TPL using the Thumb instruction set"
447 default y if SYS_THUMB_BUILD
448 depends on TPL && !ARM64
449 help
450 Use this flag to build TPL using the Thumb instruction set for
451 ARM architectures. Thumb instruction set provides better code
452 density. For ARM architectures that support Thumb2 this flag will
453 result in Thumb2 code generated by GCC.
454
455 config SYS_L2_PL310
456 bool "ARM PL310 L2 cache controller"
457 help
458 Enable support for ARM PL310 L2 cache controller in U-Boot
459
460 config SPL_SYS_L2_PL310
461 bool "ARM PL310 L2 cache controller in SPL"
462 help
463 Enable support for ARM PL310 L2 cache controller in SPL
464
465 config SYS_L2CACHE_OFF
466 bool "L2cache off"
467 help
468 If SoC does not support L2CACHE or one does not want to enable
469 L2CACHE, choose this option.
470
471 config ENABLE_ARM_SOC_BOOT0_HOOK
472 bool "prepare BOOT0 header"
473 help
474 If the SoC's BOOT0 requires a header area filled with (magic)
475 values, then choose this option, and create a file included as
476 <asm/arch/boot0.h> which contains the required assembler code.
477
478 config USE_ARCH_MEMCPY
479 bool "Use an assembly optimized implementation of memcpy"
480 default y if !ARM64
481 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
482 help
483 Enable the generation of an optimized version of memcpy.
484 Such an implementation may be faster under some conditions
485 but may increase the binary size.
486
487 config SPL_USE_ARCH_MEMCPY
488 bool "Use an assembly optimized implementation of memcpy for SPL"
489 default y if USE_ARCH_MEMCPY
490 depends on SPL
491 help
492 Enable the generation of an optimized version of memcpy.
493 Such an implementation may be faster under some conditions
494 but may increase the binary size.
495
496 config TPL_USE_ARCH_MEMCPY
497 bool "Use an assembly optimized implementation of memcpy for TPL"
498 default y if USE_ARCH_MEMCPY
499 depends on TPL
500 help
501 Enable the generation of an optimized version of memcpy.
502 Such an implementation may be faster under some conditions
503 but may increase the binary size.
504
505 config USE_ARCH_MEMMOVE
506 bool "Use an assembly optimized implementation of memmove" if !ARM64
507 default USE_ARCH_MEMCPY if ARM64
508 depends on ARM64
509 help
510 Enable the generation of an optimized version of memmove.
511 Such an implementation may be faster under some conditions
512 but may increase the binary size.
513
514 config SPL_USE_ARCH_MEMMOVE
515 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
516 default SPL_USE_ARCH_MEMCPY if ARM64
517 depends on SPL && ARM64
518 help
519 Enable the generation of an optimized version of memmove.
520 Such an implementation may be faster under some conditions
521 but may increase the binary size.
522
523 config TPL_USE_ARCH_MEMMOVE
524 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
525 default TPL_USE_ARCH_MEMCPY if ARM64
526 depends on TPL && ARM64
527 help
528 Enable the generation of an optimized version of memmove.
529 Such an implementation may be faster under some conditions
530 but may increase the binary size.
531
532 config USE_ARCH_MEMSET
533 bool "Use an assembly optimized implementation of memset"
534 default y if !ARM64
535 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
536 help
537 Enable the generation of an optimized version of memset.
538 Such an implementation may be faster under some conditions
539 but may increase the binary size.
540
541 config SPL_USE_ARCH_MEMSET
542 bool "Use an assembly optimized implementation of memset for SPL"
543 default y if USE_ARCH_MEMSET
544 depends on SPL
545 help
546 Enable the generation of an optimized version of memset.
547 Such an implementation may be faster under some conditions
548 but may increase the binary size.
549
550 config TPL_USE_ARCH_MEMSET
551 bool "Use an assembly optimized implementation of memset for TPL"
552 default y if USE_ARCH_MEMSET
553 depends on TPL
554 help
555 Enable the generation of an optimized version of memset.
556 Such an implementation may be faster under some conditions
557 but may increase the binary size.
558
559 config ARM64_SUPPORT_AARCH32
560 bool "ARM64 system support AArch32 execution state"
561 depends on ARM64
562 default y if !TARGET_THUNDERX_88XX
563 help
564 This ARM64 system supports AArch32 execution state.
565
566 config IPROC
567 bool
568
569 config S5P
570 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
571
572 choice
573 prompt "Target select"
574 default TARGET_HIKEY
575
576 config ARCH_AT91
577 bool "Atmel AT91"
578 select GPIO_EXTRA_HEADER
579 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
580 select SPL_SEPARATE_BSS if SPL
581 imply SYS_THUMB_BUILD
582
583 config ARCH_DAVINCI
584 bool "TI DaVinci"
585 select CPU_ARM926EJS
586 select GPIO_EXTRA_HEADER
587 select SPL_DM_SPI if SPL
588 imply CMD_SAVES
589 help
590 Support for TI's DaVinci platform.
591
592 config ARCH_HISTB
593 bool "Hisilicon HiSTB SoCs"
594 select DM
595 select DM_SERIAL
596 select OF_CONTROL
597 select PL01X_SERIAL
598 imply CMD_DM
599 help
600 Support for HiSTB SoCs.
601
602 config ARCH_KIRKWOOD
603 bool "Marvell Kirkwood"
604 select ARCH_MISC_INIT
605 select BOARD_EARLY_INIT_F
606 select CPU_ARM926EJS
607 select GPIO_EXTRA_HEADER
608 select TIMER
609
610 config ARCH_MVEBU
611 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
612 select ARCH_EARLY_INIT_R if ARM64
613 select DM
614 select DM_SERIAL
615 select DM_SPI
616 select DM_SPI_FLASH
617 select GPIO_EXTRA_HEADER
618 select MTD
619 select SPL_DM_SPI if SPL
620 select SPL_DM_SPI_FLASH if SPL
621 select SPL_TIMER if SPL
622 select TIMER if !ARM64
623 select OF_CONTROL
624 select OF_SEPARATE
625 select SPI
626 imply CMD_DM
627
628 config ARCH_ORION5X
629 bool "Marvell Orion"
630 select CPU_ARM926EJS
631 select GPIO_EXTRA_HEADER
632 select SPL_SEPARATE_BSS if SPL
633 select TIMER
634
635 config ARCH_BCM283X
636 bool "Broadcom BCM283X family"
637 select DM
638 select DM_GPIO
639 select DM_SERIAL
640 select GPIO_EXTRA_HEADER
641 select OF_CONTROL
642 select PL01X_SERIAL
643 select SERIAL_SEARCH_ALL
644 imply CMD_DM
645 imply FAT_WRITE
646
647 config ARCH_BCMSTB
648 bool "Broadcom BCM7XXX family"
649 select CPU_V7A
650 select DM
651 select GPIO_EXTRA_HEADER
652 select OF_CONTROL
653 imply CMD_DM
654 imply OF_HAS_PRIOR_STAGE
655 help
656 This enables support for Broadcom ARM-based set-top box
657 chipsets, including the 7445 family of chips.
658
659 config ARCH_BCMBCA
660 bool "Broadcom broadband chip family"
661 select DM
662 select OF_CONTROL
663 imply CMD_DM
664
665 config TARGET_VEXPRESS_CA9X4
666 bool "Support vexpress_ca9x4"
667 select CPU_V7A
668 select PL01X_SERIAL
669
670 config TARGET_BCMNS
671 bool "Support Broadcom Northstar"
672 select CPU_V7A
673 select DM
674 select DM_GPIO
675 select DM_SERIAL
676 select OF_CONTROL
677 select TIMER
678 select SYS_NS16550
679 select ARM_GLOBAL_TIMER
680 imply SYS_THUMB_BUILD
681 imply MTD_RAW_NAND
682 imply NAND_BRCMNAND
683 imply NAND_BRCMNAND_IPROC
684 help
685 Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit
686 ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094,
687 BCM5301x etc.
688
689 config TARGET_BCMNS3
690 bool "Support Broadcom NS3"
691 select ARM64
692 select BOARD_LATE_INIT
693 help
694 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
695 ARMv8 Cortex-A72 processors targeting a broad range of networking
696 applications.
697
698 config ARCH_EXYNOS
699 bool "Samsung EXYNOS"
700 select DM
701 select DM_GPIO
702 select DM_I2C
703 select DM_KEYBOARD
704 select DM_SERIAL
705 select DM_SPI
706 select DM_SPI_FLASH
707 select MTD
708 select SPI
709 select GPIO_EXTRA_HEADER
710 imply SYS_THUMB_BUILD
711 imply CMD_DM
712 imply FAT_WRITE
713
714 config ARCH_S5PC1XX
715 bool "Samsung S5PC1XX"
716 select CPU_V7A
717 select DM
718 select DM_GPIO
719 select DM_I2C
720 select DM_SERIAL
721 select GPIO_EXTRA_HEADER
722 imply CMD_DM
723
724 config ARCH_HIGHBANK
725 bool "Calxeda Highbank"
726 select CPU_V7A
727 select PL01X_SERIAL
728 select DM
729 select DM_SERIAL
730 select OF_CONTROL
731 select CLK
732 select CLK_CCF
733 select AHCI
734 select PHYS_64BIT
735 select TIMER
736 select SP804_TIMER
737 imply OF_HAS_PRIOR_STAGE
738
739 config ARCH_INTEGRATOR
740 bool "ARM Ltd. Integrator family"
741 select DM
742 select DM_SERIAL
743 select GPIO_EXTRA_HEADER
744 select PL01X_SERIAL
745 imply CMD_DM
746
747 config ARCH_IPQ40XX
748 bool "Qualcomm IPQ40xx SoCs"
749 select CPU_V7A
750 select DM
751 select DM_GPIO
752 select DM_SERIAL
753 select DM_RESET
754 select GPIO_EXTRA_HEADER
755 select MSM_SMEM
756 select PINCTRL
757 select CLK
758 select SMEM
759 select OF_CONTROL
760 select CLK_QCOM_IPQ4019
761 select PINCTRL_QCOM_IPQ4019
762 imply CMD_DM
763
764 config ARCH_KEYSTONE
765 bool "TI Keystone"
766 select CMD_DDR3
767 select CMD_POWEROFF
768 select CPU_V7A
769 select DDR_SPD
770 select SPL_BOARD_INIT if SPL
771 select SUPPORT_SPL
772 select SYS_ARCH_TIMER
773 select SYS_THUMB_BUILD
774 imply CMD_MTDPARTS
775 imply CMD_NFS
776 imply CMD_SAVES
777 imply DM_I2C
778 imply FIT
779 imply SOC_TI
780 imply TI_KEYSTONE_SERDES
781
782 config ARCH_K3
783 bool "Texas Instruments' K3 Architecture"
784 select SPL
785 select SUPPORT_SPL
786 select FIT
787 select REGEX
788 select FIT_SIGNATURE if ARM64
789 imply TI_SECURE_DEVICE
790
791 config ARCH_OMAP2PLUS
792 bool "TI OMAP2+"
793 select CPU_V7A
794 select GPIO_EXTRA_HEADER
795 select SPL_BOARD_INIT if SPL
796 select SPL_STACK_R if SPL
797 select SUPPORT_SPL
798 imply TI_SYSC if DM && OF_CONTROL
799 imply FIT
800 imply SPL_SEPARATE_BSS
801
802 config ARCH_MESON
803 bool "Amlogic Meson"
804 select GPIO_EXTRA_HEADER
805 imply DISTRO_DEFAULTS
806 imply DM_RNG
807 help
808 Support for the Meson SoC family developed by Amlogic Inc.,
809 targeted at media players and tablet computers. We currently
810 support the S905 (GXBaby) 64-bit SoC.
811
812 config ARCH_MEDIATEK
813 bool "MediaTek SoCs"
814 select DM
815 select GPIO_EXTRA_HEADER
816 select OF_CONTROL
817 select SPL_DM if SPL
818 select SPL_LIBCOMMON_SUPPORT if SPL
819 select SPL_LIBGENERIC_SUPPORT if SPL
820 select SPL_OF_CONTROL if SPL
821 select SUPPORT_SPL
822 help
823 Support for the MediaTek SoCs family developed by MediaTek Inc.
824 Please refer to doc/README.mediatek for more information.
825
826 config ARCH_LPC32XX
827 bool "NXP LPC32xx platform"
828 select CPU_ARM926EJS
829 select DM
830 select DM_GPIO
831 select DM_SERIAL
832 select GPIO_EXTRA_HEADER
833 select SPL_DM if SPL
834 select SUPPORT_SPL
835 imply CMD_DM
836
837 config ARCH_IMX8
838 bool "NXP i.MX8 platform"
839 select ARM64
840 select SYS_FSL_HAS_SEC
841 select SYS_FSL_SEC_COMPAT_4
842 select SYS_FSL_SEC_LE
843 select DM
844 select DM_EVENT
845 select GPIO_EXTRA_HEADER
846 select MACH_IMX
847 select OF_CONTROL
848 select ENABLE_ARM_SOC_BOOT0_HOOK
849
850 config ARCH_IMX8M
851 bool "NXP i.MX8M platform"
852 select ARM64
853 select GPIO_EXTRA_HEADER
854 select MACH_IMX
855 select SYS_FSL_HAS_SEC
856 select SYS_FSL_SEC_COMPAT_4
857 select SYS_FSL_SEC_LE
858 select SYS_I2C_MXC
859 select DM
860 select DM_EVENT if CLK
861 select SUPPORT_SPL
862 imply CMD_DM
863
864 config ARCH_IMX8ULP
865 bool "NXP i.MX8ULP platform"
866 select ARM64
867 select DM
868 select DM_EVENT
869 select MACH_IMX
870 select OF_CONTROL
871 select SUPPORT_SPL
872 select GPIO_EXTRA_HEADER
873 select MISC
874 select IMX_ELE
875 imply CMD_DM
876
877 config ARCH_IMX9
878 bool "NXP i.MX9 platform"
879 select ARM64
880 select DM
881 select DM_EVENT
882 select MACH_IMX
883 select SUPPORT_SPL
884 select GPIO_EXTRA_HEADER
885 select MISC
886 select IMX_ELE
887 imply CMD_DM
888
889 config ARCH_IMXRT
890 bool "NXP i.MXRT platform"
891 select CPU_V7M
892 select DM
893 select DM_SERIAL
894 select GPIO_EXTRA_HEADER
895 select MACH_IMX
896 select SUPPORT_SPL
897 imply CMD_DM
898
899 config ARCH_MX23
900 bool "NXP i.MX23 family"
901 select CPU_ARM926EJS
902 select GPIO_EXTRA_HEADER
903 select MACH_IMX
904 select SUPPORT_SPL
905
906 config ARCH_MX28
907 bool "NXP i.MX28 family"
908 select CPU_ARM926EJS
909 select GPIO_EXTRA_HEADER
910 select MACH_IMX
911 select SUPPORT_SPL
912
913 config ARCH_MX31
914 bool "NXP i.MX31 family"
915 select CPU_ARM1136
916 select GPIO_EXTRA_HEADER
917 select MACH_IMX
918
919 config ARCH_MX7ULP
920 bool "NXP MX7ULP"
921 select BOARD_POSTCLK_INIT
922 select CPU_V7A
923 select GPIO_EXTRA_HEADER
924 select MACH_IMX
925 select SYS_FSL_HAS_SEC
926 select SYS_FSL_SEC_COMPAT_4
927 select SYS_FSL_SEC_LE
928 select ROM_UNIFIED_SECTIONS
929 imply MXC_GPIO
930 imply SYS_THUMB_BUILD
931
932 config ARCH_MX7
933 bool "Freescale MX7"
934 select ARCH_MISC_INIT
935 select CPU_V7A
936 select GPIO_EXTRA_HEADER
937 select MACH_IMX
938 select MXC_GPT_HCLK
939 select SYS_FSL_HAS_SEC
940 select SYS_FSL_SEC_COMPAT_4
941 select SYS_FSL_SEC_LE
942 imply BOARD_EARLY_INIT_F
943 imply MXC_GPIO
944 imply SYS_THUMB_BUILD
945
946 config ARCH_MX6
947 bool "Freescale MX6"
948 select BOARD_POSTCLK_INIT
949 select CPU_V7A
950 select GPIO_EXTRA_HEADER
951 select MACH_IMX
952 select MXC_GPT_HCLK
953 select SYS_FSL_HAS_SEC
954 select SYS_FSL_SEC_COMPAT_4
955 select SYS_FSL_SEC_LE
956 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
957 imply MXC_GPIO
958 imply SYS_THUMB_BUILD
959 imply SPL_SEPARATE_BSS
960
961 config ARCH_MX5
962 bool "Freescale MX5"
963 select BOARD_EARLY_INIT_F
964 select CPU_V7A
965 select GPIO_EXTRA_HEADER
966 select MACH_IMX
967 imply MXC_GPIO
968
969 config ARCH_NEXELL
970 bool "Nexell S5P4418/S5P6818 SoC"
971 select ENABLE_ARM_SOC_BOOT0_HOOK
972 select DM
973 select GPIO_EXTRA_HEADER
974
975 config ARCH_NPCM
976 bool "Support Nuvoton SoCs"
977 select DM
978 select OF_CONTROL
979 imply CMD_DM
980
981 config ARCH_APPLE
982 bool "Apple SoCs"
983 select ARM64
984 select CLK
985 select CMD_PCI
986 select CMD_USB
987 select DM
988 select DM_GPIO
989 select DM_KEYBOARD
990 select DM_MAILBOX
991 select DM_RESET
992 select DM_SERIAL
993 select DM_SPI
994 select DM_USB
995 select VIDEO
996 select IOMMU
997 select LINUX_KERNEL_IMAGE_HEADER
998 select MTD
999 select OF_BOARD_SETUP
1000 select OF_CONTROL
1001 select PCI
1002 select PHY
1003 select PINCTRL
1004 select POSITION_INDEPENDENT
1005 select POWER_DOMAIN
1006 select REGMAP
1007 select SPI
1008 select SYSCON
1009 select SYSRESET
1010 select SYSRESET_WATCHDOG
1011 select SYSRESET_WATCHDOG_AUTO
1012 select USB
1013 imply CMD_DM
1014 imply CMD_GPT
1015 imply DISTRO_DEFAULTS
1016 imply OF_HAS_PRIOR_STAGE
1017
1018 config ARCH_OWL
1019 bool "Actions Semi OWL SoCs"
1020 select DM
1021 select DM_SERIAL
1022 select GPIO_EXTRA_HEADER
1023 select OWL_SERIAL
1024 select CLK
1025 select CLK_OWL
1026 select OF_CONTROL
1027 select SYS_RELOC_GD_ENV_ADDR
1028 imply CMD_DM
1029
1030 config ARCH_QEMU
1031 bool "QEMU Virtual Platform"
1032 select DM
1033 select DM_SERIAL
1034 select OF_CONTROL
1035 select PL01X_SERIAL
1036 imply CMD_DM
1037 imply DM_RNG
1038 imply DM_RTC
1039 imply RTC_PL031
1040 imply OF_HAS_PRIOR_STAGE
1041 imply VIDEO
1042 imply VIDEO_BOCHS
1043 imply SYS_WHITE_ON_BLACK
1044 imply SYS_CONSOLE_IS_IN_ENV
1045 imply PRE_CONSOLE_BUFFER
1046 imply USB
1047 imply USB_XHCI_HCD
1048 imply USB_XHCI_PCI
1049 imply USB_KEYBOARD
1050 imply CMD_USB
1051
1052 config ARCH_RENESAS
1053 bool "Renesas ARM SoCs"
1054 select DM
1055 select DM_SERIAL
1056 select GPIO_EXTRA_HEADER
1057 select LTO
1058 imply BOARD_EARLY_INIT_F
1059 imply CMD_DM
1060 imply FAT_WRITE
1061 imply SYS_THUMB_BUILD
1062 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1063
1064 config ARCH_SNAPDRAGON
1065 bool "Qualcomm Snapdragon SoCs"
1066 select ARM64
1067 select DM
1068 select DM_GPIO
1069 select DM_SERIAL
1070 select DM_RESET
1071 select GPIO_EXTRA_HEADER
1072 select MSM_SMEM
1073 select OF_CONTROL
1074 select OF_SEPARATE
1075 select SMEM
1076 select SPMI
1077 select BOARD_LATE_INIT
1078 select OF_BOARD
1079 select SAVE_PREV_BL_FDT_ADDR
1080 select LINUX_KERNEL_IMAGE_HEADER
1081 imply CMD_DM
1082
1083 config ARCH_SOCFPGA
1084 bool "Altera SOCFPGA family"
1085 select ARCH_EARLY_INIT_R
1086 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1087 select ARM64 if TARGET_SOCFPGA_SOC64
1088 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1089 select DM
1090 select DM_SERIAL
1091 select GICV2
1092 select GPIO_EXTRA_HEADER
1093 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1094 select OF_CONTROL
1095 select SPL_DM_RESET if DM_RESET
1096 select SPL_DM_SERIAL
1097 select SPL_LIBCOMMON_SUPPORT
1098 select SPL_LIBGENERIC_SUPPORT
1099 select SPL_OF_CONTROL
1100 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1101 select SPL_SERIAL
1102 select SPL_SYSRESET
1103 select SPL_WATCHDOG
1104 select SUPPORT_SPL
1105 select SYS_NS16550
1106 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1107 select SYSRESET
1108 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1109 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1110 imply CMD_DM
1111 imply CMD_MTDPARTS
1112 imply CRC32_VERIFY
1113 imply DM_SPI
1114 imply DM_SPI_FLASH
1115 imply FAT_WRITE
1116 imply MTD
1117 imply SPL
1118 imply SPL_DM
1119 imply SPL_DM_SPI
1120 imply SPL_DM_SPI_FLASH
1121 imply SPL_LIBDISK_SUPPORT
1122 imply SPL_MMC
1123 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1124 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1125 imply SPL_SPI_FLASH_SUPPORT
1126 imply SPL_SPI
1127 imply L2X0_CACHE
1128
1129 config ARCH_SUNXI
1130 bool "Support sunxi (Allwinner) SoCs"
1131 select BINMAN
1132 select CMD_GPIO
1133 select CMD_MMC if MMC
1134 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1135 select CLK
1136 select DM
1137 select DM_GPIO
1138 select DM_I2C if I2C
1139 select DM_SPI if SPI
1140 select DM_SPI_FLASH if SPI && MTD
1141 select DM_KEYBOARD
1142 select DM_MMC if MMC
1143 select DM_SERIAL
1144 select OF_BOARD_SETUP
1145 select OF_CONTROL
1146 select OF_SEPARATE
1147 select PINCTRL
1148 select SPECIFY_CONSOLE_INDEX
1149 select SPL_SEPARATE_BSS if SPL
1150 select SPL_STACK_R if SPL
1151 select SPL_SYS_MALLOC_SIMPLE if SPL
1152 select SPL_SYS_THUMB_BUILD if SPL && !ARM64
1153 select SUNXI_GPIO
1154 select SYS_NS16550
1155 select SYS_THUMB_BUILD if !ARM64
1156 select USB if DISTRO_DEFAULTS
1157 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1158 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1159 select SPL_USE_TINY_PRINTF if SPL
1160 select USE_PREBOOT
1161 select SYS_RELOC_GD_ENV_ADDR
1162 imply BOARD_LATE_INIT
1163 imply CMD_DM
1164 imply CMD_GPT
1165 imply CMD_UBI if MTD_RAW_NAND
1166 imply DISTRO_DEFAULTS
1167 imply DM_REGULATOR
1168 imply DM_REGULATOR_FIXED
1169 imply FAT_WRITE
1170 imply FIT
1171 imply OF_LIBFDT_OVERLAY
1172 imply PRE_CONSOLE_BUFFER
1173 imply SPL_GPIO
1174 imply SPL_LIBCOMMON_SUPPORT
1175 imply SPL_LIBGENERIC_SUPPORT
1176 imply SPL_MMC if MMC
1177 imply SPL_POWER
1178 imply SPL_SERIAL
1179 imply SYSRESET
1180 imply SYSRESET_WATCHDOG
1181 imply SYSRESET_WATCHDOG_AUTO
1182 imply USB_GADGET
1183 imply WDT
1184
1185 config ARCH_U8500
1186 bool "ST-Ericsson U8500 Series"
1187 select CPU_V7A
1188 select DM
1189 select DM_GPIO
1190 select DM_MMC if MMC
1191 select DM_SERIAL
1192 select DM_USB_GADGET if DM_USB
1193 select OF_CONTROL
1194 select SYSRESET
1195 select TIMER
1196 imply AB8500_USB_PHY
1197 imply ARM_PL180_MMCI
1198 imply CLK
1199 imply DM_PMIC
1200 imply DM_RTC
1201 imply NOMADIK_GPIO
1202 imply NOMADIK_MTU_TIMER
1203 imply PHY
1204 imply PL01X_SERIAL
1205 imply PMIC_AB8500
1206 imply RTC_PL031
1207 imply SYS_THUMB_BUILD
1208 imply SYSRESET_SYSCON
1209
1210 config ARCH_VERSAL
1211 bool "Support Xilinx Versal Platform"
1212 select ARM64
1213 select CLK
1214 select DM
1215 select DM_MMC if MMC
1216 select DM_SERIAL
1217 select GICV3
1218 select OF_CONTROL
1219 select SOC_DEVICE
1220 imply BOARD_LATE_INIT
1221 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1222
1223 config ARCH_VERSAL_NET
1224 bool "Support Xilinx Versal NET Platform"
1225 select ARM64
1226 select CLK
1227 select DM
1228 select DM_MMC if MMC
1229 select DM_SERIAL
1230 select OF_CONTROL
1231 imply BOARD_LATE_INIT
1232 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1233
1234 config ARCH_VF610
1235 bool "Freescale Vybrid"
1236 select CPU_V7A
1237 select GPIO_EXTRA_HEADER
1238 select IOMUX_SHARE_CONF_REG
1239 select MACH_IMX
1240 select SYS_FSL_ERRATUM_ESDHC111
1241 imply CMD_MTDPARTS
1242 imply MTD_RAW_NAND
1243
1244 config ARCH_ZYNQ
1245 bool "Xilinx Zynq based platform"
1246 select ARM_TWD_TIMER
1247 select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA)
1248 select CLK
1249 select CLK_ZYNQ
1250 select CPU_V7A
1251 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1252 select DM
1253 select DM_MMC if MMC
1254 select DM_SERIAL
1255 select DM_SPI
1256 select DM_SPI_FLASH
1257 select OF_CONTROL
1258 select MTD
1259 select SPI
1260 select SPL_BOARD_INIT if SPL
1261 select SPL_CLK if SPL
1262 select SPL_DM if SPL
1263 select SPL_DM_SPI if SPL
1264 select SPL_DM_SPI_FLASH if SPL
1265 select SPL_OF_CONTROL if SPL
1266 select SPL_SEPARATE_BSS if SPL
1267 select SPL_TIMER if SPL
1268 select SUPPORT_SPL
1269 select TIMER
1270 imply BOARD_LATE_INIT
1271 imply CMD_CLK
1272 imply CMD_DM
1273 imply CMD_SPL
1274 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1275 imply FAT_WRITE
1276
1277 config ARCH_ZYNQMP_R5
1278 bool "Xilinx ZynqMP R5 based platform"
1279 select CLK
1280 select CPU_V7R
1281 select DM
1282 select DM_MMC if MMC
1283 select DM_SERIAL
1284 select OF_CONTROL
1285 imply CMD_DM
1286 imply DM_USB_GADGET
1287
1288 config ARCH_ZYNQMP
1289 bool "Xilinx ZynqMP based platform"
1290 select ARM64
1291 select CLK
1292 select DM
1293 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1294 imply DM_MAILBOX
1295 select DM_MMC if MMC
1296 select DM_SERIAL
1297 select MTD
1298 select DM_SPI if SPI
1299 select DM_SPI_FLASH if DM_SPI
1300 imply FIRMWARE
1301 select GICV2
1302 select OF_CONTROL
1303 select SPL_BOARD_INIT if SPL
1304 select SPL_CLK if SPL
1305 select SPL_DM if SPL
1306 select SPL_DM_SPI if SPI && SPL_DM
1307 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1308 select SPL_DM_MAILBOX if SPL
1309 imply SPL_FIRMWARE if SPL
1310 select SPL_SEPARATE_BSS if SPL
1311 select SUPPORT_SPL
1312 imply ZYNQMP_IPI if DM_MAILBOX
1313 select SOC_DEVICE
1314 imply BOARD_LATE_INIT
1315 imply CMD_DM
1316 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1317 imply FAT_WRITE
1318 imply MP
1319 imply DM_USB_GADGET
1320 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1321
1322 config ARCH_TEGRA
1323 bool "NVIDIA Tegra"
1324 select GPIO_EXTRA_HEADER
1325 imply DISTRO_DEFAULTS
1326 imply FAT_WRITE
1327 imply SPL_TIMER if SPL
1328
1329 config ARCH_VEXPRESS64
1330 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1331 select ARM64
1332 select DM
1333 select DM_SERIAL
1334 select PL01X_SERIAL
1335 select OF_CONTROL
1336 select CLK
1337 select BLK
1338 select MTD_NOR_FLASH if MTD
1339 select FLASH_CFI_DRIVER if MTD
1340 select ENV_IS_IN_FLASH if MTD
1341 imply DISTRO_DEFAULTS
1342
1343 config TARGET_CORSTONE1000
1344 bool "Support Corstone1000 Platform"
1345 select ARM64
1346 select PL01X_SERIAL
1347 select DM
1348
1349 config TARGET_TOTAL_COMPUTE
1350 bool "Support Total Compute Platform"
1351 select ARM64
1352 select PL01X_SERIAL
1353 select DM
1354 select DM_SERIAL
1355 select DM_MMC
1356 select DM_GPIO
1357
1358 config TARGET_LS2080A_EMU
1359 bool "Support ls2080a_emu"
1360 select ARCH_LS2080A
1361 select ARM64
1362 select ARMV8_MULTIENTRY
1363 select FSL_DDR_SYNC_REFRESH
1364 select GPIO_EXTRA_HEADER
1365 help
1366 Support for Freescale LS2080A_EMU platform.
1367 The LS2080A Development System (EMULATOR) is a pre-silicon
1368 development platform that supports the QorIQ LS2080A
1369 Layerscape Architecture processor.
1370
1371 config TARGET_LS1088AQDS
1372 bool "Support ls1088aqds"
1373 select ARCH_LS1088A
1374 select ARM64
1375 select ARMV8_MULTIENTRY
1376 select ARCH_SUPPORT_TFABOOT
1377 select BOARD_LATE_INIT
1378 select GPIO_EXTRA_HEADER
1379 select SUPPORT_SPL
1380 select FSL_DDR_INTERACTIVE if !SD_BOOT
1381 help
1382 Support for NXP LS1088AQDS platform.
1383 The LS1088A Development System (QDS) is a high-performance
1384 development platform that supports the QorIQ LS1088A
1385 Layerscape Architecture processor.
1386
1387 config TARGET_LS2080AQDS
1388 bool "Support ls2080aqds"
1389 select ARCH_LS2080A
1390 select ARM64
1391 select ARMV8_MULTIENTRY
1392 select ARCH_SUPPORT_TFABOOT
1393 select BOARD_LATE_INIT
1394 select GPIO_EXTRA_HEADER
1395 select SUPPORT_SPL
1396 imply SCSI
1397 imply SCSI_AHCI
1398 select FSL_DDR_BIST
1399 select FSL_DDR_INTERACTIVE if !SPL
1400 help
1401 Support for Freescale LS2080AQDS platform.
1402 The LS2080A Development System (QDS) is a high-performance
1403 development platform that supports the QorIQ LS2080A
1404 Layerscape Architecture processor.
1405
1406 config TARGET_LS2080ARDB
1407 bool "Support ls2080ardb"
1408 select ARCH_LS2080A
1409 select ARM64
1410 select ARMV8_MULTIENTRY
1411 select ARCH_SUPPORT_TFABOOT
1412 select BOARD_LATE_INIT
1413 select SUPPORT_SPL
1414 select FSL_DDR_BIST
1415 select FSL_DDR_INTERACTIVE if !SPL
1416 select GPIO_EXTRA_HEADER
1417 imply SCSI
1418 imply SCSI_AHCI
1419 help
1420 Support for Freescale LS2080ARDB platform.
1421 The LS2080A Reference design board (RDB) is a high-performance
1422 development platform that supports the QorIQ LS2080A
1423 Layerscape Architecture processor.
1424
1425 config TARGET_LS2081ARDB
1426 bool "Support ls2081ardb"
1427 select ARCH_LS2080A
1428 select ARM64
1429 select ARMV8_MULTIENTRY
1430 select BOARD_LATE_INIT
1431 select GPIO_EXTRA_HEADER
1432 select SUPPORT_SPL
1433 help
1434 Support for Freescale LS2081ARDB platform.
1435 The LS2081A Reference design board (RDB) is a high-performance
1436 development platform that supports the QorIQ LS2081A/LS2041A
1437 Layerscape Architecture processor.
1438
1439 config TARGET_LX2160ARDB
1440 bool "Support lx2160ardb"
1441 select ARCH_LX2160A
1442 select ARM64
1443 select ARMV8_MULTIENTRY
1444 select ARCH_SUPPORT_TFABOOT
1445 select BOARD_LATE_INIT
1446 select GPIO_EXTRA_HEADER
1447 help
1448 Support for NXP LX2160ARDB platform.
1449 The lx2160ardb (LX2160A Reference design board (RDB)
1450 is a high-performance development platform that supports the
1451 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1452
1453 config TARGET_LX2160AQDS
1454 bool "Support lx2160aqds"
1455 select ARCH_LX2160A
1456 select ARM64
1457 select ARMV8_MULTIENTRY
1458 select ARCH_SUPPORT_TFABOOT
1459 select BOARD_LATE_INIT
1460 select GPIO_EXTRA_HEADER
1461 help
1462 Support for NXP LX2160AQDS platform.
1463 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1464 is a high-performance development platform that supports the
1465 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1466
1467 config TARGET_LX2162AQDS
1468 bool "Support lx2162aqds"
1469 select ARCH_LX2162A
1470 select ARCH_MISC_INIT
1471 select ARM64
1472 select ARMV8_MULTIENTRY
1473 select ARCH_SUPPORT_TFABOOT
1474 select BOARD_LATE_INIT
1475 select GPIO_EXTRA_HEADER
1476 help
1477 Support for NXP LX2162AQDS platform.
1478 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1479
1480 config TARGET_HIKEY
1481 bool "Support HiKey 96boards Consumer Edition Platform"
1482 select ARM64
1483 select DM
1484 select DM_GPIO
1485 select DM_SERIAL
1486 select GPIO_EXTRA_HEADER
1487 select OF_CONTROL
1488 select PL01X_SERIAL
1489 select SPECIFY_CONSOLE_INDEX
1490 imply CMD_DM
1491 help
1492 Support for HiKey 96boards platform. It features a HI6220
1493 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1494
1495 config TARGET_HIKEY960
1496 bool "Support HiKey960 96boards Consumer Edition Platform"
1497 select ARM64
1498 select DM
1499 select DM_SERIAL
1500 select GPIO_EXTRA_HEADER
1501 select OF_CONTROL
1502 select PL01X_SERIAL
1503 imply CMD_DM
1504 help
1505 Support for HiKey960 96boards platform. It features a HI3660
1506 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1507
1508 config TARGET_POPLAR
1509 bool "Support Poplar 96boards Enterprise Edition Platform"
1510 select ARM64
1511 select DM
1512 select DM_SERIAL
1513 select GPIO_EXTRA_HEADER
1514 select OF_CONTROL
1515 select PL01X_SERIAL
1516 imply CMD_DM
1517 help
1518 Support for Poplar 96boards EE platform. It features a HI3798cv200
1519 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1520 making it capable of running any commercial set-top solution based on
1521 Linux or Android.
1522
1523 config TARGET_LS1012AQDS
1524 bool "Support ls1012aqds"
1525 select ARCH_LS1012A
1526 select ARM64
1527 select ARCH_SUPPORT_TFABOOT
1528 select BOARD_LATE_INIT
1529 select GPIO_EXTRA_HEADER
1530 help
1531 Support for Freescale LS1012AQDS platform.
1532 The LS1012A Development System (QDS) is a high-performance
1533 development platform that supports the QorIQ LS1012A
1534 Layerscape Architecture processor.
1535
1536 config TARGET_LS1012ARDB
1537 bool "Support ls1012ardb"
1538 select ARCH_LS1012A
1539 select ARM64
1540 select ARCH_SUPPORT_TFABOOT
1541 select BOARD_LATE_INIT
1542 select GPIO_EXTRA_HEADER
1543 imply SCSI
1544 imply SCSI_AHCI
1545 help
1546 Support for Freescale LS1012ARDB platform.
1547 The LS1012A Reference design board (RDB) is a high-performance
1548 development platform that supports the QorIQ LS1012A
1549 Layerscape Architecture processor.
1550
1551 config TARGET_LS1012A2G5RDB
1552 bool "Support ls1012a2g5rdb"
1553 select ARCH_LS1012A
1554 select ARM64
1555 select ARCH_SUPPORT_TFABOOT
1556 select BOARD_LATE_INIT
1557 select GPIO_EXTRA_HEADER
1558 imply SCSI
1559 help
1560 Support for Freescale LS1012A2G5RDB platform.
1561 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1562 development platform that supports the QorIQ LS1012A
1563 Layerscape Architecture processor.
1564
1565 config TARGET_LS1012AFRWY
1566 bool "Support ls1012afrwy"
1567 select ARCH_LS1012A
1568 select ARM64
1569 select ARCH_SUPPORT_TFABOOT
1570 select BOARD_LATE_INIT
1571 select GPIO_EXTRA_HEADER
1572 imply SCSI
1573 imply SCSI_AHCI
1574 help
1575 Support for Freescale LS1012AFRWY platform.
1576 The LS1012A FRWY board (FRWY) is a high-performance
1577 development platform that supports the QorIQ LS1012A
1578 Layerscape Architecture processor.
1579
1580 config TARGET_LS1012AFRDM
1581 bool "Support ls1012afrdm"
1582 select ARCH_LS1012A
1583 select ARM64
1584 select ARCH_SUPPORT_TFABOOT
1585 select GPIO_EXTRA_HEADER
1586 help
1587 Support for Freescale LS1012AFRDM platform.
1588 The LS1012A Freedom board (FRDM) is a high-performance
1589 development platform that supports the QorIQ LS1012A
1590 Layerscape Architecture processor.
1591
1592 config TARGET_LS1028AQDS
1593 bool "Support ls1028aqds"
1594 select ARCH_LS1028A
1595 select ARM64
1596 select ARMV8_MULTIENTRY
1597 select ARCH_SUPPORT_TFABOOT
1598 select BOARD_LATE_INIT
1599 select GPIO_EXTRA_HEADER
1600 help
1601 Support for Freescale LS1028AQDS platform
1602 The LS1028A Development System (QDS) is a high-performance
1603 development platform that supports the QorIQ LS1028A
1604 Layerscape Architecture processor.
1605
1606 config TARGET_LS1028ARDB
1607 bool "Support ls1028ardb"
1608 select ARCH_LS1028A
1609 select ARM64
1610 select ARMV8_MULTIENTRY
1611 select ARCH_SUPPORT_TFABOOT
1612 select BOARD_LATE_INIT
1613 select GPIO_EXTRA_HEADER
1614 help
1615 Support for Freescale LS1028ARDB platform
1616 The LS1028A Development System (RDB) is a high-performance
1617 development platform that supports the QorIQ LS1028A
1618 Layerscape Architecture processor.
1619
1620 config TARGET_LS1088ARDB
1621 bool "Support ls1088ardb"
1622 select ARCH_LS1088A
1623 select ARM64
1624 select ARMV8_MULTIENTRY
1625 select ARCH_SUPPORT_TFABOOT
1626 select BOARD_LATE_INIT
1627 select SUPPORT_SPL
1628 select FSL_DDR_INTERACTIVE if !SD_BOOT
1629 select GPIO_EXTRA_HEADER
1630 help
1631 Support for NXP LS1088ARDB platform.
1632 The LS1088A Reference design board (RDB) is a high-performance
1633 development platform that supports the QorIQ LS1088A
1634 Layerscape Architecture processor.
1635
1636 config TARGET_LS1021AQDS
1637 bool "Support ls1021aqds"
1638 select ARCH_LS1021A
1639 select ARCH_SUPPORT_PSCI
1640 select BOARD_EARLY_INIT_F
1641 select BOARD_LATE_INIT
1642 select CPU_V7A
1643 select CPU_V7_HAS_NONSEC
1644 select CPU_V7_HAS_VIRT
1645 select LS1_DEEP_SLEEP
1646 select PEN_ADDR_BIG_ENDIAN
1647 select SUPPORT_SPL
1648 select SYS_FSL_DDR
1649 select FSL_DDR_INTERACTIVE
1650 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1651 select GPIO_EXTRA_HEADER
1652 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1653 imply SCSI
1654
1655 config TARGET_LS1021ATWR
1656 bool "Support ls1021atwr"
1657 select ARCH_LS1021A
1658 select ARCH_SUPPORT_PSCI
1659 select BOARD_EARLY_INIT_F
1660 select BOARD_LATE_INIT
1661 select CPU_V7A
1662 select CPU_V7_HAS_NONSEC
1663 select CPU_V7_HAS_VIRT
1664 select LS1_DEEP_SLEEP
1665 select PEN_ADDR_BIG_ENDIAN
1666 select SUPPORT_SPL
1667 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1668 select GPIO_EXTRA_HEADER
1669 imply SCSI
1670
1671 config TARGET_PG_WCOM_SELI8
1672 bool "Support Hitachi-Powergrids SELI8 service unit card"
1673 select ARCH_LS1021A
1674 select ARCH_SUPPORT_PSCI
1675 select BOARD_EARLY_INIT_F
1676 select BOARD_LATE_INIT
1677 select CPU_V7A
1678 select CPU_V7_HAS_NONSEC
1679 select CPU_V7_HAS_VIRT
1680 select SYS_FSL_DDR
1681 select FSL_DDR_INTERACTIVE
1682 select GPIO_EXTRA_HEADER
1683 select VENDOR_KM
1684 imply SCSI
1685 help
1686 Support for Hitachi-Powergrids SELI8 service unit card.
1687 SELI8 is a QorIQ LS1021a based service unit card used
1688 in XMC20 and FOX615 product families.
1689
1690 config TARGET_PG_WCOM_EXPU1
1691 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1692 select ARCH_LS1021A
1693 select ARCH_SUPPORT_PSCI
1694 select BOARD_EARLY_INIT_F
1695 select BOARD_LATE_INIT
1696 select CPU_V7A
1697 select CPU_V7_HAS_NONSEC
1698 select CPU_V7_HAS_VIRT
1699 select SYS_FSL_DDR
1700 select FSL_DDR_INTERACTIVE
1701 select VENDOR_KM
1702 imply SCSI
1703 help
1704 Support for Hitachi-Powergrids EXPU1 service unit card.
1705 EXPU1 is a QorIQ LS1021a based service unit card used
1706 in XMC20 and FOX615 product families.
1707
1708 config TARGET_LS1021ATSN
1709 bool "Support ls1021atsn"
1710 select ARCH_LS1021A
1711 select ARCH_SUPPORT_PSCI
1712 select BOARD_EARLY_INIT_F
1713 select BOARD_LATE_INIT
1714 select CPU_V7A
1715 select CPU_V7_HAS_NONSEC
1716 select CPU_V7_HAS_VIRT
1717 select LS1_DEEP_SLEEP
1718 select SUPPORT_SPL
1719 select GPIO_EXTRA_HEADER
1720 imply SCSI
1721
1722 config TARGET_LS1021AIOT
1723 bool "Support ls1021aiot"
1724 select ARCH_LS1021A
1725 select ARCH_SUPPORT_PSCI
1726 select BOARD_LATE_INIT
1727 select CPU_V7A
1728 select CPU_V7_HAS_NONSEC
1729 select CPU_V7_HAS_VIRT
1730 select PEN_ADDR_BIG_ENDIAN
1731 select SUPPORT_SPL
1732 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1733 select GPIO_EXTRA_HEADER
1734 imply SCSI
1735 help
1736 Support for Freescale LS1021AIOT platform.
1737 The LS1021A Freescale board (IOT) is a high-performance
1738 development platform that supports the QorIQ LS1021A
1739 Layerscape Architecture processor.
1740
1741 config TARGET_LS1043AQDS
1742 bool "Support ls1043aqds"
1743 select ARCH_LS1043A
1744 select ARM64
1745 select ARMV8_MULTIENTRY
1746 select ARCH_SUPPORT_TFABOOT
1747 select BOARD_EARLY_INIT_F
1748 select BOARD_LATE_INIT
1749 select SUPPORT_SPL
1750 select FSL_DDR_INTERACTIVE if !SPL
1751 select FSL_DSPI if !SPL_NO_DSPI
1752 select DM_SPI_FLASH if FSL_DSPI
1753 select GPIO_EXTRA_HEADER
1754 imply SCSI
1755 imply SCSI_AHCI
1756 help
1757 Support for Freescale LS1043AQDS platform.
1758
1759 config TARGET_LS1043ARDB
1760 bool "Support ls1043ardb"
1761 select ARCH_LS1043A
1762 select ARM64
1763 select ARMV8_MULTIENTRY
1764 select ARCH_SUPPORT_TFABOOT
1765 select BOARD_EARLY_INIT_F
1766 select BOARD_LATE_INIT
1767 select SUPPORT_SPL
1768 select FSL_DSPI if !SPL_NO_DSPI
1769 select DM_SPI_FLASH if FSL_DSPI
1770 select GPIO_EXTRA_HEADER
1771 help
1772 Support for Freescale LS1043ARDB platform.
1773
1774 config TARGET_LS1046AQDS
1775 bool "Support ls1046aqds"
1776 select ARCH_LS1046A
1777 select ARM64
1778 select ARMV8_MULTIENTRY
1779 select ARCH_SUPPORT_TFABOOT
1780 select BOARD_EARLY_INIT_F
1781 select BOARD_LATE_INIT
1782 select DM_SPI_FLASH if DM_SPI
1783 select SUPPORT_SPL
1784 select FSL_DDR_BIST if !SPL
1785 select FSL_DDR_INTERACTIVE if !SPL
1786 select FSL_DDR_INTERACTIVE if !SPL
1787 select GPIO_EXTRA_HEADER
1788 imply SCSI
1789 help
1790 Support for Freescale LS1046AQDS platform.
1791 The LS1046A Development System (QDS) is a high-performance
1792 development platform that supports the QorIQ LS1046A
1793 Layerscape Architecture processor.
1794
1795 config TARGET_LS1046ARDB
1796 bool "Support ls1046ardb"
1797 select ARCH_LS1046A
1798 select ARM64
1799 select ARMV8_MULTIENTRY
1800 select ARCH_SUPPORT_TFABOOT
1801 select BOARD_EARLY_INIT_F
1802 select BOARD_LATE_INIT
1803 select DM_SPI_FLASH if DM_SPI
1804 select POWER_MC34VR500
1805 select SUPPORT_SPL
1806 select FSL_DDR_BIST
1807 select FSL_DDR_INTERACTIVE if !SPL
1808 select GPIO_EXTRA_HEADER
1809 imply SCSI
1810 help
1811 Support for Freescale LS1046ARDB platform.
1812 The LS1046A Reference Design Board (RDB) is a high-performance
1813 development platform that supports the QorIQ LS1046A
1814 Layerscape Architecture processor.
1815
1816 config TARGET_LS1046AFRWY
1817 bool "Support ls1046afrwy"
1818 select ARCH_LS1046A
1819 select ARM64
1820 select ARMV8_MULTIENTRY
1821 select ARCH_SUPPORT_TFABOOT
1822 select BOARD_EARLY_INIT_F
1823 select BOARD_LATE_INIT
1824 select DM_SPI_FLASH if DM_SPI
1825 select GPIO_EXTRA_HEADER
1826 imply SCSI
1827 help
1828 Support for Freescale LS1046AFRWY platform.
1829 The LS1046A Freeway Board (FRWY) is a high-performance
1830 development platform that supports the QorIQ LS1046A
1831 Layerscape Architecture processor.
1832
1833 config TARGET_SL28
1834 bool "Support sl28"
1835 select ARCH_LS1028A
1836 select ARM64
1837 select ARMV8_MULTIENTRY
1838 select SUPPORT_SPL
1839 select BINMAN
1840 select DM
1841 select DM_GPIO
1842 select DM_I2C
1843 select DM_MMC
1844 select MTD
1845 select DM_SPI_FLASH
1846 select DM_MDIO
1847 select PCI
1848 select DM_RNG
1849 select DM_RTC
1850 select SCSI
1851 select DM_SERIAL
1852 select DM_SPI
1853 select GPIO_EXTRA_HEADER
1854 select SPL_DM if SPL
1855 select SPL_DM_SPI if SPL
1856 select SPL_DM_SPI_FLASH if SPL
1857 select SPL_DM_I2C if SPL
1858 select SPL_DM_MMC if SPL
1859 select SPL_DM_SERIAL if SPL
1860 help
1861 Support for Kontron SMARC-sAL28 board.
1862
1863 config TARGET_TEN64
1864 bool "Support ten64"
1865 select ARCH_LS1088A
1866 select ARCH_MISC_INIT
1867 select ARM64
1868 select ARMV8_MULTIENTRY
1869 select ARCH_SUPPORT_TFABOOT
1870 select BOARD_LATE_INIT
1871 select SUPPORT_SPL
1872 select FSL_DDR_INTERACTIVE if !SD_BOOT
1873 select GPIO_EXTRA_HEADER
1874 help
1875 Support for Traverse Technologies Ten64 board, based
1876 on NXP LS1088A.
1877
1878 config ARCH_UNIPHIER
1879 bool "Socionext UniPhier SoCs"
1880 select BOARD_LATE_INIT
1881 select DM
1882 select DM_GPIO
1883 select DM_I2C
1884 select DM_MMC
1885 select DM_MTD
1886 select DM_RESET
1887 select DM_SERIAL
1888 select OF_BOARD_SETUP
1889 select OF_CONTROL
1890 select OF_LIBFDT
1891 select PINCTRL
1892 select SPL_BOARD_INIT if SPL
1893 select SPL_DM if SPL
1894 select SPL_LIBCOMMON_SUPPORT if SPL
1895 select SPL_LIBGENERIC_SUPPORT if SPL
1896 select SPL_OF_CONTROL if SPL
1897 select SPL_PINCTRL if SPL
1898 select SUPPORT_SPL
1899 imply CMD_DM
1900 imply DISTRO_DEFAULTS
1901 imply FAT_WRITE
1902 help
1903 Support for UniPhier SoC family developed by Socionext Inc.
1904 (formerly, System LSI Business Division of Panasonic Corporation)
1905
1906 config ARCH_SYNQUACER
1907 bool "Socionext SynQuacer SoCs"
1908 select ARM64
1909 select DM
1910 select GIC_V3
1911 select PSCI_RESET
1912 select SYSRESET
1913 select SYSRESET_PSCI
1914 select OF_CONTROL
1915 help
1916 Support for SynQuacer SoC family developed by Socionext Inc.
1917 This SoC is used on 96boards EE DeveloperBox.
1918
1919 config ARCH_STM32
1920 bool "Support STMicroelectronics STM32 MCU with cortex M"
1921 select CPU_V7M
1922 select DM
1923 select DM_SERIAL
1924 imply CMD_DM
1925
1926 config ARCH_STI
1927 bool "Support STMicroelectronics SoCs"
1928 select BLK
1929 select CPU_V7A
1930 select DM
1931 select DM_MMC
1932 select DM_RESET
1933 select DM_SERIAL
1934 imply CMD_DM
1935 help
1936 Support for STMicroelectronics STiH407/10 SoC family.
1937 This SoC is used on Linaro 96Board STiH410-B2260
1938
1939 config ARCH_STM32MP
1940 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1941 select ARCH_MISC_INIT
1942 select ARCH_SUPPORT_TFABOOT
1943 select BOARD_LATE_INIT
1944 select CLK
1945 select DM
1946 select DM_GPIO
1947 select DM_RESET
1948 select DM_SERIAL
1949 select MISC
1950 select OF_CONTROL
1951 select OF_LIBFDT
1952 select OF_SYSTEM_SETUP
1953 select PINCTRL
1954 select REGMAP
1955 select SYSCON
1956 select SYSRESET
1957 select SYS_THUMB_BUILD if !ARM64
1958 imply SPL_SYSRESET
1959 imply CMD_DM
1960 imply CMD_POWEROFF
1961 imply OF_LIBFDT_OVERLAY
1962 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1963 imply USE_PREBOOT
1964 imply TIMESTAMP
1965 help
1966 Support for STM32MP SoC family developed by STMicroelectronics,
1967 MPUs based on ARM cortex A core
1968 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1969 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1970 chain.
1971 SPL is the unsecure FSBL for the basic boot chain.
1972
1973 config ARCH_ROCKCHIP
1974 bool "Support Rockchip SoCs"
1975 select BLK
1976 select BINMAN if SPL_OPTEE || SPL
1977 select DM
1978 select DM_GPIO
1979 select DM_I2C
1980 select DM_MMC
1981 select DM_PWM
1982 select DM_REGULATOR
1983 select DM_SERIAL
1984 select DM_SPI
1985 select DM_SPI_FLASH
1986 select DM_USB_GADGET if USB_DWC3_GADGET
1987 select ENABLE_ARM_SOC_BOOT0_HOOK
1988 select OF_CONTROL
1989 select MTD
1990 select SPI
1991 select SPL_DM if SPL
1992 select SPL_DM_SPI if SPL
1993 select SPL_DM_SPI_FLASH if SPL
1994 select SYS_MALLOC_F
1995 select SYS_THUMB_BUILD if !ARM64
1996 imply ADC
1997 imply CMD_DM
1998 imply DEBUG_UART_BOARD_INIT
1999 imply BOOTSTD_DEFAULTS
2000 imply FAT_WRITE
2001 imply SARADC_ROCKCHIP
2002 imply SPL_SYSRESET
2003 imply SPL_SYS_MALLOC_SIMPLE
2004 imply SYS_NS16550
2005 imply TPL_SYSRESET
2006 imply USB_FUNCTION_FASTBOOT
2007
2008 config ARCH_OCTEONTX
2009 bool "Support OcteonTX SoCs"
2010 select CLK
2011 select DM
2012 select GPIO_EXTRA_HEADER
2013 select ARM64
2014 select OF_CONTROL
2015 select OF_LIVE
2016 select BOARD_LATE_INIT
2017 select SYS_CACHE_SHIFT_7
2018 select SYS_PCI_64BIT if PCI
2019 imply OF_HAS_PRIOR_STAGE
2020
2021 config ARCH_OCTEONTX2
2022 bool "Support OcteonTX2 SoCs"
2023 select CLK
2024 select DM
2025 select GPIO_EXTRA_HEADER
2026 select ARM64
2027 select OF_CONTROL
2028 select OF_LIVE
2029 select BOARD_LATE_INIT
2030 select SYS_CACHE_SHIFT_7
2031 select SYS_PCI_64BIT if PCI
2032 imply OF_HAS_PRIOR_STAGE
2033
2034 config TARGET_THUNDERX_88XX
2035 bool "Support ThunderX 88xx"
2036 select ARM64
2037 select GPIO_EXTRA_HEADER
2038 select OF_CONTROL
2039 select PL01X_SERIAL
2040 select SYS_CACHE_SHIFT_7
2041
2042 config ARCH_ASPEED
2043 bool "Support Aspeed SoCs"
2044 select DM
2045 select OF_CONTROL
2046 imply CMD_DM
2047
2048 config TARGET_DURIAN
2049 bool "Support Phytium Durian Platform"
2050 select ARM64
2051 select GPIO_EXTRA_HEADER
2052 help
2053 Support for durian platform.
2054 It has 2GB Sdram, uart and pcie.
2055
2056 config TARGET_POMELO
2057 bool "Support Phytium Pomelo Platform"
2058 select ARM64
2059 select DM
2060 select AHCI
2061 select SCSI_AHCI
2062 select AHCI_PCI
2063 select BLK
2064 select PCI
2065 select DM_PCI
2066 select SCSI
2067 select DM_SERIAL
2068 imply CMD_PCI
2069 help
2070 Support for pomelo platform.
2071 It has 8GB Sdram, uart and pcie.
2072
2073 config TARGET_PE2201
2074 bool "Support Phytium PE2201 Platform"
2075 select ARM64
2076 help
2077 Support for pe2201 platform.It has 2GB Sdram, uart and pcie.
2078
2079 config TARGET_PRESIDIO_ASIC
2080 bool "Support Cortina Presidio ASIC Platform"
2081 select ARM64
2082 select GICV2
2083
2084 config TARGET_XENGUEST_ARM64
2085 bool "Xen guest ARM64"
2086 select ARM64
2087 select XEN
2088 select OF_CONTROL
2089 select LINUX_KERNEL_IMAGE_HEADER
2090 select XEN_SERIAL
2091 imply OF_HAS_PRIOR_STAGE
2092
2093 config ARCH_GXP
2094 bool "Support HPE GXP SoCs"
2095 select DM
2096 select OF_CONTROL
2097 imply CMD_DM
2098
2099 endchoice
2100
2101 config SUPPORT_PASSING_ATAGS
2102 bool "Support pre-devicetree ATAG-based booting"
2103 depends on !ARM64
2104 imply SETUP_MEMORY_TAGS
2105 help
2106 Support for booting older Linux kernels, using ATAGs rather than
2107 passing a devicetree. This is option is rarely used, and the
2108 semantics are defined at
2109 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2110
2111 config SETUP_MEMORY_TAGS
2112 bool "Pass memory size information via ATAG"
2113 depends on SUPPORT_PASSING_ATAGS
2114
2115 config CMDLINE_TAG
2116 bool "Pass Linux kernel cmdline via ATAG"
2117 depends on SUPPORT_PASSING_ATAGS
2118
2119 config INITRD_TAG
2120 bool "Pass initrd starting point and size via ATAG"
2121 depends on SUPPORT_PASSING_ATAGS
2122
2123 config REVISION_TAG
2124 bool "Pass system revision via ATAG"
2125 depends on SUPPORT_PASSING_ATAGS
2126
2127 config SERIAL_TAG
2128 bool "Pass system serial number via ATAG"
2129 depends on SUPPORT_PASSING_ATAGS
2130
2131 config STATIC_MACH_TYPE
2132 bool "Statically define the Machine ID number"
2133 default y if TARGET_DS109 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2134 help
2135 When booting via ATAGs, enable this option if we know the correct
2136 machine ID number to use at compile time. Some systems will be
2137 passed the number dynamically by whatever loads U-Boot.
2138
2139 config MACH_TYPE
2140 int "Machine ID number"
2141 depends on STATIC_MACH_TYPE
2142 default 527 if TARGET_DS109
2143 default 3036 if TARGET_DS414
2144 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2145 help
2146 When booting via ATAGs, the machine type must be passed as a number.
2147 For the full list see https://www.arm.linux.org.uk/developer/machines
2148
2149 config ARCH_SUPPORT_TFABOOT
2150 bool
2151
2152 config TFABOOT
2153 bool "Support for booting from TF-A"
2154 depends on ARCH_SUPPORT_TFABOOT
2155 help
2156 Some platforms support the setup of secure registers (for instance
2157 for CPU errata handling) or provide secure services like PSCI.
2158 Those services could also be provided by other firmware parts
2159 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2160 does not need to (and cannot) execute this code.
2161 Enabling this option will make a U-Boot binary that is relying
2162 on other firmware layers to provide secure functionality.
2163
2164 config TI_SECURE_DEVICE
2165 bool "HS Device Type Support"
2166 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2167 help
2168 If a high secure (HS) device type is being used, this config
2169 must be set. This option impacts various aspects of the
2170 build system (to create signed boot images that can be
2171 authenticated) and the code. See the doc/README.ti-secure
2172 file for further details.
2173
2174 config SYS_KWD_CONFIG
2175 string "kwbimage config file path"
2176 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2177 default "arch/arm/mach-mvebu/kwbimage.cfg"
2178 help
2179 Path within the source directory to the kwbimage.cfg file to use
2180 when packaging the U-Boot image for use.
2181
2182 source "arch/arm/mach-apple/Kconfig"
2183
2184 source "arch/arm/mach-aspeed/Kconfig"
2185
2186 source "arch/arm/mach-at91/Kconfig"
2187
2188 source "arch/arm/mach-bcm283x/Kconfig"
2189
2190 source "arch/arm/mach-bcmbca/Kconfig"
2191
2192 source "arch/arm/mach-bcmstb/Kconfig"
2193
2194 source "arch/arm/mach-davinci/Kconfig"
2195
2196 source "arch/arm/mach-exynos/Kconfig"
2197
2198 source "arch/arm/mach-hpe/gxp/Kconfig"
2199
2200 source "arch/arm/mach-highbank/Kconfig"
2201
2202 source "arch/arm/mach-histb/Kconfig"
2203
2204 source "arch/arm/mach-integrator/Kconfig"
2205
2206 source "arch/arm/mach-ipq40xx/Kconfig"
2207
2208 source "arch/arm/mach-k3/Kconfig"
2209
2210 source "arch/arm/mach-keystone/Kconfig"
2211
2212 source "arch/arm/mach-kirkwood/Kconfig"
2213
2214 source "arch/arm/mach-lpc32xx/Kconfig"
2215
2216 source "arch/arm/mach-mvebu/Kconfig"
2217
2218 source "arch/arm/mach-octeontx/Kconfig"
2219
2220 source "arch/arm/mach-octeontx2/Kconfig"
2221
2222 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2223
2224 source "arch/arm/mach-imx/mx3/Kconfig"
2225
2226 source "arch/arm/mach-imx/mx5/Kconfig"
2227
2228 source "arch/arm/mach-imx/mx6/Kconfig"
2229
2230 source "arch/arm/mach-imx/mx7/Kconfig"
2231
2232 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2233
2234 source "arch/arm/mach-imx/imx8/Kconfig"
2235
2236 source "arch/arm/mach-imx/imx8m/Kconfig"
2237
2238 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2239
2240 source "arch/arm/mach-imx/imx9/Kconfig"
2241
2242 source "arch/arm/mach-imx/imxrt/Kconfig"
2243
2244 source "arch/arm/mach-imx/mxs/Kconfig"
2245
2246 source "arch/arm/mach-omap2/Kconfig"
2247
2248 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2249
2250 source "arch/arm/mach-orion5x/Kconfig"
2251
2252 source "arch/arm/mach-owl/Kconfig"
2253
2254 source "arch/arm/mach-renesas/Kconfig"
2255
2256 source "arch/arm/mach-meson/Kconfig"
2257
2258 source "arch/arm/mach-mediatek/Kconfig"
2259
2260 source "arch/arm/mach-qemu/Kconfig"
2261
2262 source "arch/arm/mach-rockchip/Kconfig"
2263
2264 source "arch/arm/mach-s5pc1xx/Kconfig"
2265
2266 source "arch/arm/mach-snapdragon/Kconfig"
2267
2268 source "arch/arm/mach-socfpga/Kconfig"
2269
2270 source "arch/arm/mach-sti/Kconfig"
2271
2272 source "arch/arm/mach-stm32/Kconfig"
2273
2274 source "arch/arm/mach-stm32mp/Kconfig"
2275
2276 source "arch/arm/mach-sunxi/Kconfig"
2277
2278 source "arch/arm/mach-tegra/Kconfig"
2279
2280 source "arch/arm/mach-u8500/Kconfig"
2281
2282 source "arch/arm/mach-uniphier/Kconfig"
2283
2284 source "arch/arm/cpu/armv7/vf610/Kconfig"
2285
2286 source "arch/arm/mach-zynq/Kconfig"
2287
2288 source "arch/arm/mach-zynqmp/Kconfig"
2289
2290 source "arch/arm/mach-versal/Kconfig"
2291
2292 source "arch/arm/mach-versal-net/Kconfig"
2293
2294 source "arch/arm/mach-zynqmp-r5/Kconfig"
2295
2296 source "arch/arm/cpu/armv7/Kconfig"
2297
2298 source "arch/arm/cpu/armv8/Kconfig"
2299
2300 source "arch/arm/mach-imx/Kconfig"
2301
2302 source "arch/arm/mach-nexell/Kconfig"
2303
2304 source "arch/arm/mach-npcm/Kconfig"
2305
2306 source "board/armltd/total_compute/Kconfig"
2307 source "board/armltd/corstone1000/Kconfig"
2308 source "board/bosch/shc/Kconfig"
2309 source "board/bosch/guardian/Kconfig"
2310 source "board/Marvell/octeontx/Kconfig"
2311 source "board/Marvell/octeontx2/Kconfig"
2312 source "board/armltd/vexpress/Kconfig"
2313 source "board/armltd/vexpress64/Kconfig"
2314 source "board/cortina/presidio-asic/Kconfig"
2315 source "board/broadcom/bcmns/Kconfig"
2316 source "board/broadcom/bcmns3/Kconfig"
2317 source "board/cavium/thunderx/Kconfig"
2318 source "board/eets/pdu001/Kconfig"
2319 source "board/emulation/qemu-arm/Kconfig"
2320 source "board/freescale/ls2080aqds/Kconfig"
2321 source "board/freescale/ls2080ardb/Kconfig"
2322 source "board/freescale/ls1088a/Kconfig"
2323 source "board/freescale/ls1028a/Kconfig"
2324 source "board/freescale/ls1021aqds/Kconfig"
2325 source "board/freescale/ls1043aqds/Kconfig"
2326 source "board/freescale/ls1021atwr/Kconfig"
2327 source "board/freescale/ls1021atsn/Kconfig"
2328 source "board/freescale/ls1021aiot/Kconfig"
2329 source "board/freescale/ls1046aqds/Kconfig"
2330 source "board/freescale/ls1043ardb/Kconfig"
2331 source "board/freescale/ls1046ardb/Kconfig"
2332 source "board/freescale/ls1046afrwy/Kconfig"
2333 source "board/freescale/ls1012aqds/Kconfig"
2334 source "board/freescale/ls1012ardb/Kconfig"
2335 source "board/freescale/ls1012afrdm/Kconfig"
2336 source "board/freescale/lx2160a/Kconfig"
2337 source "board/grinn/chiliboard/Kconfig"
2338 source "board/hisilicon/hikey/Kconfig"
2339 source "board/hisilicon/hikey960/Kconfig"
2340 source "board/hisilicon/poplar/Kconfig"
2341 source "board/isee/igep003x/Kconfig"
2342 source "board/kontron/sl28/Kconfig"
2343 source "board/myir/mys_6ulx/Kconfig"
2344 source "board/samsung/common/Kconfig"
2345 source "board/siemens/common/Kconfig"
2346 source "board/seeed/npi_imx6ull/Kconfig"
2347 source "board/socionext/developerbox/Kconfig"
2348 source "board/tcl/sl50/Kconfig"
2349 source "board/traverse/ten64/Kconfig"
2350 source "board/variscite/dart_6ul/Kconfig"
2351 source "board/vscom/baltos/Kconfig"
2352 source "board/phytium/durian/Kconfig"
2353 source "board/phytium/pomelo/Kconfig"
2354 source "board/phytium/pe2201/Kconfig"
2355 source "board/xen/xenguest_arm64/Kconfig"
2356
2357 source "arch/arm/Kconfig.debug"
2358
2359 endmenu