arch/arm/Kconfig

   1 menu "ARM architecture"
   2         depends on ARM
   3
   4 config SYS_ARCH
   5         default "arm"
   6
   7 config ARM64
   8         bool
   9         select PHYS_64BIT
  10         select SYS_CACHE_SHIFT_6
  11         imply SPL_SEPARATE_BSS
  12
  13 config ARM64_CRC32
  14         bool "Enable support for CRC32 instruction"
  15         depends on ARM64
  16         default y
  17         help
  18           ARMv8 implements dedicated crc32 instruction for crc32 calculation.
  19           This is faster than software crc32 calculation. This instruction may
  20           not be present on all ARMv8.0, but is always present on ARMv8.1 and
  21           newer.
  22
  23 config COUNTER_FREQUENCY
  24         int "Timer clock frequency"
  25         depends on ARM64 || CPU_V7A
  26         default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
  27         default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
  28                         ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
  29         default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
  30         default 100000000 if ARCH_ZYNQMP
  31         default 0
  32         help
  33           For platforms with ARMv8-A and ARMv7-A which features a system
  34           counter, those platforms needs software to program the counter
  35           frequency. Setup time clock frequency for certain platform.
  36           0 means no need to configure the system counter frequency.
  37           For platforms needs the frequency set in U-Boot with a
  38           pre-defined value, should have the macro defined as a non-zero value.
  39
  40 config POSITION_INDEPENDENT
  41         bool "Generate position-independent pre-relocation code"
  42         depends on ARM64 || CPU_V7A
  43         help
  44           U-Boot expects to be linked to a specific hard-coded address, and to
  45           be loaded to and run from that address. This option lifts that
  46           restriction, thus allowing the code to be loaded to and executed from
  47           almost any 4K aligned address. This logic relies on the relocation
  48           information that is embedded in the binary to support U-Boot
  49           relocating itself to the top-of-RAM later during execution.
  50
  51 config INIT_SP_RELATIVE
  52         bool "Specify the early stack pointer relative to the .bss section"
  53         depends on ARM64
  54         default n if ARCH_QEMU
  55         default y if POSITION_INDEPENDENT
  56         help
  57           U-Boot typically uses a hard-coded value for the stack pointer
  58           before relocation. Enable this option to instead calculate the
  59           initial SP at run-time. This is useful to avoid hard-coding addresses
  60           into U-Boot, so that it can be loaded and executed at arbitrary
  61           addresses and thus avoid using arbitrary addresses at runtime.
  62
  63           If this option is enabled, the early stack pointer is set to
  64           &_bss_start with a offset value added. The offset is specified by
  65           SYS_INIT_SP_BSS_OFFSET.
  66
  67 config SYS_INIT_SP_BSS_OFFSET
  68         int "Early stack offset from the .bss base address"
  69         depends on ARM64
  70         depends on INIT_SP_RELATIVE
  71         default 524288
  72         help
  73           This option's value is the offset added to &_bss_start in order to
  74           calculate the stack pointer. This offset should be large enough so
  75           that the early malloc region, global data (gd), and early stack usage
  76           do not overlap any appended DTB.
  77
  78 config SPL_SYS_NO_VECTOR_TABLE
  79         depends on SPL
  80         bool
  81
  82 config LINUX_KERNEL_IMAGE_HEADER
  83         depends on ARM64
  84         bool
  85         help
  86           Place a Linux kernel image header at the start of the U-Boot binary.
  87           The format of the header is described in the Linux kernel source at
  88           Documentation/arm64/booting.txt. This feature is useful since the
  89           image header reports the amount of memory (BSS and similar) that
  90           U-Boot needs to use, but which isn't part of the binary.
  91
  92 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  93         depends on LINUX_KERNEL_IMAGE_HEADER
  94         hex
  95         help
  96           The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  97           TEXT_OFFSET value written to the Linux kernel image header.
  98
  99 config GICV2
 100         bool
 101
 102 config GICV3
 103         bool
 104
 105 config GIC_V3_ITS
 106         bool "ARM GICV3 ITS"
 107         select IRQ
 108         help
 109           ARM GICV3 Interrupt translation service (ITS).
 110           Basic support for programming locality specific peripheral
 111           interrupts (LPI) configuration tables and enable LPI tables.
 112           LPI configuration table can be used by u-boot or Linux.
 113           ARM GICV3 has limitation, once the LPI table is enabled, LPI
 114           configuration table can not be re-programmed, unless GICV3 reset.
 115
 116 config STATIC_RELA
 117         bool
 118         default y if ARM64
 119
 120 config DMA_ADDR_T_64BIT
 121         bool
 122         default y if ARM64
 123
 124 config HAS_VBAR
 125         bool
 126
 127 config HAS_THUMB2
 128         bool
 129
 130 config GPIO_EXTRA_HEADER
 131         bool
 132
 133 # Used for compatibility with asm files copied from the kernel
 134 config ARM_ASM_UNIFIED
 135         bool
 136         default y
 137
 138 # Used for compatibility with asm files copied from the kernel
 139 config THUMB2_KERNEL
 140         bool
 141
 142 config SYS_ICACHE_OFF
 143         bool "Do not enable icache"
 144         help
 145           Do not enable instruction cache in U-Boot.
 146
 147 config SPL_SYS_ICACHE_OFF
 148         bool "Do not enable icache in SPL"
 149         depends on SPL
 150         default SYS_ICACHE_OFF
 151         help
 152           Do not enable instruction cache in SPL.
 153
 154 config SYS_DCACHE_OFF
 155         bool "Do not enable dcache"
 156         help
 157           Do not enable data cache in U-Boot.
 158
 159 config SPL_SYS_DCACHE_OFF
 160         bool "Do not enable dcache in SPL"
 161         depends on SPL
 162         default SYS_DCACHE_OFF
 163         help
 164           Do not enable data cache in SPL.
 165
 166 config SYS_ARM_CACHE_CP15
 167         bool "CP15 based cache enabling support"
 168         help
 169           Select this if your processor suports enabling caches by using
 170           CP15 registers.
 171
 172 config SYS_ARM_MMU
 173         bool "MMU-based Paged Memory Management Support"
 174         select SYS_ARM_CACHE_CP15
 175         help
 176           Select if you want MMU-based virtualised addressing space
 177           support via paged memory management.
 178
 179 config SYS_ARM_MPU
 180         bool 'Use the ARM v7 PMSA Compliant MPU'
 181         help
 182           Some ARM systems without an MMU have instead a Memory Protection
 183           Unit (MPU) that defines the type and permissions for regions of
 184           memory.
 185           If your CPU has an MPU then you should choose 'y' here unless you
 186           know that you do not want to use the MPU.
 187
 188 # If set, the workarounds for these ARM errata are applied early during U-Boot
 189 # startup. Note that in general these options force the workarounds to be
 190 # applied; no CPU-type/version detection exists, unlike the similar options in
 191 # the Linux kernel. Do not set these options unless they apply!  Also note that
 192 # the following can be machine-specific errata. These do have ability to
 193 # provide rudimentary version and machine-specific checks, but expect no
 194 # product checks:
 195 # CONFIG_ARM_ERRATA_430973
 196 # CONFIG_ARM_ERRATA_454179
 197 # CONFIG_ARM_ERRATA_621766
 198 # CONFIG_ARM_ERRATA_798870
 199 # CONFIG_ARM_ERRATA_801819
 200 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
 201 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
 202
 203 config ARM_ERRATA_430973
 204         bool
 205
 206 config ARM_ERRATA_454179
 207         bool
 208
 209 config ARM_ERRATA_621766
 210         bool
 211
 212 config ARM_ERRATA_716044
 213         bool
 214
 215 config ARM_ERRATA_725233
 216         bool
 217
 218 config ARM_ERRATA_742230
 219         bool
 220
 221 config ARM_ERRATA_743622
 222         bool
 223
 224 config ARM_ERRATA_751472
 225         bool
 226
 227 config ARM_ERRATA_761320
 228         bool
 229
 230 config ARM_ERRATA_773022
 231         bool
 232
 233 config ARM_ERRATA_774769
 234         bool
 235
 236 config ARM_ERRATA_794072
 237         bool
 238
 239 config ARM_ERRATA_798870
 240         bool
 241
 242 config ARM_ERRATA_801819
 243         bool
 244
 245 config ARM_ERRATA_826974
 246         bool
 247
 248 config ARM_ERRATA_828024
 249         bool
 250
 251 config ARM_ERRATA_829520
 252         bool
 253
 254 config ARM_ERRATA_833069
 255         bool
 256
 257 config ARM_ERRATA_833471
 258         bool
 259
 260 config ARM_ERRATA_845369
 261         bool
 262
 263 config ARM_ERRATA_852421
 264         bool
 265
 266 config ARM_ERRATA_852423
 267         bool
 268
 269 config ARM_ERRATA_855873
 270         bool
 271
 272 config ARM_CORTEX_A8_CVE_2017_5715
 273         bool
 274
 275 config ARM_CORTEX_A15_CVE_2017_5715
 276         bool
 277
 278 config CPU_ARM720T
 279         bool
 280         select SYS_CACHE_SHIFT_5
 281         imply SYS_ARM_MMU
 282
 283 config CPU_ARM920T
 284         bool
 285         select SYS_CACHE_SHIFT_5
 286         imply SYS_ARM_MMU
 287
 288 config CPU_ARM926EJS
 289         bool
 290         select SYS_CACHE_SHIFT_5
 291         imply SYS_ARM_MMU
 292         imply SPL_SEPARATE_BSS
 293
 294 config CPU_ARM946ES
 295         bool
 296         select SYS_CACHE_SHIFT_5
 297         imply SYS_ARM_MMU
 298
 299 config CPU_ARM1136
 300         bool
 301         select SYS_CACHE_SHIFT_5
 302         imply SYS_ARM_MMU
 303         imply SPL_SEPARATE_BSS
 304
 305 config CPU_ARM1176
 306         bool
 307         select HAS_VBAR
 308         select SYS_CACHE_SHIFT_5
 309         imply SYS_ARM_MMU
 310
 311 config CPU_V7A
 312         bool
 313         select HAS_THUMB2
 314         select HAS_VBAR
 315         select SYS_CACHE_SHIFT_6
 316         imply SYS_ARM_MMU
 317
 318 config CPU_V7M
 319         bool
 320         select HAS_THUMB2
 321         select SYS_ARM_MPU
 322         select SYS_CACHE_SHIFT_5
 323         select SYS_THUMB_BUILD
 324         select THUMB2_KERNEL
 325
 326 config CPU_V7R
 327         bool
 328         select HAS_THUMB2
 329         select SYS_ARM_CACHE_CP15
 330         select SYS_ARM_MPU
 331         select SYS_CACHE_SHIFT_6
 332
 333 config SYS_CPU
 334         default "arm720t" if CPU_ARM720T
 335         default "arm920t" if CPU_ARM920T
 336         default "arm926ejs" if CPU_ARM926EJS
 337         default "arm946es" if CPU_ARM946ES
 338         default "arm1136" if CPU_ARM1136
 339         default "arm1176" if CPU_ARM1176
 340         default "armv7" if CPU_V7A
 341         default "armv7" if CPU_V7R
 342         default "armv7m" if CPU_V7M
 343         default "armv8" if ARM64
 344
 345 config SYS_ARM_ARCH
 346         int
 347         default 4 if CPU_ARM720T
 348         default 4 if CPU_ARM920T
 349         default 5 if CPU_ARM926EJS
 350         default 5 if CPU_ARM946ES
 351         default 6 if CPU_ARM1136
 352         default 6 if CPU_ARM1176
 353         default 7 if CPU_V7A
 354         default 7 if CPU_V7M
 355         default 7 if CPU_V7R
 356         default 8 if ARM64
 357
 358 choice
 359         prompt "Select the ARM data write cache policy"
 360         default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || RZA1
 361         default SYS_ARM_CACHE_WRITEBACK
 362
 363 config SYS_ARM_CACHE_WRITEBACK
 364         bool "Write-back (WB)"
 365         help
 366           A write updates the cache only and marks the cache line as dirty.
 367           External memory is updated only when the line is evicted or explicitly
 368           cleaned.
 369
 370 config SYS_ARM_CACHE_WRITETHROUGH
 371         bool "Write-through (WT)"
 372         help
 373           A write updates both the cache and the external memory system.
 374           This does not mark the cache line as dirty.
 375
 376 config SYS_ARM_CACHE_WRITEALLOC
 377         bool "Write allocation (WA)"
 378         help
 379           A cache line is allocated on a write miss. This means that executing a
 380           store instruction on the processor might cause a burst read to occur.
 381           There is a linefill to obtain the data for the cache line, before the
 382           write is performed.
 383 endchoice
 384
 385 config ARCH_VERY_EARLY_INIT
 386         bool
 387
 388 config SPL_ARCH_VERY_EARLY_INIT
 389         bool
 390
 391 config ARCH_CPU_INIT
 392         bool "Enable ARCH_CPU_INIT"
 393         help
 394           Some architectures require a call to arch_cpu_init().
 395           Say Y here to enable it
 396
 397 config SYS_ARCH_TIMER
 398         bool "ARM Generic Timer support"
 399         depends on CPU_V7A || ARM64
 400         default y if ARM64
 401         help
 402           The ARM Generic Timer (aka arch-timer) provides an architected
 403           interface to a timer source on an SoC.
 404           It is mandatory for ARMv8 implementation and widely available
 405           on ARMv7 systems.
 406
 407 config ARM_SMCCC
 408         bool "Support for ARM SMC Calling Convention (SMCCC)"
 409         depends on CPU_V7A || ARM64
 410         select ARM_PSCI_FW
 411         help
 412           Say Y here if you want to enable ARM SMC Calling Convention.
 413           This should be enabled if U-Boot needs to communicate with system
 414           firmware (for example, PSCI) according to SMCCC.
 415
 416 config SEMIHOSTING
 417         bool "Support ARM semihosting"
 418         help
 419           Semihosting is a method for a target to communicate with a host
 420           debugger. It uses special instructions which the debugger will trap
 421           on and interpret. This allows U-Boot to read/write files, print to
 422           the console, and execute arbitrary commands on the host system.
 423
 424           Enabling this option will add support for reading and writing files
 425           on the host system. If you don't have a debugger attached then trying
 426           to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
 427
 428 config SEMIHOSTING_FALLBACK
 429         bool "Recover gracefully when semihosting fails"
 430         depends on SEMIHOSTING && ARM64
 431         default y
 432         help
 433           Normally, if U-Boot makes a semihosting call and no debugger is
 434           attached, then it will panic due to a synchronous abort
 435           exception. This config adds an exception handler which will allow
 436           U-Boot to recover. Say 'y' if unsure.
 437
 438 config SPL_SEMIHOSTING
 439         bool "Support ARM semihosting in SPL"
 440         depends on SPL
 441         help
 442           Semihosting is a method for a target to communicate with a host
 443           debugger. It uses special instructions which the debugger will trap
 444           on and interpret. This allows U-Boot to read/write files, print to
 445           the console, and execute arbitrary commands on the host system.
 446
 447           Enabling this option will add support for reading and writing files
 448           on the host system. If you don't have a debugger attached then trying
 449           to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
 450
 451 config SPL_SEMIHOSTING_FALLBACK
 452         bool "Recover gracefully when semihosting fails in SPL"
 453         depends on SPL_SEMIHOSTING && ARM64
 454         select ARMV8_SPL_EXCEPTION_VECTORS
 455         default y
 456         help
 457           Normally, if U-Boot makes a semihosting call and no debugger is
 458           attached, then it will panic due to a synchronous abort
 459           exception. This config adds an exception handler which will allow
 460           U-Boot to recover. Say 'y' if unsure.
 461
 462 config SYS_THUMB_BUILD
 463         bool "Build U-Boot using the Thumb instruction set"
 464         depends on !ARM64
 465         help
 466            Use this flag to build U-Boot using the Thumb instruction set for
 467            ARM architectures. Thumb instruction set provides better code
 468            density. For ARM architectures that support Thumb2 this flag will
 469            result in Thumb2 code generated by GCC.
 470
 471 config SPL_SYS_THUMB_BUILD
 472         bool "Build SPL using the Thumb instruction set"
 473         default y if SYS_THUMB_BUILD
 474         depends on !ARM64 && SPL
 475         help
 476            Use this flag to build SPL using the Thumb instruction set for
 477            ARM architectures. Thumb instruction set provides better code
 478            density. For ARM architectures that support Thumb2 this flag will
 479            result in Thumb2 code generated by GCC.
 480
 481 config TPL_SYS_THUMB_BUILD
 482         bool "Build TPL using the Thumb instruction set"
 483         default y if SYS_THUMB_BUILD
 484         depends on TPL && !ARM64
 485         help
 486            Use this flag to build TPL using the Thumb instruction set for
 487            ARM architectures. Thumb instruction set provides better code
 488            density. For ARM architectures that support Thumb2 this flag will
 489            result in Thumb2 code generated by GCC.
 490
 491
 492 config SYS_L2CACHE_OFF
 493         bool "L2cache off"
 494         help
 495           If SoC does not support L2CACHE or one does not want to enable
 496           L2CACHE, choose this option.
 497
 498 config ENABLE_ARM_SOC_BOOT0_HOOK
 499         bool "prepare BOOT0 header"
 500         help
 501           If the SoC's BOOT0 requires a header area filled with (magic)
 502           values, then choose this option, and create a file included as
 503           <asm/arch/boot0.h> which contains the required assembler code.
 504
 505 config USE_ARCH_MEMCPY
 506         bool "Use an assembly optimized implementation of memcpy"
 507         default y if !ARM64
 508         depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
 509         help
 510           Enable the generation of an optimized version of memcpy.
 511           Such an implementation may be faster under some conditions
 512           but may increase the binary size.
 513
 514 config SPL_USE_ARCH_MEMCPY
 515         bool "Use an assembly optimized implementation of memcpy for SPL"
 516         default y if USE_ARCH_MEMCPY
 517         depends on SPL
 518         help
 519           Enable the generation of an optimized version of memcpy.
 520           Such an implementation may be faster under some conditions
 521           but may increase the binary size.
 522
 523 config TPL_USE_ARCH_MEMCPY
 524         bool "Use an assembly optimized implementation of memcpy for TPL"
 525         default y if USE_ARCH_MEMCPY
 526         depends on TPL
 527         help
 528           Enable the generation of an optimized version of memcpy.
 529           Such an implementation may be faster under some conditions
 530           but may increase the binary size.
 531
 532 config USE_ARCH_MEMMOVE
 533         bool "Use an assembly optimized implementation of memmove" if !ARM64
 534         default USE_ARCH_MEMCPY if ARM64
 535         depends on ARM64
 536         help
 537           Enable the generation of an optimized version of memmove.
 538           Such an implementation may be faster under some conditions
 539           but may increase the binary size.
 540
 541 config SPL_USE_ARCH_MEMMOVE
 542         bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
 543         default SPL_USE_ARCH_MEMCPY if ARM64
 544         depends on SPL && ARM64
 545         help
 546           Enable the generation of an optimized version of memmove.
 547           Such an implementation may be faster under some conditions
 548           but may increase the binary size.
 549
 550 config TPL_USE_ARCH_MEMMOVE
 551         bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
 552         default TPL_USE_ARCH_MEMCPY if ARM64
 553         depends on TPL && ARM64
 554         help
 555           Enable the generation of an optimized version of memmove.
 556           Such an implementation may be faster under some conditions
 557           but may increase the binary size.
 558
 559 config USE_ARCH_MEMSET
 560         bool "Use an assembly optimized implementation of memset"
 561         default y if !ARM64
 562         depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
 563         help
 564           Enable the generation of an optimized version of memset.
 565           Such an implementation may be faster under some conditions
 566           but may increase the binary size.
 567
 568 config SPL_USE_ARCH_MEMSET
 569         bool "Use an assembly optimized implementation of memset for SPL"
 570         default y if USE_ARCH_MEMSET
 571         depends on SPL
 572         help
 573           Enable the generation of an optimized version of memset.
 574           Such an implementation may be faster under some conditions
 575           but may increase the binary size.
 576
 577 config TPL_USE_ARCH_MEMSET
 578         bool "Use an assembly optimized implementation of memset for TPL"
 579         default y if USE_ARCH_MEMSET
 580         depends on TPL
 581         help
 582           Enable the generation of an optimized version of memset.
 583           Such an implementation may be faster under some conditions
 584           but may increase the binary size.
 585
 586 config ARM64_SUPPORT_AARCH32
 587         bool "ARM64 system support AArch32 execution state"
 588         depends on ARM64
 589         default y if !TARGET_THUNDERX_88XX
 590         help
 591           This ARM64 system supports AArch32 execution state.
 592
 593 config S5P
 594         def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
 595
 596 choice
 597         prompt "Target select"
 598         default TARGET_HIKEY
 599
 600 config ARCH_AT91
 601         bool "Atmel AT91"
 602         select GPIO_EXTRA_HEADER
 603         select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
 604         select SPL_SEPARATE_BSS if SPL
 605
 606 config ARCH_DAVINCI
 607         bool "TI DaVinci"
 608         select CPU_ARM926EJS
 609         select GPIO_EXTRA_HEADER
 610         select SPL_DM_SPI if SPL
 611         imply CMD_SAVES
 612         help
 613           Support for TI's DaVinci platform.
 614
 615 config ARCH_KIRKWOOD
 616         bool "Marvell Kirkwood"
 617         select ARCH_MISC_INIT
 618         select BOARD_EARLY_INIT_F
 619         select CPU_ARM926EJS
 620         select GPIO_EXTRA_HEADER
 621
 622 config ARCH_MVEBU
 623         bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
 624         select DM
 625         select DM_ETH
 626         select DM_SERIAL
 627         select DM_SPI
 628         select DM_SPI_FLASH
 629         select GPIO_EXTRA_HEADER
 630         select SPL_DM_SPI if SPL
 631         select SPL_DM_SPI_FLASH if SPL
 632         select OF_CONTROL
 633         select OF_SEPARATE
 634         select SPI
 635         imply CMD_DM
 636
 637 config ARCH_ORION5X
 638         bool "Marvell Orion"
 639         select CPU_ARM926EJS
 640         select GPIO_EXTRA_HEADER
 641         select SPL_SEPARATE_BSS if SPL
 642
 643 config TARGET_STV0991
 644         bool "Support stv0991"
 645         select CPU_V7A
 646         select DM
 647         select DM_SERIAL
 648         select DM_SPI
 649         select DM_SPI_FLASH
 650         select GPIO_EXTRA_HEADER
 651         select PL01X_SERIAL
 652         select SPI
 653         select SPI_FLASH
 654         imply CMD_DM
 655
 656 config ARCH_BCM283X
 657         bool "Broadcom BCM283X family"
 658         select DM
 659         select DM_GPIO
 660         select DM_SERIAL
 661         select GPIO_EXTRA_HEADER
 662         select OF_CONTROL
 663         select PL01X_SERIAL
 664         select SERIAL_SEARCH_ALL
 665         imply CMD_DM
 666         imply FAT_WRITE
 667
 668 config ARCH_BCM63158
 669         bool "Broadcom BCM63158 family"
 670         select DM
 671         select OF_CONTROL
 672         imply CMD_DM
 673
 674 config ARCH_BCM6753
 675         bool "Broadcom BCM6753 family"
 676         select CPU_V7A
 677         select DM
 678         select OF_CONTROL
 679         imply CMD_DM
 680
 681 config ARCH_BCM68360
 682         bool "Broadcom BCM68360 family"
 683         select DM
 684         select OF_CONTROL
 685         imply CMD_DM
 686
 687 config ARCH_BCM6858
 688         bool "Broadcom BCM6858 family"
 689         select DM
 690         select OF_CONTROL
 691         imply CMD_DM
 692
 693 config ARCH_BCMSTB
 694         bool "Broadcom BCM7XXX family"
 695         select CPU_V7A
 696         select DM
 697         select GPIO_EXTRA_HEADER
 698         select OF_CONTROL
 699         imply CMD_DM
 700         imply OF_HAS_PRIOR_STAGE
 701         help
 702           This enables support for Broadcom ARM-based set-top box
 703           chipsets, including the 7445 family of chips.
 704
 705 config ARCH_BCMBCA
 706         bool "Broadcom broadband chip family"
 707         select DM
 708         select OF_CONTROL
 709
 710 config TARGET_VEXPRESS_CA9X4
 711         bool "Support vexpress_ca9x4"
 712         select CPU_V7A
 713         select PL011_SERIAL
 714
 715 config TARGET_BCMCYGNUS
 716         bool "Support bcmcygnus"
 717         select CPU_V7A
 718         select GPIO_EXTRA_HEADER
 719         imply BCM_SF2_ETH
 720         imply BCM_SF2_ETH_GMAC
 721         imply CMD_HASH
 722         imply CRC32_VERIFY
 723         imply FAT_WRITE
 724         imply HASH_VERIFY
 725         imply NETDEVICES
 726
 727 config TARGET_BCMNS2
 728         bool "Support Broadcom Northstar2"
 729         select ARM64
 730         select GPIO_EXTRA_HEADER
 731         help
 732           Support for Broadcom Northstar 2 SoCs.  NS2 is a quad-core 64-bit
 733           ARMv8 Cortex-A57 processors targeting a broad range of networking
 734           applications.
 735
 736 config TARGET_BCMNS3
 737         bool "Support Broadcom NS3"
 738         select ARM64
 739         select BOARD_LATE_INIT
 740         help
 741           Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
 742           ARMv8 Cortex-A72 processors targeting a broad range of networking
 743           applications.
 744
 745 config ARCH_EXYNOS
 746         bool "Samsung EXYNOS"
 747         select DM
 748         select DM_GPIO
 749         select DM_I2C
 750         select DM_ETH
 751         select DM_KEYBOARD
 752         select DM_SERIAL
 753         select DM_SPI
 754         select DM_SPI_FLASH
 755         select SPI
 756         select GPIO_EXTRA_HEADER
 757         imply SYS_THUMB_BUILD
 758         imply CMD_DM
 759         imply FAT_WRITE
 760
 761 config ARCH_S5PC1XX
 762         bool "Samsung S5PC1XX"
 763         select CPU_V7A
 764         select DM
 765         select DM_GPIO
 766         select DM_I2C
 767         select DM_SERIAL
 768         select GPIO_EXTRA_HEADER
 769         imply CMD_DM
 770
 771 config ARCH_HIGHBANK
 772         bool "Calxeda Highbank"
 773         select CPU_V7A
 774         select PL01X_SERIAL
 775         select DM
 776         select DM_SERIAL
 777         select OF_CONTROL
 778         select CLK
 779         select CLK_CCF
 780         select AHCI
 781         select DM_ETH
 782         select PHYS_64BIT
 783         imply OF_HAS_PRIOR_STAGE
 784
 785 config ARCH_INTEGRATOR
 786         bool "ARM Ltd. Integrator family"
 787         select DM
 788         select DM_SERIAL
 789         select GPIO_EXTRA_HEADER
 790         select PL01X_SERIAL
 791         imply CMD_DM
 792
 793 config ARCH_IPQ40XX
 794         bool "Qualcomm IPQ40xx SoCs"
 795         select CPU_V7A
 796         select DM
 797         select DM_GPIO
 798         select DM_SERIAL
 799         select DM_RESET
 800         select GPIO_EXTRA_HEADER
 801         select MSM_SMEM
 802         select PINCTRL
 803         select CLK
 804         select SMEM
 805         select OF_CONTROL
 806         imply CMD_DM
 807
 808 config ARCH_KEYSTONE
 809         bool "TI Keystone"
 810         select CMD_POWEROFF
 811         select CPU_V7A
 812         select DDR_SPD
 813         select SUPPORT_SPL
 814         select SYS_ARCH_TIMER
 815         select SYS_THUMB_BUILD
 816         imply CMD_MTDPARTS
 817         imply CMD_SAVES
 818         imply FIT
 819
 820 config ARCH_K3
 821         bool "Texas Instruments' K3 Architecture"
 822         select SPL
 823         select SUPPORT_SPL
 824         select FIT
 825
 826 config ARCH_OMAP2PLUS
 827         bool "TI OMAP2+"
 828         select CPU_V7A
 829         select GPIO_EXTRA_HEADER
 830         select SPL_BOARD_INIT if SPL
 831         select SPL_STACK_R if SPL
 832         select SUPPORT_SPL
 833         imply TI_SYSC if DM && OF_CONTROL
 834         imply FIT
 835         imply DM_EVENT
 836         imply SPL_SEPARATE_BSS
 837
 838 config ARCH_MESON
 839         bool "Amlogic Meson"
 840         select GPIO_EXTRA_HEADER
 841         imply DISTRO_DEFAULTS
 842         imply DM_RNG
 843         help
 844           Support for the Meson SoC family developed by Amlogic Inc.,
 845           targeted at media players and tablet computers. We currently
 846           support the S905 (GXBaby) 64-bit SoC.
 847
 848 config ARCH_MEDIATEK
 849         bool "MediaTek SoCs"
 850         select DM
 851         select GPIO_EXTRA_HEADER
 852         select OF_CONTROL
 853         select SPL_DM if SPL
 854         select SPL_LIBCOMMON_SUPPORT if SPL
 855         select SPL_LIBGENERIC_SUPPORT if SPL
 856         select SPL_OF_CONTROL if SPL
 857         select SUPPORT_SPL
 858         help
 859           Support for the MediaTek SoCs family developed by MediaTek Inc.
 860           Please refer to doc/README.mediatek for more information.
 861
 862 config ARCH_LPC32XX
 863         bool "NXP LPC32xx platform"
 864         select CPU_ARM926EJS
 865         select DM
 866         select DM_GPIO
 867         select DM_SERIAL
 868         select GPIO_EXTRA_HEADER
 869         select SPL_DM if SPL
 870         select SUPPORT_SPL
 871         imply CMD_DM
 872
 873 config ARCH_IMX8
 874         bool "NXP i.MX8 platform"
 875         select ARM64
 876         select SYS_FSL_HAS_SEC
 877         select SYS_FSL_SEC_COMPAT_4
 878         select SYS_FSL_SEC_LE
 879         select DM
 880         select GPIO_EXTRA_HEADER
 881         select MACH_IMX
 882         select OF_CONTROL
 883         select ENABLE_ARM_SOC_BOOT0_HOOK
 884         imply DM_EVENT
 885
 886 config ARCH_IMX8M
 887         bool "NXP i.MX8M platform"
 888         select ARM64
 889         select GPIO_EXTRA_HEADER
 890         select MACH_IMX
 891         select SYS_FSL_HAS_SEC
 892         select SYS_FSL_SEC_COMPAT_4
 893         select SYS_FSL_SEC_LE
 894         select SYS_I2C_MXC
 895         select DM
 896         select SUPPORT_SPL
 897         imply CMD_DM
 898         imply DM_EVENT
 899
 900 config ARCH_IMX8ULP
 901         bool "NXP i.MX8ULP platform"
 902         select ARM64
 903         select DM
 904         select MACH_IMX
 905         select OF_CONTROL
 906         select SUPPORT_SPL
 907         select GPIO_EXTRA_HEADER
 908         select MISC
 909         select IMX_SENTINEL
 910         imply CMD_DM
 911         imply DM_EVENT
 912
 913 config ARCH_IMX9
 914         bool "NXP i.MX9 platform"
 915         select ARM64
 916         select DM
 917         select MACH_IMX
 918         select SUPPORT_SPL
 919         select GPIO_EXTRA_HEADER
 920         select MISC
 921         select IMX_SENTINEL
 922         imply CMD_DM
 923         imply DM_EVENT
 924
 925 config ARCH_IMXRT
 926         bool "NXP i.MXRT platform"
 927         select CPU_V7M
 928         select DM
 929         select DM_SERIAL
 930         select GPIO_EXTRA_HEADER
 931         select MACH_IMX
 932         select SUPPORT_SPL
 933         imply CMD_DM
 934
 935 config ARCH_MX23
 936         bool "NXP i.MX23 family"
 937         select CPU_ARM926EJS
 938         select GPIO_EXTRA_HEADER
 939         select MACH_IMX
 940         select PL011_SERIAL
 941         select SUPPORT_SPL
 942
 943 config ARCH_MX28
 944         bool "NXP i.MX28 family"
 945         select CPU_ARM926EJS
 946         select GPIO_EXTRA_HEADER
 947         select PL011_SERIAL
 948         select MACH_IMX
 949         select SUPPORT_SPL
 950
 951 config ARCH_MX31
 952         bool "NXP i.MX31 family"
 953         select CPU_ARM1136
 954         select GPIO_EXTRA_HEADER
 955         select MACH_IMX
 956
 957 config ARCH_MX7ULP
 958         bool "NXP MX7ULP"
 959         select BOARD_POSTCLK_INIT
 960         select CPU_V7A
 961         select GPIO_EXTRA_HEADER
 962         select MACH_IMX
 963         select SYS_FSL_HAS_SEC
 964         select SYS_FSL_SEC_COMPAT_4
 965         select SYS_FSL_SEC_LE
 966         select ROM_UNIFIED_SECTIONS
 967         imply MXC_GPIO
 968         imply SYS_THUMB_BUILD
 969
 970 config ARCH_MX7
 971         bool "Freescale MX7"
 972         select ARCH_MISC_INIT
 973         select CPU_V7A
 974         select GPIO_EXTRA_HEADER
 975         select MACH_IMX
 976         select SYS_FSL_HAS_SEC
 977         select SYS_FSL_SEC_COMPAT_4
 978         select SYS_FSL_SEC_LE
 979         imply BOARD_EARLY_INIT_F
 980         imply MXC_GPIO
 981         imply SYS_THUMB_BUILD
 982
 983 config ARCH_MX6
 984         bool "Freescale MX6"
 985         select BOARD_POSTCLK_INIT
 986         select CPU_V7A
 987         select GPIO_EXTRA_HEADER
 988         select MACH_IMX
 989         select SYS_FSL_HAS_SEC
 990         select SYS_FSL_SEC_COMPAT_4
 991         select SYS_FSL_SEC_LE
 992         imply MXC_GPIO
 993         imply SYS_THUMB_BUILD
 994         imply SPL_SEPARATE_BSS
 995
 996 config ARCH_MX5
 997         bool "Freescale MX5"
 998         select BOARD_EARLY_INIT_F
 999         select CPU_V7A
1000         select GPIO_EXTRA_HEADER
1001         select MACH_IMX
1002         imply MXC_GPIO
1003
1004 config ARCH_NEXELL
1005         bool "Nexell S5P4418/S5P6818 SoC"
1006         select ENABLE_ARM_SOC_BOOT0_HOOK
1007         select DM
1008         select GPIO_EXTRA_HEADER
1009
1010 config ARCH_NPCM
1011         bool "Support Nuvoton SoCs"
1012         select DM
1013         select OF_CONTROL
1014         imply CMD_DM
1015
1016 config ARCH_APPLE
1017         bool "Apple SoCs"
1018         select ARM64
1019         select BLK
1020         select CLK
1021         select CMD_USB
1022         select DM
1023         select DM_GPIO
1024         select DM_KEYBOARD
1025         select DM_MAILBOX
1026         select DM_RESET
1027         select DM_SERIAL
1028         select DM_SPI
1029         select DM_USB
1030         select DM_VIDEO
1031         select IOMMU
1032         select LINUX_KERNEL_IMAGE_HEADER
1033         select OF_BOARD_SETUP
1034         select OF_CONTROL
1035         select PINCTRL
1036         select POSITION_INDEPENDENT
1037         select POWER_DOMAIN
1038         select REGMAP
1039         select SPI
1040         select SYSCON
1041         select SYSRESET
1042         select SYSRESET_WATCHDOG
1043         select SYSRESET_WATCHDOG_AUTO
1044         select USB
1045         imply CMD_DM
1046         imply CMD_GPT
1047         imply DISTRO_DEFAULTS
1048         imply OF_HAS_PRIOR_STAGE
1049
1050 config ARCH_OWL
1051         bool "Actions Semi OWL SoCs"
1052         select DM
1053         select DM_ETH
1054         select DM_SERIAL
1055         select GPIO_EXTRA_HEADER
1056         select OWL_SERIAL
1057         select CLK
1058         select CLK_OWL
1059         select OF_CONTROL
1060         select SYS_RELOC_GD_ENV_ADDR
1061         imply CMD_DM
1062
1063 config ARCH_QEMU
1064         bool "QEMU Virtual Platform"
1065         select DM
1066         select DM_SERIAL
1067         select OF_CONTROL
1068         select PL01X_SERIAL
1069         imply CMD_DM
1070         imply DM_RNG
1071         imply DM_RTC
1072         imply RTC_PL031
1073         imply OF_HAS_PRIOR_STAGE
1074
1075 config ARCH_RMOBILE
1076         bool "Renesas ARM SoCs"
1077         select DM
1078         select DM_SERIAL
1079         select GPIO_EXTRA_HEADER
1080         imply BOARD_EARLY_INIT_F
1081         imply CMD_DM
1082         imply FAT_WRITE
1083         imply SYS_THUMB_BUILD
1084         imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1085
1086 config ARCH_SNAPDRAGON
1087         bool "Qualcomm Snapdragon SoCs"
1088         select ARM64
1089         select DM
1090         select DM_GPIO
1091         select DM_SERIAL
1092         select GPIO_EXTRA_HEADER
1093         select MSM_SMEM
1094         select OF_CONTROL
1095         select OF_SEPARATE
1096         select SMEM
1097         select SPMI
1098         imply CMD_DM
1099
1100 config ARCH_SOCFPGA
1101         bool "Altera SOCFPGA family"
1102         select ARCH_EARLY_INIT_R
1103         select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1104         select ARM64 if TARGET_SOCFPGA_SOC64
1105         select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1106         select DM
1107         select DM_SERIAL
1108         select GICV2
1109         select GPIO_EXTRA_HEADER
1110         select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1111         select OF_CONTROL
1112         select SPL_DM_RESET if DM_RESET
1113         select SPL_DM_SERIAL
1114         select SPL_LIBCOMMON_SUPPORT
1115         select SPL_LIBGENERIC_SUPPORT
1116         select SPL_OF_CONTROL
1117         select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1118         select SPL_SERIAL
1119         select SPL_SYSRESET
1120         select SPL_WATCHDOG
1121         select SUPPORT_SPL
1122         select SYS_NS16550
1123         select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1124         select SYSRESET
1125         select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1126         select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1127         imply CMD_DM
1128         imply CMD_MTDPARTS
1129         imply CRC32_VERIFY
1130         imply DM_SPI
1131         imply DM_SPI_FLASH
1132         imply FAT_WRITE
1133         imply SPL
1134         imply SPL_DM
1135         imply SPL_DM_SPI
1136         imply SPL_DM_SPI_FLASH
1137         imply SPL_LIBDISK_SUPPORT
1138         imply SPL_MMC
1139         imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1140         imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1141         imply SPL_SPI_FLASH_SUPPORT
1142         imply SPL_SPI
1143         imply L2X0_CACHE
1144
1145 config ARCH_SUNXI
1146         bool "Support sunxi (Allwinner) SoCs"
1147         select BINMAN
1148         select CMD_GPIO
1149         select CMD_MMC if MMC
1150         select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1151         select CLK
1152         select DM
1153         select DM_ETH
1154         select DM_GPIO
1155         select DM_I2C if I2C
1156         select DM_SPI if SPI
1157         select DM_SPI_FLASH if SPI
1158         select DM_KEYBOARD
1159         select DM_MMC if MMC
1160         select DM_SCSI if SCSI
1161         select DM_SERIAL
1162         select GPIO_EXTRA_HEADER
1163         select OF_BOARD_SETUP
1164         select OF_CONTROL
1165         select OF_SEPARATE
1166         select PINCTRL
1167         select SPECIFY_CONSOLE_INDEX
1168         select SPL_SEPARATE_BSS if SPL
1169         select SPL_STACK_R if SPL
1170         select SPL_SYS_MALLOC_SIMPLE if SPL
1171         select SPL_SYS_THUMB_BUILD if !ARM64
1172         select SUNXI_GPIO
1173         select SYS_NS16550
1174         select SYS_THUMB_BUILD if !ARM64
1175         select USB if DISTRO_DEFAULTS
1176         select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1177         select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1178         select SPL_USE_TINY_PRINTF
1179         select USE_PREBOOT
1180         select SYS_RELOC_GD_ENV_ADDR
1181         imply BOARD_LATE_INIT
1182         imply CMD_DM
1183         imply CMD_GPT
1184         imply CMD_UBI if MTD_RAW_NAND
1185         imply DISTRO_DEFAULTS
1186         imply FAT_WRITE
1187         imply FIT
1188         imply OF_LIBFDT_OVERLAY
1189         imply PRE_CONSOLE_BUFFER
1190         imply SPL_GPIO
1191         imply SPL_LIBCOMMON_SUPPORT
1192         imply SPL_LIBGENERIC_SUPPORT
1193         imply SPL_MMC if MMC
1194         imply SPL_POWER
1195         imply SPL_SERIAL
1196         imply SYSRESET
1197         imply SYSRESET_WATCHDOG
1198         imply SYSRESET_WATCHDOG_AUTO
1199         imply USB_GADGET
1200         imply WDT
1201
1202 config ARCH_U8500
1203         bool "ST-Ericsson U8500 Series"
1204         select CPU_V7A
1205         select DM
1206         select DM_GPIO
1207         select DM_MMC if MMC
1208         select DM_SERIAL
1209         select DM_USB_GADGET if DM_USB
1210         select OF_CONTROL
1211         select SYSRESET
1212         select TIMER
1213         imply AB8500_USB_PHY
1214         imply ARM_PL180_MMCI
1215         imply CLK
1216         imply DM_PMIC
1217         imply DM_RTC
1218         imply NOMADIK_GPIO
1219         imply NOMADIK_MTU_TIMER
1220         imply PHY
1221         imply PL01X_SERIAL
1222         imply PMIC_AB8500
1223         imply RTC_PL031
1224         imply SYS_THUMB_BUILD
1225         imply SYSRESET_SYSCON
1226
1227 config ARCH_VERSAL
1228         bool "Support Xilinx Versal Platform"
1229         select ARM64
1230         select CLK
1231         select DM
1232         select DM_ETH if NET
1233         select DM_MMC if MMC
1234         select DM_SERIAL
1235         select GICV3
1236         select OF_CONTROL
1237         select SOC_DEVICE
1238         imply BOARD_LATE_INIT
1239         imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1240
1241 config ARCH_VF610
1242         bool "Freescale Vybrid"
1243         select CPU_V7A
1244         select GPIO_EXTRA_HEADER
1245         select MACH_IMX
1246         select SYS_FSL_ERRATUM_ESDHC111
1247         imply CMD_MTDPARTS
1248         imply MTD_RAW_NAND
1249
1250 config ARCH_ZYNQ
1251         bool "Xilinx Zynq based platform"
1252         select CLK
1253         select CLK_ZYNQ
1254         select CPU_V7A
1255         select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1256         select DM
1257         select DM_ETH if NET
1258         select DM_MMC if MMC
1259         select DM_SERIAL
1260         select DM_SPI
1261         select DM_SPI_FLASH
1262         select OF_CONTROL
1263         select SPI
1264         select SPL_BOARD_INIT if SPL
1265         select SPL_CLK if SPL
1266         select SPL_DM if SPL
1267         select SPL_DM_SPI if SPL
1268         select SPL_DM_SPI_FLASH if SPL
1269         select SPL_OF_CONTROL if SPL
1270         select SPL_SEPARATE_BSS if SPL
1271         select SUPPORT_SPL
1272         imply ARCH_EARLY_INIT_R
1273         imply BOARD_LATE_INIT
1274         imply CMD_CLK
1275         imply CMD_DM
1276         imply CMD_SPL
1277         imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1278         imply FAT_WRITE
1279
1280 config ARCH_ZYNQMP_R5
1281         bool "Xilinx ZynqMP R5 based platform"
1282         select CLK
1283         select CPU_V7R
1284         select DM
1285         select DM_ETH if NET
1286         select DM_MMC if MMC
1287         select DM_SERIAL
1288         select OF_CONTROL
1289         imply CMD_DM
1290         imply DM_USB_GADGET
1291
1292 config ARCH_ZYNQMP
1293         bool "Xilinx ZynqMP based platform"
1294         select ARM64
1295         select CLK
1296         select DM
1297         select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1298         select DM_ETH if NET
1299         select DM_MAILBOX
1300         select DM_MMC if MMC
1301         select DM_SERIAL
1302         select DM_SPI if SPI
1303         select DM_SPI_FLASH if DM_SPI
1304         imply FIRMWARE
1305         select GICV2
1306         select OF_CONTROL
1307         select SPL_BOARD_INIT if SPL
1308         select SPL_CLK if SPL
1309         select SPL_DM if SPL
1310         select SPL_DM_SPI if SPI && SPL_DM
1311         select SPL_DM_SPI_FLASH if SPL_DM_SPI
1312         select SPL_DM_MAILBOX if SPL
1313         imply SPL_FIRMWARE if SPL
1314         select SPL_SEPARATE_BSS if SPL
1315         select SUPPORT_SPL
1316         select ZYNQMP_IPI
1317         select SOC_DEVICE
1318         imply BOARD_LATE_INIT
1319         imply CMD_DM
1320         imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1321         imply FAT_WRITE
1322         imply MP
1323         imply DM_USB_GADGET
1324         imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1325
1326 config ARCH_TEGRA
1327         bool "NVIDIA Tegra"
1328         select GPIO_EXTRA_HEADER
1329         imply DISTRO_DEFAULTS
1330         imply FAT_WRITE
1331
1332 config ARCH_VEXPRESS64
1333         bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1334         select ARM64
1335         select DM
1336         select DM_SERIAL
1337         select PL01X_SERIAL
1338         select OF_CONTROL
1339         select CLK
1340         select BLK
1341         select MTD_NOR_FLASH if MTD
1342         select FLASH_CFI_DRIVER if MTD
1343         select ENV_IS_IN_FLASH if MTD
1344         imply DISTRO_DEFAULTS
1345
1346 config TARGET_CORSTONE1000
1347         bool "Support Corstone1000 Platform"
1348         select ARM64
1349         select PL01X_SERIAL
1350         select DM
1351
1352 config TARGET_TOTAL_COMPUTE
1353         bool "Support Total Compute Platform"
1354         select ARM64
1355         select PL01X_SERIAL
1356         select DM
1357         select DM_SERIAL
1358         select DM_MMC
1359         select DM_GPIO
1360
1361 config TARGET_LS2080A_EMU
1362         bool "Support ls2080a_emu"
1363         select ARCH_LS2080A
1364         select ARM64
1365         select ARMV8_MULTIENTRY
1366         select FSL_DDR_SYNC_REFRESH
1367         select GPIO_EXTRA_HEADER
1368         help
1369           Support for Freescale LS2080A_EMU platform.
1370           The LS2080A Development System (EMULATOR) is a pre-silicon
1371           development platform that supports the QorIQ LS2080A
1372           Layerscape Architecture processor.
1373
1374 config TARGET_LS1088AQDS
1375         bool "Support ls1088aqds"
1376         select ARCH_LS1088A
1377         select ARM64
1378         select ARMV8_MULTIENTRY
1379         select ARCH_SUPPORT_TFABOOT
1380         select BOARD_LATE_INIT
1381         select GPIO_EXTRA_HEADER
1382         select SUPPORT_SPL
1383         select FSL_DDR_INTERACTIVE if !SD_BOOT
1384         help
1385           Support for NXP LS1088AQDS platform.
1386           The LS1088A Development System (QDS) is a high-performance
1387           development platform that supports the QorIQ LS1088A
1388           Layerscape Architecture processor.
1389
1390 config TARGET_LS2080AQDS
1391         bool "Support ls2080aqds"
1392         select ARCH_LS2080A
1393         select ARM64
1394         select ARMV8_MULTIENTRY
1395         select ARCH_SUPPORT_TFABOOT
1396         select BOARD_LATE_INIT
1397         select GPIO_EXTRA_HEADER
1398         select SUPPORT_SPL
1399         imply SCSI
1400         imply SCSI_AHCI
1401         select FSL_DDR_BIST
1402         select FSL_DDR_INTERACTIVE if !SPL
1403         help
1404           Support for Freescale LS2080AQDS platform.
1405           The LS2080A Development System (QDS) is a high-performance
1406           development platform that supports the QorIQ LS2080A
1407           Layerscape Architecture processor.
1408
1409 config TARGET_LS2080ARDB
1410         bool "Support ls2080ardb"
1411         select ARCH_LS2080A
1412         select ARM64
1413         select ARMV8_MULTIENTRY
1414         select ARCH_SUPPORT_TFABOOT
1415         select BOARD_LATE_INIT
1416         select SUPPORT_SPL
1417         select FSL_DDR_BIST
1418         select FSL_DDR_INTERACTIVE if !SPL
1419         select GPIO_EXTRA_HEADER
1420         imply SCSI
1421         imply SCSI_AHCI
1422         help
1423           Support for Freescale LS2080ARDB platform.
1424           The LS2080A Reference design board (RDB) is a high-performance
1425           development platform that supports the QorIQ LS2080A
1426           Layerscape Architecture processor.
1427
1428 config TARGET_LS2081ARDB
1429         bool "Support ls2081ardb"
1430         select ARCH_LS2080A
1431         select ARM64
1432         select ARMV8_MULTIENTRY
1433         select BOARD_LATE_INIT
1434         select GPIO_EXTRA_HEADER
1435         select SUPPORT_SPL
1436         help
1437           Support for Freescale LS2081ARDB platform.
1438           The LS2081A Reference design board (RDB) is a high-performance
1439           development platform that supports the QorIQ LS2081A/LS2041A
1440           Layerscape Architecture processor.
1441
1442 config TARGET_LX2160ARDB
1443         bool "Support lx2160ardb"
1444         select ARCH_LX2160A
1445         select ARM64
1446         select ARMV8_MULTIENTRY
1447         select ARCH_SUPPORT_TFABOOT
1448         select BOARD_LATE_INIT
1449         select GPIO_EXTRA_HEADER
1450         help
1451           Support for NXP LX2160ARDB platform.
1452           The lx2160ardb (LX2160A Reference design board (RDB)
1453           is a high-performance development platform that supports the
1454           QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1455
1456 config TARGET_LX2160AQDS
1457         bool "Support lx2160aqds"
1458         select ARCH_LX2160A
1459         select ARM64
1460         select ARMV8_MULTIENTRY
1461         select ARCH_SUPPORT_TFABOOT
1462         select BOARD_LATE_INIT
1463         select GPIO_EXTRA_HEADER
1464         help
1465           Support for NXP LX2160AQDS platform.
1466           The lx2160aqds (LX2160A QorIQ Development System (QDS)
1467           is a high-performance development platform that supports the
1468           QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1469
1470 config TARGET_LX2162AQDS
1471         bool "Support lx2162aqds"
1472         select ARCH_LX2162A
1473         select ARCH_MISC_INIT
1474         select ARM64
1475         select ARMV8_MULTIENTRY
1476         select ARCH_SUPPORT_TFABOOT
1477         select BOARD_LATE_INIT
1478         select GPIO_EXTRA_HEADER
1479         help
1480           Support for NXP LX2162AQDS platform.
1481           The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1482
1483 config TARGET_HIKEY
1484         bool "Support HiKey 96boards Consumer Edition Platform"
1485         select ARM64
1486         select DM
1487         select DM_GPIO
1488         select DM_SERIAL
1489         select GPIO_EXTRA_HEADER
1490         select OF_CONTROL
1491         select PL01X_SERIAL
1492         select SPECIFY_CONSOLE_INDEX
1493         imply CMD_DM
1494           help
1495           Support for HiKey 96boards platform. It features a HI6220
1496           SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1497
1498 config TARGET_HIKEY960
1499         bool "Support HiKey960 96boards Consumer Edition Platform"
1500         select ARM64
1501         select DM
1502         select DM_SERIAL
1503         select GPIO_EXTRA_HEADER
1504         select OF_CONTROL
1505         select PL01X_SERIAL
1506         imply CMD_DM
1507           help
1508           Support for HiKey960 96boards platform. It features a HI3660
1509           SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1510
1511 config TARGET_POPLAR
1512         bool "Support Poplar 96boards Enterprise Edition Platform"
1513         select ARM64
1514         select DM
1515         select DM_SERIAL
1516         select GPIO_EXTRA_HEADER
1517         select OF_CONTROL
1518         select PL01X_SERIAL
1519         imply CMD_DM
1520           help
1521           Support for Poplar 96boards EE platform. It features a HI3798cv200
1522           SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1523           making it capable of running any commercial set-top solution based on
1524           Linux or Android.
1525
1526 config TARGET_LS1012AQDS
1527         bool "Support ls1012aqds"
1528         select ARCH_LS1012A
1529         select ARM64
1530         select ARCH_SUPPORT_TFABOOT
1531         select BOARD_LATE_INIT
1532         select GPIO_EXTRA_HEADER
1533         help
1534           Support for Freescale LS1012AQDS platform.
1535           The LS1012A Development System (QDS) is a high-performance
1536           development platform that supports the QorIQ LS1012A
1537           Layerscape Architecture processor.
1538
1539 config TARGET_LS1012ARDB
1540         bool "Support ls1012ardb"
1541         select ARCH_LS1012A
1542         select ARM64
1543         select ARCH_SUPPORT_TFABOOT
1544         select BOARD_LATE_INIT
1545         select GPIO_EXTRA_HEADER
1546         imply SCSI
1547         imply SCSI_AHCI
1548         help
1549           Support for Freescale LS1012ARDB platform.
1550           The LS1012A Reference design board (RDB) is a high-performance
1551           development platform that supports the QorIQ LS1012A
1552           Layerscape Architecture processor.
1553
1554 config TARGET_LS1012A2G5RDB
1555         bool "Support ls1012a2g5rdb"
1556         select ARCH_LS1012A
1557         select ARM64
1558         select ARCH_SUPPORT_TFABOOT
1559         select BOARD_LATE_INIT
1560         select GPIO_EXTRA_HEADER
1561         imply SCSI
1562         help
1563           Support for Freescale LS1012A2G5RDB platform.
1564           The LS1012A 2G5 Reference design board (RDB) is a high-performance
1565           development platform that supports the QorIQ LS1012A
1566           Layerscape Architecture processor.
1567
1568 config TARGET_LS1012AFRWY
1569         bool "Support ls1012afrwy"
1570         select ARCH_LS1012A
1571         select ARM64
1572         select ARCH_SUPPORT_TFABOOT
1573         select BOARD_LATE_INIT
1574         select GPIO_EXTRA_HEADER
1575         imply SCSI
1576         imply SCSI_AHCI
1577         help
1578          Support for Freescale LS1012AFRWY platform.
1579          The LS1012A FRWY board (FRWY) is a high-performance
1580          development platform that supports the QorIQ LS1012A
1581          Layerscape Architecture processor.
1582
1583 config TARGET_LS1012AFRDM
1584         bool "Support ls1012afrdm"
1585         select ARCH_LS1012A
1586         select ARM64
1587         select ARCH_SUPPORT_TFABOOT
1588         select GPIO_EXTRA_HEADER
1589         help
1590           Support for Freescale LS1012AFRDM platform.
1591           The LS1012A Freedom  board (FRDM) is a high-performance
1592           development platform that supports the QorIQ LS1012A
1593           Layerscape Architecture processor.
1594
1595 config TARGET_LS1028AQDS
1596         bool "Support ls1028aqds"
1597         select ARCH_LS1028A
1598         select ARM64
1599         select ARMV8_MULTIENTRY
1600         select ARCH_SUPPORT_TFABOOT
1601         select BOARD_LATE_INIT
1602         select GPIO_EXTRA_HEADER
1603         help
1604           Support for Freescale LS1028AQDS platform
1605           The LS1028A Development System (QDS) is a high-performance
1606           development platform that supports the QorIQ LS1028A
1607           Layerscape Architecture processor.
1608
1609 config TARGET_LS1028ARDB
1610         bool "Support ls1028ardb"
1611         select ARCH_LS1028A
1612         select ARM64
1613         select ARMV8_MULTIENTRY
1614         select ARCH_SUPPORT_TFABOOT
1615         select BOARD_LATE_INIT
1616         select GPIO_EXTRA_HEADER
1617         help
1618           Support for Freescale LS1028ARDB platform
1619           The LS1028A Development System (RDB) is a high-performance
1620           development platform that supports the QorIQ LS1028A
1621           Layerscape Architecture processor.
1622
1623 config TARGET_LS1088ARDB
1624         bool "Support ls1088ardb"
1625         select ARCH_LS1088A
1626         select ARM64
1627         select ARMV8_MULTIENTRY
1628         select ARCH_SUPPORT_TFABOOT
1629         select BOARD_LATE_INIT
1630         select SUPPORT_SPL
1631         select FSL_DDR_INTERACTIVE if !SD_BOOT
1632         select GPIO_EXTRA_HEADER
1633         help
1634           Support for NXP LS1088ARDB platform.
1635           The LS1088A Reference design board (RDB) is a high-performance
1636           development platform that supports the QorIQ LS1088A
1637           Layerscape Architecture processor.
1638
1639 config TARGET_LS1021AQDS
1640         bool "Support ls1021aqds"
1641         select ARCH_LS1021A
1642         select ARCH_SUPPORT_PSCI
1643         select BOARD_EARLY_INIT_F
1644         select BOARD_LATE_INIT
1645         select CPU_V7A
1646         select CPU_V7_HAS_NONSEC
1647         select CPU_V7_HAS_VIRT
1648         select LS1_DEEP_SLEEP
1649         select SUPPORT_SPL
1650         select SYS_FSL_DDR
1651         select FSL_DDR_INTERACTIVE
1652         select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1653         select GPIO_EXTRA_HEADER
1654         select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1655         imply SCSI
1656
1657 config TARGET_LS1021ATWR
1658         bool "Support ls1021atwr"
1659         select ARCH_LS1021A
1660         select ARCH_SUPPORT_PSCI
1661         select BOARD_EARLY_INIT_F
1662         select BOARD_LATE_INIT
1663         select CPU_V7A
1664         select CPU_V7_HAS_NONSEC
1665         select CPU_V7_HAS_VIRT
1666         select LS1_DEEP_SLEEP
1667         select SUPPORT_SPL
1668         select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1669         select GPIO_EXTRA_HEADER
1670         imply SCSI
1671
1672 config TARGET_PG_WCOM_SELI8
1673         bool "Support Hitachi-Powergrids SELI8 service unit card"
1674         select ARCH_LS1021A
1675         select ARCH_SUPPORT_PSCI
1676         select BOARD_EARLY_INIT_F
1677         select BOARD_LATE_INIT
1678         select CPU_V7A
1679         select CPU_V7_HAS_NONSEC
1680         select CPU_V7_HAS_VIRT
1681         select SYS_FSL_DDR
1682         select FSL_DDR_INTERACTIVE
1683         select GPIO_EXTRA_HEADER
1684         select VENDOR_KM
1685         imply SCSI
1686         help
1687          Support for Hitachi-Powergrids SELI8 service unit card.
1688          SELI8 is a QorIQ LS1021a based service unit card used
1689          in XMC20 and FOX615 product families.
1690
1691 config TARGET_PG_WCOM_EXPU1
1692         bool "Support Hitachi-Powergrids EXPU1 service unit card"
1693         select ARCH_LS1021A
1694         select ARCH_SUPPORT_PSCI
1695         select BOARD_EARLY_INIT_F
1696         select BOARD_LATE_INIT
1697         select CPU_V7A
1698         select CPU_V7_HAS_NONSEC
1699         select CPU_V7_HAS_VIRT
1700         select SYS_FSL_DDR
1701         select FSL_DDR_INTERACTIVE
1702         select VENDOR_KM
1703         imply SCSI
1704         help
1705          Support for Hitachi-Powergrids EXPU1 service unit card.
1706          EXPU1 is a QorIQ LS1021a based service unit card used
1707          in XMC20 and FOX615 product families.
1708
1709 config TARGET_LS1021ATSN
1710         bool "Support ls1021atsn"
1711         select ARCH_LS1021A
1712         select ARCH_SUPPORT_PSCI
1713         select BOARD_EARLY_INIT_F
1714         select BOARD_LATE_INIT
1715         select CPU_V7A
1716         select CPU_V7_HAS_NONSEC
1717         select CPU_V7_HAS_VIRT
1718         select LS1_DEEP_SLEEP
1719         select SUPPORT_SPL
1720         select GPIO_EXTRA_HEADER
1721         imply SCSI
1722
1723 config TARGET_LS1021AIOT
1724         bool "Support ls1021aiot"
1725         select ARCH_LS1021A
1726         select ARCH_SUPPORT_PSCI
1727         select BOARD_LATE_INIT
1728         select CPU_V7A
1729         select CPU_V7_HAS_NONSEC
1730         select CPU_V7_HAS_VIRT
1731         select SUPPORT_SPL
1732         select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1733         select GPIO_EXTRA_HEADER
1734         imply SCSI
1735         help
1736           Support for Freescale LS1021AIOT platform.
1737           The LS1021A Freescale board (IOT) is a high-performance
1738           development platform that supports the QorIQ LS1021A
1739           Layerscape Architecture processor.
1740
1741 config TARGET_LS1043AQDS
1742         bool "Support ls1043aqds"
1743         select ARCH_LS1043A
1744         select ARM64
1745         select ARMV8_MULTIENTRY
1746         select ARCH_SUPPORT_TFABOOT
1747         select BOARD_EARLY_INIT_F
1748         select BOARD_LATE_INIT
1749         select SUPPORT_SPL
1750         select FSL_DDR_INTERACTIVE if !SPL
1751         select FSL_DSPI if !SPL_NO_DSPI
1752         select DM_SPI_FLASH if FSL_DSPI
1753         select GPIO_EXTRA_HEADER
1754         imply SCSI
1755         imply SCSI_AHCI
1756         help
1757           Support for Freescale LS1043AQDS platform.
1758
1759 config TARGET_LS1043ARDB
1760         bool "Support ls1043ardb"
1761         select ARCH_LS1043A
1762         select ARM64
1763         select ARMV8_MULTIENTRY
1764         select ARCH_SUPPORT_TFABOOT
1765         select BOARD_EARLY_INIT_F
1766         select BOARD_LATE_INIT
1767         select SUPPORT_SPL
1768         select FSL_DSPI if !SPL_NO_DSPI
1769         select DM_SPI_FLASH if FSL_DSPI
1770         select GPIO_EXTRA_HEADER
1771         help
1772           Support for Freescale LS1043ARDB platform.
1773
1774 config TARGET_LS1046AQDS
1775         bool "Support ls1046aqds"
1776         select ARCH_LS1046A
1777         select ARM64
1778         select ARMV8_MULTIENTRY
1779         select ARCH_SUPPORT_TFABOOT
1780         select BOARD_EARLY_INIT_F
1781         select BOARD_LATE_INIT
1782         select DM_SPI_FLASH if DM_SPI
1783         select SUPPORT_SPL
1784         select FSL_DDR_BIST if !SPL
1785         select FSL_DDR_INTERACTIVE  if !SPL
1786         select FSL_DDR_INTERACTIVE if !SPL
1787         select GPIO_EXTRA_HEADER
1788         imply SCSI
1789         help
1790           Support for Freescale LS1046AQDS platform.
1791           The LS1046A Development System (QDS) is a high-performance
1792           development platform that supports the QorIQ LS1046A
1793           Layerscape Architecture processor.
1794
1795 config TARGET_LS1046ARDB
1796         bool "Support ls1046ardb"
1797         select ARCH_LS1046A
1798         select ARM64
1799         select ARMV8_MULTIENTRY
1800         select ARCH_SUPPORT_TFABOOT
1801         select BOARD_EARLY_INIT_F
1802         select BOARD_LATE_INIT
1803         select DM_SPI_FLASH if DM_SPI
1804         select POWER_MC34VR500
1805         select SUPPORT_SPL
1806         select FSL_DDR_BIST
1807         select FSL_DDR_INTERACTIVE if !SPL
1808         select GPIO_EXTRA_HEADER
1809         imply SCSI
1810         help
1811           Support for Freescale LS1046ARDB platform.
1812           The LS1046A Reference Design Board (RDB) is a high-performance
1813           development platform that supports the QorIQ LS1046A
1814           Layerscape Architecture processor.
1815
1816 config TARGET_LS1046AFRWY
1817         bool "Support ls1046afrwy"
1818         select ARCH_LS1046A
1819         select ARM64
1820         select ARMV8_MULTIENTRY
1821         select ARCH_SUPPORT_TFABOOT
1822         select BOARD_EARLY_INIT_F
1823         select BOARD_LATE_INIT
1824         select DM_SPI_FLASH if DM_SPI
1825         select GPIO_EXTRA_HEADER
1826         imply SCSI
1827         help
1828           Support for Freescale LS1046AFRWY platform.
1829           The LS1046A Freeway Board (FRWY) is a high-performance
1830           development platform that supports the QorIQ LS1046A
1831           Layerscape Architecture processor.
1832
1833 config TARGET_SL28
1834         bool "Support sl28"
1835         select ARCH_LS1028A
1836         select ARM64
1837         select ARMV8_MULTIENTRY
1838         select SUPPORT_SPL
1839         select BINMAN
1840         select DM
1841         select DM_GPIO
1842         select DM_I2C
1843         select DM_MMC
1844         select DM_SPI_FLASH
1845         select DM_ETH
1846         select DM_MDIO
1847         select PCI
1848         select DM_RNG
1849         select DM_RTC
1850         select DM_SCSI
1851         select DM_SERIAL
1852         select DM_SPI
1853         select GPIO_EXTRA_HEADER
1854         select SPL_DM if SPL
1855         select SPL_DM_SPI if SPL
1856         select SPL_DM_SPI_FLASH if SPL
1857         select SPL_DM_I2C if SPL
1858         select SPL_DM_MMC if SPL
1859         select SPL_DM_SERIAL if SPL
1860         help
1861           Support for Kontron SMARC-sAL28 board.
1862
1863 config TARGET_TEN64
1864         bool "Support ten64"
1865         select ARCH_LS1088A
1866         select ARCH_MISC_INIT
1867         select ARM64
1868         select ARMV8_MULTIENTRY
1869         select ARCH_SUPPORT_TFABOOT
1870         select BOARD_LATE_INIT
1871         select SUPPORT_SPL
1872         select FSL_DDR_INTERACTIVE if !SD_BOOT
1873         select GPIO_EXTRA_HEADER
1874         help
1875           Support for Traverse Technologies Ten64 board, based
1876           on NXP LS1088A.
1877
1878 config ARCH_UNIPHIER
1879         bool "Socionext UniPhier SoCs"
1880         select BOARD_LATE_INIT
1881         select DM
1882         select DM_ETH
1883         select DM_GPIO
1884         select DM_I2C
1885         select DM_MMC
1886         select DM_MTD
1887         select DM_RESET
1888         select DM_SERIAL
1889         select OF_BOARD_SETUP
1890         select OF_CONTROL
1891         select OF_LIBFDT
1892         select PINCTRL
1893         select SPL_BOARD_INIT if SPL
1894         select SPL_DM if SPL
1895         select SPL_LIBCOMMON_SUPPORT if SPL
1896         select SPL_LIBGENERIC_SUPPORT if SPL
1897         select SPL_OF_CONTROL if SPL
1898         select SPL_PINCTRL if SPL
1899         select SUPPORT_SPL
1900         imply CMD_DM
1901         imply DISTRO_DEFAULTS
1902         imply FAT_WRITE
1903         help
1904           Support for UniPhier SoC family developed by Socionext Inc.
1905           (formerly, System LSI Business Division of Panasonic Corporation)
1906
1907 config ARCH_SYNQUACER
1908         bool "Socionext SynQuacer SoCs"
1909         select ARM64
1910         select DM
1911         select GIC_V3
1912         select PSCI_RESET
1913         select SYSRESET
1914         select SYSRESET_PSCI
1915         select OF_CONTROL
1916         help
1917           Support for SynQuacer SoC family developed by Socionext Inc.
1918           This SoC is used on 96boards EE DeveloperBox.
1919
1920 config ARCH_STM32
1921         bool "Support STMicroelectronics STM32 MCU with cortex M"
1922         select CPU_V7M
1923         select DM
1924         select DM_SERIAL
1925         imply CMD_DM
1926
1927 config ARCH_STI
1928         bool "Support STMicroelectronics SoCs"
1929         select BLK
1930         select CPU_V7A
1931         select DM
1932         select DM_MMC
1933         select DM_RESET
1934         select DM_SERIAL
1935         imply CMD_DM
1936         help
1937           Support for STMicroelectronics STiH407/10 SoC family.
1938           This SoC is used on Linaro 96Board STiH410-B2260
1939
1940 config ARCH_STM32MP
1941         bool "Support STMicroelectronics STM32MP Socs with cortex A"
1942         select ARCH_MISC_INIT
1943         select ARCH_SUPPORT_TFABOOT
1944         select BOARD_LATE_INIT
1945         select CLK
1946         select DM
1947         select DM_GPIO
1948         select DM_RESET
1949         select DM_SERIAL
1950         select MISC
1951         select OF_CONTROL
1952         select OF_LIBFDT
1953         select OF_SYSTEM_SETUP
1954         select PINCTRL
1955         select REGMAP
1956         select SYSCON
1957         select SYSRESET
1958         select SYS_THUMB_BUILD
1959         imply SPL_SYSRESET
1960         imply CMD_DM
1961         imply CMD_POWEROFF
1962         imply OF_LIBFDT_OVERLAY
1963         imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1964         imply USE_PREBOOT
1965         imply TIMESTAMP
1966         help
1967           Support for STM32MP SoC family developed by STMicroelectronics,
1968           MPUs based on ARM cortex A core
1969           U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1970           FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1971           chain.
1972           SPL is the unsecure FSBL for the basic boot chain.
1973
1974 config ARCH_ROCKCHIP
1975         bool "Support Rockchip SoCs"
1976         select BLK
1977         select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1978         select DM
1979         select DM_GPIO
1980         select DM_I2C
1981         select DM_MMC
1982         select DM_PWM
1983         select DM_REGULATOR
1984         select DM_SERIAL
1985         select DM_SPI
1986         select DM_SPI_FLASH
1987         select ENABLE_ARM_SOC_BOOT0_HOOK
1988         select OF_CONTROL
1989         select SPI
1990         select SPL_DM if SPL
1991         select SPL_DM_SPI if SPL
1992         select SPL_DM_SPI_FLASH if SPL
1993         select SYS_MALLOC_F
1994         select SYS_THUMB_BUILD if !ARM64
1995         imply ADC
1996         imply CMD_DM
1997         imply DEBUG_UART_BOARD_INIT
1998         imply DISTRO_DEFAULTS
1999         imply FAT_WRITE
2000         imply SARADC_ROCKCHIP
2001         imply SPL_SYSRESET
2002         imply SPL_SYS_MALLOC_SIMPLE
2003         imply SYS_NS16550
2004         imply TPL_SYSRESET
2005         imply USB_FUNCTION_FASTBOOT
2006
2007 config ARCH_OCTEONTX
2008         bool "Support OcteonTX SoCs"
2009         select CLK
2010         select DM
2011         select GPIO_EXTRA_HEADER
2012         select ARM64
2013         select OF_CONTROL
2014         select OF_LIVE
2015         select BOARD_LATE_INIT
2016         select SYS_CACHE_SHIFT_7
2017         select SYS_PCI_64BIT if PCI
2018         imply OF_HAS_PRIOR_STAGE
2019
2020 config ARCH_OCTEONTX2
2021         bool "Support OcteonTX2 SoCs"
2022         select CLK
2023         select DM
2024         select GPIO_EXTRA_HEADER
2025         select ARM64
2026         select OF_CONTROL
2027         select OF_LIVE
2028         select BOARD_LATE_INIT
2029         select SYS_CACHE_SHIFT_7
2030         select SYS_PCI_64BIT if PCI
2031         imply OF_HAS_PRIOR_STAGE
2032
2033 config TARGET_THUNDERX_88XX
2034         bool "Support ThunderX 88xx"
2035         select ARM64
2036         select GPIO_EXTRA_HEADER
2037         select OF_CONTROL
2038         select PL01X_SERIAL
2039         select SYS_CACHE_SHIFT_7
2040
2041 config ARCH_ASPEED
2042         bool "Support Aspeed SoCs"
2043         select DM
2044         select OF_CONTROL
2045         imply CMD_DM
2046
2047 config TARGET_DURIAN
2048         bool "Support Phytium Durian Platform"
2049         select ARM64
2050         select GPIO_EXTRA_HEADER
2051         help
2052           Support for durian platform.
2053           It has 2GB Sdram, uart and pcie.
2054
2055 config TARGET_POMELO
2056         bool "Support Phytium Pomelo Platform"
2057         select ARM64
2058         select DM
2059         select AHCI
2060         select SCSI_AHCI
2061         select AHCI_PCI
2062         select BLK
2063         select PCI
2064         select DM_PCI
2065         select SCSI
2066         select DM_SCSI
2067         select DM_SERIAL
2068         select DM_ETH if NET
2069         imply CMD_PCI
2070         help
2071            Support for pomelo platform.
2072            It has 8GB Sdram, uart and pcie.
2073
2074 config TARGET_PRESIDIO_ASIC
2075         bool "Support Cortina Presidio ASIC Platform"
2076         select ARM64
2077         select GICV2
2078
2079 config TARGET_XENGUEST_ARM64
2080         bool "Xen guest ARM64"
2081         select ARM64
2082         select XEN
2083         select OF_CONTROL
2084         select LINUX_KERNEL_IMAGE_HEADER
2085         select XEN_SERIAL
2086         select SSCANF
2087         imply OF_HAS_PRIOR_STAGE
2088
2089 config ARCH_GXP
2090         bool "Support HPE GXP SoCs"
2091         select DM
2092         select OF_CONTROL
2093         imply CMD_DM
2094
2095 endchoice
2096
2097 config SUPPORT_PASSING_ATAGS
2098         bool "Support pre-devicetree ATAG-based booting"
2099         depends on !ARM64
2100         imply SETUP_MEMORY_TAGS
2101         help
2102           Support for booting older Linux kernels, using ATAGs rather than
2103           passing a devicetree.  This is option is rarely used, and the
2104           semantics are defined at
2105           https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2106
2107 config SETUP_MEMORY_TAGS
2108         bool "Pass memory size information via ATAG"
2109         depends on SUPPORT_PASSING_ATAGS
2110
2111 config CMDLINE_TAG
2112         bool "Pass Linux kernel cmdline via ATAG"
2113         depends on SUPPORT_PASSING_ATAGS
2114
2115 config INITRD_TAG
2116         bool "Pass initrd starting point and size via ATAG"
2117         depends on SUPPORT_PASSING_ATAGS
2118
2119 config REVISION_TAG
2120         bool "Pass system revision via ATAG"
2121         depends on SUPPORT_PASSING_ATAGS
2122
2123 config SERIAL_TAG
2124         bool "Pass system serial number via ATAG"
2125         depends on SUPPORT_PASSING_ATAGS
2126
2127 config STATIC_MACH_TYPE
2128         bool "Statically define the Machine ID number"
2129         help
2130           When booting via ATAGs, enable this option if we know the correct
2131           machine ID number to use at compile time.  Some systems will be
2132           passed the number dynamically by whatever loads U-Boot.
2133
2134 config MACH_TYPE
2135         int "Machine ID number"
2136         depends on STATIC_MACH_TYPE
2137         help
2138           When booting via ATAGs, the machine type must be passed as a number.
2139           For the full list see https://www.arm.linux.org.uk/developer/machines
2140
2141 config ARCH_SUPPORT_TFABOOT
2142         bool
2143
2144 config TFABOOT
2145         bool "Support for booting from TF-A"
2146         depends on ARCH_SUPPORT_TFABOOT
2147         help
2148           Some platforms support the setup of secure registers (for instance
2149           for CPU errata handling) or provide secure services like PSCI.
2150           Those services could also be provided by other firmware parts
2151           like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2152           does not need to (and cannot) execute this code.
2153           Enabling this option will make a U-Boot binary that is relying
2154           on other firmware layers to provide secure functionality.
2155
2156 config TI_SECURE_DEVICE
2157         bool "HS Device Type Support"
2158         depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2159         help
2160           If a high secure (HS) device type is being used, this config
2161           must be set. This option impacts various aspects of the
2162           build system (to create signed boot images that can be
2163           authenticated) and the code. See the doc/README.ti-secure
2164           file for further details.
2165
2166 config SYS_KWD_CONFIG
2167         string "kwbimage config file path"
2168         depends on ARCH_KIRKWOOD || ARCH_MVEBU
2169         default "arch/arm/mach-mvebu/kwbimage.cfg"
2170         help
2171           Path within the source directory to the kwbimage.cfg file to use
2172           when packaging the U-Boot image for use.
2173
2174 source "arch/arm/mach-apple/Kconfig"
2175
2176 source "arch/arm/mach-aspeed/Kconfig"
2177
2178 source "arch/arm/mach-at91/Kconfig"
2179
2180 source "arch/arm/mach-bcm283x/Kconfig"
2181
2182 source "arch/arm/mach-bcmbca/Kconfig"
2183
2184 source "arch/arm/mach-bcmstb/Kconfig"
2185
2186 source "arch/arm/mach-davinci/Kconfig"
2187
2188 source "arch/arm/mach-exynos/Kconfig"
2189
2190 source "arch/arm/mach-hpe/gxp/Kconfig"
2191
2192 source "arch/arm/mach-highbank/Kconfig"
2193
2194 source "arch/arm/mach-integrator/Kconfig"
2195
2196 source "arch/arm/mach-ipq40xx/Kconfig"
2197
2198 source "arch/arm/mach-k3/Kconfig"
2199
2200 source "arch/arm/mach-keystone/Kconfig"
2201
2202 source "arch/arm/mach-kirkwood/Kconfig"
2203
2204 source "arch/arm/mach-lpc32xx/Kconfig"
2205
2206 source "arch/arm/mach-mvebu/Kconfig"
2207
2208 source "arch/arm/mach-octeontx/Kconfig"
2209
2210 source "arch/arm/mach-octeontx2/Kconfig"
2211
2212 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2213
2214 source "arch/arm/mach-imx/mx3/Kconfig"
2215
2216 source "arch/arm/mach-imx/mx5/Kconfig"
2217
2218 source "arch/arm/mach-imx/mx6/Kconfig"
2219
2220 source "arch/arm/mach-imx/mx7/Kconfig"
2221
2222 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2223
2224 source "arch/arm/mach-imx/imx8/Kconfig"
2225
2226 source "arch/arm/mach-imx/imx8m/Kconfig"
2227
2228 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2229
2230 source "arch/arm/mach-imx/imx9/Kconfig"
2231
2232 source "arch/arm/mach-imx/imxrt/Kconfig"
2233
2234 source "arch/arm/mach-imx/mxs/Kconfig"
2235
2236 source "arch/arm/mach-omap2/Kconfig"
2237
2238 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2239
2240 source "arch/arm/mach-orion5x/Kconfig"
2241
2242 source "arch/arm/mach-owl/Kconfig"
2243
2244 source "arch/arm/mach-rmobile/Kconfig"
2245
2246 source "arch/arm/mach-meson/Kconfig"
2247
2248 source "arch/arm/mach-mediatek/Kconfig"
2249
2250 source "arch/arm/mach-qemu/Kconfig"
2251
2252 source "arch/arm/mach-rockchip/Kconfig"
2253
2254 source "arch/arm/mach-s5pc1xx/Kconfig"
2255
2256 source "arch/arm/mach-snapdragon/Kconfig"
2257
2258 source "arch/arm/mach-socfpga/Kconfig"
2259
2260 source "arch/arm/mach-sti/Kconfig"
2261
2262 source "arch/arm/mach-stm32/Kconfig"
2263
2264 source "arch/arm/mach-stm32mp/Kconfig"
2265
2266 source "arch/arm/mach-sunxi/Kconfig"
2267
2268 source "arch/arm/mach-tegra/Kconfig"
2269
2270 source "arch/arm/mach-u8500/Kconfig"
2271
2272 source "arch/arm/mach-uniphier/Kconfig"
2273
2274 source "arch/arm/cpu/armv7/vf610/Kconfig"
2275
2276 source "arch/arm/mach-zynq/Kconfig"
2277
2278 source "arch/arm/mach-zynqmp/Kconfig"
2279
2280 source "arch/arm/mach-versal/Kconfig"
2281
2282 source "arch/arm/mach-zynqmp-r5/Kconfig"
2283
2284 source "arch/arm/cpu/armv7/Kconfig"
2285
2286 source "arch/arm/cpu/armv8/Kconfig"
2287
2288 source "arch/arm/mach-imx/Kconfig"
2289
2290 source "arch/arm/mach-nexell/Kconfig"
2291
2292 source "arch/arm/mach-npcm/Kconfig"
2293
2294 source "board/armltd/total_compute/Kconfig"
2295 source "board/armltd/corstone1000/Kconfig"
2296 source "board/bosch/shc/Kconfig"
2297 source "board/bosch/guardian/Kconfig"
2298 source "board/Marvell/octeontx/Kconfig"
2299 source "board/Marvell/octeontx2/Kconfig"
2300 source "board/armltd/vexpress/Kconfig"
2301 source "board/armltd/vexpress64/Kconfig"
2302 source "board/cortina/presidio-asic/Kconfig"
2303 source "board/broadcom/bcm963158/Kconfig"
2304 source "board/broadcom/bcm96753ref/Kconfig"
2305 source "board/broadcom/bcm968360bg/Kconfig"
2306 source "board/broadcom/bcm968580xref/Kconfig"
2307 source "board/broadcom/bcmns3/Kconfig"
2308 source "board/cavium/thunderx/Kconfig"
2309 source "board/eets/pdu001/Kconfig"
2310 source "board/emulation/qemu-arm/Kconfig"
2311 source "board/freescale/ls2080aqds/Kconfig"
2312 source "board/freescale/ls2080ardb/Kconfig"
2313 source "board/freescale/ls1088a/Kconfig"
2314 source "board/freescale/ls1028a/Kconfig"
2315 source "board/freescale/ls1021aqds/Kconfig"
2316 source "board/freescale/ls1043aqds/Kconfig"
2317 source "board/freescale/ls1021atwr/Kconfig"
2318 source "board/freescale/ls1021atsn/Kconfig"
2319 source "board/freescale/ls1021aiot/Kconfig"
2320 source "board/freescale/ls1046aqds/Kconfig"
2321 source "board/freescale/ls1043ardb/Kconfig"
2322 source "board/freescale/ls1046ardb/Kconfig"
2323 source "board/freescale/ls1046afrwy/Kconfig"
2324 source "board/freescale/ls1012aqds/Kconfig"
2325 source "board/freescale/ls1012ardb/Kconfig"
2326 source "board/freescale/ls1012afrdm/Kconfig"
2327 source "board/freescale/lx2160a/Kconfig"
2328 source "board/grinn/chiliboard/Kconfig"
2329 source "board/hisilicon/hikey/Kconfig"
2330 source "board/hisilicon/hikey960/Kconfig"
2331 source "board/hisilicon/poplar/Kconfig"
2332 source "board/isee/igep003x/Kconfig"
2333 source "board/kontron/sl28/Kconfig"
2334 source "board/myir/mys_6ulx/Kconfig"
2335 source "board/siemens/common/Kconfig"
2336 source "board/seeed/npi_imx6ull/Kconfig"
2337 source "board/socionext/developerbox/Kconfig"
2338 source "board/st/stv0991/Kconfig"
2339 source "board/tcl/sl50/Kconfig"
2340 source "board/traverse/ten64/Kconfig"
2341 source "board/variscite/dart_6ul/Kconfig"
2342 source "board/vscom/baltos/Kconfig"
2343 source "board/phytium/durian/Kconfig"
2344 source "board/phytium/pomelo/Kconfig"
2345 source "board/xen/xenguest_arm64/Kconfig"
2346
2347 source "arch/arm/Kconfig.debug"
2348
2349 endmenu