arch/arm/Kconfig

   1 menu "ARM architecture"
   2         depends on ARM
   3
   4 config SYS_ARCH
   5         default "arm"
   6
   7 config ARM64
   8         bool
   9         select PHYS_64BIT
  10         select SYS_CACHE_SHIFT_6
  11
  12 if ARM64
  13 config POSITION_INDEPENDENT
  14         bool "Generate position-independent pre-relocation code"
  15         select INIT_SP_RELATIVE
  16         help
  17           U-Boot expects to be linked to a specific hard-coded address, and to
  18           be loaded to and run from that address. This option lifts that
  19           restriction, thus allowing the code to be loaded to and executed
  20           from almost any address. This logic relies on the relocation
  21           information that is embedded in the binary to support U-Boot
  22           relocating itself to the top-of-RAM later during execution.
  23
  24 config INIT_SP_RELATIVE
  25         bool "Specify the early stack pointer relative to the .bss section"
  26         help
  27           U-Boot typically uses a hard-coded value for the stack pointer
  28           before relocation. Enable this option to instead calculate the
  29           initial SP at run-time. This is useful to avoid hard-coding addresses
  30           into U-Boot, so that it can be loaded and executed at arbitrary
  31           addresses and thus avoid using arbitrary addresses at runtime.
  32
  33           If this option is enabled, the early stack pointer is set to
  34           &_bss_start with a offset value added. The offset is specified by
  35           SYS_INIT_SP_BSS_OFFSET.
  36
  37 config SYS_INIT_SP_BSS_OFFSET
  38         int "Early stack offset from the .bss base address"
  39         depends on INIT_SP_RELATIVE
  40         default 524288
  41         help
  42           This option's value is the offset added to &_bss_start in order to
  43           calculate the stack pointer. This offset should be large enough so
  44           that the early malloc region, global data (gd), and early stack usage
  45           do not overlap any appended DTB.
  46
  47 config LINUX_KERNEL_IMAGE_HEADER
  48         bool
  49         help
  50           Place a Linux kernel image header at the start of the U-Boot binary.
  51           The format of the header is described in the Linux kernel source at
  52           Documentation/arm64/booting.txt. This feature is useful since the
  53           image header reports the amount of memory (BSS and similar) that
  54           U-Boot needs to use, but which isn't part of the binary.
  55
  56 if LINUX_KERNEL_IMAGE_HEADER
  57 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  58         hex
  59         help
  60           The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  61           TEXT_OFFSET value written to the Linux kernel image header.
  62 endif
  63 endif
  64
  65 config GIC_V3_ITS
  66         bool "ARM GICV3 ITS"
  67         help
  68           ARM GICV3 Interrupt translation service (ITS).
  69           Basic support for programming locality specific peripheral
  70           interrupts (LPI) configuration tables and enable LPI tables.
  71           LPI configuration table can be used by u-boot or Linux.
  72           ARM GICV3 has limitation, once the LPI table is enabled, LPI
  73           configuration table can not be re-programmed, unless GICV3 reset.
  74
  75 config STATIC_RELA
  76         bool
  77         default y if ARM64 && !POSITION_INDEPENDENT
  78
  79 config DMA_ADDR_T_64BIT
  80         bool
  81         default y if ARM64
  82
  83 config HAS_VBAR
  84         bool
  85
  86 config HAS_THUMB2
  87         bool
  88
  89 # Used for compatibility with asm files copied from the kernel
  90 config ARM_ASM_UNIFIED
  91         bool
  92         default y
  93
  94 # Used for compatibility with asm files copied from the kernel
  95 config THUMB2_KERNEL
  96         bool
  97
  98 config SYS_ICACHE_OFF
  99         bool "Do not enable icache"
 100         default n
 101         help
 102           Do not enable instruction cache in U-Boot.
 103
 104 config SPL_SYS_ICACHE_OFF
 105         bool "Do not enable icache in SPL"
 106         depends on SPL
 107         default SYS_ICACHE_OFF
 108         help
 109           Do not enable instruction cache in SPL.
 110
 111 config SYS_DCACHE_OFF
 112         bool "Do not enable dcache"
 113         default n
 114         help
 115           Do not enable data cache in U-Boot.
 116
 117 config SPL_SYS_DCACHE_OFF
 118         bool "Do not enable dcache in SPL"
 119         depends on SPL
 120         default SYS_DCACHE_OFF
 121         help
 122           Do not enable data cache in SPL.
 123
 124 config SYS_ARM_CACHE_CP15
 125         bool "CP15 based cache enabling support"
 126         help
 127           Select this if your processor suports enabling caches by using
 128           CP15 registers.
 129
 130 config SYS_ARM_MMU
 131         bool "MMU-based Paged Memory Management Support"
 132         select SYS_ARM_CACHE_CP15
 133         help
 134           Select if you want MMU-based virtualised addressing space
 135           support via paged memory management.
 136
 137 config SYS_ARM_MPU
 138         bool 'Use the ARM v7 PMSA Compliant MPU'
 139         help
 140           Some ARM systems without an MMU have instead a Memory Protection
 141           Unit (MPU) that defines the type and permissions for regions of
 142           memory.
 143           If your CPU has an MPU then you should choose 'y' here unless you
 144           know that you do not want to use the MPU.
 145
 146 # If set, the workarounds for these ARM errata are applied early during U-Boot
 147 # startup. Note that in general these options force the workarounds to be
 148 # applied; no CPU-type/version detection exists, unlike the similar options in
 149 # the Linux kernel. Do not set these options unless they apply!  Also note that
 150 # the following can be machine-specific errata. These do have ability to
 151 # provide rudimentary version and machine-specific checks, but expect no
 152 # product checks:
 153 # CONFIG_ARM_ERRATA_430973
 154 # CONFIG_ARM_ERRATA_454179
 155 # CONFIG_ARM_ERRATA_621766
 156 # CONFIG_ARM_ERRATA_798870
 157 # CONFIG_ARM_ERRATA_801819
 158 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
 159 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
 160
 161 config ARM_ERRATA_430973
 162         bool
 163
 164 config ARM_ERRATA_454179
 165         bool
 166
 167 config ARM_ERRATA_621766
 168         bool
 169
 170 config ARM_ERRATA_716044
 171         bool
 172
 173 config ARM_ERRATA_725233
 174         bool
 175
 176 config ARM_ERRATA_742230
 177         bool
 178
 179 config ARM_ERRATA_743622
 180         bool
 181
 182 config ARM_ERRATA_751472
 183         bool
 184
 185 config ARM_ERRATA_761320
 186         bool
 187
 188 config ARM_ERRATA_773022
 189         bool
 190
 191 config ARM_ERRATA_774769
 192         bool
 193
 194 config ARM_ERRATA_794072
 195         bool
 196
 197 config ARM_ERRATA_798870
 198         bool
 199
 200 config ARM_ERRATA_801819
 201         bool
 202
 203 config ARM_ERRATA_826974
 204         bool
 205
 206 config ARM_ERRATA_828024
 207         bool
 208
 209 config ARM_ERRATA_829520
 210         bool
 211
 212 config ARM_ERRATA_833069
 213         bool
 214
 215 config ARM_ERRATA_833471
 216         bool
 217
 218 config ARM_ERRATA_845369
 219         bool
 220
 221 config ARM_ERRATA_852421
 222         bool
 223
 224 config ARM_ERRATA_852423
 225         bool
 226
 227 config ARM_ERRATA_855873
 228         bool
 229
 230 config ARM_CORTEX_A8_CVE_2017_5715
 231         bool
 232
 233 config ARM_CORTEX_A15_CVE_2017_5715
 234         bool
 235
 236 config CPU_ARM720T
 237         bool
 238         select SYS_CACHE_SHIFT_5
 239         imply SYS_ARM_MMU
 240
 241 config CPU_ARM920T
 242         bool
 243         select SYS_CACHE_SHIFT_5
 244         imply SYS_ARM_MMU
 245
 246 config CPU_ARM926EJS
 247         bool
 248         select SYS_CACHE_SHIFT_5
 249         imply SYS_ARM_MMU
 250
 251 config CPU_ARM946ES
 252         bool
 253         select SYS_CACHE_SHIFT_5
 254         imply SYS_ARM_MMU
 255
 256 config CPU_ARM1136
 257         bool
 258         select SYS_CACHE_SHIFT_5
 259         imply SYS_ARM_MMU
 260
 261 config CPU_ARM1176
 262         bool
 263         select HAS_VBAR
 264         select SYS_CACHE_SHIFT_5
 265         imply SYS_ARM_MMU
 266
 267 config CPU_V7A
 268         bool
 269         select HAS_THUMB2
 270         select HAS_VBAR
 271         select SYS_CACHE_SHIFT_6
 272         imply SYS_ARM_MMU
 273
 274 config CPU_V7M
 275         bool
 276         select HAS_THUMB2
 277         select SYS_ARM_MPU
 278         select SYS_CACHE_SHIFT_5
 279         select SYS_THUMB_BUILD
 280         select THUMB2_KERNEL
 281
 282 config CPU_V7R
 283         bool
 284         select HAS_THUMB2
 285         select SYS_ARM_CACHE_CP15
 286         select SYS_ARM_MPU
 287         select SYS_CACHE_SHIFT_6
 288
 289 config CPU_PXA
 290         bool
 291         select SYS_CACHE_SHIFT_5
 292         imply SYS_ARM_MMU
 293
 294 config CPU_SA1100
 295         bool
 296         select SYS_CACHE_SHIFT_5
 297         imply SYS_ARM_MMU
 298
 299 config SYS_CPU
 300         default "arm720t" if CPU_ARM720T
 301         default "arm920t" if CPU_ARM920T
 302         default "arm926ejs" if CPU_ARM926EJS
 303         default "arm946es" if CPU_ARM946ES
 304         default "arm1136" if CPU_ARM1136
 305         default "arm1176" if CPU_ARM1176
 306         default "armv7" if CPU_V7A
 307         default "armv7" if CPU_V7R
 308         default "armv7m" if CPU_V7M
 309         default "pxa" if CPU_PXA
 310         default "sa1100" if CPU_SA1100
 311         default "armv8" if ARM64
 312
 313 config SYS_ARM_ARCH
 314         int
 315         default 4 if CPU_ARM720T
 316         default 4 if CPU_ARM920T
 317         default 5 if CPU_ARM926EJS
 318         default 5 if CPU_ARM946ES
 319         default 6 if CPU_ARM1136
 320         default 6 if CPU_ARM1176
 321         default 7 if CPU_V7A
 322         default 7 if CPU_V7M
 323         default 7 if CPU_V7R
 324         default 5 if CPU_PXA
 325         default 4 if CPU_SA1100
 326         default 8 if ARM64
 327
 328 config SYS_CACHE_SHIFT_5
 329         bool
 330
 331 config SYS_CACHE_SHIFT_6
 332         bool
 333
 334 config SYS_CACHE_SHIFT_7
 335         bool
 336
 337 config SYS_CACHELINE_SIZE
 338         int
 339         default 128 if SYS_CACHE_SHIFT_7
 340         default 64 if SYS_CACHE_SHIFT_6
 341         default 32 if SYS_CACHE_SHIFT_5
 342
 343 choice
 344         prompt "Select the ARM data write cache policy"
 345         default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
 346                                               TARGET_BCMNSP || CPU_PXA || RZA1
 347         default SYS_ARM_CACHE_WRITEBACK
 348
 349 config SYS_ARM_CACHE_WRITEBACK
 350         bool "Write-back (WB)"
 351         help
 352           A write updates the cache only and marks the cache line as dirty.
 353           External memory is updated only when the line is evicted or explicitly
 354           cleaned.
 355
 356 config SYS_ARM_CACHE_WRITETHROUGH
 357         bool "Write-through (WT)"
 358         help
 359           A write updates both the cache and the external memory system.
 360           This does not mark the cache line as dirty.
 361
 362 config SYS_ARM_CACHE_WRITEALLOC
 363         bool "Write allocation (WA)"
 364         help
 365           A cache line is allocated on a write miss. This means that executing a
 366           store instruction on the processor might cause a burst read to occur.
 367           There is a linefill to obtain the data for the cache line, before the
 368           write is performed.
 369 endchoice
 370
 371 config ARCH_CPU_INIT
 372         bool "Enable ARCH_CPU_INIT"
 373         help
 374           Some architectures require a call to arch_cpu_init().
 375           Say Y here to enable it
 376
 377 config SYS_ARCH_TIMER
 378         bool "ARM Generic Timer support"
 379         depends on CPU_V7A || ARM64
 380         default y if ARM64
 381         help
 382           The ARM Generic Timer (aka arch-timer) provides an architected
 383           interface to a timer source on an SoC.
 384           It is mandatory for ARMv8 implementation and widely available
 385           on ARMv7 systems.
 386
 387 config ARM_SMCCC
 388         bool "Support for ARM SMC Calling Convention (SMCCC)"
 389         depends on CPU_V7A || ARM64
 390         select ARM_PSCI_FW
 391         help
 392           Say Y here if you want to enable ARM SMC Calling Convention.
 393           This should be enabled if U-Boot needs to communicate with system
 394           firmware (for example, PSCI) according to SMCCC.
 395
 396 config SEMIHOSTING
 397         bool "support boot from semihosting"
 398         help
 399           In emulated environments, semihosting is a way for
 400           the hosted environment to call out to the emulator to
 401           retrieve files from the host machine.
 402
 403 config SYS_THUMB_BUILD
 404         bool "Build U-Boot using the Thumb instruction set"
 405         depends on !ARM64
 406         help
 407            Use this flag to build U-Boot using the Thumb instruction set for
 408            ARM architectures. Thumb instruction set provides better code
 409            density. For ARM architectures that support Thumb2 this flag will
 410            result in Thumb2 code generated by GCC.
 411
 412 config SPL_SYS_THUMB_BUILD
 413         bool "Build SPL using the Thumb instruction set"
 414         default y if SYS_THUMB_BUILD
 415         depends on !ARM64 && SPL
 416         help
 417            Use this flag to build SPL using the Thumb instruction set for
 418            ARM architectures. Thumb instruction set provides better code
 419            density. For ARM architectures that support Thumb2 this flag will
 420            result in Thumb2 code generated by GCC.
 421
 422 config TPL_SYS_THUMB_BUILD
 423         bool "Build TPL using the Thumb instruction set"
 424         default y if SYS_THUMB_BUILD
 425         depends on TPL && !ARM64
 426         help
 427            Use this flag to build TPL using the Thumb instruction set for
 428            ARM architectures. Thumb instruction set provides better code
 429            density. For ARM architectures that support Thumb2 this flag will
 430            result in Thumb2 code generated by GCC.
 431
 432
 433 config SYS_L2CACHE_OFF
 434         bool "L2cache off"
 435         help
 436           If SoC does not support L2CACHE or one does not want to enable
 437           L2CACHE, choose this option.
 438
 439 config ENABLE_ARM_SOC_BOOT0_HOOK
 440         bool "prepare BOOT0 header"
 441         help
 442           If the SoC's BOOT0 requires a header area filled with (magic)
 443           values, then choose this option, and create a file included as
 444           <asm/arch/boot0.h> which contains the required assembler code.
 445
 446 config ARM_CORTEX_CPU_IS_UP
 447         bool
 448         default n
 449
 450 config USE_ARCH_MEMCPY
 451         bool "Use an assembly optimized implementation of memcpy"
 452         default y
 453         depends on !ARM64
 454         help
 455           Enable the generation of an optimized version of memcpy.
 456           Such an implementation may be faster under some conditions
 457           but may increase the binary size.
 458
 459 config SPL_USE_ARCH_MEMCPY
 460         bool "Use an assembly optimized implementation of memcpy for SPL"
 461         default y if USE_ARCH_MEMCPY
 462         depends on !ARM64 && SPL
 463         help
 464           Enable the generation of an optimized version of memcpy.
 465           Such an implementation may be faster under some conditions
 466           but may increase the binary size.
 467
 468 config TPL_USE_ARCH_MEMCPY
 469         bool "Use an assembly optimized implementation of memcpy for TPL"
 470         default y if USE_ARCH_MEMCPY
 471         depends on !ARM64 && TPL
 472         help
 473           Enable the generation of an optimized version of memcpy.
 474           Such an implementation may be faster under some conditions
 475           but may increase the binary size.
 476
 477 config USE_ARCH_MEMSET
 478         bool "Use an assembly optimized implementation of memset"
 479         default y
 480         depends on !ARM64
 481         help
 482           Enable the generation of an optimized version of memset.
 483           Such an implementation may be faster under some conditions
 484           but may increase the binary size.
 485
 486 config SPL_USE_ARCH_MEMSET
 487         bool "Use an assembly optimized implementation of memset for SPL"
 488         default y if USE_ARCH_MEMSET
 489         depends on !ARM64 && SPL
 490         help
 491           Enable the generation of an optimized version of memset.
 492           Such an implementation may be faster under some conditions
 493           but may increase the binary size.
 494
 495 config TPL_USE_ARCH_MEMSET
 496         bool "Use an assembly optimized implementation of memset for TPL"
 497         default y if USE_ARCH_MEMSET
 498         depends on !ARM64 && TPL
 499         help
 500           Enable the generation of an optimized version of memset.
 501           Such an implementation may be faster under some conditions
 502           but may increase the binary size.
 503
 504 config SET_STACK_SIZE
 505         bool "Enable an option to set max stack size that can be used"
 506         default y if ARCH_VERSAL || ARCH_ZYNQMP || ARCH_ZYNQ
 507         help
 508           This will enable an option to set max stack size that can be
 509           used by U-Boot.
 510
 511 config STACK_SIZE
 512         hex "Define max stack size that can be used by U-Boot"
 513         depends on SET_STACK_SIZE
 514         default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
 515         default 0x1000000 if ARCH_ZYNQ
 516         help
 517           Define Max stack size that can be used by U-Boot so that the
 518           initrd_high will be calculated as base stack pointer minus this
 519           stack size.
 520
 521 config ARM64_SUPPORT_AARCH32
 522         bool "ARM64 system support AArch32 execution state"
 523         depends on ARM64
 524         default y if !TARGET_THUNDERX_88XX
 525         help
 526           This ARM64 system supports AArch32 execution state.
 527
 528 choice
 529         prompt "Target select"
 530         default TARGET_HIKEY
 531
 532 config ARCH_AT91
 533         bool "Atmel AT91"
 534         select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
 535
 536 config TARGET_EDB93XX
 537         bool "Support edb93xx"
 538         select CPU_ARM920T
 539         select PL010_SERIAL
 540
 541 config TARGET_ASPENITE
 542         bool "Support aspenite"
 543         select CPU_ARM926EJS
 544
 545 config TARGET_GPLUGD
 546         bool "Support gplugd"
 547         select CPU_ARM926EJS
 548
 549 config ARCH_DAVINCI
 550         bool "TI DaVinci"
 551         select CPU_ARM926EJS
 552         imply CMD_SAVES
 553         help
 554           Support for TI's DaVinci platform.
 555
 556 config ARCH_KIRKWOOD
 557         bool "Marvell Kirkwood"
 558         select ARCH_MISC_INIT
 559         select BOARD_EARLY_INIT_F
 560         select CPU_ARM926EJS
 561
 562 config ARCH_MVEBU
 563         bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
 564         select DM
 565         select DM_ETH
 566         select DM_SERIAL
 567         select DM_SPI
 568         select DM_SPI_FLASH
 569         select OF_CONTROL
 570         select OF_SEPARATE
 571         select SPI
 572         imply CMD_DM
 573
 574 config TARGET_APF27
 575         bool "Support apf27"
 576         select CPU_ARM926EJS
 577         select SUPPORT_SPL
 578
 579 config ARCH_ORION5X
 580         bool "Marvell Orion"
 581         select CPU_ARM926EJS
 582
 583 config TARGET_SPEAR300
 584         bool "Support spear300"
 585         select BOARD_EARLY_INIT_F
 586         select CPU_ARM926EJS
 587         select PL011_SERIAL
 588         imply CMD_SAVES
 589
 590 config TARGET_SPEAR310
 591         bool "Support spear310"
 592         select BOARD_EARLY_INIT_F
 593         select CPU_ARM926EJS
 594         select PL011_SERIAL
 595         imply CMD_SAVES
 596
 597 config TARGET_SPEAR320
 598         bool "Support spear320"
 599         select BOARD_EARLY_INIT_F
 600         select CPU_ARM926EJS
 601         select PL011_SERIAL
 602         imply CMD_SAVES
 603
 604 config TARGET_SPEAR600
 605         bool "Support spear600"
 606         select BOARD_EARLY_INIT_F
 607         select CPU_ARM926EJS
 608         select PL011_SERIAL
 609         imply CMD_SAVES
 610
 611 config TARGET_STV0991
 612         bool "Support stv0991"
 613         select CPU_V7A
 614         select DM
 615         select DM_SERIAL
 616         select DM_SPI
 617         select DM_SPI_FLASH
 618         select PL01X_SERIAL
 619         select SPI
 620         select SPI_FLASH
 621         imply CMD_DM
 622
 623 config TARGET_X600
 624         bool "Support x600"
 625         select BOARD_LATE_INIT
 626         select CPU_ARM926EJS
 627         select PL011_SERIAL
 628         select SUPPORT_SPL
 629
 630 config TARGET_FLEA3
 631         bool "Support flea3"
 632         select CPU_ARM1136
 633
 634 config TARGET_MX35PDK
 635         bool "Support mx35pdk"
 636         select BOARD_LATE_INIT
 637         select CPU_ARM1136
 638
 639 config ARCH_BCM283X
 640         bool "Broadcom BCM283X family"
 641         select DM
 642         select DM_GPIO
 643         select DM_SERIAL
 644         select OF_CONTROL
 645         select PL01X_SERIAL
 646         select SERIAL_SEARCH_ALL
 647         imply CMD_DM
 648         imply FAT_WRITE
 649
 650 config ARCH_BCM63158
 651         bool "Broadcom BCM63158 family"
 652         select DM
 653         select OF_CONTROL
 654         imply CMD_DM
 655
 656 config ARCH_BCM68360
 657         bool "Broadcom BCM68360 family"
 658         select DM
 659         select OF_CONTROL
 660         imply CMD_DM
 661
 662 config ARCH_BCM6858
 663         bool "Broadcom BCM6858 family"
 664         select DM
 665         select OF_CONTROL
 666         imply CMD_DM
 667
 668 config TARGET_VEXPRESS_CA15_TC2
 669         bool "Support vexpress_ca15_tc2"
 670         select CPU_V7A
 671         select CPU_V7_HAS_NONSEC
 672         select CPU_V7_HAS_VIRT
 673         select PL011_SERIAL
 674
 675 config ARCH_BCMSTB
 676         bool "Broadcom BCM7XXX family"
 677         select CPU_V7A
 678         select DM
 679         select OF_CONTROL
 680         select OF_PRIOR_STAGE
 681         imply CMD_DM
 682         help
 683           This enables support for Broadcom ARM-based set-top box
 684           chipsets, including the 7445 family of chips.
 685
 686 config TARGET_VEXPRESS_CA5X2
 687         bool "Support vexpress_ca5x2"
 688         select CPU_V7A
 689         select PL011_SERIAL
 690
 691 config TARGET_VEXPRESS_CA9X4
 692         bool "Support vexpress_ca9x4"
 693         select CPU_V7A
 694         select PL011_SERIAL
 695
 696 config TARGET_BCM23550_W1D
 697         bool "Support bcm23550_w1d"
 698         select CPU_V7A
 699         imply CRC32_VERIFY
 700         imply FAT_WRITE
 701
 702 config TARGET_BCM28155_AP
 703         bool "Support bcm28155_ap"
 704         select CPU_V7A
 705         imply CRC32_VERIFY
 706         imply FAT_WRITE
 707
 708 config TARGET_BCMCYGNUS
 709         bool "Support bcmcygnus"
 710         select CPU_V7A
 711         imply BCM_SF2_ETH
 712         imply BCM_SF2_ETH_GMAC
 713         imply CMD_HASH
 714         imply CRC32_VERIFY
 715         imply FAT_WRITE
 716         imply HASH_VERIFY
 717         imply NETDEVICES
 718
 719 config TARGET_BCMNSP
 720         bool "Support bcmnsp"
 721         select CPU_V7A
 722
 723 config TARGET_BCMNS2
 724         bool "Support Broadcom Northstar2"
 725         select ARM64
 726         help
 727           Support for Broadcom Northstar 2 SoCs.  NS2 is a quad-core 64-bit
 728           ARMv8 Cortex-A57 processors targeting a broad range of networking
 729           applications.
 730
 731 config ARCH_EXYNOS
 732         bool "Samsung EXYNOS"
 733         select DM
 734         select DM_GPIO
 735         select DM_I2C
 736         select DM_KEYBOARD
 737         select DM_SERIAL
 738         select DM_SPI
 739         select DM_SPI_FLASH
 740         select SPI
 741         imply SYS_THUMB_BUILD
 742         imply CMD_DM
 743         imply FAT_WRITE
 744
 745 config ARCH_S5PC1XX
 746         bool "Samsung S5PC1XX"
 747         select CPU_V7A
 748         select DM
 749         select DM_GPIO
 750         select DM_I2C
 751         select DM_SERIAL
 752         imply CMD_DM
 753
 754 config ARCH_HIGHBANK
 755         bool "Calxeda Highbank"
 756         select CPU_V7A
 757         select PL011_SERIAL
 758
 759 config ARCH_INTEGRATOR
 760         bool "ARM Ltd. Integrator family"
 761         select DM
 762         select DM_SERIAL
 763         select PL01X_SERIAL
 764         imply CMD_DM
 765
 766 config ARCH_KEYSTONE
 767         bool "TI Keystone"
 768         select CMD_POWEROFF
 769         select CPU_V7A
 770         select SUPPORT_SPL
 771         select SYS_ARCH_TIMER
 772         select SYS_THUMB_BUILD
 773         imply CMD_MTDPARTS
 774         imply CMD_SAVES
 775         imply FIT
 776
 777 config ARCH_K3
 778         bool "Texas Instruments' K3 Architecture"
 779         select SPL
 780         select SUPPORT_SPL
 781         select FIT
 782
 783 config ARCH_OMAP2PLUS
 784         bool "TI OMAP2+"
 785         select CPU_V7A
 786         select SPL_BOARD_INIT if SPL
 787         select SPL_STACK_R if SPL
 788         select SUPPORT_SPL
 789         imply FIT
 790
 791 config ARCH_MESON
 792         bool "Amlogic Meson"
 793         imply DISTRO_DEFAULTS
 794         imply DM_RNG
 795         help
 796           Support for the Meson SoC family developed by Amlogic Inc.,
 797           targeted at media players and tablet computers. We currently
 798           support the S905 (GXBaby) 64-bit SoC.
 799
 800 config ARCH_MEDIATEK
 801         bool "MediaTek SoCs"
 802         select DM
 803         select OF_CONTROL
 804         select SPL_DM if SPL
 805         select SPL_LIBCOMMON_SUPPORT if SPL
 806         select SPL_LIBGENERIC_SUPPORT if SPL
 807         select SPL_OF_CONTROL if SPL
 808         select SUPPORT_SPL
 809         help
 810           Support for the MediaTek SoCs family developed by MediaTek Inc.
 811           Please refer to doc/README.mediatek for more information.
 812
 813 config ARCH_LPC32XX
 814         bool "NXP LPC32xx platform"
 815         select CPU_ARM926EJS
 816         select DM
 817         select DM_GPIO
 818         select DM_SERIAL
 819         select SPL_DM if SPL
 820         select SUPPORT_SPL
 821         imply CMD_DM
 822
 823 config ARCH_IMX8
 824         bool "NXP i.MX8 platform"
 825         select ARM64
 826         select DM
 827         select OF_CONTROL
 828         select ENABLE_ARM_SOC_BOOT0_HOOK
 829
 830 config ARCH_IMX8M
 831         bool "NXP i.MX8M platform"
 832         select ARM64
 833         select DM
 834         select SUPPORT_SPL
 835         imply CMD_DM
 836
 837 config ARCH_IMXRT
 838         bool "NXP i.MXRT platform"
 839         select CPU_V7M
 840         select DM
 841         select DM_SERIAL
 842         select SUPPORT_SPL
 843         imply CMD_DM
 844
 845 config ARCH_MX23
 846         bool "NXP i.MX23 family"
 847         select CPU_ARM926EJS
 848         select PL011_SERIAL
 849         select SUPPORT_SPL
 850
 851 config ARCH_MX25
 852         bool "NXP MX25"
 853         select CPU_ARM926EJS
 854         imply MXC_GPIO
 855
 856 config ARCH_MX28
 857         bool "NXP i.MX28 family"
 858         select CPU_ARM926EJS
 859         select PL011_SERIAL
 860         select SUPPORT_SPL
 861
 862 config ARCH_MX31
 863         bool "NXP i.MX31 family"
 864         select CPU_ARM1136
 865
 866 config ARCH_MX7ULP
 867         bool "NXP MX7ULP"
 868         select CPU_V7A
 869         select ROM_UNIFIED_SECTIONS
 870         imply MXC_GPIO
 871         imply SYS_THUMB_BUILD
 872
 873 config ARCH_MX7
 874         bool "Freescale MX7"
 875         select ARCH_MISC_INIT
 876         select BOARD_EARLY_INIT_F
 877         select CPU_V7A
 878         select SYS_FSL_HAS_SEC if IMX_HAB
 879         select SYS_FSL_SEC_COMPAT_4
 880         select SYS_FSL_SEC_LE
 881         imply MXC_GPIO
 882         imply SYS_THUMB_BUILD
 883
 884 config ARCH_MX6
 885         bool "Freescale MX6"
 886         select CPU_V7A
 887         select SYS_FSL_HAS_SEC if IMX_HAB
 888         select SYS_FSL_SEC_COMPAT_4
 889         select SYS_FSL_SEC_LE
 890         imply MXC_GPIO
 891         imply SYS_THUMB_BUILD
 892
 893 if ARCH_MX6
 894 config SPL_LDSCRIPT
 895         default "arch/arm/mach-omap2/u-boot-spl.lds"
 896 endif
 897
 898 config ARCH_MX5
 899         bool "Freescale MX5"
 900         select BOARD_EARLY_INIT_F
 901         select CPU_V7A
 902         imply MXC_GPIO
 903
 904 config ARCH_OWL
 905         bool "Actions Semi OWL SoCs"
 906         select DM
 907         select DM_SERIAL
 908         select OWL_SERIAL
 909         select CLK
 910         select CLK_OWL
 911         select OF_CONTROL
 912         select SYS_RELOC_GD_ENV_ADDR
 913         imply CMD_DM
 914
 915 config ARCH_QEMU
 916         bool "QEMU Virtual Platform"
 917         select ARCH_SUPPORT_TFABOOT
 918         select DM
 919         select DM_SERIAL
 920         select OF_CONTROL
 921         select PL01X_SERIAL
 922         imply CMD_DM
 923         imply DM_RTC
 924         imply RTC_PL031
 925
 926 config ARCH_RMOBILE
 927         bool "Renesas ARM SoCs"
 928         select BOARD_EARLY_INIT_F if !RZA1
 929         select DM
 930         select DM_SERIAL
 931         imply CMD_DM
 932         imply FAT_WRITE
 933         imply SYS_THUMB_BUILD
 934         imply ARCH_MISC_INIT if DISPLAY_CPUINFO
 935
 936 config TARGET_S32V234EVB
 937         bool "Support s32v234evb"
 938         select ARM64
 939         select SYS_FSL_ERRATUM_ESDHC111
 940
 941 config ARCH_SNAPDRAGON
 942         bool "Qualcomm Snapdragon SoCs"
 943         select ARM64
 944         select DM
 945         select DM_GPIO
 946         select DM_SERIAL
 947         select MSM_SMEM
 948         select OF_CONTROL
 949         select OF_SEPARATE
 950         select SMEM
 951         select SPMI
 952         imply CMD_DM
 953
 954 config ARCH_SOCFPGA
 955         bool "Altera SOCFPGA family"
 956         select ARCH_EARLY_INIT_R
 957         select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
 958         select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
 959         select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
 960         select DM
 961         select DM_SERIAL
 962         select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
 963         select OF_CONTROL
 964         select SPL_DM_RESET if DM_RESET
 965         select SPL_DM_SERIAL
 966         select SPL_LIBCOMMON_SUPPORT
 967         select SPL_LIBGENERIC_SUPPORT
 968         select SPL_NAND_SUPPORT if SPL_NAND_DENALI
 969         select SPL_OF_CONTROL
 970         select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
 971         select SPL_SERIAL_SUPPORT
 972         select SPL_SYSRESET
 973         select SPL_WATCHDOG_SUPPORT
 974         select SUPPORT_SPL
 975         select SYS_NS16550
 976         select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
 977         select SYSRESET
 978         select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
 979         select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
 980         imply CMD_DM
 981         imply CMD_MTDPARTS
 982         imply CRC32_VERIFY
 983         imply DM_SPI
 984         imply DM_SPI_FLASH
 985         imply FAT_WRITE
 986         imply SPL
 987         imply SPL_DM
 988         imply SPL_LIBDISK_SUPPORT
 989         imply SPL_MMC_SUPPORT
 990         imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
 991         imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
 992         imply SPL_SPI_FLASH_SUPPORT
 993         imply SPL_SPI_SUPPORT
 994         imply L2X0_CACHE
 995
 996 config ARCH_SUNXI
 997         bool "Support sunxi (Allwinner) SoCs"
 998         select BINMAN
 999         select CMD_GPIO
1000         select CMD_MMC if MMC
1001         select CMD_USB if DISTRO_DEFAULTS
1002         select CLK
1003         select DM
1004         select DM_ETH
1005         select DM_GPIO
1006         select DM_KEYBOARD
1007         select DM_MMC if MMC
1008         select DM_SCSI if SCSI
1009         select DM_SERIAL
1010         select DM_USB if DISTRO_DEFAULTS
1011         select OF_BOARD_SETUP
1012         select OF_CONTROL
1013         select OF_SEPARATE
1014         select SPECIFY_CONSOLE_INDEX
1015         select SPL_STACK_R if SPL
1016         select SPL_SYS_MALLOC_SIMPLE if SPL
1017         select SPL_SYS_THUMB_BUILD if !ARM64
1018         select SUNXI_GPIO
1019         select SYS_NS16550
1020         select SYS_THUMB_BUILD if !ARM64
1021         select USB if DISTRO_DEFAULTS
1022         select USB_KEYBOARD if DISTRO_DEFAULTS
1023         select USB_STORAGE if DISTRO_DEFAULTS
1024         select SPL_USE_TINY_PRINTF
1025         select USE_PREBOOT
1026         select SYS_RELOC_GD_ENV_ADDR
1027         imply CMD_DM
1028         imply CMD_GPT
1029         imply CMD_UBI if MTD_RAW_NAND
1030         imply DISTRO_DEFAULTS
1031         imply FAT_WRITE
1032         imply FIT
1033         imply OF_LIBFDT_OVERLAY
1034         imply PRE_CONSOLE_BUFFER
1035         imply SPL_GPIO_SUPPORT
1036         imply SPL_LIBCOMMON_SUPPORT
1037         imply SPL_LIBGENERIC_SUPPORT
1038         imply SPL_MMC_SUPPORT if MMC
1039         imply SPL_POWER_SUPPORT
1040         imply SPL_SERIAL_SUPPORT
1041         imply USB_GADGET
1042
1043 config ARCH_U8500
1044         bool "ST-Ericsson U8500 Series"
1045         select CPU_V7A
1046         select DM
1047         select DM_GPIO
1048         select DM_MMC if MMC
1049         select DM_SERIAL
1050         select DM_USB if USB
1051         select OF_CONTROL
1052         select SYSRESET
1053         select TIMER
1054         imply ARM_PL180_MMCI
1055         imply DM_RTC
1056         imply NOMADIK_MTU_TIMER
1057         imply PL01X_SERIAL
1058         imply RTC_PL031
1059         imply SYSRESET_SYSCON
1060
1061 config ARCH_VERSAL
1062         bool "Support Xilinx Versal Platform"
1063         select ARM64
1064         select CLK
1065         select DM
1066         select DM_ETH if NET
1067         select DM_MMC if MMC
1068         select DM_SERIAL
1069         select OF_CONTROL
1070         imply BOARD_LATE_INIT
1071
1072 config ARCH_VF610
1073         bool "Freescale Vybrid"
1074         select CPU_V7A
1075         select SYS_FSL_ERRATUM_ESDHC111
1076         imply CMD_MTDPARTS
1077         imply MTD_RAW_NAND
1078
1079 config ARCH_ZYNQ
1080         bool "Xilinx Zynq based platform"
1081         select CLK
1082         select CLK_ZYNQ
1083         select CPU_V7A
1084         select DM
1085         select DM_ETH if NET
1086         select DM_MMC if MMC
1087         select DM_SERIAL
1088         select DM_SPI
1089         select DM_SPI_FLASH
1090         select DM_USB if USB
1091         select OF_CONTROL
1092         select SPI
1093         select SPL_BOARD_INIT if SPL
1094         select SPL_CLK if SPL
1095         select SPL_DM if SPL
1096         select SPL_OF_CONTROL if SPL
1097         select SPL_SEPARATE_BSS if SPL
1098         select SUPPORT_SPL
1099         imply ARCH_EARLY_INIT_R
1100         imply BOARD_LATE_INIT
1101         imply CMD_CLK
1102         imply CMD_DM
1103         imply CMD_SPL
1104         imply FAT_WRITE
1105
1106 config ARCH_ZYNQMP_R5
1107         bool "Xilinx ZynqMP R5 based platform"
1108         select CLK
1109         select CPU_V7R
1110         select DM
1111         select DM_ETH if NET
1112         select DM_MMC if MMC
1113         select DM_SERIAL
1114         select OF_CONTROL
1115         imply CMD_DM
1116         imply DM_USB_GADGET
1117
1118 config ARCH_ZYNQMP
1119         bool "Xilinx ZynqMP based platform"
1120         select ARM64
1121         select CLK
1122         select DM
1123         select DM_ETH if NET
1124         select DM_MAILBOX
1125         select DM_MMC if MMC
1126         select DM_SERIAL
1127         select DM_SPI if SPI
1128         select DM_SPI_FLASH if DM_SPI
1129         select DM_USB if USB
1130         select FIRMWARE
1131         select OF_CONTROL
1132         select SPL_BOARD_INIT if SPL
1133         select SPL_CLK if SPL
1134         select SPL_DM_MAILBOX if SPL
1135         select SPL_FIRMWARE if SPL
1136         select SPL_SEPARATE_BSS if SPL
1137         select SUPPORT_SPL
1138         select ZYNQMP_IPI
1139         imply BOARD_LATE_INIT
1140         imply CMD_DM
1141         imply FAT_WRITE
1142         imply MP
1143         imply DM_USB_GADGET
1144
1145 config ARCH_TEGRA
1146         bool "NVIDIA Tegra"
1147         imply DISTRO_DEFAULTS
1148         imply FAT_WRITE
1149
1150 config TARGET_VEXPRESS64_AEMV8A
1151         bool "Support vexpress_aemv8a"
1152         select ARM64
1153         select PL01X_SERIAL
1154
1155 config TARGET_VEXPRESS64_BASE_FVP
1156         bool "Support Versatile Express ARMv8a FVP BASE model"
1157         select ARM64
1158         select PL01X_SERIAL
1159         select SEMIHOSTING
1160
1161 config TARGET_VEXPRESS64_JUNO
1162         bool "Support Versatile Express Juno Development Platform"
1163         select ARM64
1164         select PL01X_SERIAL
1165         select DM
1166         select OF_CONTROL
1167         select OF_BOARD
1168         select CLK
1169         select DM_SERIAL
1170         select ARM_PSCI_FW
1171         select PSCI_RESET
1172         select DM
1173         select BLK
1174         select USB
1175         select DM_USB
1176
1177 config TARGET_LS2080A_EMU
1178         bool "Support ls2080a_emu"
1179         select ARCH_LS2080A
1180         select ARM64
1181         select ARMV8_MULTIENTRY
1182         select FSL_DDR_SYNC_REFRESH
1183         help
1184           Support for Freescale LS2080A_EMU platform.
1185           The LS2080A Development System (EMULATOR) is a pre-silicon
1186           development platform that supports the QorIQ LS2080A
1187           Layerscape Architecture processor.
1188
1189 config TARGET_LS2080A_SIMU
1190         bool "Support ls2080a_simu"
1191         select ARCH_LS2080A
1192         select ARM64
1193         select ARMV8_MULTIENTRY
1194         select BOARD_LATE_INIT
1195         help
1196           Support for Freescale LS2080A_SIMU platform.
1197           The LS2080A Development System (QDS) is a pre silicon
1198           development platform that supports the QorIQ LS2080A
1199           Layerscape Architecture processor.
1200
1201 config TARGET_LS1088AQDS
1202         bool "Support ls1088aqds"
1203         select ARCH_LS1088A
1204         select ARM64
1205         select ARMV8_MULTIENTRY
1206         select ARCH_SUPPORT_TFABOOT
1207         select BOARD_LATE_INIT
1208         select SUPPORT_SPL
1209         select FSL_DDR_INTERACTIVE if !SD_BOOT
1210         help
1211           Support for NXP LS1088AQDS platform.
1212           The LS1088A Development System (QDS) is a high-performance
1213           development platform that supports the QorIQ LS1088A
1214           Layerscape Architecture processor.
1215
1216 config TARGET_LS2080AQDS
1217         bool "Support ls2080aqds"
1218         select ARCH_LS2080A
1219         select ARM64
1220         select ARMV8_MULTIENTRY
1221         select ARCH_SUPPORT_TFABOOT
1222         select BOARD_LATE_INIT
1223         select SUPPORT_SPL
1224         imply SCSI
1225         imply SCSI_AHCI
1226         select FSL_DDR_BIST
1227         select FSL_DDR_INTERACTIVE if !SPL
1228         help
1229           Support for Freescale LS2080AQDS platform.
1230           The LS2080A Development System (QDS) is a high-performance
1231           development platform that supports the QorIQ LS2080A
1232           Layerscape Architecture processor.
1233
1234 config TARGET_LS2080ARDB
1235         bool "Support ls2080ardb"
1236         select ARCH_LS2080A
1237         select ARM64
1238         select ARMV8_MULTIENTRY
1239         select ARCH_SUPPORT_TFABOOT
1240         select BOARD_LATE_INIT
1241         select SUPPORT_SPL
1242         select FSL_DDR_BIST
1243         select FSL_DDR_INTERACTIVE if !SPL
1244         imply SCSI
1245         imply SCSI_AHCI
1246         help
1247           Support for Freescale LS2080ARDB platform.
1248           The LS2080A Reference design board (RDB) is a high-performance
1249           development platform that supports the QorIQ LS2080A
1250           Layerscape Architecture processor.
1251
1252 config TARGET_LS2081ARDB
1253         bool "Support ls2081ardb"
1254         select ARCH_LS2080A
1255         select ARM64
1256         select ARMV8_MULTIENTRY
1257         select BOARD_LATE_INIT
1258         select SUPPORT_SPL
1259         help
1260           Support for Freescale LS2081ARDB platform.
1261           The LS2081A Reference design board (RDB) is a high-performance
1262           development platform that supports the QorIQ LS2081A/LS2041A
1263           Layerscape Architecture processor.
1264
1265 config TARGET_LX2160ARDB
1266         bool "Support lx2160ardb"
1267         select ARCH_LX2160A
1268         select ARM64
1269         select ARMV8_MULTIENTRY
1270         select ARCH_SUPPORT_TFABOOT
1271         select BOARD_LATE_INIT
1272         help
1273           Support for NXP LX2160ARDB platform.
1274           The lx2160ardb (LX2160A Reference design board (RDB)
1275           is a high-performance development platform that supports the
1276           QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1277
1278 config TARGET_LX2160AQDS
1279         bool "Support lx2160aqds"
1280         select ARCH_LX2160A
1281         select ARM64
1282         select ARMV8_MULTIENTRY
1283         select ARCH_SUPPORT_TFABOOT
1284         select BOARD_LATE_INIT
1285         help
1286           Support for NXP LX2160AQDS platform.
1287           The lx2160aqds (LX2160A QorIQ Development System (QDS)
1288           is a high-performance development platform that supports the
1289           QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1290
1291 config TARGET_HIKEY
1292         bool "Support HiKey 96boards Consumer Edition Platform"
1293         select ARM64
1294         select DM
1295         select DM_GPIO
1296         select DM_SERIAL
1297         select OF_CONTROL
1298         select PL01X_SERIAL
1299         select SPECIFY_CONSOLE_INDEX
1300         imply CMD_DM
1301           help
1302           Support for HiKey 96boards platform. It features a HI6220
1303           SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1304
1305 config TARGET_HIKEY960
1306         bool "Support HiKey960 96boards Consumer Edition Platform"
1307         select ARM64
1308         select DM
1309         select DM_SERIAL
1310         select OF_CONTROL
1311         select PL01X_SERIAL
1312         imply CMD_DM
1313           help
1314           Support for HiKey960 96boards platform. It features a HI3660
1315           SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1316
1317 config TARGET_POPLAR
1318         bool "Support Poplar 96boards Enterprise Edition Platform"
1319         select ARM64
1320         select DM
1321         select DM_SERIAL
1322         select DM_USB
1323         select OF_CONTROL
1324         select PL01X_SERIAL
1325         imply CMD_DM
1326           help
1327           Support for Poplar 96boards EE platform. It features a HI3798cv200
1328           SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1329           making it capable of running any commercial set-top solution based on
1330           Linux or Android.
1331
1332 config TARGET_LS1012AQDS
1333         bool "Support ls1012aqds"
1334         select ARCH_LS1012A
1335         select ARM64
1336         select ARCH_SUPPORT_TFABOOT
1337         select BOARD_LATE_INIT
1338         help
1339           Support for Freescale LS1012AQDS platform.
1340           The LS1012A Development System (QDS) is a high-performance
1341           development platform that supports the QorIQ LS1012A
1342           Layerscape Architecture processor.
1343
1344 config TARGET_LS1012ARDB
1345         bool "Support ls1012ardb"
1346         select ARCH_LS1012A
1347         select ARM64
1348         select ARCH_SUPPORT_TFABOOT
1349         select BOARD_LATE_INIT
1350         imply SCSI
1351         imply SCSI_AHCI
1352         help
1353           Support for Freescale LS1012ARDB platform.
1354           The LS1012A Reference design board (RDB) is a high-performance
1355           development platform that supports the QorIQ LS1012A
1356           Layerscape Architecture processor.
1357
1358 config TARGET_LS1012A2G5RDB
1359         bool "Support ls1012a2g5rdb"
1360         select ARCH_LS1012A
1361         select ARM64
1362         select ARCH_SUPPORT_TFABOOT
1363         select BOARD_LATE_INIT
1364         imply SCSI
1365         help
1366           Support for Freescale LS1012A2G5RDB platform.
1367           The LS1012A 2G5 Reference design board (RDB) is a high-performance
1368           development platform that supports the QorIQ LS1012A
1369           Layerscape Architecture processor.
1370
1371 config TARGET_LS1012AFRWY
1372         bool "Support ls1012afrwy"
1373         select ARCH_LS1012A
1374         select ARM64
1375         select ARCH_SUPPORT_TFABOOT
1376         select BOARD_LATE_INIT
1377         imply SCSI
1378         imply SCSI_AHCI
1379         help
1380          Support for Freescale LS1012AFRWY platform.
1381          The LS1012A FRWY board (FRWY) is a high-performance
1382          development platform that supports the QorIQ LS1012A
1383          Layerscape Architecture processor.
1384
1385 config TARGET_LS1012AFRDM
1386         bool "Support ls1012afrdm"
1387         select ARCH_LS1012A
1388         select ARM64
1389         select ARCH_SUPPORT_TFABOOT
1390         help
1391           Support for Freescale LS1012AFRDM platform.
1392           The LS1012A Freedom  board (FRDM) is a high-performance
1393           development platform that supports the QorIQ LS1012A
1394           Layerscape Architecture processor.
1395
1396 config TARGET_LS1028AQDS
1397         bool "Support ls1028aqds"
1398         select ARCH_LS1028A
1399         select ARM64
1400         select ARMV8_MULTIENTRY
1401         select ARCH_SUPPORT_TFABOOT
1402         select BOARD_LATE_INIT
1403         help
1404           Support for Freescale LS1028AQDS platform
1405           The LS1028A Development System (QDS) is a high-performance
1406           development platform that supports the QorIQ LS1028A
1407           Layerscape Architecture processor.
1408
1409 config TARGET_LS1028ARDB
1410         bool "Support ls1028ardb"
1411         select ARCH_LS1028A
1412         select ARM64
1413         select ARMV8_MULTIENTRY
1414         select ARCH_SUPPORT_TFABOOT
1415         select BOARD_LATE_INIT
1416         help
1417           Support for Freescale LS1028ARDB platform
1418           The LS1028A Development System (RDB) is a high-performance
1419           development platform that supports the QorIQ LS1028A
1420           Layerscape Architecture processor.
1421
1422 config TARGET_LS1088ARDB
1423         bool "Support ls1088ardb"
1424         select ARCH_LS1088A
1425         select ARM64
1426         select ARMV8_MULTIENTRY
1427         select ARCH_SUPPORT_TFABOOT
1428         select BOARD_LATE_INIT
1429         select SUPPORT_SPL
1430         select FSL_DDR_INTERACTIVE if !SD_BOOT
1431         help
1432           Support for NXP LS1088ARDB platform.
1433           The LS1088A Reference design board (RDB) is a high-performance
1434           development platform that supports the QorIQ LS1088A
1435           Layerscape Architecture processor.
1436
1437 config TARGET_LS1021AQDS
1438         bool "Support ls1021aqds"
1439         select ARCH_LS1021A
1440         select ARCH_SUPPORT_PSCI
1441         select BOARD_EARLY_INIT_F
1442         select BOARD_LATE_INIT
1443         select CPU_V7A
1444         select CPU_V7_HAS_NONSEC
1445         select CPU_V7_HAS_VIRT
1446         select LS1_DEEP_SLEEP
1447         select SUPPORT_SPL
1448         select SYS_FSL_DDR
1449         select FSL_DDR_INTERACTIVE
1450         imply SCSI
1451
1452 config TARGET_LS1021ATWR
1453         bool "Support ls1021atwr"
1454         select ARCH_LS1021A
1455         select ARCH_SUPPORT_PSCI
1456         select BOARD_EARLY_INIT_F
1457         select BOARD_LATE_INIT
1458         select CPU_V7A
1459         select CPU_V7_HAS_NONSEC
1460         select CPU_V7_HAS_VIRT
1461         select LS1_DEEP_SLEEP
1462         select SUPPORT_SPL
1463         imply SCSI
1464
1465 config TARGET_LS1021ATSN
1466         bool "Support ls1021atsn"
1467         select ARCH_LS1021A
1468         select ARCH_SUPPORT_PSCI
1469         select BOARD_EARLY_INIT_F
1470         select BOARD_LATE_INIT
1471         select CPU_V7A
1472         select CPU_V7_HAS_NONSEC
1473         select CPU_V7_HAS_VIRT
1474         select LS1_DEEP_SLEEP
1475         select SUPPORT_SPL
1476         imply SCSI
1477
1478 config TARGET_LS1021AIOT
1479         bool "Support ls1021aiot"
1480         select ARCH_LS1021A
1481         select ARCH_SUPPORT_PSCI
1482         select BOARD_LATE_INIT
1483         select CPU_V7A
1484         select CPU_V7_HAS_NONSEC
1485         select CPU_V7_HAS_VIRT
1486         select SUPPORT_SPL
1487         imply SCSI
1488         help
1489           Support for Freescale LS1021AIOT platform.
1490           The LS1021A Freescale board (IOT) is a high-performance
1491           development platform that supports the QorIQ LS1021A
1492           Layerscape Architecture processor.
1493
1494 config TARGET_LS1043AQDS
1495         bool "Support ls1043aqds"
1496         select ARCH_LS1043A
1497         select ARM64
1498         select ARMV8_MULTIENTRY
1499         select ARCH_SUPPORT_TFABOOT
1500         select BOARD_EARLY_INIT_F
1501         select BOARD_LATE_INIT
1502         select SUPPORT_SPL
1503         select FSL_DDR_INTERACTIVE if !SPL
1504         imply SCSI
1505         imply SCSI_AHCI
1506         help
1507           Support for Freescale LS1043AQDS platform.
1508
1509 config TARGET_LS1043ARDB
1510         bool "Support ls1043ardb"
1511         select ARCH_LS1043A
1512         select ARM64
1513         select ARMV8_MULTIENTRY
1514         select ARCH_SUPPORT_TFABOOT
1515         select BOARD_EARLY_INIT_F
1516         select BOARD_LATE_INIT
1517         select SUPPORT_SPL
1518         help
1519           Support for Freescale LS1043ARDB platform.
1520
1521 config TARGET_LS1046AQDS
1522         bool "Support ls1046aqds"
1523         select ARCH_LS1046A
1524         select ARM64
1525         select ARMV8_MULTIENTRY
1526         select ARCH_SUPPORT_TFABOOT
1527         select BOARD_EARLY_INIT_F
1528         select BOARD_LATE_INIT
1529         select DM_SPI_FLASH if DM_SPI
1530         select SUPPORT_SPL
1531         select FSL_DDR_BIST if !SPL
1532         select FSL_DDR_INTERACTIVE  if !SPL
1533         select FSL_DDR_INTERACTIVE if !SPL
1534         imply SCSI
1535         help
1536           Support for Freescale LS1046AQDS platform.
1537           The LS1046A Development System (QDS) is a high-performance
1538           development platform that supports the QorIQ LS1046A
1539           Layerscape Architecture processor.
1540
1541 config TARGET_LS1046ARDB
1542         bool "Support ls1046ardb"
1543         select ARCH_LS1046A
1544         select ARM64
1545         select ARMV8_MULTIENTRY
1546         select ARCH_SUPPORT_TFABOOT
1547         select BOARD_EARLY_INIT_F
1548         select BOARD_LATE_INIT
1549         select DM_SPI_FLASH if DM_SPI
1550         select POWER_MC34VR500
1551         select SUPPORT_SPL
1552         select FSL_DDR_BIST
1553         select FSL_DDR_INTERACTIVE if !SPL
1554         imply SCSI
1555         help
1556           Support for Freescale LS1046ARDB platform.
1557           The LS1046A Reference Design Board (RDB) is a high-performance
1558           development platform that supports the QorIQ LS1046A
1559           Layerscape Architecture processor.
1560
1561 config TARGET_LS1046AFRWY
1562         bool "Support ls1046afrwy"
1563         select ARCH_LS1046A
1564         select ARM64
1565         select ARMV8_MULTIENTRY
1566         select ARCH_SUPPORT_TFABOOT
1567         select BOARD_EARLY_INIT_F
1568         select BOARD_LATE_INIT
1569         select DM_SPI_FLASH if DM_SPI
1570         imply SCSI
1571         help
1572           Support for Freescale LS1046AFRWY platform.
1573           The LS1046A Freeway Board (FRWY) is a high-performance
1574           development platform that supports the QorIQ LS1046A
1575           Layerscape Architecture processor.
1576
1577 config TARGET_COLIBRI_PXA270
1578         bool "Support colibri_pxa270"
1579         select CPU_PXA
1580
1581 config ARCH_UNIPHIER
1582         bool "Socionext UniPhier SoCs"
1583         select BOARD_LATE_INIT
1584         select DM
1585         select DM_GPIO
1586         select DM_I2C
1587         select DM_MMC
1588         select DM_MTD
1589         select DM_RESET
1590         select DM_SERIAL
1591         select DM_USB
1592         select OF_BOARD_SETUP
1593         select OF_CONTROL
1594         select OF_LIBFDT
1595         select PINCTRL
1596         select SPL_BOARD_INIT if SPL
1597         select SPL_DM if SPL
1598         select SPL_LIBCOMMON_SUPPORT if SPL
1599         select SPL_LIBGENERIC_SUPPORT if SPL
1600         select SPL_OF_CONTROL if SPL
1601         select SPL_PINCTRL if SPL
1602         select SUPPORT_SPL
1603         imply CMD_DM
1604         imply DISTRO_DEFAULTS
1605         imply FAT_WRITE
1606         help
1607           Support for UniPhier SoC family developed by Socionext Inc.
1608           (formerly, System LSI Business Division of Panasonic Corporation)
1609
1610 config ARCH_STM32
1611         bool "Support STMicroelectronics STM32 MCU with cortex M"
1612         select CPU_V7M
1613         select DM
1614         select DM_SERIAL
1615         imply CMD_DM
1616
1617 config ARCH_STI
1618         bool "Support STMicrolectronics SoCs"
1619         select BLK
1620         select CPU_V7A
1621         select DM
1622         select DM_MMC
1623         select DM_RESET
1624         select DM_SERIAL
1625         imply CMD_DM
1626         help
1627           Support for STMicroelectronics STiH407/10 SoC family.
1628           This SoC is used on Linaro 96Board STiH410-B2260
1629
1630 config ARCH_STM32MP
1631         bool "Support STMicroelectronics STM32MP Socs with cortex A"
1632         select ARCH_MISC_INIT
1633         select ARCH_SUPPORT_TFABOOT
1634         select BOARD_LATE_INIT
1635         select CLK
1636         select DM
1637         select DM_GPIO
1638         select DM_RESET
1639         select DM_SERIAL
1640         select MISC
1641         select OF_CONTROL
1642         select OF_LIBFDT
1643         select OF_SYSTEM_SETUP
1644         select PINCTRL
1645         select REGMAP
1646         select SUPPORT_SPL
1647         select SYSCON
1648         select SYSRESET
1649         select SYS_THUMB_BUILD
1650         imply SPL_SYSRESET
1651         imply CMD_DM
1652         imply CMD_POWEROFF
1653         imply OF_LIBFDT_OVERLAY
1654         imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1655         imply USE_PREBOOT
1656         help
1657           Support for STM32MP SoC family developed by STMicroelectronics,
1658           MPUs based on ARM cortex A core
1659           U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1660           FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1661           chain.
1662           SPL is the unsecure FSBL for the basic boot chain.
1663
1664 config ARCH_ROCKCHIP
1665         bool "Support Rockchip SoCs"
1666         select BLK
1667         select BINMAN if !ARM64
1668         select DM
1669         select DM_GPIO
1670         select DM_I2C
1671         select DM_MMC
1672         select DM_PWM
1673         select DM_REGULATOR
1674         select DM_SERIAL
1675         select DM_SPI
1676         select DM_SPI_FLASH
1677         select DM_USB if USB
1678         select ENABLE_ARM_SOC_BOOT0_HOOK
1679         select OF_CONTROL
1680         select SPI
1681         select SPL_DM if SPL
1682         select SYS_MALLOC_F
1683         select SYS_THUMB_BUILD if !ARM64
1684         imply ADC
1685         imply CMD_DM
1686         imply DEBUG_UART_BOARD_INIT
1687         imply DISTRO_DEFAULTS
1688         imply FAT_WRITE
1689         imply SARADC_ROCKCHIP
1690         imply SPL_SYSRESET
1691         imply SPL_SYS_MALLOC_SIMPLE
1692         imply SYS_NS16550
1693         imply TPL_SYSRESET
1694         imply USB_FUNCTION_FASTBOOT
1695
1696 config TARGET_THUNDERX_88XX
1697         bool "Support ThunderX 88xx"
1698         select ARM64
1699         select OF_CONTROL
1700         select PL01X_SERIAL
1701         select SYS_CACHE_SHIFT_7
1702
1703 config ARCH_ASPEED
1704         bool "Support Aspeed SoCs"
1705         select DM
1706         select OF_CONTROL
1707         imply CMD_DM
1708
1709 config TARGET_DURIAN
1710         bool "Support Phytium Durian Platform"
1711         select ARM64
1712         help
1713           Support for durian platform.
1714           It has 2GB Sdram, uart and pcie.
1715
1716 config TARGET_PRESIDIO_ASIC
1717         bool "Support Cortina Presidio ASIC Platform"
1718         select ARM64
1719
1720 endchoice
1721
1722 config ARCH_SUPPORT_TFABOOT
1723         bool
1724
1725 config TFABOOT
1726         bool "Support for booting from TF-A"
1727         depends on ARCH_SUPPORT_TFABOOT
1728         default n
1729         help
1730           Enabling this will make a U-Boot binary that is capable of being
1731           booted via TF-A (Trusted Firmware for Cortex-A).
1732
1733 config TI_SECURE_DEVICE
1734         bool "HS Device Type Support"
1735         depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1736         help
1737           If a high secure (HS) device type is being used, this config
1738           must be set. This option impacts various aspects of the
1739           build system (to create signed boot images that can be
1740           authenticated) and the code. See the doc/README.ti-secure
1741           file for further details.
1742
1743 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1744 config ISW_ENTRY_ADDR
1745         hex "Address in memory or XIP address of bootloader entry point"
1746         default 0x402F4000 if AM43XX
1747         default 0x402F0400 if AM33XX
1748         default 0x40301350 if OMAP54XX
1749         help
1750           After any reset, the boot ROM searches the boot media for a valid
1751           boot image. For non-XIP devices, the ROM then copies the image into
1752           internal memory. For all boot modes, after the ROM processes the
1753           boot image it eventually computes the entry point address depending
1754           on the device type (secure/non-secure), boot media (xip/non-xip) and
1755           image headers.
1756 endif
1757
1758 source "arch/arm/mach-aspeed/Kconfig"
1759
1760 source "arch/arm/mach-at91/Kconfig"
1761
1762 source "arch/arm/mach-bcm283x/Kconfig"
1763
1764 source "arch/arm/mach-bcmstb/Kconfig"
1765
1766 source "arch/arm/mach-davinci/Kconfig"
1767
1768 source "arch/arm/mach-exynos/Kconfig"
1769
1770 source "arch/arm/mach-highbank/Kconfig"
1771
1772 source "arch/arm/mach-integrator/Kconfig"
1773
1774 source "arch/arm/mach-k3/Kconfig"
1775
1776 source "arch/arm/mach-keystone/Kconfig"
1777
1778 source "arch/arm/mach-kirkwood/Kconfig"
1779
1780 source "arch/arm/mach-lpc32xx/Kconfig"
1781
1782 source "arch/arm/mach-mvebu/Kconfig"
1783
1784 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1785
1786 source "arch/arm/mach-imx/mx2/Kconfig"
1787
1788 source "arch/arm/mach-imx/mx3/Kconfig"
1789
1790 source "arch/arm/mach-imx/mx5/Kconfig"
1791
1792 source "arch/arm/mach-imx/mx6/Kconfig"
1793
1794 source "arch/arm/mach-imx/mx7/Kconfig"
1795
1796 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1797
1798 source "arch/arm/mach-imx/imx8/Kconfig"
1799
1800 source "arch/arm/mach-imx/imx8m/Kconfig"
1801
1802 source "arch/arm/mach-imx/imxrt/Kconfig"
1803
1804 source "arch/arm/mach-imx/mxs/Kconfig"
1805
1806 source "arch/arm/mach-omap2/Kconfig"
1807
1808 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1809
1810 source "arch/arm/mach-orion5x/Kconfig"
1811
1812 source "arch/arm/mach-owl/Kconfig"
1813
1814 source "arch/arm/mach-rmobile/Kconfig"
1815
1816 source "arch/arm/mach-meson/Kconfig"
1817
1818 source "arch/arm/mach-mediatek/Kconfig"
1819
1820 source "arch/arm/mach-qemu/Kconfig"
1821
1822 source "arch/arm/mach-rockchip/Kconfig"
1823
1824 source "arch/arm/mach-s5pc1xx/Kconfig"
1825
1826 source "arch/arm/mach-snapdragon/Kconfig"
1827
1828 source "arch/arm/mach-socfpga/Kconfig"
1829
1830 source "arch/arm/mach-sti/Kconfig"
1831
1832 source "arch/arm/mach-stm32/Kconfig"
1833
1834 source "arch/arm/mach-stm32mp/Kconfig"
1835
1836 source "arch/arm/mach-sunxi/Kconfig"
1837
1838 source "arch/arm/mach-tegra/Kconfig"
1839
1840 source "arch/arm/mach-u8500/Kconfig"
1841
1842 source "arch/arm/mach-uniphier/Kconfig"
1843
1844 source "arch/arm/cpu/armv7/vf610/Kconfig"
1845
1846 source "arch/arm/mach-zynq/Kconfig"
1847
1848 source "arch/arm/mach-zynqmp/Kconfig"
1849
1850 source "arch/arm/mach-versal/Kconfig"
1851
1852 source "arch/arm/mach-zynqmp-r5/Kconfig"
1853
1854 source "arch/arm/cpu/armv7/Kconfig"
1855
1856 source "arch/arm/cpu/armv8/Kconfig"
1857
1858 source "arch/arm/mach-imx/Kconfig"
1859
1860 source "board/bosch/shc/Kconfig"
1861 source "board/bosch/guardian/Kconfig"
1862 source "board/CarMediaLab/flea3/Kconfig"
1863 source "board/Marvell/aspenite/Kconfig"
1864 source "board/Marvell/gplugd/Kconfig"
1865 source "board/armadeus/apf27/Kconfig"
1866 source "board/armltd/vexpress/Kconfig"
1867 source "board/armltd/vexpress64/Kconfig"
1868 source "board/cortina/presidio-asic/Kconfig"
1869 source "board/broadcom/bcm23550_w1d/Kconfig"
1870 source "board/broadcom/bcm28155_ap/Kconfig"
1871 source "board/broadcom/bcm963158/Kconfig"
1872 source "board/broadcom/bcm968360bg/Kconfig"
1873 source "board/broadcom/bcm968580xref/Kconfig"
1874 source "board/broadcom/bcmcygnus/Kconfig"
1875 source "board/broadcom/bcmnsp/Kconfig"
1876 source "board/broadcom/bcmns2/Kconfig"
1877 source "board/cavium/thunderx/Kconfig"
1878 source "board/cirrus/edb93xx/Kconfig"
1879 source "board/eets/pdu001/Kconfig"
1880 source "board/emulation/qemu-arm/Kconfig"
1881 source "board/freescale/ls2080a/Kconfig"
1882 source "board/freescale/ls2080aqds/Kconfig"
1883 source "board/freescale/ls2080ardb/Kconfig"
1884 source "board/freescale/ls1088a/Kconfig"
1885 source "board/freescale/ls1028a/Kconfig"
1886 source "board/freescale/ls1021aqds/Kconfig"
1887 source "board/freescale/ls1043aqds/Kconfig"
1888 source "board/freescale/ls1021atwr/Kconfig"
1889 source "board/freescale/ls1021atsn/Kconfig"
1890 source "board/freescale/ls1021aiot/Kconfig"
1891 source "board/freescale/ls1046aqds/Kconfig"
1892 source "board/freescale/ls1043ardb/Kconfig"
1893 source "board/freescale/ls1046ardb/Kconfig"
1894 source "board/freescale/ls1046afrwy/Kconfig"
1895 source "board/freescale/ls1012aqds/Kconfig"
1896 source "board/freescale/ls1012ardb/Kconfig"
1897 source "board/freescale/ls1012afrdm/Kconfig"
1898 source "board/freescale/lx2160a/Kconfig"
1899 source "board/freescale/mx35pdk/Kconfig"
1900 source "board/freescale/s32v234evb/Kconfig"
1901 source "board/grinn/chiliboard/Kconfig"
1902 source "board/gumstix/pepper/Kconfig"
1903 source "board/hisilicon/hikey/Kconfig"
1904 source "board/hisilicon/hikey960/Kconfig"
1905 source "board/hisilicon/poplar/Kconfig"
1906 source "board/isee/igep003x/Kconfig"
1907 source "board/phytec/pcm051/Kconfig"
1908 source "board/silica/pengwyn/Kconfig"
1909 source "board/spear/spear300/Kconfig"
1910 source "board/spear/spear310/Kconfig"
1911 source "board/spear/spear320/Kconfig"
1912 source "board/spear/spear600/Kconfig"
1913 source "board/spear/x600/Kconfig"
1914 source "board/st/stv0991/Kconfig"
1915 source "board/tcl/sl50/Kconfig"
1916 source "board/birdland/bav335x/Kconfig"
1917 source "board/toradex/colibri_pxa270/Kconfig"
1918 source "board/variscite/dart_6ul/Kconfig"
1919 source "board/vscom/baltos/Kconfig"
1920 source "board/xilinx/Kconfig"
1921 source "board/xilinx/zynq/Kconfig"
1922 source "board/xilinx/zynqmp/Kconfig"
1923 source "board/phytium/durian/Kconfig"
1924
1925 source "arch/arm/Kconfig.debug"
1926
1927 endmenu
1928
1929 config SPL_LDSCRIPT
1930         default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1931         default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1932         default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
1933
1934