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1 menu "ARM architecture"
2 depends on ARM
3
4 config SYS_ARCH
5 default "arm"
6
7 config ARM64
8 bool
9 select PHYS_64BIT
10 select SYS_CACHE_SHIFT_6
11
12 if ARM64
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 help
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded into the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
22
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
25 help
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Enable this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime.
31
32 If this option is enabled, the early stack pointer is set to
33 &_bss_start with a offset value added. The offset is specified by
34 SYS_INIT_SP_BSS_OFFSET.
35
36 config SYS_INIT_SP_BSS_OFFSET
37 int "Early stack offset from the .bss base address"
38 depends on INIT_SP_RELATIVE
39 default 524288
40 help
41 This option's value is the offset added to &_bss_start in order to
42 calculate the stack pointer. This offset should be large enough so
43 that the early malloc region, global data (gd), and early stack usage
44 do not overlap any appended DTB.
45
46 config LINUX_KERNEL_IMAGE_HEADER
47 bool
48 help
49 Place a Linux kernel image header at the start of the U-Boot binary.
50 The format of the header is described in the Linux kernel source at
51 Documentation/arm64/booting.txt. This feature is useful since the
52 image header reports the amount of memory (BSS and similar) that
53 U-Boot needs to use, but which isn't part of the binary.
54
55 if LINUX_KERNEL_IMAGE_HEADER
56 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
57 hex
58 help
59 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
60 TEXT_OFFSET value written in to the Linux kernel image header.
61 endif
62 endif
63
64 config STATIC_RELA
65 bool
66 default y if ARM64 && !POSITION_INDEPENDENT
67
68 config DMA_ADDR_T_64BIT
69 bool
70 default y if ARM64
71
72 config HAS_VBAR
73 bool
74
75 config HAS_THUMB2
76 bool
77
78 # Used for compatibility with asm files copied from the kernel
79 config ARM_ASM_UNIFIED
80 bool
81 default y
82
83 # Used for compatibility with asm files copied from the kernel
84 config THUMB2_KERNEL
85 bool
86
87 config SYS_ICACHE_OFF
88 bool "Do not enable icache"
89 default n
90 help
91 Do not enable instruction cache in U-Boot.
92
93 config SPL_SYS_ICACHE_OFF
94 bool "Do not enable icache in SPL"
95 depends on SPL
96 default SYS_ICACHE_OFF
97 help
98 Do not enable instruction cache in SPL.
99
100 config SYS_DCACHE_OFF
101 bool "Do not enable dcache"
102 default n
103 help
104 Do not enable data cache in U-Boot.
105
106 config SPL_SYS_DCACHE_OFF
107 bool "Do not enable dcache in SPL"
108 depends on SPL
109 default SYS_DCACHE_OFF
110 help
111 Do not enable data cache in SPL.
112
113 config SYS_ARM_CACHE_CP15
114 bool "CP15 based cache enabling support"
115 help
116 Select this if your processor suports enabling caches by using
117 CP15 registers.
118
119 config SYS_ARM_MMU
120 bool "MMU-based Paged Memory Management Support"
121 select SYS_ARM_CACHE_CP15
122 help
123 Select if you want MMU-based virtualised addressing space
124 support by paged memory management.
125
126 config SYS_ARM_MPU
127 bool 'Use the ARM v7 PMSA Compliant MPU'
128 help
129 Some ARM systems without an MMU have instead a Memory Protection
130 Unit (MPU) that defines the type and permissions for regions of
131 memory.
132 If your CPU has an MPU then you should choose 'y' here unless you
133 know that you do not want to use the MPU.
134
135 # If set, the workarounds for these ARM errata are applied early during U-Boot
136 # startup. Note that in general these options force the workarounds to be
137 # applied; no CPU-type/version detection exists, unlike the similar options in
138 # the Linux kernel. Do not set these options unless they apply! Also note that
139 # the following can be machine specific errata. These do have ability to
140 # provide rudimentary version and machine specific checks, but expect no
141 # product checks:
142 # CONFIG_ARM_ERRATA_430973
143 # CONFIG_ARM_ERRATA_454179
144 # CONFIG_ARM_ERRATA_621766
145 # CONFIG_ARM_ERRATA_798870
146 # CONFIG_ARM_ERRATA_801819
147 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
148 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
149
150 config ARM_ERRATA_430973
151 bool
152
153 config ARM_ERRATA_454179
154 bool
155
156 config ARM_ERRATA_621766
157 bool
158
159 config ARM_ERRATA_716044
160 bool
161
162 config ARM_ERRATA_725233
163 bool
164
165 config ARM_ERRATA_742230
166 bool
167
168 config ARM_ERRATA_743622
169 bool
170
171 config ARM_ERRATA_751472
172 bool
173
174 config ARM_ERRATA_761320
175 bool
176
177 config ARM_ERRATA_773022
178 bool
179
180 config ARM_ERRATA_774769
181 bool
182
183 config ARM_ERRATA_794072
184 bool
185
186 config ARM_ERRATA_798870
187 bool
188
189 config ARM_ERRATA_801819
190 bool
191
192 config ARM_ERRATA_826974
193 bool
194
195 config ARM_ERRATA_828024
196 bool
197
198 config ARM_ERRATA_829520
199 bool
200
201 config ARM_ERRATA_833069
202 bool
203
204 config ARM_ERRATA_833471
205 bool
206
207 config ARM_ERRATA_845369
208 bool
209
210 config ARM_ERRATA_852421
211 bool
212
213 config ARM_ERRATA_852423
214 bool
215
216 config ARM_ERRATA_855873
217 bool
218
219 config ARM_CORTEX_A8_CVE_2017_5715
220 bool
221
222 config ARM_CORTEX_A15_CVE_2017_5715
223 bool
224
225 config CPU_ARM720T
226 bool
227 select SYS_CACHE_SHIFT_5
228 imply SYS_ARM_MMU
229
230 config CPU_ARM920T
231 bool
232 select SYS_CACHE_SHIFT_5
233 imply SYS_ARM_MMU
234
235 config CPU_ARM926EJS
236 bool
237 select SYS_CACHE_SHIFT_5
238 imply SYS_ARM_MMU
239
240 config CPU_ARM946ES
241 bool
242 select SYS_CACHE_SHIFT_5
243 imply SYS_ARM_MMU
244
245 config CPU_ARM1136
246 bool
247 select SYS_CACHE_SHIFT_5
248 imply SYS_ARM_MMU
249
250 config CPU_ARM1176
251 bool
252 select HAS_VBAR
253 select SYS_CACHE_SHIFT_5
254 imply SYS_ARM_MMU
255
256 config CPU_V7A
257 bool
258 select HAS_THUMB2
259 select HAS_VBAR
260 select SYS_CACHE_SHIFT_6
261 imply SYS_ARM_MMU
262
263 config CPU_V7M
264 bool
265 select HAS_THUMB2
266 select SYS_ARM_MPU
267 select SYS_CACHE_SHIFT_5
268 select SYS_THUMB_BUILD
269 select THUMB2_KERNEL
270
271 config CPU_V7R
272 bool
273 select HAS_THUMB2
274 select SYS_ARM_CACHE_CP15
275 select SYS_ARM_MPU
276 select SYS_CACHE_SHIFT_6
277
278 config CPU_PXA
279 bool
280 select SYS_CACHE_SHIFT_5
281 imply SYS_ARM_MMU
282
283 config CPU_SA1100
284 bool
285 select SYS_CACHE_SHIFT_5
286 imply SYS_ARM_MMU
287
288 config SYS_CPU
289 default "arm720t" if CPU_ARM720T
290 default "arm920t" if CPU_ARM920T
291 default "arm926ejs" if CPU_ARM926EJS
292 default "arm946es" if CPU_ARM946ES
293 default "arm1136" if CPU_ARM1136
294 default "arm1176" if CPU_ARM1176
295 default "armv7" if CPU_V7A
296 default "armv7" if CPU_V7R
297 default "armv7m" if CPU_V7M
298 default "pxa" if CPU_PXA
299 default "sa1100" if CPU_SA1100
300 default "armv8" if ARM64
301
302 config SYS_ARM_ARCH
303 int
304 default 4 if CPU_ARM720T
305 default 4 if CPU_ARM920T
306 default 5 if CPU_ARM926EJS
307 default 5 if CPU_ARM946ES
308 default 6 if CPU_ARM1136
309 default 6 if CPU_ARM1176
310 default 7 if CPU_V7A
311 default 7 if CPU_V7M
312 default 7 if CPU_V7R
313 default 5 if CPU_PXA
314 default 4 if CPU_SA1100
315 default 8 if ARM64
316
317 config SYS_CACHE_SHIFT_5
318 bool
319
320 config SYS_CACHE_SHIFT_6
321 bool
322
323 config SYS_CACHE_SHIFT_7
324 bool
325
326 config SYS_CACHELINE_SIZE
327 int
328 default 128 if SYS_CACHE_SHIFT_7
329 default 64 if SYS_CACHE_SHIFT_6
330 default 32 if SYS_CACHE_SHIFT_5
331
332 config ARCH_CPU_INIT
333 bool "Enable ARCH_CPU_INIT"
334 help
335 Some architectures require a call to arch_cpu_init()
336 Say Y here to enable it
337
338 config SYS_ARCH_TIMER
339 bool "ARM Generic Timer support"
340 depends on CPU_V7A || ARM64
341 default y if ARM64
342 help
343 The ARM Generic Timer (aka arch-timer) provides an architected
344 interface to a timer source on an SoC.
345 It is mandantory for ARMv8 implementation and widely available
346 on ARMv7 systems.
347
348 config ARM_SMCCC
349 bool "Support for ARM SMC Calling Convention (SMCCC)"
350 depends on CPU_V7A || ARM64
351 select ARM_PSCI_FW
352 help
353 Say Y here if you want to enable ARM SMC Calling Convention.
354 This should be enabled if U-Boot needs to communicate with system
355 firmware (for example, PSCI) according to SMCCC.
356
357 config SEMIHOSTING
358 bool "support boot from semihosting"
359 help
360 In emulated environments, semihosting is a way for
361 the hosted environment to call out to the emulator to
362 retrieve files from the host machine.
363
364 config SYS_THUMB_BUILD
365 bool "Build U-Boot using the Thumb instruction set"
366 depends on !ARM64
367 help
368 Use this flag to build U-Boot using the Thumb instruction set for
369 ARM architectures. Thumb instruction set provides better code
370 density. For ARM architectures that support Thumb2 this flag will
371 result in Thumb2 code generated by GCC.
372
373 config SPL_SYS_THUMB_BUILD
374 bool "Build SPL using the Thumb instruction set"
375 default y if SYS_THUMB_BUILD
376 depends on !ARM64 && SPL
377 help
378 Use this flag to build SPL using the Thumb instruction set for
379 ARM architectures. Thumb instruction set provides better code
380 density. For ARM architectures that support Thumb2 this flag will
381 result in Thumb2 code generated by GCC.
382
383 config TPL_SYS_THUMB_BUILD
384 bool "Build TPL using the Thumb instruction set"
385 default y if SYS_THUMB_BUILD
386 depends on TPL && !ARM64
387 help
388 Use this flag to build SPL using the Thumb instruction set for
389 ARM architectures. Thumb instruction set provides better code
390 density. For ARM architectures that support Thumb2 this flag will
391 result in Thumb2 code generated by GCC.
392
393
394 config SYS_L2CACHE_OFF
395 bool "L2cache off"
396 help
397 If SoC does not support L2CACHE or one do not want to enable
398 L2CACHE, choose this option.
399
400 config ENABLE_ARM_SOC_BOOT0_HOOK
401 bool "prepare BOOT0 header"
402 help
403 If the SoC's BOOT0 requires a header area filled with (magic)
404 values, then choose this option, and create a file included as
405 <asm/arch/boot0.h> which contains the required assembler code.
406
407 config ARM_CORTEX_CPU_IS_UP
408 bool
409 default n
410
411 config USE_ARCH_MEMCPY
412 bool "Use an assembly optimized implementation of memcpy"
413 default y
414 depends on !ARM64
415 help
416 Enable the generation of an optimized version of memcpy.
417 Such implementation may be faster under some conditions
418 but may increase the binary size.
419
420 config SPL_USE_ARCH_MEMCPY
421 bool "Use an assembly optimized implementation of memcpy for SPL"
422 default y if USE_ARCH_MEMCPY
423 depends on !ARM64 && SPL
424 help
425 Enable the generation of an optimized version of memcpy.
426 Such implementation may be faster under some conditions
427 but may increase the binary size.
428
429 config TPL_USE_ARCH_MEMCPY
430 bool "Use an assembly optimized implementation of memcpy for TPL"
431 default y if USE_ARCH_MEMCPY
432 depends on !ARM64 && TPL
433 help
434 Enable the generation of an optimized version of memcpy.
435 Such implementation may be faster under some conditions
436 but may increase the binary size.
437
438 config USE_ARCH_MEMSET
439 bool "Use an assembly optimized implementation of memset"
440 default y
441 depends on !ARM64
442 help
443 Enable the generation of an optimized version of memset.
444 Such implementation may be faster under some conditions
445 but may increase the binary size.
446
447 config SPL_USE_ARCH_MEMSET
448 bool "Use an assembly optimized implementation of memset for SPL"
449 default y if USE_ARCH_MEMSET
450 depends on !ARM64 && SPL
451 help
452 Enable the generation of an optimized version of memset.
453 Such implementation may be faster under some conditions
454 but may increase the binary size.
455
456 config TPL_USE_ARCH_MEMSET
457 bool "Use an assembly optimized implementation of memset for TPL"
458 default y if USE_ARCH_MEMSET
459 depends on !ARM64 && TPL
460 help
461 Enable the generation of an optimized version of memset.
462 Such implementation may be faster under some conditions
463 but may increase the binary size.
464
465 config SET_STACK_SIZE
466 bool "Enable an option to set max stack size that can be used"
467 default y if ARCH_VERSAL || ARCH_ZYNQMP
468 help
469 This will enable an option to set max stack size that can be
470 used by u-boot.
471
472 config STACK_SIZE
473 hex "Define max stack size that can be used by u-boot"
474 depends on SET_STACK_SIZE
475 default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
476 help
477 Defines Max stack size that can be used by u-boot so that the
478 initrd_high will be calculated as base stack pointer minus this
479 stack size.
480
481 config ARM64_SUPPORT_AARCH32
482 bool "ARM64 system support AArch32 execution state"
483 depends on ARM64
484 default y if !TARGET_THUNDERX_88XX
485 help
486 This ARM64 system supports AArch32 execution state.
487
488 choice
489 prompt "Target select"
490 default TARGET_HIKEY
491
492 config ARCH_AT91
493 bool "Atmel AT91"
494 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
495
496 config TARGET_EDB93XX
497 bool "Support edb93xx"
498 select CPU_ARM920T
499 select PL010_SERIAL
500
501 config TARGET_ASPENITE
502 bool "Support aspenite"
503 select CPU_ARM926EJS
504
505 config TARGET_GPLUGD
506 bool "Support gplugd"
507 select CPU_ARM926EJS
508
509 config ARCH_DAVINCI
510 bool "TI DaVinci"
511 select CPU_ARM926EJS
512 imply CMD_SAVES
513 help
514 Support for TI's DaVinci platform.
515
516 config KIRKWOOD
517 bool "Marvell Kirkwood"
518 select ARCH_MISC_INIT
519 select BOARD_EARLY_INIT_F
520 select CPU_ARM926EJS
521
522 config ARCH_MVEBU
523 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
524 select DM
525 select DM_ETH
526 select DM_SERIAL
527 select DM_SPI
528 select DM_SPI_FLASH
529 select OF_CONTROL
530 select OF_SEPARATE
531 select SPI
532 imply CMD_DM
533
534 config TARGET_APF27
535 bool "Support apf27"
536 select CPU_ARM926EJS
537 select SUPPORT_SPL
538
539 config ORION5X
540 bool "Marvell Orion"
541 select CPU_ARM926EJS
542
543 config TARGET_SPEAR300
544 bool "Support spear300"
545 select BOARD_EARLY_INIT_F
546 select CPU_ARM926EJS
547 select PL011_SERIAL
548 imply CMD_SAVES
549
550 config TARGET_SPEAR310
551 bool "Support spear310"
552 select BOARD_EARLY_INIT_F
553 select CPU_ARM926EJS
554 select PL011_SERIAL
555 imply CMD_SAVES
556
557 config TARGET_SPEAR320
558 bool "Support spear320"
559 select BOARD_EARLY_INIT_F
560 select CPU_ARM926EJS
561 select PL011_SERIAL
562 imply CMD_SAVES
563
564 config TARGET_SPEAR600
565 bool "Support spear600"
566 select BOARD_EARLY_INIT_F
567 select CPU_ARM926EJS
568 select PL011_SERIAL
569 imply CMD_SAVES
570
571 config TARGET_STV0991
572 bool "Support stv0991"
573 select CPU_V7A
574 select DM
575 select DM_SERIAL
576 select DM_SPI
577 select DM_SPI_FLASH
578 select PL01X_SERIAL
579 select SPI
580 select SPI_FLASH
581 imply CMD_DM
582
583 config TARGET_X600
584 bool "Support x600"
585 select BOARD_LATE_INIT
586 select CPU_ARM926EJS
587 select PL011_SERIAL
588 select SUPPORT_SPL
589
590 config TARGET_WOODBURN
591 bool "Support woodburn"
592 select CPU_ARM1136
593
594 config TARGET_WOODBURN_SD
595 bool "Support woodburn_sd"
596 select CPU_ARM1136
597 select SUPPORT_SPL
598
599 config TARGET_FLEA3
600 bool "Support flea3"
601 select CPU_ARM1136
602
603 config TARGET_MX35PDK
604 bool "Support mx35pdk"
605 select BOARD_LATE_INIT
606 select CPU_ARM1136
607
608 config ARCH_BCM283X
609 bool "Broadcom BCM283X family"
610 select DM
611 select DM_GPIO
612 select DM_SERIAL
613 select OF_CONTROL
614 select PL01X_SERIAL
615 select SERIAL_SEARCH_ALL
616 imply CMD_DM
617 imply FAT_WRITE
618
619 config ARCH_BCM63158
620 bool "Broadcom BCM63158 family"
621 select DM
622 select OF_CONTROL
623 imply CMD_DM
624
625 config ARCH_BCM6858
626 bool "Broadcom BCM6858 family"
627 select DM
628 select OF_CONTROL
629 imply CMD_DM
630
631 config TARGET_VEXPRESS_CA15_TC2
632 bool "Support vexpress_ca15_tc2"
633 select CPU_V7A
634 select CPU_V7_HAS_NONSEC
635 select CPU_V7_HAS_VIRT
636 select PL011_SERIAL
637
638 config ARCH_BCMSTB
639 bool "Broadcom BCM7XXX family"
640 select CPU_V7A
641 select DM
642 select OF_CONTROL
643 select OF_PRIOR_STAGE
644 imply CMD_DM
645 help
646 This enables support for Broadcom ARM-based set-top box
647 chipsets, including the 7445 family of chips.
648
649 config TARGET_VEXPRESS_CA5X2
650 bool "Support vexpress_ca5x2"
651 select CPU_V7A
652 select PL011_SERIAL
653
654 config TARGET_VEXPRESS_CA9X4
655 bool "Support vexpress_ca9x4"
656 select CPU_V7A
657 select PL011_SERIAL
658
659 config TARGET_BCM23550_W1D
660 bool "Support bcm23550_w1d"
661 select CPU_V7A
662 imply CRC32_VERIFY
663 imply FAT_WRITE
664
665 config TARGET_BCM28155_AP
666 bool "Support bcm28155_ap"
667 select CPU_V7A
668 imply CRC32_VERIFY
669 imply FAT_WRITE
670
671 config TARGET_BCMCYGNUS
672 bool "Support bcmcygnus"
673 select CPU_V7A
674 imply BCM_SF2_ETH
675 imply BCM_SF2_ETH_GMAC
676 imply CMD_HASH
677 imply CRC32_VERIFY
678 imply FAT_WRITE
679 imply HASH_VERIFY
680 imply NETDEVICES
681
682 config TARGET_BCMNSP
683 bool "Support bcmnsp"
684 select CPU_V7A
685
686 config TARGET_BCMNS2
687 bool "Support Broadcom Northstar2"
688 select ARM64
689 help
690 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
691 ARMv8 Cortex-A57 processors targeting a broad range of networking
692 applications
693
694 config ARCH_EXYNOS
695 bool "Samsung EXYNOS"
696 select DM
697 select DM_GPIO
698 select DM_I2C
699 select DM_KEYBOARD
700 select DM_SERIAL
701 select DM_SPI
702 select DM_SPI_FLASH
703 select SPI
704 imply SYS_THUMB_BUILD
705 imply CMD_DM
706 imply FAT_WRITE
707
708 config ARCH_S5PC1XX
709 bool "Samsung S5PC1XX"
710 select CPU_V7A
711 select DM
712 select DM_GPIO
713 select DM_I2C
714 select DM_SERIAL
715 imply CMD_DM
716
717 config ARCH_HIGHBANK
718 bool "Calxeda Highbank"
719 select CPU_V7A
720 select PL011_SERIAL
721
722 config ARCH_INTEGRATOR
723 bool "ARM Ltd. Integrator family"
724 select DM
725 select DM_SERIAL
726 select PL01X_SERIAL
727 imply CMD_DM
728
729 config ARCH_KEYSTONE
730 bool "TI Keystone"
731 select CMD_POWEROFF
732 select CPU_V7A
733 select SUPPORT_SPL
734 select SYS_ARCH_TIMER
735 select SYS_THUMB_BUILD
736 imply CMD_MTDPARTS
737 imply CMD_SAVES
738 imply FIT
739
740 config ARCH_K3
741 bool "Texas Instruments' K3 Architecture"
742 select SPL
743 select SUPPORT_SPL
744 select FIT
745
746 config ARCH_OMAP2PLUS
747 bool "TI OMAP2+"
748 select CPU_V7A
749 select SPL_BOARD_INIT if SPL
750 select SPL_STACK_R if SPL
751 select SUPPORT_SPL
752 imply FIT
753
754 config ARCH_MESON
755 bool "Amlogic Meson"
756 imply DISTRO_DEFAULTS
757 help
758 Support for the Meson SoC family developed by Amlogic Inc.,
759 targeted at media players and tablet computers. We currently
760 support the S905 (GXBaby) 64-bit SoC.
761
762 config ARCH_MEDIATEK
763 bool "MediaTek SoCs"
764 select BINMAN
765 select DM
766 select OF_CONTROL
767 select SPL_DM if SPL
768 select SPL_LIBCOMMON_SUPPORT if SPL
769 select SPL_LIBGENERIC_SUPPORT if SPL
770 select SPL_OF_CONTROL if SPL
771 select SUPPORT_SPL
772 help
773 Support for the MediaTek SoCs family developed by MediaTek Inc.
774 Please refer to doc/README.mediatek for more information.
775
776 config ARCH_LPC32XX
777 bool "NXP LPC32xx platform"
778 select CPU_ARM926EJS
779 select DM
780 select DM_GPIO
781 select DM_SERIAL
782 select SPL_DM if SPL
783 select SUPPORT_SPL
784 imply CMD_DM
785
786 config ARCH_IMX8
787 bool "NXP i.MX8 platform"
788 select ARM64
789 select DM
790 select OF_CONTROL
791 select ENABLE_ARM_SOC_BOOT0_HOOK
792
793 config ARCH_IMX8M
794 bool "NXP i.MX8M platform"
795 select ARM64
796 select DM
797 select SUPPORT_SPL
798 imply CMD_DM
799
800 config ARCH_MX23
801 bool "NXP i.MX23 family"
802 select CPU_ARM926EJS
803 select PL011_SERIAL
804 select SUPPORT_SPL
805
806 config ARCH_MX25
807 bool "NXP MX25"
808 select CPU_ARM926EJS
809 imply MXC_GPIO
810
811 config ARCH_MX28
812 bool "NXP i.MX28 family"
813 select CPU_ARM926EJS
814 select PL011_SERIAL
815 select SUPPORT_SPL
816
817 config ARCH_MX31
818 bool "NXP i.MX31 family"
819 select CPU_ARM1136
820
821 config ARCH_MX7ULP
822 bool "NXP MX7ULP"
823 select CPU_V7A
824 select ROM_UNIFIED_SECTIONS
825 imply MXC_GPIO
826
827 config ARCH_MX7
828 bool "Freescale MX7"
829 select ARCH_MISC_INIT
830 select BOARD_EARLY_INIT_F
831 select CPU_V7A
832 select SYS_FSL_HAS_SEC if IMX_HAB
833 select SYS_FSL_SEC_COMPAT_4
834 select SYS_FSL_SEC_LE
835 imply MXC_GPIO
836
837 config ARCH_MX6
838 bool "Freescale MX6"
839 select CPU_V7A
840 select SYS_FSL_HAS_SEC if IMX_HAB
841 select SYS_FSL_SEC_COMPAT_4
842 select SYS_FSL_SEC_LE
843 select SYS_THUMB_BUILD if SPL
844 imply MXC_GPIO
845
846 if ARCH_MX6
847 config SPL_LDSCRIPT
848 default "arch/arm/mach-omap2/u-boot-spl.lds"
849 endif
850
851 config ARCH_MX5
852 bool "Freescale MX5"
853 select BOARD_EARLY_INIT_F
854 select CPU_V7A
855 imply MXC_GPIO
856
857 config ARCH_OWL
858 bool "Actions Semi OWL SoCs"
859 select ARM64
860 select DM
861 select DM_SERIAL
862 select OF_CONTROL
863 imply CMD_DM
864
865 config ARCH_QEMU
866 bool "QEMU Virtual Platform"
867 select ARCH_SUPPORT_TFABOOT
868 select DM
869 select DM_SERIAL
870 select OF_CONTROL
871 select PL01X_SERIAL
872 imply CMD_DM
873 imply DM_RTC
874 imply RTC_PL031
875
876 config ARCH_RMOBILE
877 bool "Renesas ARM SoCs"
878 select BOARD_EARLY_INIT_F if !RZA1
879 select DM
880 select DM_SERIAL
881 imply CMD_DM
882 imply FAT_WRITE
883 imply SYS_THUMB_BUILD
884 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
885
886 config TARGET_S32V234EVB
887 bool "Support s32v234evb"
888 select ARM64
889 select SYS_FSL_ERRATUM_ESDHC111
890
891 config ARCH_SNAPDRAGON
892 bool "Qualcomm Snapdragon SoCs"
893 select ARM64
894 select DM
895 select DM_GPIO
896 select DM_SERIAL
897 select MSM_SMEM
898 select OF_CONTROL
899 select OF_SEPARATE
900 select SMEM
901 select SPMI
902 imply CMD_DM
903
904 config ARCH_SOCFPGA
905 bool "Altera SOCFPGA family"
906 select ARCH_EARLY_INIT_R
907 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
908 select ARM64 if TARGET_SOCFPGA_STRATIX10
909 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
910 select DM
911 select DM_SERIAL
912 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
913 select OF_CONTROL
914 select SPL_DM_RESET if DM_RESET
915 select SPL_DM_SERIAL
916 select SPL_LIBCOMMON_SUPPORT
917 select SPL_LIBGENERIC_SUPPORT
918 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
919 select SPL_OF_CONTROL
920 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
921 select SPL_SERIAL_SUPPORT
922 select SPL_SYSRESET
923 select SPL_WATCHDOG_SUPPORT
924 select SUPPORT_SPL
925 select SYS_NS16550
926 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
927 select SYSRESET
928 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
929 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
930 imply CMD_DM
931 imply CMD_MTDPARTS
932 imply CRC32_VERIFY
933 imply DM_SPI
934 imply DM_SPI_FLASH
935 imply FAT_WRITE
936 imply SPL
937 imply SPL_DM
938 imply SPL_LIBDISK_SUPPORT
939 imply SPL_MMC_SUPPORT
940 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
941 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
942 imply SPL_SPI_FLASH_SUPPORT
943 imply SPL_SPI_SUPPORT
944 imply L2X0_CACHE
945
946 config ARCH_SUNXI
947 bool "Support sunxi (Allwinner) SoCs"
948 select BINMAN
949 select CMD_GPIO
950 select CMD_MMC if MMC
951 select CMD_USB if DISTRO_DEFAULTS
952 select CLK
953 select DM
954 select DM_ETH
955 select DM_GPIO
956 select DM_KEYBOARD
957 select DM_MMC if MMC
958 select DM_SCSI if SCSI
959 select DM_SERIAL
960 select DM_USB if DISTRO_DEFAULTS
961 select OF_BOARD_SETUP
962 select OF_CONTROL
963 select OF_SEPARATE
964 select SPECIFY_CONSOLE_INDEX
965 select SPL_STACK_R if SPL
966 select SPL_SYS_MALLOC_SIMPLE if SPL
967 select SPL_SYS_THUMB_BUILD if !ARM64
968 select SUNXI_GPIO
969 select SYS_NS16550
970 select SYS_THUMB_BUILD if !ARM64
971 select USB if DISTRO_DEFAULTS
972 select USB_KEYBOARD if DISTRO_DEFAULTS
973 select USB_STORAGE if DISTRO_DEFAULTS
974 select SPL_USE_TINY_PRINTF
975 imply CMD_DM
976 imply CMD_GPT
977 imply CMD_UBI if NAND
978 imply DISTRO_DEFAULTS
979 imply FAT_WRITE
980 imply FIT
981 imply OF_LIBFDT_OVERLAY
982 imply PRE_CONSOLE_BUFFER
983 imply SPL_GPIO_SUPPORT
984 imply SPL_LIBCOMMON_SUPPORT
985 imply SPL_LIBGENERIC_SUPPORT
986 imply SPL_MMC_SUPPORT if MMC
987 imply SPL_POWER_SUPPORT
988 imply SPL_SERIAL_SUPPORT
989 imply USB_GADGET
990
991 config ARCH_VERSAL
992 bool "Support Xilinx Versal Platform"
993 select ARM64
994 select CLK
995 select DM
996 select DM_ETH if NET
997 select DM_MMC if MMC
998 select DM_SERIAL
999 select OF_CONTROL
1000 imply BOARD_LATE_INIT
1001
1002 config ARCH_VF610
1003 bool "Freescale Vybrid"
1004 select CPU_V7A
1005 select SYS_FSL_ERRATUM_ESDHC111
1006 imply CMD_MTDPARTS
1007 imply NAND
1008
1009 config ARCH_ZYNQ
1010 bool "Xilinx Zynq based platform"
1011 select CLK
1012 select CLK_ZYNQ
1013 select CPU_V7A
1014 select DM
1015 select DM_ETH if NET
1016 select DM_MMC if MMC
1017 select DM_SERIAL
1018 select DM_SPI
1019 select DM_SPI_FLASH
1020 select DM_USB if USB
1021 select OF_CONTROL
1022 select SPI
1023 select SPL_BOARD_INIT if SPL
1024 select SPL_CLK if SPL
1025 select SPL_DM if SPL
1026 select SPL_OF_CONTROL if SPL
1027 select SPL_SEPARATE_BSS if SPL
1028 select SUPPORT_SPL
1029 imply ARCH_EARLY_INIT_R
1030 imply BOARD_LATE_INIT
1031 imply CMD_CLK
1032 imply CMD_DM
1033 imply CMD_SPL
1034 imply FAT_WRITE
1035
1036 config ARCH_ZYNQMP_R5
1037 bool "Xilinx ZynqMP R5 based platform"
1038 select CLK
1039 select CPU_V7R
1040 select DM
1041 select DM_ETH if NET
1042 select DM_MMC if MMC
1043 select DM_SERIAL
1044 select OF_CONTROL
1045 imply CMD_DM
1046 imply DM_USB_GADGET
1047
1048 config ARCH_ZYNQMP
1049 bool "Xilinx ZynqMP based platform"
1050 select ARM64
1051 select CLK
1052 select DM
1053 select DM_ETH if NET
1054 select DM_MAILBOX
1055 select DM_MMC if MMC
1056 select DM_SERIAL
1057 select DM_SPI if SPI
1058 select DM_SPI_FLASH if DM_SPI
1059 select DM_USB if USB
1060 select FIRMWARE
1061 select OF_CONTROL
1062 select SPL_BOARD_INIT if SPL
1063 select SPL_CLK if SPL
1064 select SPL_DM_MAILBOX if SPL
1065 select SPL_FIRMWARE if SPL
1066 select SPL_SEPARATE_BSS if SPL
1067 select SUPPORT_SPL
1068 select ZYNQMP_IPI
1069 imply BOARD_LATE_INIT
1070 imply CMD_DM
1071 imply FAT_WRITE
1072 imply MP
1073 imply DM_USB_GADGET
1074
1075 config TEGRA
1076 bool "NVIDIA Tegra"
1077 imply DISTRO_DEFAULTS
1078 imply FAT_WRITE
1079
1080 config TARGET_VEXPRESS64_AEMV8A
1081 bool "Support vexpress_aemv8a"
1082 select ARM64
1083 select PL01X_SERIAL
1084
1085 config TARGET_VEXPRESS64_BASE_FVP
1086 bool "Support Versatile Express ARMv8a FVP BASE model"
1087 select ARM64
1088 select PL01X_SERIAL
1089 select SEMIHOSTING
1090
1091 config TARGET_VEXPRESS64_JUNO
1092 bool "Support Versatile Express Juno Development Platform"
1093 select ARM64
1094 select PL01X_SERIAL
1095
1096 config TARGET_LS2080A_EMU
1097 bool "Support ls2080a_emu"
1098 select ARCH_LS2080A
1099 select ARCH_MISC_INIT
1100 select ARM64
1101 select ARMV8_MULTIENTRY
1102 select FSL_DDR_SYNC_REFRESH
1103 help
1104 Support for Freescale LS2080A_EMU platform
1105 The LS2080A Development System (EMULATOR) is a pre silicon
1106 development platform that supports the QorIQ LS2080A
1107 Layerscape Architecture processor.
1108
1109 config TARGET_LS2080A_SIMU
1110 bool "Support ls2080a_simu"
1111 select ARCH_LS2080A
1112 select ARCH_MISC_INIT
1113 select ARM64
1114 select ARMV8_MULTIENTRY
1115 select BOARD_LATE_INIT
1116 help
1117 Support for Freescale LS2080A_SIMU platform
1118 The LS2080A Development System (QDS) is a pre silicon
1119 development platform that supports the QorIQ LS2080A
1120 Layerscape Architecture processor.
1121
1122 config TARGET_LS1088AQDS
1123 bool "Support ls1088aqds"
1124 select ARCH_LS1088A
1125 select ARCH_MISC_INIT
1126 select ARM64
1127 select ARMV8_MULTIENTRY
1128 select ARCH_SUPPORT_TFABOOT
1129 select BOARD_LATE_INIT
1130 select SUPPORT_SPL
1131 select FSL_DDR_INTERACTIVE if !SD_BOOT
1132 help
1133 Support for NXP LS1088AQDS platform
1134 The LS1088A Development System (QDS) is a high-performance
1135 development platform that supports the QorIQ LS1088A
1136 Layerscape Architecture processor.
1137
1138 config TARGET_LS2080AQDS
1139 bool "Support ls2080aqds"
1140 select ARCH_LS2080A
1141 select ARCH_MISC_INIT
1142 select ARM64
1143 select ARMV8_MULTIENTRY
1144 select ARCH_SUPPORT_TFABOOT
1145 select BOARD_LATE_INIT
1146 select SUPPORT_SPL
1147 imply SCSI
1148 imply SCSI_AHCI
1149 select FSL_DDR_BIST
1150 select FSL_DDR_INTERACTIVE if !SPL
1151 help
1152 Support for Freescale LS2080AQDS platform
1153 The LS2080A Development System (QDS) is a high-performance
1154 development platform that supports the QorIQ LS2080A
1155 Layerscape Architecture processor.
1156
1157 config TARGET_LS2080ARDB
1158 bool "Support ls2080ardb"
1159 select ARCH_LS2080A
1160 select ARCH_MISC_INIT
1161 select ARM64
1162 select ARMV8_MULTIENTRY
1163 select ARCH_SUPPORT_TFABOOT
1164 select BOARD_LATE_INIT
1165 select SUPPORT_SPL
1166 select FSL_DDR_BIST
1167 select FSL_DDR_INTERACTIVE if !SPL
1168 imply SCSI
1169 imply SCSI_AHCI
1170 help
1171 Support for Freescale LS2080ARDB platform.
1172 The LS2080A Reference design board (RDB) is a high-performance
1173 development platform that supports the QorIQ LS2080A
1174 Layerscape Architecture processor.
1175
1176 config TARGET_LS2081ARDB
1177 bool "Support ls2081ardb"
1178 select ARCH_LS2080A
1179 select ARCH_MISC_INIT
1180 select ARM64
1181 select ARMV8_MULTIENTRY
1182 select BOARD_LATE_INIT
1183 select SUPPORT_SPL
1184 help
1185 Support for Freescale LS2081ARDB platform.
1186 The LS2081A Reference design board (RDB) is a high-performance
1187 development platform that supports the QorIQ LS2081A/LS2041A
1188 Layerscape Architecture processor.
1189
1190 config TARGET_LX2160ARDB
1191 bool "Support lx2160ardb"
1192 select ARCH_LX2160A
1193 select ARCH_MISC_INIT
1194 select ARM64
1195 select ARMV8_MULTIENTRY
1196 select ARCH_SUPPORT_TFABOOT
1197 select BOARD_LATE_INIT
1198 help
1199 Support for NXP LX2160ARDB platform.
1200 The lx2160ardb (LX2160A Reference design board (RDB)
1201 is a high-performance development platform that supports the
1202 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1203
1204 config TARGET_LX2160AQDS
1205 bool "Support lx2160aqds"
1206 select ARCH_LX2160A
1207 select ARCH_MISC_INIT
1208 select ARM64
1209 select ARMV8_MULTIENTRY
1210 select ARCH_SUPPORT_TFABOOT
1211 select BOARD_LATE_INIT
1212 help
1213 Support for NXP LX2160AQDS platform.
1214 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1215 is a high-performance development platform that supports the
1216 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1217
1218 config TARGET_HIKEY
1219 bool "Support HiKey 96boards Consumer Edition Platform"
1220 select ARM64
1221 select DM
1222 select DM_GPIO
1223 select DM_SERIAL
1224 select OF_CONTROL
1225 select PL01X_SERIAL
1226 select SPECIFY_CONSOLE_INDEX
1227 imply CMD_DM
1228 help
1229 Support for HiKey 96boards platform. It features a HI6220
1230 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1231
1232 config TARGET_HIKEY960
1233 bool "Support HiKey960 96boards Consumer Edition Platform"
1234 select ARM64
1235 select DM
1236 select DM_SERIAL
1237 select OF_CONTROL
1238 select PL01X_SERIAL
1239 imply CMD_DM
1240 help
1241 Support for HiKey960 96boards platform. It features a HI3660
1242 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1243
1244 config TARGET_POPLAR
1245 bool "Support Poplar 96boards Enterprise Edition Platform"
1246 select ARM64
1247 select DM
1248 select DM_SERIAL
1249 select DM_USB
1250 select OF_CONTROL
1251 select PL01X_SERIAL
1252 imply CMD_DM
1253 help
1254 Support for Poplar 96boards EE platform. It features a HI3798cv200
1255 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1256 making it capable of running any commercial set-top solution based on
1257 Linux or Android.
1258
1259 config TARGET_LS1012AQDS
1260 bool "Support ls1012aqds"
1261 select ARCH_LS1012A
1262 select ARM64
1263 select ARCH_SUPPORT_TFABOOT
1264 select BOARD_LATE_INIT
1265 help
1266 Support for Freescale LS1012AQDS platform.
1267 The LS1012A Development System (QDS) is a high-performance
1268 development platform that supports the QorIQ LS1012A
1269 Layerscape Architecture processor.
1270
1271 config TARGET_LS1012ARDB
1272 bool "Support ls1012ardb"
1273 select ARCH_LS1012A
1274 select ARM64
1275 select ARCH_SUPPORT_TFABOOT
1276 select BOARD_LATE_INIT
1277 imply SCSI
1278 imply SCSI_AHCI
1279 help
1280 Support for Freescale LS1012ARDB platform.
1281 The LS1012A Reference design board (RDB) is a high-performance
1282 development platform that supports the QorIQ LS1012A
1283 Layerscape Architecture processor.
1284
1285 config TARGET_LS1012A2G5RDB
1286 bool "Support ls1012a2g5rdb"
1287 select ARCH_LS1012A
1288 select ARM64
1289 select ARCH_SUPPORT_TFABOOT
1290 select BOARD_LATE_INIT
1291 imply SCSI
1292 help
1293 Support for Freescale LS1012A2G5RDB platform.
1294 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1295 development platform that supports the QorIQ LS1012A
1296 Layerscape Architecture processor.
1297
1298 config TARGET_LS1012AFRWY
1299 bool "Support ls1012afrwy"
1300 select ARCH_LS1012A
1301 select ARM64
1302 select ARCH_SUPPORT_TFABOOT
1303 select BOARD_LATE_INIT
1304 imply SCSI
1305 imply SCSI_AHCI
1306 help
1307 Support for Freescale LS1012AFRWY platform.
1308 The LS1012A FRWY board (FRWY) is a high-performance
1309 development platform that supports the QorIQ LS1012A
1310 Layerscape Architecture processor.
1311
1312 config TARGET_LS1012AFRDM
1313 bool "Support ls1012afrdm"
1314 select ARCH_LS1012A
1315 select ARM64
1316 select ARCH_SUPPORT_TFABOOT
1317 help
1318 Support for Freescale LS1012AFRDM platform.
1319 The LS1012A Freedom board (FRDM) is a high-performance
1320 development platform that supports the QorIQ LS1012A
1321 Layerscape Architecture processor.
1322
1323 config TARGET_LS1028AQDS
1324 bool "Support ls1028aqds"
1325 select ARCH_LS1028A
1326 select ARM64
1327 select ARMV8_MULTIENTRY
1328 select ARCH_SUPPORT_TFABOOT
1329 select BOARD_LATE_INIT
1330 select ARCH_MISC_INIT
1331 help
1332 Support for Freescale LS1028AQDS platform
1333 The LS1028A Development System (QDS) is a high-performance
1334 development platform that supports the QorIQ LS1028A
1335 Layerscape Architecture processor.
1336
1337 config TARGET_LS1028ARDB
1338 bool "Support ls1028ardb"
1339 select ARCH_LS1028A
1340 select ARM64
1341 select ARMV8_MULTIENTRY
1342 select ARCH_SUPPORT_TFABOOT
1343 help
1344 Support for Freescale LS1028ARDB platform
1345 The LS1028A Development System (RDB) is a high-performance
1346 development platform that supports the QorIQ LS1028A
1347 Layerscape Architecture processor.
1348
1349 config TARGET_LS1088ARDB
1350 bool "Support ls1088ardb"
1351 select ARCH_LS1088A
1352 select ARCH_MISC_INIT
1353 select ARM64
1354 select ARMV8_MULTIENTRY
1355 select ARCH_SUPPORT_TFABOOT
1356 select BOARD_LATE_INIT
1357 select SUPPORT_SPL
1358 select FSL_DDR_INTERACTIVE if !SD_BOOT
1359 help
1360 Support for NXP LS1088ARDB platform.
1361 The LS1088A Reference design board (RDB) is a high-performance
1362 development platform that supports the QorIQ LS1088A
1363 Layerscape Architecture processor.
1364
1365 config TARGET_LS1021AQDS
1366 bool "Support ls1021aqds"
1367 select ARCH_LS1021A
1368 select ARCH_SUPPORT_PSCI
1369 select BOARD_EARLY_INIT_F
1370 select BOARD_LATE_INIT
1371 select CPU_V7A
1372 select CPU_V7_HAS_NONSEC
1373 select CPU_V7_HAS_VIRT
1374 select LS1_DEEP_SLEEP
1375 select SUPPORT_SPL
1376 select SYS_FSL_DDR
1377 select FSL_DDR_INTERACTIVE
1378 imply SCSI
1379
1380 config TARGET_LS1021ATWR
1381 bool "Support ls1021atwr"
1382 select ARCH_LS1021A
1383 select ARCH_SUPPORT_PSCI
1384 select BOARD_EARLY_INIT_F
1385 select BOARD_LATE_INIT
1386 select CPU_V7A
1387 select CPU_V7_HAS_NONSEC
1388 select CPU_V7_HAS_VIRT
1389 select LS1_DEEP_SLEEP
1390 select SUPPORT_SPL
1391 imply SCSI
1392
1393 config TARGET_LS1021ATSN
1394 bool "Support ls1021atsn"
1395 select ARCH_LS1021A
1396 select ARCH_SUPPORT_PSCI
1397 select BOARD_EARLY_INIT_F
1398 select BOARD_LATE_INIT
1399 select CPU_V7A
1400 select CPU_V7_HAS_NONSEC
1401 select CPU_V7_HAS_VIRT
1402 select LS1_DEEP_SLEEP
1403 select SUPPORT_SPL
1404 imply SCSI
1405
1406 config TARGET_LS1021AIOT
1407 bool "Support ls1021aiot"
1408 select ARCH_LS1021A
1409 select ARCH_SUPPORT_PSCI
1410 select BOARD_LATE_INIT
1411 select CPU_V7A
1412 select CPU_V7_HAS_NONSEC
1413 select CPU_V7_HAS_VIRT
1414 select SUPPORT_SPL
1415 imply SCSI
1416 help
1417 Support for Freescale LS1021AIOT platform.
1418 The LS1021A Freescale board (IOT) is a high-performance
1419 development platform that supports the QorIQ LS1021A
1420 Layerscape Architecture processor.
1421
1422 config TARGET_LS1043AQDS
1423 bool "Support ls1043aqds"
1424 select ARCH_LS1043A
1425 select ARM64
1426 select ARMV8_MULTIENTRY
1427 select ARCH_SUPPORT_TFABOOT
1428 select BOARD_EARLY_INIT_F
1429 select BOARD_LATE_INIT
1430 select SUPPORT_SPL
1431 select FSL_DDR_INTERACTIVE if !SPL
1432 imply SCSI
1433 imply SCSI_AHCI
1434 help
1435 Support for Freescale LS1043AQDS platform.
1436
1437 config TARGET_LS1043ARDB
1438 bool "Support ls1043ardb"
1439 select ARCH_LS1043A
1440 select ARM64
1441 select ARMV8_MULTIENTRY
1442 select ARCH_SUPPORT_TFABOOT
1443 select BOARD_EARLY_INIT_F
1444 select BOARD_LATE_INIT
1445 select SUPPORT_SPL
1446 help
1447 Support for Freescale LS1043ARDB platform.
1448
1449 config TARGET_LS1046AQDS
1450 bool "Support ls1046aqds"
1451 select ARCH_LS1046A
1452 select ARM64
1453 select ARMV8_MULTIENTRY
1454 select ARCH_SUPPORT_TFABOOT
1455 select BOARD_EARLY_INIT_F
1456 select BOARD_LATE_INIT
1457 select DM_SPI_FLASH if DM_SPI
1458 select SUPPORT_SPL
1459 select FSL_DDR_BIST if !SPL
1460 select FSL_DDR_INTERACTIVE if !SPL
1461 select FSL_DDR_INTERACTIVE if !SPL
1462 imply SCSI
1463 help
1464 Support for Freescale LS1046AQDS platform.
1465 The LS1046A Development System (QDS) is a high-performance
1466 development platform that supports the QorIQ LS1046A
1467 Layerscape Architecture processor.
1468
1469 config TARGET_LS1046ARDB
1470 bool "Support ls1046ardb"
1471 select ARCH_LS1046A
1472 select ARM64
1473 select ARMV8_MULTIENTRY
1474 select ARCH_SUPPORT_TFABOOT
1475 select BOARD_EARLY_INIT_F
1476 select BOARD_LATE_INIT
1477 select DM_SPI_FLASH if DM_SPI
1478 select POWER_MC34VR500
1479 select SUPPORT_SPL
1480 select FSL_DDR_BIST
1481 select FSL_DDR_INTERACTIVE if !SPL
1482 imply SCSI
1483 help
1484 Support for Freescale LS1046ARDB platform.
1485 The LS1046A Reference Design Board (RDB) is a high-performance
1486 development platform that supports the QorIQ LS1046A
1487 Layerscape Architecture processor.
1488
1489 config TARGET_LS1046AFRWY
1490 bool "Support ls1046afrwy"
1491 select ARCH_LS1046A
1492 select ARM64
1493 select ARMV8_MULTIENTRY
1494 select ARCH_SUPPORT_TFABOOT
1495 select BOARD_EARLY_INIT_F
1496 select BOARD_LATE_INIT
1497 select DM_SPI_FLASH if DM_SPI
1498 imply SCSI
1499 help
1500 Support for Freescale LS1046AFRWY platform.
1501 The LS1046A Freeway Board (FRWY) is a high-performance
1502 development platform that supports the QorIQ LS1046A
1503 Layerscape Architecture processor.
1504
1505 config TARGET_COLIBRI_PXA270
1506 bool "Support colibri_pxa270"
1507 select CPU_PXA
1508
1509 config ARCH_UNIPHIER
1510 bool "Socionext UniPhier SoCs"
1511 select BOARD_LATE_INIT
1512 select DM
1513 select DM_GPIO
1514 select DM_I2C
1515 select DM_MMC
1516 select DM_RESET
1517 select DM_SERIAL
1518 select DM_USB
1519 select OF_BOARD_SETUP
1520 select OF_CONTROL
1521 select OF_LIBFDT
1522 select PINCTRL
1523 select SPL_BOARD_INIT if SPL
1524 select SPL_DM if SPL
1525 select SPL_LIBCOMMON_SUPPORT if SPL
1526 select SPL_LIBGENERIC_SUPPORT if SPL
1527 select SPL_OF_CONTROL if SPL
1528 select SPL_PINCTRL if SPL
1529 select SUPPORT_SPL
1530 imply CMD_DM
1531 imply DISTRO_DEFAULTS
1532 imply FAT_WRITE
1533 help
1534 Support for UniPhier SoC family developed by Socionext Inc.
1535 (formerly, System LSI Business Division of Panasonic Corporation)
1536
1537 config STM32
1538 bool "Support STMicroelectronics STM32 MCU with cortex M"
1539 select CPU_V7M
1540 select DM
1541 select DM_SERIAL
1542 imply CMD_DM
1543
1544 config ARCH_STI
1545 bool "Support STMicrolectronics SoCs"
1546 select BLK
1547 select CPU_V7A
1548 select DM
1549 select DM_MMC
1550 select DM_RESET
1551 select DM_SERIAL
1552 imply CMD_DM
1553 help
1554 Support for STMicroelectronics STiH407/10 SoC family.
1555 This SoC is used on Linaro 96Board STiH410-B2260
1556
1557 config ARCH_STM32MP
1558 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1559 select ARCH_MISC_INIT
1560 select BOARD_LATE_INIT
1561 select CLK
1562 select DM
1563 select DM_GPIO
1564 select DM_RESET
1565 select DM_SERIAL
1566 select MISC
1567 select OF_CONTROL
1568 select OF_LIBFDT
1569 select OF_SYSTEM_SETUP
1570 select PINCTRL
1571 select REGMAP
1572 select SUPPORT_SPL
1573 select SYSCON
1574 select SYSRESET
1575 select SYS_THUMB_BUILD
1576 imply SPL_SYSRESET
1577 imply CMD_DM
1578 imply CMD_POWEROFF
1579 imply OF_LIBFDT_OVERLAY
1580 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1581 imply USE_PREBOOT
1582 help
1583 Support for STM32MP SoC family developed by STMicroelectronics,
1584 MPUs based on ARM cortex A core
1585 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1586 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1587 chain.
1588 SPL is the unsecure FSBL for the basic boot chain.
1589
1590 config ARCH_ROCKCHIP
1591 bool "Support Rockchip SoCs"
1592 select BLK
1593 select DM
1594 select DM_GPIO
1595 select DM_I2C
1596 select DM_MMC
1597 select DM_PWM
1598 select DM_REGULATOR
1599 select DM_SERIAL
1600 select DM_SPI
1601 select DM_SPI_FLASH
1602 select DM_USB if USB
1603 select ENABLE_ARM_SOC_BOOT0_HOOK
1604 select OF_CONTROL
1605 select SPI
1606 select SPL_DM if SPL
1607 select SYS_MALLOC_F
1608 select SYS_THUMB_BUILD if !ARM64
1609 imply ADC
1610 imply CMD_DM
1611 imply DEBUG_UART_BOARD_INIT
1612 imply DISTRO_DEFAULTS
1613 imply FAT_WRITE
1614 imply SARADC_ROCKCHIP
1615 imply SPL_SYSRESET
1616 imply SPL_SYS_MALLOC_SIMPLE
1617 imply SYS_NS16550
1618 imply TPL_SYSRESET
1619 imply USB_FUNCTION_FASTBOOT
1620
1621 config TARGET_THUNDERX_88XX
1622 bool "Support ThunderX 88xx"
1623 select ARM64
1624 select OF_CONTROL
1625 select PL01X_SERIAL
1626 select SYS_CACHE_SHIFT_7
1627
1628 config ARCH_ASPEED
1629 bool "Support Aspeed SoCs"
1630 select DM
1631 select OF_CONTROL
1632 imply CMD_DM
1633
1634 config TARGET_DURIAN
1635 bool "Support Phytium Durian Platform"
1636 select ARM64
1637 help
1638 Support for durian platform.
1639 It has 2GB Sdram, uart and pcie.
1640
1641 endchoice
1642
1643 config ARCH_SUPPORT_TFABOOT
1644 bool
1645
1646 config TFABOOT
1647 bool "Support for booting from TF-A"
1648 depends on ARCH_SUPPORT_TFABOOT
1649 default n
1650 help
1651 Enabling this will make a U-Boot binary that is capable of being
1652 booted via TF-A.
1653
1654 config TI_SECURE_DEVICE
1655 bool "HS Device Type Support"
1656 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1657 help
1658 If a high secure (HS) device type is being used, this config
1659 must be set. This option impacts various aspects of the
1660 build system (to create signed boot images that can be
1661 authenticated) and the code. See the doc/README.ti-secure
1662 file for further details.
1663
1664 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1665 config ISW_ENTRY_ADDR
1666 hex "Address in memory or XIP address of bootloader entry point"
1667 default 0x402F4000 if AM43XX
1668 default 0x402F0400 if AM33XX
1669 default 0x40301350 if OMAP54XX
1670 help
1671 After any reset, the boot ROM searches the boot media for a valid
1672 boot image. For non-XIP devices, the ROM then copies the image into
1673 internal memory. For all boot modes, after the ROM processes the
1674 boot image it eventually computes the entry point address depending
1675 on the device type (secure/non-secure), boot media (xip/non-xip) and
1676 image headers.
1677 endif
1678
1679 source "arch/arm/mach-aspeed/Kconfig"
1680
1681 source "arch/arm/mach-at91/Kconfig"
1682
1683 source "arch/arm/mach-bcm283x/Kconfig"
1684
1685 source "arch/arm/mach-bcmstb/Kconfig"
1686
1687 source "arch/arm/mach-davinci/Kconfig"
1688
1689 source "arch/arm/mach-exynos/Kconfig"
1690
1691 source "arch/arm/mach-highbank/Kconfig"
1692
1693 source "arch/arm/mach-integrator/Kconfig"
1694
1695 source "arch/arm/mach-k3/Kconfig"
1696
1697 source "arch/arm/mach-keystone/Kconfig"
1698
1699 source "arch/arm/mach-kirkwood/Kconfig"
1700
1701 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1702
1703 source "arch/arm/mach-mvebu/Kconfig"
1704
1705 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1706
1707 source "arch/arm/mach-imx/mx2/Kconfig"
1708
1709 source "arch/arm/mach-imx/mx3/Kconfig"
1710
1711 source "arch/arm/mach-imx/mx5/Kconfig"
1712
1713 source "arch/arm/mach-imx/mx6/Kconfig"
1714
1715 source "arch/arm/mach-imx/mx7/Kconfig"
1716
1717 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1718
1719 source "arch/arm/mach-imx/imx8/Kconfig"
1720
1721 source "arch/arm/mach-imx/imx8m/Kconfig"
1722
1723 source "arch/arm/mach-imx/mxs/Kconfig"
1724
1725 source "arch/arm/mach-omap2/Kconfig"
1726
1727 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1728
1729 source "arch/arm/mach-orion5x/Kconfig"
1730
1731 source "arch/arm/mach-owl/Kconfig"
1732
1733 source "arch/arm/mach-rmobile/Kconfig"
1734
1735 source "arch/arm/mach-meson/Kconfig"
1736
1737 source "arch/arm/mach-mediatek/Kconfig"
1738
1739 source "arch/arm/mach-qemu/Kconfig"
1740
1741 source "arch/arm/mach-rockchip/Kconfig"
1742
1743 source "arch/arm/mach-s5pc1xx/Kconfig"
1744
1745 source "arch/arm/mach-snapdragon/Kconfig"
1746
1747 source "arch/arm/mach-socfpga/Kconfig"
1748
1749 source "arch/arm/mach-sti/Kconfig"
1750
1751 source "arch/arm/mach-stm32/Kconfig"
1752
1753 source "arch/arm/mach-stm32mp/Kconfig"
1754
1755 source "arch/arm/mach-sunxi/Kconfig"
1756
1757 source "arch/arm/mach-tegra/Kconfig"
1758
1759 source "arch/arm/mach-uniphier/Kconfig"
1760
1761 source "arch/arm/cpu/armv7/vf610/Kconfig"
1762
1763 source "arch/arm/mach-zynq/Kconfig"
1764
1765 source "arch/arm/mach-zynqmp/Kconfig"
1766
1767 source "arch/arm/mach-versal/Kconfig"
1768
1769 source "arch/arm/mach-zynqmp-r5/Kconfig"
1770
1771 source "arch/arm/cpu/armv7/Kconfig"
1772
1773 source "arch/arm/cpu/armv8/Kconfig"
1774
1775 source "arch/arm/mach-imx/Kconfig"
1776
1777 source "board/bosch/shc/Kconfig"
1778 source "board/bosch/guardian/Kconfig"
1779 source "board/CarMediaLab/flea3/Kconfig"
1780 source "board/Marvell/aspenite/Kconfig"
1781 source "board/Marvell/gplugd/Kconfig"
1782 source "board/armadeus/apf27/Kconfig"
1783 source "board/armltd/vexpress/Kconfig"
1784 source "board/armltd/vexpress64/Kconfig"
1785 source "board/broadcom/bcm23550_w1d/Kconfig"
1786 source "board/broadcom/bcm28155_ap/Kconfig"
1787 source "board/broadcom/bcm963158/Kconfig"
1788 source "board/broadcom/bcm968580xref/Kconfig"
1789 source "board/broadcom/bcmcygnus/Kconfig"
1790 source "board/broadcom/bcmnsp/Kconfig"
1791 source "board/broadcom/bcmns2/Kconfig"
1792 source "board/cavium/thunderx/Kconfig"
1793 source "board/cirrus/edb93xx/Kconfig"
1794 source "board/eets/pdu001/Kconfig"
1795 source "board/emulation/qemu-arm/Kconfig"
1796 source "board/freescale/ls2080a/Kconfig"
1797 source "board/freescale/ls2080aqds/Kconfig"
1798 source "board/freescale/ls2080ardb/Kconfig"
1799 source "board/freescale/ls1088a/Kconfig"
1800 source "board/freescale/ls1028a/Kconfig"
1801 source "board/freescale/ls1021aqds/Kconfig"
1802 source "board/freescale/ls1043aqds/Kconfig"
1803 source "board/freescale/ls1021atwr/Kconfig"
1804 source "board/freescale/ls1021atsn/Kconfig"
1805 source "board/freescale/ls1021aiot/Kconfig"
1806 source "board/freescale/ls1046aqds/Kconfig"
1807 source "board/freescale/ls1043ardb/Kconfig"
1808 source "board/freescale/ls1046ardb/Kconfig"
1809 source "board/freescale/ls1046afrwy/Kconfig"
1810 source "board/freescale/ls1012aqds/Kconfig"
1811 source "board/freescale/ls1012ardb/Kconfig"
1812 source "board/freescale/ls1012afrdm/Kconfig"
1813 source "board/freescale/lx2160a/Kconfig"
1814 source "board/freescale/mx35pdk/Kconfig"
1815 source "board/freescale/s32v234evb/Kconfig"
1816 source "board/grinn/chiliboard/Kconfig"
1817 source "board/gumstix/pepper/Kconfig"
1818 source "board/hisilicon/hikey/Kconfig"
1819 source "board/hisilicon/hikey960/Kconfig"
1820 source "board/hisilicon/poplar/Kconfig"
1821 source "board/isee/igep003x/Kconfig"
1822 source "board/phytec/pcm051/Kconfig"
1823 source "board/silica/pengwyn/Kconfig"
1824 source "board/spear/spear300/Kconfig"
1825 source "board/spear/spear310/Kconfig"
1826 source "board/spear/spear320/Kconfig"
1827 source "board/spear/spear600/Kconfig"
1828 source "board/spear/x600/Kconfig"
1829 source "board/st/stv0991/Kconfig"
1830 source "board/tcl/sl50/Kconfig"
1831 source "board/ucRobotics/bubblegum_96/Kconfig"
1832 source "board/birdland/bav335x/Kconfig"
1833 source "board/toradex/colibri_pxa270/Kconfig"
1834 source "board/variscite/dart_6ul/Kconfig"
1835 source "board/vscom/baltos/Kconfig"
1836 source "board/woodburn/Kconfig"
1837 source "board/xilinx/Kconfig"
1838 source "board/xilinx/zynq/Kconfig"
1839 source "board/xilinx/zynqmp/Kconfig"
1840 source "board/phytium/durian/Kconfig"
1841
1842 source "arch/arm/Kconfig.debug"
1843
1844 endmenu
1845
1846 config SPL_LDSCRIPT
1847 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1848 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1849 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
1850
1851