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1 menu "ARM architecture"
2 depends on ARM
3
4 config SYS_ARCH
5 default "arm"
6
7 config ARM64
8 bool
9 select PHYS_64BIT
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
12
13 config ARM64_CRC32
14 bool "Enable support for CRC32 instruction"
15 depends on ARM64 && CC_IS_GCC
16 default y
17 help
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
21 newer.
22
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
31 default 0
32 help
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
39
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
43 help
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
50
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
53 depends on ARM64
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
56 help
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
62
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
66
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
69 depends on ARM64
70 depends on INIT_SP_RELATIVE
71 default 524288
72 help
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
77
78 config SPL_SYS_NO_VECTOR_TABLE
79 depends on SPL
80 bool
81
82 config LINUX_KERNEL_IMAGE_HEADER
83 depends on ARM64
84 bool
85 help
86 Place a Linux kernel image header at the start of the U-Boot binary.
87 The format of the header is described in the Linux kernel source at
88 Documentation/arm64/booting.txt. This feature is useful since the
89 image header reports the amount of memory (BSS and similar) that
90 U-Boot needs to use, but which isn't part of the binary.
91
92 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
93 depends on LINUX_KERNEL_IMAGE_HEADER
94 hex
95 help
96 The value subtracted from CONFIG_TEXT_BASE to calculate the
97 TEXT_OFFSET value written to the Linux kernel image header.
98
99 config GICV2
100 bool
101
102 config GICV3
103 bool
104
105 config GIC_V3_ITS
106 bool "ARM GICV3 ITS"
107 select IRQ
108 help
109 ARM GICV3 Interrupt translation service (ITS).
110 Basic support for programming locality specific peripheral
111 interrupts (LPI) configuration tables and enable LPI tables.
112 LPI configuration table can be used by u-boot or Linux.
113 ARM GICV3 has limitation, once the LPI table is enabled, LPI
114 configuration table can not be re-programmed, unless GICV3 reset.
115
116 config STATIC_RELA
117 bool
118 default y if ARM64
119
120 config DMA_ADDR_T_64BIT
121 bool
122 default y if ARM64
123
124 config HAS_VBAR
125 bool
126
127 config HAS_THUMB2
128 bool
129
130 config GPIO_EXTRA_HEADER
131 bool
132
133 # Used for compatibility with asm files copied from the kernel
134 config ARM_ASM_UNIFIED
135 bool
136 default y
137
138 # Used for compatibility with asm files copied from the kernel
139 config THUMB2_KERNEL
140 bool
141
142 config SYS_ICACHE_OFF
143 bool "Do not enable icache"
144 help
145 Do not enable instruction cache in U-Boot.
146
147 config SPL_SYS_ICACHE_OFF
148 bool "Do not enable icache in SPL"
149 depends on SPL
150 default SYS_ICACHE_OFF
151 help
152 Do not enable instruction cache in SPL.
153
154 config SYS_DCACHE_OFF
155 bool "Do not enable dcache"
156 help
157 Do not enable data cache in U-Boot.
158
159 config SPL_SYS_DCACHE_OFF
160 bool "Do not enable dcache in SPL"
161 depends on SPL
162 default SYS_DCACHE_OFF
163 help
164 Do not enable data cache in SPL.
165
166 config SYS_ARM_CACHE_CP15
167 bool "CP15 based cache enabling support"
168 help
169 Select this if your processor suports enabling caches by using
170 CP15 registers.
171
172 config SYS_ARM_MMU
173 bool "MMU-based Paged Memory Management Support"
174 select SYS_ARM_CACHE_CP15
175 help
176 Select if you want MMU-based virtualised addressing space
177 support via paged memory management.
178
179 config SYS_ARM_MPU
180 bool 'Use the ARM v7 PMSA Compliant MPU'
181 help
182 Some ARM systems without an MMU have instead a Memory Protection
183 Unit (MPU) that defines the type and permissions for regions of
184 memory.
185 If your CPU has an MPU then you should choose 'y' here unless you
186 know that you do not want to use the MPU.
187
188 # If set, the workarounds for these ARM errata are applied early during U-Boot
189 # startup. Note that in general these options force the workarounds to be
190 # applied; no CPU-type/version detection exists, unlike the similar options in
191 # the Linux kernel. Do not set these options unless they apply! Also note that
192 # the following can be machine-specific errata. These do have ability to
193 # provide rudimentary version and machine-specific checks, but expect no
194 # product checks:
195 # CONFIG_ARM_ERRATA_430973
196 # CONFIG_ARM_ERRATA_454179
197 # CONFIG_ARM_ERRATA_621766
198 # CONFIG_ARM_ERRATA_798870
199 # CONFIG_ARM_ERRATA_801819
200 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
201 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
202
203 config ARM_ERRATA_430973
204 bool
205
206 config ARM_ERRATA_454179
207 bool
208
209 config ARM_ERRATA_621766
210 bool
211
212 config ARM_ERRATA_716044
213 bool
214
215 config ARM_ERRATA_725233
216 bool
217
218 config ARM_ERRATA_742230
219 bool
220
221 config ARM_ERRATA_743622
222 bool
223
224 config ARM_ERRATA_751472
225 bool
226
227 config ARM_ERRATA_761320
228 bool
229
230 config ARM_ERRATA_773022
231 bool
232
233 config ARM_ERRATA_774769
234 bool
235
236 config ARM_ERRATA_794072
237 bool
238
239 config ARM_ERRATA_798870
240 bool
241
242 config ARM_ERRATA_801819
243 bool
244
245 config ARM_ERRATA_826974
246 bool
247
248 config ARM_ERRATA_828024
249 bool
250
251 config ARM_ERRATA_829520
252 bool
253
254 config ARM_ERRATA_833069
255 bool
256
257 config ARM_ERRATA_833471
258 bool
259
260 config ARM_ERRATA_845369
261 bool
262
263 config ARM_ERRATA_852421
264 bool
265
266 config ARM_ERRATA_852423
267 bool
268
269 config ARM_ERRATA_855873
270 bool
271
272 config ARM_CORTEX_A8_CVE_2017_5715
273 bool
274
275 config ARM_CORTEX_A15_CVE_2017_5715
276 bool
277
278 config CPU_ARM720T
279 bool
280 select SYS_CACHE_SHIFT_5
281 imply SYS_ARM_MMU
282
283 config CPU_ARM920T
284 bool
285 select SYS_CACHE_SHIFT_5
286 imply SYS_ARM_MMU
287
288 config CPU_ARM926EJS
289 bool
290 select SYS_CACHE_SHIFT_5
291 imply SYS_ARM_MMU
292 imply SPL_SEPARATE_BSS
293
294 config CPU_ARM946ES
295 bool
296 select SYS_CACHE_SHIFT_5
297 imply SYS_ARM_MMU
298
299 config CPU_ARM1136
300 bool
301 select SYS_CACHE_SHIFT_5
302 imply SYS_ARM_MMU
303 imply SPL_SEPARATE_BSS
304
305 config CPU_ARM1176
306 bool
307 select HAS_VBAR
308 select SYS_CACHE_SHIFT_5
309 imply SYS_ARM_MMU
310
311 config CPU_V7A
312 bool
313 select HAS_THUMB2
314 select HAS_VBAR
315 select SYS_CACHE_SHIFT_6
316 imply SYS_ARM_MMU
317
318 config CPU_V7M
319 bool
320 select HAS_THUMB2
321 select SYS_ARM_MPU
322 select SYS_CACHE_SHIFT_5
323 select SYS_THUMB_BUILD
324 select THUMB2_KERNEL
325
326 config CPU_V7R
327 bool
328 select HAS_THUMB2
329 select SYS_ARM_CACHE_CP15
330 select SYS_ARM_MPU
331 select SYS_CACHE_SHIFT_6
332
333 config SYS_CPU
334 default "arm720t" if CPU_ARM720T
335 default "arm920t" if CPU_ARM920T
336 default "arm926ejs" if CPU_ARM926EJS
337 default "arm946es" if CPU_ARM946ES
338 default "arm1136" if CPU_ARM1136
339 default "arm1176" if CPU_ARM1176
340 default "armv7" if CPU_V7A
341 default "armv7" if CPU_V7R
342 default "armv7m" if CPU_V7M
343 default "armv8" if ARM64
344
345 config SYS_ARM_ARCH
346 int
347 default 4 if CPU_ARM720T
348 default 4 if CPU_ARM920T
349 default 5 if CPU_ARM926EJS
350 default 5 if CPU_ARM946ES
351 default 6 if CPU_ARM1136
352 default 6 if CPU_ARM1176
353 default 7 if CPU_V7A
354 default 7 if CPU_V7M
355 default 7 if CPU_V7R
356 default 8 if ARM64
357
358 choice
359 prompt "Select the ARM data write cache policy"
360 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMNS || RZA1
361 default SYS_ARM_CACHE_WRITEBACK
362
363 config SYS_ARM_CACHE_WRITEBACK
364 bool "Write-back (WB)"
365 help
366 A write updates the cache only and marks the cache line as dirty.
367 External memory is updated only when the line is evicted or explicitly
368 cleaned.
369
370 config SYS_ARM_CACHE_WRITETHROUGH
371 bool "Write-through (WT)"
372 help
373 A write updates both the cache and the external memory system.
374 This does not mark the cache line as dirty.
375
376 config SYS_ARM_CACHE_WRITEALLOC
377 bool "Write allocation (WA)"
378 help
379 A cache line is allocated on a write miss. This means that executing a
380 store instruction on the processor might cause a burst read to occur.
381 There is a linefill to obtain the data for the cache line, before the
382 write is performed.
383 endchoice
384
385 config ARCH_VERY_EARLY_INIT
386 bool
387
388 config SPL_ARCH_VERY_EARLY_INIT
389 bool
390
391 config ARCH_CPU_INIT
392 bool "Enable ARCH_CPU_INIT"
393 help
394 Some architectures require a call to arch_cpu_init().
395 Say Y here to enable it
396
397 config SYS_ARCH_TIMER
398 bool "ARM Generic Timer support"
399 depends on CPU_V7A || ARM64
400 default y if ARM64
401 help
402 The ARM Generic Timer (aka arch-timer) provides an architected
403 interface to a timer source on an SoC.
404 It is mandatory for ARMv8 implementation and widely available
405 on ARMv7 systems.
406
407 config ARM_SMCCC
408 bool "Support for ARM SMC Calling Convention (SMCCC)"
409 depends on CPU_V7A || ARM64
410 select ARM_PSCI_FW
411 help
412 Say Y here if you want to enable ARM SMC Calling Convention.
413 This should be enabled if U-Boot needs to communicate with system
414 firmware (for example, PSCI) according to SMCCC.
415
416 config SYS_THUMB_BUILD
417 bool "Build U-Boot using the Thumb instruction set"
418 depends on !ARM64
419 help
420 Use this flag to build U-Boot using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
424
425 config SPL_SYS_THUMB_BUILD
426 bool "Build SPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on !ARM64 && SPL
429 help
430 Use this flag to build SPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
434
435 config TPL_SYS_THUMB_BUILD
436 bool "Build TPL using the Thumb instruction set"
437 default y if SYS_THUMB_BUILD
438 depends on TPL && !ARM64
439 help
440 Use this flag to build TPL using the Thumb instruction set for
441 ARM architectures. Thumb instruction set provides better code
442 density. For ARM architectures that support Thumb2 this flag will
443 result in Thumb2 code generated by GCC.
444
445 config SYS_L2_PL310
446 bool "ARM PL310 L2 cache controller"
447 help
448 Enable support for ARM PL310 L2 cache controller in U-Boot
449
450 config SPL_SYS_L2_PL310
451 bool "ARM PL310 L2 cache controller in SPL"
452 help
453 Enable support for ARM PL310 L2 cache controller in SPL
454
455 config SYS_L2CACHE_OFF
456 bool "L2cache off"
457 help
458 If SoC does not support L2CACHE or one does not want to enable
459 L2CACHE, choose this option.
460
461 config ENABLE_ARM_SOC_BOOT0_HOOK
462 bool "prepare BOOT0 header"
463 help
464 If the SoC's BOOT0 requires a header area filled with (magic)
465 values, then choose this option, and create a file included as
466 <asm/arch/boot0.h> which contains the required assembler code.
467
468 config USE_ARCH_MEMCPY
469 bool "Use an assembly optimized implementation of memcpy"
470 default y if !ARM64
471 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
472 help
473 Enable the generation of an optimized version of memcpy.
474 Such an implementation may be faster under some conditions
475 but may increase the binary size.
476
477 config SPL_USE_ARCH_MEMCPY
478 bool "Use an assembly optimized implementation of memcpy for SPL"
479 default y if USE_ARCH_MEMCPY
480 depends on SPL
481 help
482 Enable the generation of an optimized version of memcpy.
483 Such an implementation may be faster under some conditions
484 but may increase the binary size.
485
486 config TPL_USE_ARCH_MEMCPY
487 bool "Use an assembly optimized implementation of memcpy for TPL"
488 default y if USE_ARCH_MEMCPY
489 depends on TPL
490 help
491 Enable the generation of an optimized version of memcpy.
492 Such an implementation may be faster under some conditions
493 but may increase the binary size.
494
495 config USE_ARCH_MEMMOVE
496 bool "Use an assembly optimized implementation of memmove" if !ARM64
497 default USE_ARCH_MEMCPY if ARM64
498 depends on ARM64
499 help
500 Enable the generation of an optimized version of memmove.
501 Such an implementation may be faster under some conditions
502 but may increase the binary size.
503
504 config SPL_USE_ARCH_MEMMOVE
505 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
506 default SPL_USE_ARCH_MEMCPY if ARM64
507 depends on SPL && ARM64
508 help
509 Enable the generation of an optimized version of memmove.
510 Such an implementation may be faster under some conditions
511 but may increase the binary size.
512
513 config TPL_USE_ARCH_MEMMOVE
514 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
515 default TPL_USE_ARCH_MEMCPY if ARM64
516 depends on TPL && ARM64
517 help
518 Enable the generation of an optimized version of memmove.
519 Such an implementation may be faster under some conditions
520 but may increase the binary size.
521
522 config USE_ARCH_MEMSET
523 bool "Use an assembly optimized implementation of memset"
524 default y if !ARM64
525 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
526 help
527 Enable the generation of an optimized version of memset.
528 Such an implementation may be faster under some conditions
529 but may increase the binary size.
530
531 config SPL_USE_ARCH_MEMSET
532 bool "Use an assembly optimized implementation of memset for SPL"
533 default y if USE_ARCH_MEMSET
534 depends on SPL
535 help
536 Enable the generation of an optimized version of memset.
537 Such an implementation may be faster under some conditions
538 but may increase the binary size.
539
540 config TPL_USE_ARCH_MEMSET
541 bool "Use an assembly optimized implementation of memset for TPL"
542 default y if USE_ARCH_MEMSET
543 depends on TPL
544 help
545 Enable the generation of an optimized version of memset.
546 Such an implementation may be faster under some conditions
547 but may increase the binary size.
548
549 config ARM64_SUPPORT_AARCH32
550 bool "ARM64 system support AArch32 execution state"
551 depends on ARM64
552 default y if !TARGET_THUNDERX_88XX
553 help
554 This ARM64 system supports AArch32 execution state.
555
556 config IPROC
557 bool
558
559 config S5P
560 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
561
562 choice
563 prompt "Target select"
564 default TARGET_HIKEY
565
566 config ARCH_AT91
567 bool "Atmel AT91"
568 select GPIO_EXTRA_HEADER
569 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
570 select SPL_SEPARATE_BSS if SPL
571
572 config ARCH_DAVINCI
573 bool "TI DaVinci"
574 select CPU_ARM926EJS
575 select GPIO_EXTRA_HEADER
576 select SPL_DM_SPI if SPL
577 imply CMD_SAVES
578 help
579 Support for TI's DaVinci platform.
580
581 config ARCH_HISTB
582 bool "Hisilicon HiSTB SoCs"
583 select DM
584 select DM_SERIAL
585 select OF_CONTROL
586 select PL01X_SERIAL
587 imply CMD_DM
588 help
589 Support for HiSTB SoCs.
590
591 config ARCH_KIRKWOOD
592 bool "Marvell Kirkwood"
593 select ARCH_MISC_INIT
594 select BOARD_EARLY_INIT_F
595 select CPU_ARM926EJS
596 select GPIO_EXTRA_HEADER
597 select TIMER
598
599 config ARCH_MVEBU
600 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
601 select ARCH_EARLY_INIT_R if ARM64
602 select DM
603 select DM_SERIAL
604 select DM_SPI
605 select DM_SPI_FLASH
606 select GPIO_EXTRA_HEADER
607 select SPL_DM_SPI if SPL
608 select SPL_DM_SPI_FLASH if SPL
609 select SPL_TIMER if SPL
610 select TIMER if !ARM64
611 select OF_CONTROL
612 select OF_SEPARATE
613 select SPI
614 imply CMD_DM
615
616 config ARCH_ORION5X
617 bool "Marvell Orion"
618 select CPU_ARM926EJS
619 select GPIO_EXTRA_HEADER
620 select SPL_SEPARATE_BSS if SPL
621 select TIMER
622
623 config TARGET_STV0991
624 bool "Support stv0991"
625 select CPU_V7A
626 select DM
627 select DM_SERIAL
628 select DM_SPI
629 select DM_SPI_FLASH
630 select GPIO_EXTRA_HEADER
631 select PL01X_SERIAL
632 select SPI
633 select SPI_FLASH
634 imply CMD_DM
635
636 config ARCH_BCM283X
637 bool "Broadcom BCM283X family"
638 select DM
639 select DM_GPIO
640 select DM_SERIAL
641 select GPIO_EXTRA_HEADER
642 select OF_CONTROL
643 select PL01X_SERIAL
644 select SERIAL_SEARCH_ALL
645 imply CMD_DM
646 imply FAT_WRITE
647
648 config ARCH_BCMSTB
649 bool "Broadcom BCM7XXX family"
650 select CPU_V7A
651 select DM
652 select GPIO_EXTRA_HEADER
653 select OF_CONTROL
654 imply CMD_DM
655 imply OF_HAS_PRIOR_STAGE
656 help
657 This enables support for Broadcom ARM-based set-top box
658 chipsets, including the 7445 family of chips.
659
660 config ARCH_BCMBCA
661 bool "Broadcom broadband chip family"
662 select DM
663 select OF_CONTROL
664 imply CMD_DM
665
666 config TARGET_VEXPRESS_CA9X4
667 bool "Support vexpress_ca9x4"
668 select CPU_V7A
669 select PL011_SERIAL
670
671 config TARGET_BCMNS
672 bool "Support Broadcom Northstar"
673 select CPU_V7A
674 select DM
675 select DM_GPIO
676 select DM_SERIAL
677 select OF_CONTROL
678 select TIMER
679 select SYS_NS16550
680 select ARM_GLOBAL_TIMER
681 imply SYS_THUMB_BUILD
682 imply MTD_RAW_NAND
683 imply NAND_BRCMNAND
684 imply NAND_BRCMNAND_IPROC
685 help
686 Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit
687 ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094,
688 BCM5301x etc.
689
690 config TARGET_BCMNS2
691 bool "Support Broadcom Northstar2"
692 select ARM64
693 select GPIO_EXTRA_HEADER
694 help
695 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
696 ARMv8 Cortex-A57 processors targeting a broad range of networking
697 applications.
698
699 config TARGET_BCMNS3
700 bool "Support Broadcom NS3"
701 select ARM64
702 select BOARD_LATE_INIT
703 help
704 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
705 ARMv8 Cortex-A72 processors targeting a broad range of networking
706 applications.
707
708 config ARCH_EXYNOS
709 bool "Samsung EXYNOS"
710 select DM
711 select DM_GPIO
712 select DM_I2C
713 select DM_KEYBOARD
714 select DM_SERIAL
715 select DM_SPI
716 select DM_SPI_FLASH
717 select SPI
718 select GPIO_EXTRA_HEADER
719 imply SYS_THUMB_BUILD
720 imply CMD_DM
721 imply FAT_WRITE
722
723 config ARCH_S5PC1XX
724 bool "Samsung S5PC1XX"
725 select CPU_V7A
726 select DM
727 select DM_GPIO
728 select DM_I2C
729 select DM_SERIAL
730 select GPIO_EXTRA_HEADER
731 imply CMD_DM
732
733 config ARCH_HIGHBANK
734 bool "Calxeda Highbank"
735 select CPU_V7A
736 select PL01X_SERIAL
737 select DM
738 select DM_SERIAL
739 select OF_CONTROL
740 select CLK
741 select CLK_CCF
742 select AHCI
743 select PHYS_64BIT
744 select TIMER
745 select SP804_TIMER
746 imply OF_HAS_PRIOR_STAGE
747
748 config ARCH_INTEGRATOR
749 bool "ARM Ltd. Integrator family"
750 select DM
751 select DM_SERIAL
752 select GPIO_EXTRA_HEADER
753 select PL01X_SERIAL
754 imply CMD_DM
755
756 config ARCH_IPQ40XX
757 bool "Qualcomm IPQ40xx SoCs"
758 select CPU_V7A
759 select DM
760 select DM_GPIO
761 select DM_SERIAL
762 select DM_RESET
763 select GPIO_EXTRA_HEADER
764 select MSM_SMEM
765 select PINCTRL
766 select CLK
767 select SMEM
768 select OF_CONTROL
769 imply CMD_DM
770
771 config ARCH_KEYSTONE
772 bool "TI Keystone"
773 select CMD_POWEROFF
774 select CPU_V7A
775 select DDR_SPD
776 select SUPPORT_SPL
777 select SYS_ARCH_TIMER
778 select SYS_THUMB_BUILD
779 imply CMD_MTDPARTS
780 imply CMD_SAVES
781 imply FIT
782
783 config ARCH_K3
784 bool "Texas Instruments' K3 Architecture"
785 select SPL
786 select SUPPORT_SPL
787 select FIT
788 select REGEX
789 select FIT_SIGNATURE if ARM64
790 imply TI_SECURE_DEVICE
791
792 config ARCH_OMAP2PLUS
793 bool "TI OMAP2+"
794 select CPU_V7A
795 select GPIO_EXTRA_HEADER
796 select SPL_BOARD_INIT if SPL
797 select SPL_STACK_R if SPL
798 select SUPPORT_SPL
799 imply TI_SYSC if DM && OF_CONTROL
800 imply FIT
801 imply SPL_SEPARATE_BSS
802
803 config ARCH_MESON
804 bool "Amlogic Meson"
805 select GPIO_EXTRA_HEADER
806 imply DISTRO_DEFAULTS
807 imply DM_RNG
808 help
809 Support for the Meson SoC family developed by Amlogic Inc.,
810 targeted at media players and tablet computers. We currently
811 support the S905 (GXBaby) 64-bit SoC.
812
813 config ARCH_MEDIATEK
814 bool "MediaTek SoCs"
815 select DM
816 select GPIO_EXTRA_HEADER
817 select OF_CONTROL
818 select SPL_DM if SPL
819 select SPL_LIBCOMMON_SUPPORT if SPL
820 select SPL_LIBGENERIC_SUPPORT if SPL
821 select SPL_OF_CONTROL if SPL
822 select SUPPORT_SPL
823 help
824 Support for the MediaTek SoCs family developed by MediaTek Inc.
825 Please refer to doc/README.mediatek for more information.
826
827 config ARCH_LPC32XX
828 bool "NXP LPC32xx platform"
829 select CPU_ARM926EJS
830 select DM
831 select DM_GPIO
832 select DM_SERIAL
833 select GPIO_EXTRA_HEADER
834 select SPL_DM if SPL
835 select SUPPORT_SPL
836 imply CMD_DM
837
838 config ARCH_IMX8
839 bool "NXP i.MX8 platform"
840 select ARM64
841 select SYS_FSL_HAS_SEC
842 select SYS_FSL_SEC_COMPAT_4
843 select SYS_FSL_SEC_LE
844 select DM
845 select DM_EVENT
846 select GPIO_EXTRA_HEADER
847 select MACH_IMX
848 select OF_CONTROL
849 select ENABLE_ARM_SOC_BOOT0_HOOK
850
851 config ARCH_IMX8M
852 bool "NXP i.MX8M platform"
853 select ARM64
854 select GPIO_EXTRA_HEADER
855 select MACH_IMX
856 select SYS_FSL_HAS_SEC
857 select SYS_FSL_SEC_COMPAT_4
858 select SYS_FSL_SEC_LE
859 select SYS_I2C_MXC
860 select DM
861 select DM_EVENT if CLK
862 select SUPPORT_SPL
863 imply CMD_DM
864
865 config ARCH_IMX8ULP
866 bool "NXP i.MX8ULP platform"
867 select ARM64
868 select DM
869 select DM_EVENT
870 select MACH_IMX
871 select OF_CONTROL
872 select SUPPORT_SPL
873 select GPIO_EXTRA_HEADER
874 select MISC
875 select IMX_ELE
876 imply CMD_DM
877
878 config ARCH_IMX9
879 bool "NXP i.MX9 platform"
880 select ARM64
881 select DM
882 select DM_EVENT
883 select MACH_IMX
884 select SUPPORT_SPL
885 select GPIO_EXTRA_HEADER
886 select MISC
887 select IMX_ELE
888 imply CMD_DM
889
890 config ARCH_IMXRT
891 bool "NXP i.MXRT platform"
892 select CPU_V7M
893 select DM
894 select DM_SERIAL
895 select GPIO_EXTRA_HEADER
896 select MACH_IMX
897 select SUPPORT_SPL
898 imply CMD_DM
899
900 config ARCH_MX23
901 bool "NXP i.MX23 family"
902 select CPU_ARM926EJS
903 select GPIO_EXTRA_HEADER
904 select MACH_IMX
905 select SUPPORT_SPL
906
907 config ARCH_MX28
908 bool "NXP i.MX28 family"
909 select CPU_ARM926EJS
910 select GPIO_EXTRA_HEADER
911 select MACH_IMX
912 select SUPPORT_SPL
913
914 config ARCH_MX31
915 bool "NXP i.MX31 family"
916 select CPU_ARM1136
917 select GPIO_EXTRA_HEADER
918 select MACH_IMX
919
920 config ARCH_MX7ULP
921 bool "NXP MX7ULP"
922 select BOARD_POSTCLK_INIT
923 select CPU_V7A
924 select GPIO_EXTRA_HEADER
925 select MACH_IMX
926 select SYS_FSL_HAS_SEC
927 select SYS_FSL_SEC_COMPAT_4
928 select SYS_FSL_SEC_LE
929 select ROM_UNIFIED_SECTIONS
930 imply MXC_GPIO
931 imply SYS_THUMB_BUILD
932
933 config ARCH_MX7
934 bool "Freescale MX7"
935 select ARCH_MISC_INIT
936 select CPU_V7A
937 select GPIO_EXTRA_HEADER
938 select MACH_IMX
939 select MXC_GPT_HCLK
940 select SYS_FSL_HAS_SEC
941 select SYS_FSL_SEC_COMPAT_4
942 select SYS_FSL_SEC_LE
943 imply BOARD_EARLY_INIT_F
944 imply MXC_GPIO
945 imply SYS_THUMB_BUILD
946
947 config ARCH_MX6
948 bool "Freescale MX6"
949 select BOARD_POSTCLK_INIT
950 select CPU_V7A
951 select GPIO_EXTRA_HEADER
952 select MACH_IMX
953 select MXC_GPT_HCLK
954 select SYS_FSL_HAS_SEC
955 select SYS_FSL_SEC_COMPAT_4
956 select SYS_FSL_SEC_LE
957 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
958 imply MXC_GPIO
959 imply SYS_THUMB_BUILD
960 imply SPL_SEPARATE_BSS
961
962 config ARCH_MX5
963 bool "Freescale MX5"
964 select BOARD_EARLY_INIT_F
965 select CPU_V7A
966 select GPIO_EXTRA_HEADER
967 select MACH_IMX
968 imply MXC_GPIO
969
970 config ARCH_NEXELL
971 bool "Nexell S5P4418/S5P6818 SoC"
972 select ENABLE_ARM_SOC_BOOT0_HOOK
973 select DM
974 select GPIO_EXTRA_HEADER
975
976 config ARCH_NPCM
977 bool "Support Nuvoton SoCs"
978 select DM
979 select OF_CONTROL
980 imply CMD_DM
981
982 config ARCH_APPLE
983 bool "Apple SoCs"
984 select ARM64
985 select CLK
986 select CMD_PCI
987 select CMD_USB
988 select DM
989 select DM_GPIO
990 select DM_KEYBOARD
991 select DM_MAILBOX
992 select DM_RESET
993 select DM_SERIAL
994 select DM_SPI
995 select DM_USB
996 select VIDEO
997 select IOMMU
998 select LINUX_KERNEL_IMAGE_HEADER
999 select OF_BOARD_SETUP
1000 select OF_CONTROL
1001 select PCI
1002 select PHY
1003 select PINCTRL
1004 select POSITION_INDEPENDENT
1005 select POWER_DOMAIN
1006 select REGMAP
1007 select SPI
1008 select SYSCON
1009 select SYSRESET
1010 select SYSRESET_WATCHDOG
1011 select SYSRESET_WATCHDOG_AUTO
1012 select USB
1013 imply CMD_DM
1014 imply CMD_GPT
1015 imply DISTRO_DEFAULTS
1016 imply OF_HAS_PRIOR_STAGE
1017
1018 config ARCH_OWL
1019 bool "Actions Semi OWL SoCs"
1020 select DM
1021 select DM_SERIAL
1022 select GPIO_EXTRA_HEADER
1023 select OWL_SERIAL
1024 select CLK
1025 select CLK_OWL
1026 select OF_CONTROL
1027 select SYS_RELOC_GD_ENV_ADDR
1028 imply CMD_DM
1029
1030 config ARCH_QEMU
1031 bool "QEMU Virtual Platform"
1032 select DM
1033 select DM_SERIAL
1034 select OF_CONTROL
1035 select PL01X_SERIAL
1036 imply CMD_DM
1037 imply DM_RNG
1038 imply DM_RTC
1039 imply RTC_PL031
1040 imply OF_HAS_PRIOR_STAGE
1041 imply VIDEO
1042 imply VIDEO_BOCHS
1043 imply SYS_WHITE_ON_BLACK
1044 imply SYS_CONSOLE_IS_IN_ENV
1045 imply PRE_CONSOLE_BUFFER
1046 imply USB
1047 imply USB_XHCI_HCD
1048 imply USB_XHCI_PCI
1049 imply USB_KEYBOARD
1050 imply CMD_USB
1051
1052 config ARCH_RMOBILE
1053 bool "Renesas ARM SoCs"
1054 select DM
1055 select DM_SERIAL
1056 select GPIO_EXTRA_HEADER
1057 imply BOARD_EARLY_INIT_F
1058 imply CMD_DM
1059 imply FAT_WRITE
1060 imply SYS_THUMB_BUILD
1061 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1062
1063 config ARCH_SNAPDRAGON
1064 bool "Qualcomm Snapdragon SoCs"
1065 select ARM64
1066 select DM
1067 select DM_GPIO
1068 select DM_SERIAL
1069 select GPIO_EXTRA_HEADER
1070 select MSM_SMEM
1071 select OF_CONTROL
1072 select OF_SEPARATE
1073 select SMEM
1074 select SPMI
1075 imply CMD_DM
1076
1077 config ARCH_SOCFPGA
1078 bool "Altera SOCFPGA family"
1079 select ARCH_EARLY_INIT_R
1080 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1081 select ARM64 if TARGET_SOCFPGA_SOC64
1082 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1083 select DM
1084 select DM_SERIAL
1085 select GICV2
1086 select GPIO_EXTRA_HEADER
1087 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1088 select OF_CONTROL
1089 select SPL_DM_RESET if DM_RESET
1090 select SPL_DM_SERIAL
1091 select SPL_LIBCOMMON_SUPPORT
1092 select SPL_LIBGENERIC_SUPPORT
1093 select SPL_OF_CONTROL
1094 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1095 select SPL_SERIAL
1096 select SPL_SYSRESET
1097 select SPL_WATCHDOG
1098 select SUPPORT_SPL
1099 select SYS_NS16550
1100 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1101 select SYSRESET
1102 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1103 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1104 imply CMD_DM
1105 imply CMD_MTDPARTS
1106 imply CRC32_VERIFY
1107 imply DM_SPI
1108 imply DM_SPI_FLASH
1109 imply FAT_WRITE
1110 imply SPL
1111 imply SPL_DM
1112 imply SPL_DM_SPI
1113 imply SPL_DM_SPI_FLASH
1114 imply SPL_LIBDISK_SUPPORT
1115 imply SPL_MMC
1116 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1117 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1118 imply SPL_SPI_FLASH_SUPPORT
1119 imply SPL_SPI
1120 imply L2X0_CACHE
1121
1122 config ARCH_SUNXI
1123 bool "Support sunxi (Allwinner) SoCs"
1124 select BINMAN
1125 select CMD_GPIO
1126 select CMD_MMC if MMC
1127 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1128 select CLK
1129 select DM
1130 select DM_GPIO
1131 select DM_I2C if I2C
1132 select DM_SPI if SPI
1133 select DM_SPI_FLASH if SPI
1134 select DM_KEYBOARD
1135 select DM_MMC if MMC
1136 select DM_SERIAL
1137 select OF_BOARD_SETUP
1138 select OF_CONTROL
1139 select OF_SEPARATE
1140 select PINCTRL
1141 select SPECIFY_CONSOLE_INDEX
1142 select SPL_SEPARATE_BSS if SPL
1143 select SPL_STACK_R if SPL
1144 select SPL_SYS_MALLOC_SIMPLE if SPL
1145 select SPL_SYS_THUMB_BUILD if !ARM64
1146 select SUNXI_GPIO
1147 select SYS_NS16550
1148 select SYS_THUMB_BUILD if !ARM64
1149 select USB if DISTRO_DEFAULTS
1150 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1151 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1152 select SPL_USE_TINY_PRINTF
1153 select USE_PREBOOT
1154 select SYS_RELOC_GD_ENV_ADDR
1155 imply BOARD_LATE_INIT
1156 imply CMD_DM
1157 imply CMD_GPT
1158 imply CMD_UBI if MTD_RAW_NAND
1159 imply DISTRO_DEFAULTS
1160 imply DM_REGULATOR
1161 imply DM_REGULATOR_FIXED
1162 imply FAT_WRITE
1163 imply FIT
1164 imply OF_LIBFDT_OVERLAY
1165 imply PRE_CONSOLE_BUFFER
1166 imply SPL_GPIO
1167 imply SPL_LIBCOMMON_SUPPORT
1168 imply SPL_LIBGENERIC_SUPPORT
1169 imply SPL_MMC if MMC
1170 imply SPL_POWER
1171 imply SPL_SERIAL
1172 imply SYSRESET
1173 imply SYSRESET_WATCHDOG
1174 imply SYSRESET_WATCHDOG_AUTO
1175 imply USB_GADGET
1176 imply WDT
1177
1178 config ARCH_U8500
1179 bool "ST-Ericsson U8500 Series"
1180 select CPU_V7A
1181 select DM
1182 select DM_GPIO
1183 select DM_MMC if MMC
1184 select DM_SERIAL
1185 select DM_USB_GADGET if DM_USB
1186 select OF_CONTROL
1187 select SYSRESET
1188 select TIMER
1189 imply AB8500_USB_PHY
1190 imply ARM_PL180_MMCI
1191 imply CLK
1192 imply DM_PMIC
1193 imply DM_RTC
1194 imply NOMADIK_GPIO
1195 imply NOMADIK_MTU_TIMER
1196 imply PHY
1197 imply PL01X_SERIAL
1198 imply PMIC_AB8500
1199 imply RTC_PL031
1200 imply SYS_THUMB_BUILD
1201 imply SYSRESET_SYSCON
1202
1203 config ARCH_VERSAL
1204 bool "Support Xilinx Versal Platform"
1205 select ARM64
1206 select CLK
1207 select DM
1208 select DM_MMC if MMC
1209 select DM_SERIAL
1210 select GICV3
1211 select OF_CONTROL
1212 select SOC_DEVICE
1213 imply BOARD_LATE_INIT
1214 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1215
1216 config ARCH_VERSAL_NET
1217 bool "Support Xilinx Versal NET Platform"
1218 select ARM64
1219 select CLK
1220 select DM
1221 select DM_MMC if MMC
1222 select DM_SERIAL
1223 select OF_CONTROL
1224 imply BOARD_LATE_INIT
1225 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1226
1227 config ARCH_VF610
1228 bool "Freescale Vybrid"
1229 select CPU_V7A
1230 select GPIO_EXTRA_HEADER
1231 select IOMUX_SHARE_CONF_REG
1232 select MACH_IMX
1233 select SYS_FSL_ERRATUM_ESDHC111
1234 imply CMD_MTDPARTS
1235 imply MTD_RAW_NAND
1236
1237 config ARCH_ZYNQ
1238 bool "Xilinx Zynq based platform"
1239 select ARM_TWD_TIMER
1240 select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA)
1241 select CLK
1242 select CLK_ZYNQ
1243 select CPU_V7A
1244 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1245 select DM
1246 select DM_MMC if MMC
1247 select DM_SERIAL
1248 select DM_SPI
1249 select DM_SPI_FLASH
1250 select OF_CONTROL
1251 select SPI
1252 select SPL_BOARD_INIT if SPL
1253 select SPL_CLK if SPL
1254 select SPL_DM if SPL
1255 select SPL_DM_SPI if SPL
1256 select SPL_DM_SPI_FLASH if SPL
1257 select SPL_OF_CONTROL if SPL
1258 select SPL_SEPARATE_BSS if SPL
1259 select SPL_TIMER if SPL
1260 select SUPPORT_SPL
1261 select TIMER
1262 imply BOARD_LATE_INIT
1263 imply CMD_CLK
1264 imply CMD_DM
1265 imply CMD_SPL
1266 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1267 imply FAT_WRITE
1268
1269 config ARCH_ZYNQMP_R5
1270 bool "Xilinx ZynqMP R5 based platform"
1271 select CLK
1272 select CPU_V7R
1273 select DM
1274 select DM_MMC if MMC
1275 select DM_SERIAL
1276 select OF_CONTROL
1277 imply CMD_DM
1278 imply DM_USB_GADGET
1279
1280 config ARCH_ZYNQMP
1281 bool "Xilinx ZynqMP based platform"
1282 select ARM64
1283 select CLK
1284 select DM
1285 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1286 imply DM_MAILBOX
1287 select DM_MMC if MMC
1288 select DM_SERIAL
1289 select DM_SPI if SPI
1290 select DM_SPI_FLASH if DM_SPI
1291 imply FIRMWARE
1292 select GICV2
1293 select OF_CONTROL
1294 select SPL_BOARD_INIT if SPL
1295 select SPL_CLK if SPL
1296 select SPL_DM if SPL
1297 select SPL_DM_SPI if SPI && SPL_DM
1298 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1299 select SPL_DM_MAILBOX if SPL
1300 imply SPL_FIRMWARE if SPL
1301 select SPL_SEPARATE_BSS if SPL
1302 select SUPPORT_SPL
1303 imply ZYNQMP_IPI if DM_MAILBOX
1304 select SOC_DEVICE
1305 imply BOARD_LATE_INIT
1306 imply CMD_DM
1307 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1308 imply FAT_WRITE
1309 imply MP
1310 imply DM_USB_GADGET
1311 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1312
1313 config ARCH_TEGRA
1314 bool "NVIDIA Tegra"
1315 select GPIO_EXTRA_HEADER
1316 imply DISTRO_DEFAULTS
1317 imply FAT_WRITE
1318 imply SPL_TIMER if SPL
1319
1320 config ARCH_VEXPRESS64
1321 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1322 select ARM64
1323 select DM
1324 select DM_SERIAL
1325 select PL01X_SERIAL
1326 select OF_CONTROL
1327 select CLK
1328 select BLK
1329 select MTD_NOR_FLASH if MTD
1330 select FLASH_CFI_DRIVER if MTD
1331 select ENV_IS_IN_FLASH if MTD
1332 imply DISTRO_DEFAULTS
1333
1334 config TARGET_CORSTONE1000
1335 bool "Support Corstone1000 Platform"
1336 select ARM64
1337 select PL01X_SERIAL
1338 select DM
1339
1340 config TARGET_TOTAL_COMPUTE
1341 bool "Support Total Compute Platform"
1342 select ARM64
1343 select PL01X_SERIAL
1344 select DM
1345 select DM_SERIAL
1346 select DM_MMC
1347 select DM_GPIO
1348
1349 config TARGET_LS2080A_EMU
1350 bool "Support ls2080a_emu"
1351 select ARCH_LS2080A
1352 select ARM64
1353 select ARMV8_MULTIENTRY
1354 select FSL_DDR_SYNC_REFRESH
1355 select GPIO_EXTRA_HEADER
1356 help
1357 Support for Freescale LS2080A_EMU platform.
1358 The LS2080A Development System (EMULATOR) is a pre-silicon
1359 development platform that supports the QorIQ LS2080A
1360 Layerscape Architecture processor.
1361
1362 config TARGET_LS1088AQDS
1363 bool "Support ls1088aqds"
1364 select ARCH_LS1088A
1365 select ARM64
1366 select ARMV8_MULTIENTRY
1367 select ARCH_SUPPORT_TFABOOT
1368 select BOARD_LATE_INIT
1369 select GPIO_EXTRA_HEADER
1370 select SUPPORT_SPL
1371 select FSL_DDR_INTERACTIVE if !SD_BOOT
1372 help
1373 Support for NXP LS1088AQDS platform.
1374 The LS1088A Development System (QDS) is a high-performance
1375 development platform that supports the QorIQ LS1088A
1376 Layerscape Architecture processor.
1377
1378 config TARGET_LS2080AQDS
1379 bool "Support ls2080aqds"
1380 select ARCH_LS2080A
1381 select ARM64
1382 select ARMV8_MULTIENTRY
1383 select ARCH_SUPPORT_TFABOOT
1384 select BOARD_LATE_INIT
1385 select GPIO_EXTRA_HEADER
1386 select SUPPORT_SPL
1387 imply SCSI
1388 imply SCSI_AHCI
1389 select FSL_DDR_BIST
1390 select FSL_DDR_INTERACTIVE if !SPL
1391 help
1392 Support for Freescale LS2080AQDS platform.
1393 The LS2080A Development System (QDS) is a high-performance
1394 development platform that supports the QorIQ LS2080A
1395 Layerscape Architecture processor.
1396
1397 config TARGET_LS2080ARDB
1398 bool "Support ls2080ardb"
1399 select ARCH_LS2080A
1400 select ARM64
1401 select ARMV8_MULTIENTRY
1402 select ARCH_SUPPORT_TFABOOT
1403 select BOARD_LATE_INIT
1404 select SUPPORT_SPL
1405 select FSL_DDR_BIST
1406 select FSL_DDR_INTERACTIVE if !SPL
1407 select GPIO_EXTRA_HEADER
1408 imply SCSI
1409 imply SCSI_AHCI
1410 help
1411 Support for Freescale LS2080ARDB platform.
1412 The LS2080A Reference design board (RDB) is a high-performance
1413 development platform that supports the QorIQ LS2080A
1414 Layerscape Architecture processor.
1415
1416 config TARGET_LS2081ARDB
1417 bool "Support ls2081ardb"
1418 select ARCH_LS2080A
1419 select ARM64
1420 select ARMV8_MULTIENTRY
1421 select BOARD_LATE_INIT
1422 select GPIO_EXTRA_HEADER
1423 select SUPPORT_SPL
1424 help
1425 Support for Freescale LS2081ARDB platform.
1426 The LS2081A Reference design board (RDB) is a high-performance
1427 development platform that supports the QorIQ LS2081A/LS2041A
1428 Layerscape Architecture processor.
1429
1430 config TARGET_LX2160ARDB
1431 bool "Support lx2160ardb"
1432 select ARCH_LX2160A
1433 select ARM64
1434 select ARMV8_MULTIENTRY
1435 select ARCH_SUPPORT_TFABOOT
1436 select BOARD_LATE_INIT
1437 select GPIO_EXTRA_HEADER
1438 help
1439 Support for NXP LX2160ARDB platform.
1440 The lx2160ardb (LX2160A Reference design board (RDB)
1441 is a high-performance development platform that supports the
1442 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1443
1444 config TARGET_LX2160AQDS
1445 bool "Support lx2160aqds"
1446 select ARCH_LX2160A
1447 select ARM64
1448 select ARMV8_MULTIENTRY
1449 select ARCH_SUPPORT_TFABOOT
1450 select BOARD_LATE_INIT
1451 select GPIO_EXTRA_HEADER
1452 help
1453 Support for NXP LX2160AQDS platform.
1454 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1455 is a high-performance development platform that supports the
1456 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1457
1458 config TARGET_LX2162AQDS
1459 bool "Support lx2162aqds"
1460 select ARCH_LX2162A
1461 select ARCH_MISC_INIT
1462 select ARM64
1463 select ARMV8_MULTIENTRY
1464 select ARCH_SUPPORT_TFABOOT
1465 select BOARD_LATE_INIT
1466 select GPIO_EXTRA_HEADER
1467 help
1468 Support for NXP LX2162AQDS platform.
1469 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1470
1471 config TARGET_HIKEY
1472 bool "Support HiKey 96boards Consumer Edition Platform"
1473 select ARM64
1474 select DM
1475 select DM_GPIO
1476 select DM_SERIAL
1477 select GPIO_EXTRA_HEADER
1478 select OF_CONTROL
1479 select PL01X_SERIAL
1480 select SPECIFY_CONSOLE_INDEX
1481 imply CMD_DM
1482 help
1483 Support for HiKey 96boards platform. It features a HI6220
1484 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1485
1486 config TARGET_HIKEY960
1487 bool "Support HiKey960 96boards Consumer Edition Platform"
1488 select ARM64
1489 select DM
1490 select DM_SERIAL
1491 select GPIO_EXTRA_HEADER
1492 select OF_CONTROL
1493 select PL01X_SERIAL
1494 imply CMD_DM
1495 help
1496 Support for HiKey960 96boards platform. It features a HI3660
1497 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1498
1499 config TARGET_POPLAR
1500 bool "Support Poplar 96boards Enterprise Edition Platform"
1501 select ARM64
1502 select DM
1503 select DM_SERIAL
1504 select GPIO_EXTRA_HEADER
1505 select OF_CONTROL
1506 select PL01X_SERIAL
1507 imply CMD_DM
1508 help
1509 Support for Poplar 96boards EE platform. It features a HI3798cv200
1510 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1511 making it capable of running any commercial set-top solution based on
1512 Linux or Android.
1513
1514 config TARGET_LS1012AQDS
1515 bool "Support ls1012aqds"
1516 select ARCH_LS1012A
1517 select ARM64
1518 select ARCH_SUPPORT_TFABOOT
1519 select BOARD_LATE_INIT
1520 select GPIO_EXTRA_HEADER
1521 help
1522 Support for Freescale LS1012AQDS platform.
1523 The LS1012A Development System (QDS) is a high-performance
1524 development platform that supports the QorIQ LS1012A
1525 Layerscape Architecture processor.
1526
1527 config TARGET_LS1012ARDB
1528 bool "Support ls1012ardb"
1529 select ARCH_LS1012A
1530 select ARM64
1531 select ARCH_SUPPORT_TFABOOT
1532 select BOARD_LATE_INIT
1533 select GPIO_EXTRA_HEADER
1534 imply SCSI
1535 imply SCSI_AHCI
1536 help
1537 Support for Freescale LS1012ARDB platform.
1538 The LS1012A Reference design board (RDB) is a high-performance
1539 development platform that supports the QorIQ LS1012A
1540 Layerscape Architecture processor.
1541
1542 config TARGET_LS1012A2G5RDB
1543 bool "Support ls1012a2g5rdb"
1544 select ARCH_LS1012A
1545 select ARM64
1546 select ARCH_SUPPORT_TFABOOT
1547 select BOARD_LATE_INIT
1548 select GPIO_EXTRA_HEADER
1549 imply SCSI
1550 help
1551 Support for Freescale LS1012A2G5RDB platform.
1552 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1553 development platform that supports the QorIQ LS1012A
1554 Layerscape Architecture processor.
1555
1556 config TARGET_LS1012AFRWY
1557 bool "Support ls1012afrwy"
1558 select ARCH_LS1012A
1559 select ARM64
1560 select ARCH_SUPPORT_TFABOOT
1561 select BOARD_LATE_INIT
1562 select GPIO_EXTRA_HEADER
1563 imply SCSI
1564 imply SCSI_AHCI
1565 help
1566 Support for Freescale LS1012AFRWY platform.
1567 The LS1012A FRWY board (FRWY) is a high-performance
1568 development platform that supports the QorIQ LS1012A
1569 Layerscape Architecture processor.
1570
1571 config TARGET_LS1012AFRDM
1572 bool "Support ls1012afrdm"
1573 select ARCH_LS1012A
1574 select ARM64
1575 select ARCH_SUPPORT_TFABOOT
1576 select GPIO_EXTRA_HEADER
1577 help
1578 Support for Freescale LS1012AFRDM platform.
1579 The LS1012A Freedom board (FRDM) is a high-performance
1580 development platform that supports the QorIQ LS1012A
1581 Layerscape Architecture processor.
1582
1583 config TARGET_LS1028AQDS
1584 bool "Support ls1028aqds"
1585 select ARCH_LS1028A
1586 select ARM64
1587 select ARMV8_MULTIENTRY
1588 select ARCH_SUPPORT_TFABOOT
1589 select BOARD_LATE_INIT
1590 select GPIO_EXTRA_HEADER
1591 help
1592 Support for Freescale LS1028AQDS platform
1593 The LS1028A Development System (QDS) is a high-performance
1594 development platform that supports the QorIQ LS1028A
1595 Layerscape Architecture processor.
1596
1597 config TARGET_LS1028ARDB
1598 bool "Support ls1028ardb"
1599 select ARCH_LS1028A
1600 select ARM64
1601 select ARMV8_MULTIENTRY
1602 select ARCH_SUPPORT_TFABOOT
1603 select BOARD_LATE_INIT
1604 select GPIO_EXTRA_HEADER
1605 help
1606 Support for Freescale LS1028ARDB platform
1607 The LS1028A Development System (RDB) is a high-performance
1608 development platform that supports the QorIQ LS1028A
1609 Layerscape Architecture processor.
1610
1611 config TARGET_LS1088ARDB
1612 bool "Support ls1088ardb"
1613 select ARCH_LS1088A
1614 select ARM64
1615 select ARMV8_MULTIENTRY
1616 select ARCH_SUPPORT_TFABOOT
1617 select BOARD_LATE_INIT
1618 select SUPPORT_SPL
1619 select FSL_DDR_INTERACTIVE if !SD_BOOT
1620 select GPIO_EXTRA_HEADER
1621 help
1622 Support for NXP LS1088ARDB platform.
1623 The LS1088A Reference design board (RDB) is a high-performance
1624 development platform that supports the QorIQ LS1088A
1625 Layerscape Architecture processor.
1626
1627 config TARGET_LS1021AQDS
1628 bool "Support ls1021aqds"
1629 select ARCH_LS1021A
1630 select ARCH_SUPPORT_PSCI
1631 select BOARD_EARLY_INIT_F
1632 select BOARD_LATE_INIT
1633 select CPU_V7A
1634 select CPU_V7_HAS_NONSEC
1635 select CPU_V7_HAS_VIRT
1636 select LS1_DEEP_SLEEP
1637 select PEN_ADDR_BIG_ENDIAN
1638 select SUPPORT_SPL
1639 select SYS_FSL_DDR
1640 select FSL_DDR_INTERACTIVE
1641 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1642 select GPIO_EXTRA_HEADER
1643 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1644 imply SCSI
1645
1646 config TARGET_LS1021ATWR
1647 bool "Support ls1021atwr"
1648 select ARCH_LS1021A
1649 select ARCH_SUPPORT_PSCI
1650 select BOARD_EARLY_INIT_F
1651 select BOARD_LATE_INIT
1652 select CPU_V7A
1653 select CPU_V7_HAS_NONSEC
1654 select CPU_V7_HAS_VIRT
1655 select LS1_DEEP_SLEEP
1656 select PEN_ADDR_BIG_ENDIAN
1657 select SUPPORT_SPL
1658 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1659 select GPIO_EXTRA_HEADER
1660 imply SCSI
1661
1662 config TARGET_PG_WCOM_SELI8
1663 bool "Support Hitachi-Powergrids SELI8 service unit card"
1664 select ARCH_LS1021A
1665 select ARCH_SUPPORT_PSCI
1666 select BOARD_EARLY_INIT_F
1667 select BOARD_LATE_INIT
1668 select CPU_V7A
1669 select CPU_V7_HAS_NONSEC
1670 select CPU_V7_HAS_VIRT
1671 select SYS_FSL_DDR
1672 select FSL_DDR_INTERACTIVE
1673 select GPIO_EXTRA_HEADER
1674 select VENDOR_KM
1675 imply SCSI
1676 help
1677 Support for Hitachi-Powergrids SELI8 service unit card.
1678 SELI8 is a QorIQ LS1021a based service unit card used
1679 in XMC20 and FOX615 product families.
1680
1681 config TARGET_PG_WCOM_EXPU1
1682 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1683 select ARCH_LS1021A
1684 select ARCH_SUPPORT_PSCI
1685 select BOARD_EARLY_INIT_F
1686 select BOARD_LATE_INIT
1687 select CPU_V7A
1688 select CPU_V7_HAS_NONSEC
1689 select CPU_V7_HAS_VIRT
1690 select SYS_FSL_DDR
1691 select FSL_DDR_INTERACTIVE
1692 select VENDOR_KM
1693 imply SCSI
1694 help
1695 Support for Hitachi-Powergrids EXPU1 service unit card.
1696 EXPU1 is a QorIQ LS1021a based service unit card used
1697 in XMC20 and FOX615 product families.
1698
1699 config TARGET_LS1021ATSN
1700 bool "Support ls1021atsn"
1701 select ARCH_LS1021A
1702 select ARCH_SUPPORT_PSCI
1703 select BOARD_EARLY_INIT_F
1704 select BOARD_LATE_INIT
1705 select CPU_V7A
1706 select CPU_V7_HAS_NONSEC
1707 select CPU_V7_HAS_VIRT
1708 select LS1_DEEP_SLEEP
1709 select SUPPORT_SPL
1710 select GPIO_EXTRA_HEADER
1711 imply SCSI
1712
1713 config TARGET_LS1021AIOT
1714 bool "Support ls1021aiot"
1715 select ARCH_LS1021A
1716 select ARCH_SUPPORT_PSCI
1717 select BOARD_LATE_INIT
1718 select CPU_V7A
1719 select CPU_V7_HAS_NONSEC
1720 select CPU_V7_HAS_VIRT
1721 select PEN_ADDR_BIG_ENDIAN
1722 select SUPPORT_SPL
1723 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1724 select GPIO_EXTRA_HEADER
1725 imply SCSI
1726 help
1727 Support for Freescale LS1021AIOT platform.
1728 The LS1021A Freescale board (IOT) is a high-performance
1729 development platform that supports the QorIQ LS1021A
1730 Layerscape Architecture processor.
1731
1732 config TARGET_LS1043AQDS
1733 bool "Support ls1043aqds"
1734 select ARCH_LS1043A
1735 select ARM64
1736 select ARMV8_MULTIENTRY
1737 select ARCH_SUPPORT_TFABOOT
1738 select BOARD_EARLY_INIT_F
1739 select BOARD_LATE_INIT
1740 select SUPPORT_SPL
1741 select FSL_DDR_INTERACTIVE if !SPL
1742 select FSL_DSPI if !SPL_NO_DSPI
1743 select DM_SPI_FLASH if FSL_DSPI
1744 select GPIO_EXTRA_HEADER
1745 imply SCSI
1746 imply SCSI_AHCI
1747 help
1748 Support for Freescale LS1043AQDS platform.
1749
1750 config TARGET_LS1043ARDB
1751 bool "Support ls1043ardb"
1752 select ARCH_LS1043A
1753 select ARM64
1754 select ARMV8_MULTIENTRY
1755 select ARCH_SUPPORT_TFABOOT
1756 select BOARD_EARLY_INIT_F
1757 select BOARD_LATE_INIT
1758 select SUPPORT_SPL
1759 select FSL_DSPI if !SPL_NO_DSPI
1760 select DM_SPI_FLASH if FSL_DSPI
1761 select GPIO_EXTRA_HEADER
1762 help
1763 Support for Freescale LS1043ARDB platform.
1764
1765 config TARGET_LS1046AQDS
1766 bool "Support ls1046aqds"
1767 select ARCH_LS1046A
1768 select ARM64
1769 select ARMV8_MULTIENTRY
1770 select ARCH_SUPPORT_TFABOOT
1771 select BOARD_EARLY_INIT_F
1772 select BOARD_LATE_INIT
1773 select DM_SPI_FLASH if DM_SPI
1774 select SUPPORT_SPL
1775 select FSL_DDR_BIST if !SPL
1776 select FSL_DDR_INTERACTIVE if !SPL
1777 select FSL_DDR_INTERACTIVE if !SPL
1778 select GPIO_EXTRA_HEADER
1779 imply SCSI
1780 help
1781 Support for Freescale LS1046AQDS platform.
1782 The LS1046A Development System (QDS) is a high-performance
1783 development platform that supports the QorIQ LS1046A
1784 Layerscape Architecture processor.
1785
1786 config TARGET_LS1046ARDB
1787 bool "Support ls1046ardb"
1788 select ARCH_LS1046A
1789 select ARM64
1790 select ARMV8_MULTIENTRY
1791 select ARCH_SUPPORT_TFABOOT
1792 select BOARD_EARLY_INIT_F
1793 select BOARD_LATE_INIT
1794 select DM_SPI_FLASH if DM_SPI
1795 select POWER_MC34VR500
1796 select SUPPORT_SPL
1797 select FSL_DDR_BIST
1798 select FSL_DDR_INTERACTIVE if !SPL
1799 select GPIO_EXTRA_HEADER
1800 imply SCSI
1801 help
1802 Support for Freescale LS1046ARDB platform.
1803 The LS1046A Reference Design Board (RDB) is a high-performance
1804 development platform that supports the QorIQ LS1046A
1805 Layerscape Architecture processor.
1806
1807 config TARGET_LS1046AFRWY
1808 bool "Support ls1046afrwy"
1809 select ARCH_LS1046A
1810 select ARM64
1811 select ARMV8_MULTIENTRY
1812 select ARCH_SUPPORT_TFABOOT
1813 select BOARD_EARLY_INIT_F
1814 select BOARD_LATE_INIT
1815 select DM_SPI_FLASH if DM_SPI
1816 select GPIO_EXTRA_HEADER
1817 imply SCSI
1818 help
1819 Support for Freescale LS1046AFRWY platform.
1820 The LS1046A Freeway Board (FRWY) is a high-performance
1821 development platform that supports the QorIQ LS1046A
1822 Layerscape Architecture processor.
1823
1824 config TARGET_SL28
1825 bool "Support sl28"
1826 select ARCH_LS1028A
1827 select ARM64
1828 select ARMV8_MULTIENTRY
1829 select SUPPORT_SPL
1830 select BINMAN
1831 select DM
1832 select DM_GPIO
1833 select DM_I2C
1834 select DM_MMC
1835 select DM_SPI_FLASH
1836 select DM_MDIO
1837 select PCI
1838 select DM_RNG
1839 select DM_RTC
1840 select SCSI
1841 select DM_SERIAL
1842 select DM_SPI
1843 select GPIO_EXTRA_HEADER
1844 select SPL_DM if SPL
1845 select SPL_DM_SPI if SPL
1846 select SPL_DM_SPI_FLASH if SPL
1847 select SPL_DM_I2C if SPL
1848 select SPL_DM_MMC if SPL
1849 select SPL_DM_SERIAL if SPL
1850 help
1851 Support for Kontron SMARC-sAL28 board.
1852
1853 config TARGET_TEN64
1854 bool "Support ten64"
1855 select ARCH_LS1088A
1856 select ARCH_MISC_INIT
1857 select ARM64
1858 select ARMV8_MULTIENTRY
1859 select ARCH_SUPPORT_TFABOOT
1860 select BOARD_LATE_INIT
1861 select SUPPORT_SPL
1862 select FSL_DDR_INTERACTIVE if !SD_BOOT
1863 select GPIO_EXTRA_HEADER
1864 help
1865 Support for Traverse Technologies Ten64 board, based
1866 on NXP LS1088A.
1867
1868 config ARCH_UNIPHIER
1869 bool "Socionext UniPhier SoCs"
1870 select BOARD_LATE_INIT
1871 select DM
1872 select DM_GPIO
1873 select DM_I2C
1874 select DM_MMC
1875 select DM_MTD
1876 select DM_RESET
1877 select DM_SERIAL
1878 select OF_BOARD_SETUP
1879 select OF_CONTROL
1880 select OF_LIBFDT
1881 select PINCTRL
1882 select SPL_BOARD_INIT if SPL
1883 select SPL_DM if SPL
1884 select SPL_LIBCOMMON_SUPPORT if SPL
1885 select SPL_LIBGENERIC_SUPPORT if SPL
1886 select SPL_OF_CONTROL if SPL
1887 select SPL_PINCTRL if SPL
1888 select SUPPORT_SPL
1889 imply CMD_DM
1890 imply DISTRO_DEFAULTS
1891 imply FAT_WRITE
1892 help
1893 Support for UniPhier SoC family developed by Socionext Inc.
1894 (formerly, System LSI Business Division of Panasonic Corporation)
1895
1896 config ARCH_SYNQUACER
1897 bool "Socionext SynQuacer SoCs"
1898 select ARM64
1899 select DM
1900 select GIC_V3
1901 select PSCI_RESET
1902 select SYSRESET
1903 select SYSRESET_PSCI
1904 select OF_CONTROL
1905 help
1906 Support for SynQuacer SoC family developed by Socionext Inc.
1907 This SoC is used on 96boards EE DeveloperBox.
1908
1909 config ARCH_STM32
1910 bool "Support STMicroelectronics STM32 MCU with cortex M"
1911 select CPU_V7M
1912 select DM
1913 select DM_SERIAL
1914 imply CMD_DM
1915
1916 config ARCH_STI
1917 bool "Support STMicroelectronics SoCs"
1918 select BLK
1919 select CPU_V7A
1920 select DM
1921 select DM_MMC
1922 select DM_RESET
1923 select DM_SERIAL
1924 imply CMD_DM
1925 help
1926 Support for STMicroelectronics STiH407/10 SoC family.
1927 This SoC is used on Linaro 96Board STiH410-B2260
1928
1929 config ARCH_STM32MP
1930 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1931 select ARCH_MISC_INIT
1932 select ARCH_SUPPORT_TFABOOT
1933 select BOARD_LATE_INIT
1934 select CLK
1935 select DM
1936 select DM_GPIO
1937 select DM_RESET
1938 select DM_SERIAL
1939 select MISC
1940 select OF_CONTROL
1941 select OF_LIBFDT
1942 select OF_SYSTEM_SETUP
1943 select PINCTRL
1944 select REGMAP
1945 select SYSCON
1946 select SYSRESET
1947 select SYS_THUMB_BUILD if !ARM64
1948 imply SPL_SYSRESET
1949 imply CMD_DM
1950 imply CMD_POWEROFF
1951 imply OF_LIBFDT_OVERLAY
1952 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1953 imply USE_PREBOOT
1954 imply TIMESTAMP
1955 help
1956 Support for STM32MP SoC family developed by STMicroelectronics,
1957 MPUs based on ARM cortex A core
1958 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1959 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1960 chain.
1961 SPL is the unsecure FSBL for the basic boot chain.
1962
1963 config ARCH_ROCKCHIP
1964 bool "Support Rockchip SoCs"
1965 select BLK
1966 select BINMAN if SPL_OPTEE || SPL
1967 select DM
1968 select DM_GPIO
1969 select DM_I2C
1970 select DM_MMC
1971 select DM_PWM
1972 select DM_REGULATOR
1973 select DM_SERIAL
1974 select DM_SPI
1975 select DM_SPI_FLASH
1976 select ENABLE_ARM_SOC_BOOT0_HOOK
1977 select OF_CONTROL
1978 select SPI
1979 select SPL_DM if SPL
1980 select SPL_DM_SPI if SPL
1981 select SPL_DM_SPI_FLASH if SPL
1982 select SYS_MALLOC_F
1983 select SYS_THUMB_BUILD if !ARM64
1984 imply ADC
1985 imply CMD_DM
1986 imply DEBUG_UART_BOARD_INIT
1987 imply BOOTSTD_DEFAULTS
1988 imply FAT_WRITE
1989 imply SARADC_ROCKCHIP
1990 imply SPL_SYSRESET
1991 imply SPL_SYS_MALLOC_SIMPLE
1992 imply SYS_NS16550
1993 imply TPL_SYSRESET
1994 imply USB_FUNCTION_FASTBOOT
1995
1996 config ARCH_OCTEONTX
1997 bool "Support OcteonTX SoCs"
1998 select CLK
1999 select DM
2000 select GPIO_EXTRA_HEADER
2001 select ARM64
2002 select OF_CONTROL
2003 select OF_LIVE
2004 select BOARD_LATE_INIT
2005 select SYS_CACHE_SHIFT_7
2006 select SYS_PCI_64BIT if PCI
2007 imply OF_HAS_PRIOR_STAGE
2008
2009 config ARCH_OCTEONTX2
2010 bool "Support OcteonTX2 SoCs"
2011 select CLK
2012 select DM
2013 select GPIO_EXTRA_HEADER
2014 select ARM64
2015 select OF_CONTROL
2016 select OF_LIVE
2017 select BOARD_LATE_INIT
2018 select SYS_CACHE_SHIFT_7
2019 select SYS_PCI_64BIT if PCI
2020 imply OF_HAS_PRIOR_STAGE
2021
2022 config TARGET_THUNDERX_88XX
2023 bool "Support ThunderX 88xx"
2024 select ARM64
2025 select GPIO_EXTRA_HEADER
2026 select OF_CONTROL
2027 select PL01X_SERIAL
2028 select SYS_CACHE_SHIFT_7
2029
2030 config ARCH_ASPEED
2031 bool "Support Aspeed SoCs"
2032 select DM
2033 select OF_CONTROL
2034 imply CMD_DM
2035
2036 config TARGET_DURIAN
2037 bool "Support Phytium Durian Platform"
2038 select ARM64
2039 select GPIO_EXTRA_HEADER
2040 help
2041 Support for durian platform.
2042 It has 2GB Sdram, uart and pcie.
2043
2044 config TARGET_POMELO
2045 bool "Support Phytium Pomelo Platform"
2046 select ARM64
2047 select DM
2048 select AHCI
2049 select SCSI_AHCI
2050 select AHCI_PCI
2051 select BLK
2052 select PCI
2053 select DM_PCI
2054 select SCSI
2055 select DM_SERIAL
2056 imply CMD_PCI
2057 help
2058 Support for pomelo platform.
2059 It has 8GB Sdram, uart and pcie.
2060
2061 config TARGET_PRESIDIO_ASIC
2062 bool "Support Cortina Presidio ASIC Platform"
2063 select ARM64
2064 select GICV2
2065
2066 config TARGET_XENGUEST_ARM64
2067 bool "Xen guest ARM64"
2068 select ARM64
2069 select XEN
2070 select OF_CONTROL
2071 select LINUX_KERNEL_IMAGE_HEADER
2072 select XEN_SERIAL
2073 imply OF_HAS_PRIOR_STAGE
2074
2075 config ARCH_GXP
2076 bool "Support HPE GXP SoCs"
2077 select DM
2078 select OF_CONTROL
2079 imply CMD_DM
2080
2081 endchoice
2082
2083 config SUPPORT_PASSING_ATAGS
2084 bool "Support pre-devicetree ATAG-based booting"
2085 depends on !ARM64
2086 imply SETUP_MEMORY_TAGS
2087 help
2088 Support for booting older Linux kernels, using ATAGs rather than
2089 passing a devicetree. This is option is rarely used, and the
2090 semantics are defined at
2091 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2092
2093 config SETUP_MEMORY_TAGS
2094 bool "Pass memory size information via ATAG"
2095 depends on SUPPORT_PASSING_ATAGS
2096
2097 config CMDLINE_TAG
2098 bool "Pass Linux kernel cmdline via ATAG"
2099 depends on SUPPORT_PASSING_ATAGS
2100
2101 config INITRD_TAG
2102 bool "Pass initrd starting point and size via ATAG"
2103 depends on SUPPORT_PASSING_ATAGS
2104
2105 config REVISION_TAG
2106 bool "Pass system revision via ATAG"
2107 depends on SUPPORT_PASSING_ATAGS
2108
2109 config SERIAL_TAG
2110 bool "Pass system serial number via ATAG"
2111 depends on SUPPORT_PASSING_ATAGS
2112
2113 config STATIC_MACH_TYPE
2114 bool "Statically define the Machine ID number"
2115 default y if TARGET_DS109 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2116 help
2117 When booting via ATAGs, enable this option if we know the correct
2118 machine ID number to use at compile time. Some systems will be
2119 passed the number dynamically by whatever loads U-Boot.
2120
2121 config MACH_TYPE
2122 int "Machine ID number"
2123 depends on STATIC_MACH_TYPE
2124 default 527 if TARGET_DS109
2125 default 3036 if TARGET_DS414
2126 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2127 help
2128 When booting via ATAGs, the machine type must be passed as a number.
2129 For the full list see https://www.arm.linux.org.uk/developer/machines
2130
2131 config ARCH_SUPPORT_TFABOOT
2132 bool
2133
2134 config TFABOOT
2135 bool "Support for booting from TF-A"
2136 depends on ARCH_SUPPORT_TFABOOT
2137 help
2138 Some platforms support the setup of secure registers (for instance
2139 for CPU errata handling) or provide secure services like PSCI.
2140 Those services could also be provided by other firmware parts
2141 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2142 does not need to (and cannot) execute this code.
2143 Enabling this option will make a U-Boot binary that is relying
2144 on other firmware layers to provide secure functionality.
2145
2146 config TI_SECURE_DEVICE
2147 bool "HS Device Type Support"
2148 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2149 help
2150 If a high secure (HS) device type is being used, this config
2151 must be set. This option impacts various aspects of the
2152 build system (to create signed boot images that can be
2153 authenticated) and the code. See the doc/README.ti-secure
2154 file for further details.
2155
2156 config SYS_KWD_CONFIG
2157 string "kwbimage config file path"
2158 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2159 default "arch/arm/mach-mvebu/kwbimage.cfg"
2160 help
2161 Path within the source directory to the kwbimage.cfg file to use
2162 when packaging the U-Boot image for use.
2163
2164 source "arch/arm/mach-apple/Kconfig"
2165
2166 source "arch/arm/mach-aspeed/Kconfig"
2167
2168 source "arch/arm/mach-at91/Kconfig"
2169
2170 source "arch/arm/mach-bcm283x/Kconfig"
2171
2172 source "arch/arm/mach-bcmbca/Kconfig"
2173
2174 source "arch/arm/mach-bcmstb/Kconfig"
2175
2176 source "arch/arm/mach-davinci/Kconfig"
2177
2178 source "arch/arm/mach-exynos/Kconfig"
2179
2180 source "arch/arm/mach-hpe/gxp/Kconfig"
2181
2182 source "arch/arm/mach-highbank/Kconfig"
2183
2184 source "arch/arm/mach-histb/Kconfig"
2185
2186 source "arch/arm/mach-integrator/Kconfig"
2187
2188 source "arch/arm/mach-ipq40xx/Kconfig"
2189
2190 source "arch/arm/mach-k3/Kconfig"
2191
2192 source "arch/arm/mach-keystone/Kconfig"
2193
2194 source "arch/arm/mach-kirkwood/Kconfig"
2195
2196 source "arch/arm/mach-lpc32xx/Kconfig"
2197
2198 source "arch/arm/mach-mvebu/Kconfig"
2199
2200 source "arch/arm/mach-octeontx/Kconfig"
2201
2202 source "arch/arm/mach-octeontx2/Kconfig"
2203
2204 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2205
2206 source "arch/arm/mach-imx/mx3/Kconfig"
2207
2208 source "arch/arm/mach-imx/mx5/Kconfig"
2209
2210 source "arch/arm/mach-imx/mx6/Kconfig"
2211
2212 source "arch/arm/mach-imx/mx7/Kconfig"
2213
2214 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2215
2216 source "arch/arm/mach-imx/imx8/Kconfig"
2217
2218 source "arch/arm/mach-imx/imx8m/Kconfig"
2219
2220 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2221
2222 source "arch/arm/mach-imx/imx9/Kconfig"
2223
2224 source "arch/arm/mach-imx/imxrt/Kconfig"
2225
2226 source "arch/arm/mach-imx/mxs/Kconfig"
2227
2228 source "arch/arm/mach-omap2/Kconfig"
2229
2230 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2231
2232 source "arch/arm/mach-orion5x/Kconfig"
2233
2234 source "arch/arm/mach-owl/Kconfig"
2235
2236 source "arch/arm/mach-rmobile/Kconfig"
2237
2238 source "arch/arm/mach-meson/Kconfig"
2239
2240 source "arch/arm/mach-mediatek/Kconfig"
2241
2242 source "arch/arm/mach-qemu/Kconfig"
2243
2244 source "arch/arm/mach-rockchip/Kconfig"
2245
2246 source "arch/arm/mach-s5pc1xx/Kconfig"
2247
2248 source "arch/arm/mach-snapdragon/Kconfig"
2249
2250 source "arch/arm/mach-socfpga/Kconfig"
2251
2252 source "arch/arm/mach-sti/Kconfig"
2253
2254 source "arch/arm/mach-stm32/Kconfig"
2255
2256 source "arch/arm/mach-stm32mp/Kconfig"
2257
2258 source "arch/arm/mach-sunxi/Kconfig"
2259
2260 source "arch/arm/mach-tegra/Kconfig"
2261
2262 source "arch/arm/mach-u8500/Kconfig"
2263
2264 source "arch/arm/mach-uniphier/Kconfig"
2265
2266 source "arch/arm/cpu/armv7/vf610/Kconfig"
2267
2268 source "arch/arm/mach-zynq/Kconfig"
2269
2270 source "arch/arm/mach-zynqmp/Kconfig"
2271
2272 source "arch/arm/mach-versal/Kconfig"
2273
2274 source "arch/arm/mach-versal-net/Kconfig"
2275
2276 source "arch/arm/mach-zynqmp-r5/Kconfig"
2277
2278 source "arch/arm/cpu/armv7/Kconfig"
2279
2280 source "arch/arm/cpu/armv8/Kconfig"
2281
2282 source "arch/arm/mach-imx/Kconfig"
2283
2284 source "arch/arm/mach-nexell/Kconfig"
2285
2286 source "arch/arm/mach-npcm/Kconfig"
2287
2288 source "board/armltd/total_compute/Kconfig"
2289 source "board/armltd/corstone1000/Kconfig"
2290 source "board/bosch/shc/Kconfig"
2291 source "board/bosch/guardian/Kconfig"
2292 source "board/Marvell/octeontx/Kconfig"
2293 source "board/Marvell/octeontx2/Kconfig"
2294 source "board/armltd/vexpress/Kconfig"
2295 source "board/armltd/vexpress64/Kconfig"
2296 source "board/cortina/presidio-asic/Kconfig"
2297 source "board/broadcom/bcmns/Kconfig"
2298 source "board/broadcom/bcmns3/Kconfig"
2299 source "board/cavium/thunderx/Kconfig"
2300 source "board/eets/pdu001/Kconfig"
2301 source "board/emulation/qemu-arm/Kconfig"
2302 source "board/freescale/ls2080aqds/Kconfig"
2303 source "board/freescale/ls2080ardb/Kconfig"
2304 source "board/freescale/ls1088a/Kconfig"
2305 source "board/freescale/ls1028a/Kconfig"
2306 source "board/freescale/ls1021aqds/Kconfig"
2307 source "board/freescale/ls1043aqds/Kconfig"
2308 source "board/freescale/ls1021atwr/Kconfig"
2309 source "board/freescale/ls1021atsn/Kconfig"
2310 source "board/freescale/ls1021aiot/Kconfig"
2311 source "board/freescale/ls1046aqds/Kconfig"
2312 source "board/freescale/ls1043ardb/Kconfig"
2313 source "board/freescale/ls1046ardb/Kconfig"
2314 source "board/freescale/ls1046afrwy/Kconfig"
2315 source "board/freescale/ls1012aqds/Kconfig"
2316 source "board/freescale/ls1012ardb/Kconfig"
2317 source "board/freescale/ls1012afrdm/Kconfig"
2318 source "board/freescale/lx2160a/Kconfig"
2319 source "board/grinn/chiliboard/Kconfig"
2320 source "board/hisilicon/hikey/Kconfig"
2321 source "board/hisilicon/hikey960/Kconfig"
2322 source "board/hisilicon/poplar/Kconfig"
2323 source "board/isee/igep003x/Kconfig"
2324 source "board/kontron/sl28/Kconfig"
2325 source "board/myir/mys_6ulx/Kconfig"
2326 source "board/samsung/common/Kconfig"
2327 source "board/siemens/common/Kconfig"
2328 source "board/seeed/npi_imx6ull/Kconfig"
2329 source "board/socionext/developerbox/Kconfig"
2330 source "board/st/stv0991/Kconfig"
2331 source "board/tcl/sl50/Kconfig"
2332 source "board/traverse/ten64/Kconfig"
2333 source "board/variscite/dart_6ul/Kconfig"
2334 source "board/vscom/baltos/Kconfig"
2335 source "board/phytium/durian/Kconfig"
2336 source "board/phytium/pomelo/Kconfig"
2337 source "board/xen/xenguest_arm64/Kconfig"
2338
2339 source "arch/arm/Kconfig.debug"
2340
2341 endmenu