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1 menu "ARM architecture"
2 depends on ARM
3
4 config SYS_ARCH
5 default "arm"
6
7 config ARM64
8 bool
9 select PHYS_64BIT
10 select SYS_CACHE_SHIFT_6
11
12 config ARM64_CRC32
13 bool "Enable support for CRC32 instruction"
14 depends on ARM64
15 default y
16 help
17 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
18 This is faster than software crc32 calculation. This instruction may
19 not be present on all ARMv8.0, but is always present on ARMv8.1 and
20 newer.
21
22 config POSITION_INDEPENDENT
23 bool "Generate position-independent pre-relocation code"
24 depends on ARM64 || CPU_V7A
25 help
26 U-Boot expects to be linked to a specific hard-coded address, and to
27 be loaded to and run from that address. This option lifts that
28 restriction, thus allowing the code to be loaded to and executed from
29 almost any 4K aligned address. This logic relies on the relocation
30 information that is embedded in the binary to support U-Boot
31 relocating itself to the top-of-RAM later during execution.
32
33 config INIT_SP_RELATIVE
34 bool "Specify the early stack pointer relative to the .bss section"
35 depends on ARM64
36 default n if ARCH_QEMU
37 default y if POSITION_INDEPENDENT
38 help
39 U-Boot typically uses a hard-coded value for the stack pointer
40 before relocation. Enable this option to instead calculate the
41 initial SP at run-time. This is useful to avoid hard-coding addresses
42 into U-Boot, so that it can be loaded and executed at arbitrary
43 addresses and thus avoid using arbitrary addresses at runtime.
44
45 If this option is enabled, the early stack pointer is set to
46 &_bss_start with a offset value added. The offset is specified by
47 SYS_INIT_SP_BSS_OFFSET.
48
49 config SYS_INIT_SP_BSS_OFFSET
50 int "Early stack offset from the .bss base address"
51 depends on ARM64
52 depends on INIT_SP_RELATIVE
53 default 524288
54 help
55 This option's value is the offset added to &_bss_start in order to
56 calculate the stack pointer. This offset should be large enough so
57 that the early malloc region, global data (gd), and early stack usage
58 do not overlap any appended DTB.
59
60 config LINUX_KERNEL_IMAGE_HEADER
61 depends on ARM64
62 bool
63 help
64 Place a Linux kernel image header at the start of the U-Boot binary.
65 The format of the header is described in the Linux kernel source at
66 Documentation/arm64/booting.txt. This feature is useful since the
67 image header reports the amount of memory (BSS and similar) that
68 U-Boot needs to use, but which isn't part of the binary.
69
70 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
71 depends on LINUX_KERNEL_IMAGE_HEADER
72 hex
73 help
74 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
75 TEXT_OFFSET value written to the Linux kernel image header.
76
77 config GICV2
78 bool
79
80 config GICV3
81 bool
82
83 config GIC_V3_ITS
84 bool "ARM GICV3 ITS"
85 select IRQ
86 help
87 ARM GICV3 Interrupt translation service (ITS).
88 Basic support for programming locality specific peripheral
89 interrupts (LPI) configuration tables and enable LPI tables.
90 LPI configuration table can be used by u-boot or Linux.
91 ARM GICV3 has limitation, once the LPI table is enabled, LPI
92 configuration table can not be re-programmed, unless GICV3 reset.
93
94 config STATIC_RELA
95 bool
96 default y if ARM64
97
98 config DMA_ADDR_T_64BIT
99 bool
100 default y if ARM64
101
102 config HAS_VBAR
103 bool
104
105 config HAS_THUMB2
106 bool
107
108 config GPIO_EXTRA_HEADER
109 bool
110
111 # Used for compatibility with asm files copied from the kernel
112 config ARM_ASM_UNIFIED
113 bool
114 default y
115
116 # Used for compatibility with asm files copied from the kernel
117 config THUMB2_KERNEL
118 bool
119
120 config SYS_ICACHE_OFF
121 bool "Do not enable icache"
122 help
123 Do not enable instruction cache in U-Boot.
124
125 config SPL_SYS_ICACHE_OFF
126 bool "Do not enable icache in SPL"
127 depends on SPL
128 default SYS_ICACHE_OFF
129 help
130 Do not enable instruction cache in SPL.
131
132 config SYS_DCACHE_OFF
133 bool "Do not enable dcache"
134 help
135 Do not enable data cache in U-Boot.
136
137 config SPL_SYS_DCACHE_OFF
138 bool "Do not enable dcache in SPL"
139 depends on SPL
140 default SYS_DCACHE_OFF
141 help
142 Do not enable data cache in SPL.
143
144 config SYS_ARM_CACHE_CP15
145 bool "CP15 based cache enabling support"
146 help
147 Select this if your processor suports enabling caches by using
148 CP15 registers.
149
150 config SYS_ARM_MMU
151 bool "MMU-based Paged Memory Management Support"
152 select SYS_ARM_CACHE_CP15
153 help
154 Select if you want MMU-based virtualised addressing space
155 support via paged memory management.
156
157 config SYS_ARM_MPU
158 bool 'Use the ARM v7 PMSA Compliant MPU'
159 help
160 Some ARM systems without an MMU have instead a Memory Protection
161 Unit (MPU) that defines the type and permissions for regions of
162 memory.
163 If your CPU has an MPU then you should choose 'y' here unless you
164 know that you do not want to use the MPU.
165
166 # If set, the workarounds for these ARM errata are applied early during U-Boot
167 # startup. Note that in general these options force the workarounds to be
168 # applied; no CPU-type/version detection exists, unlike the similar options in
169 # the Linux kernel. Do not set these options unless they apply! Also note that
170 # the following can be machine-specific errata. These do have ability to
171 # provide rudimentary version and machine-specific checks, but expect no
172 # product checks:
173 # CONFIG_ARM_ERRATA_430973
174 # CONFIG_ARM_ERRATA_454179
175 # CONFIG_ARM_ERRATA_621766
176 # CONFIG_ARM_ERRATA_798870
177 # CONFIG_ARM_ERRATA_801819
178 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
179 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
180
181 config ARM_ERRATA_430973
182 bool
183
184 config ARM_ERRATA_454179
185 bool
186
187 config ARM_ERRATA_621766
188 bool
189
190 config ARM_ERRATA_716044
191 bool
192
193 config ARM_ERRATA_725233
194 bool
195
196 config ARM_ERRATA_742230
197 bool
198
199 config ARM_ERRATA_743622
200 bool
201
202 config ARM_ERRATA_751472
203 bool
204
205 config ARM_ERRATA_761320
206 bool
207
208 config ARM_ERRATA_773022
209 bool
210
211 config ARM_ERRATA_774769
212 bool
213
214 config ARM_ERRATA_794072
215 bool
216
217 config ARM_ERRATA_798870
218 bool
219
220 config ARM_ERRATA_801819
221 bool
222
223 config ARM_ERRATA_826974
224 bool
225
226 config ARM_ERRATA_828024
227 bool
228
229 config ARM_ERRATA_829520
230 bool
231
232 config ARM_ERRATA_833069
233 bool
234
235 config ARM_ERRATA_833471
236 bool
237
238 config ARM_ERRATA_845369
239 bool
240
241 config ARM_ERRATA_852421
242 bool
243
244 config ARM_ERRATA_852423
245 bool
246
247 config ARM_ERRATA_855873
248 bool
249
250 config ARM_CORTEX_A8_CVE_2017_5715
251 bool
252
253 config ARM_CORTEX_A15_CVE_2017_5715
254 bool
255
256 config CPU_ARM720T
257 bool
258 select SYS_CACHE_SHIFT_5
259 imply SYS_ARM_MMU
260
261 config CPU_ARM920T
262 bool
263 select SYS_CACHE_SHIFT_5
264 imply SYS_ARM_MMU
265
266 config CPU_ARM926EJS
267 bool
268 select SYS_CACHE_SHIFT_5
269 imply SYS_ARM_MMU
270
271 config CPU_ARM946ES
272 bool
273 select SYS_CACHE_SHIFT_5
274 imply SYS_ARM_MMU
275
276 config CPU_ARM1136
277 bool
278 select SYS_CACHE_SHIFT_5
279 imply SYS_ARM_MMU
280
281 config CPU_ARM1176
282 bool
283 select HAS_VBAR
284 select SYS_CACHE_SHIFT_5
285 imply SYS_ARM_MMU
286
287 config CPU_V7A
288 bool
289 select HAS_THUMB2
290 select HAS_VBAR
291 select SYS_CACHE_SHIFT_6
292 imply SYS_ARM_MMU
293
294 config CPU_V7M
295 bool
296 select HAS_THUMB2
297 select SYS_ARM_MPU
298 select SYS_CACHE_SHIFT_5
299 select SYS_THUMB_BUILD
300 select THUMB2_KERNEL
301
302 config CPU_V7R
303 bool
304 select HAS_THUMB2
305 select SYS_ARM_CACHE_CP15
306 select SYS_ARM_MPU
307 select SYS_CACHE_SHIFT_6
308
309 config CPU_PXA
310 bool
311 select SYS_CACHE_SHIFT_5
312 imply SYS_ARM_MMU
313
314 config CPU_PXA27X
315 bool
316 select CPU_PXA
317
318 config CPU_SA1100
319 bool
320 select SYS_CACHE_SHIFT_5
321 imply SYS_ARM_MMU
322
323 config SYS_CPU
324 default "arm720t" if CPU_ARM720T
325 default "arm920t" if CPU_ARM920T
326 default "arm926ejs" if CPU_ARM926EJS
327 default "arm946es" if CPU_ARM946ES
328 default "arm1136" if CPU_ARM1136
329 default "arm1176" if CPU_ARM1176
330 default "armv7" if CPU_V7A
331 default "armv7" if CPU_V7R
332 default "armv7m" if CPU_V7M
333 default "pxa" if CPU_PXA
334 default "sa1100" if CPU_SA1100
335 default "armv8" if ARM64
336
337 config SYS_ARM_ARCH
338 int
339 default 4 if CPU_ARM720T
340 default 4 if CPU_ARM920T
341 default 5 if CPU_ARM926EJS
342 default 5 if CPU_ARM946ES
343 default 6 if CPU_ARM1136
344 default 6 if CPU_ARM1176
345 default 7 if CPU_V7A
346 default 7 if CPU_V7M
347 default 7 if CPU_V7R
348 default 5 if CPU_PXA
349 default 4 if CPU_SA1100
350 default 8 if ARM64
351
352 choice
353 prompt "Select the ARM data write cache policy"
354 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
355 CPU_PXA || RZA1
356 default SYS_ARM_CACHE_WRITEBACK
357
358 config SYS_ARM_CACHE_WRITEBACK
359 bool "Write-back (WB)"
360 help
361 A write updates the cache only and marks the cache line as dirty.
362 External memory is updated only when the line is evicted or explicitly
363 cleaned.
364
365 config SYS_ARM_CACHE_WRITETHROUGH
366 bool "Write-through (WT)"
367 help
368 A write updates both the cache and the external memory system.
369 This does not mark the cache line as dirty.
370
371 config SYS_ARM_CACHE_WRITEALLOC
372 bool "Write allocation (WA)"
373 help
374 A cache line is allocated on a write miss. This means that executing a
375 store instruction on the processor might cause a burst read to occur.
376 There is a linefill to obtain the data for the cache line, before the
377 write is performed.
378 endchoice
379
380 config ARCH_CPU_INIT
381 bool "Enable ARCH_CPU_INIT"
382 help
383 Some architectures require a call to arch_cpu_init().
384 Say Y here to enable it
385
386 config SYS_ARCH_TIMER
387 bool "ARM Generic Timer support"
388 depends on CPU_V7A || ARM64
389 default y if ARM64
390 help
391 The ARM Generic Timer (aka arch-timer) provides an architected
392 interface to a timer source on an SoC.
393 It is mandatory for ARMv8 implementation and widely available
394 on ARMv7 systems.
395
396 config ARM_SMCCC
397 bool "Support for ARM SMC Calling Convention (SMCCC)"
398 depends on CPU_V7A || ARM64
399 select ARM_PSCI_FW
400 help
401 Say Y here if you want to enable ARM SMC Calling Convention.
402 This should be enabled if U-Boot needs to communicate with system
403 firmware (for example, PSCI) according to SMCCC.
404
405 config SEMIHOSTING
406 bool "support boot from semihosting"
407 help
408 In emulated environments, semihosting is a way for
409 the hosted environment to call out to the emulator to
410 retrieve files from the host machine.
411
412 config SYS_THUMB_BUILD
413 bool "Build U-Boot using the Thumb instruction set"
414 depends on !ARM64
415 help
416 Use this flag to build U-Boot using the Thumb instruction set for
417 ARM architectures. Thumb instruction set provides better code
418 density. For ARM architectures that support Thumb2 this flag will
419 result in Thumb2 code generated by GCC.
420
421 config SPL_SYS_THUMB_BUILD
422 bool "Build SPL using the Thumb instruction set"
423 default y if SYS_THUMB_BUILD
424 depends on !ARM64 && SPL
425 help
426 Use this flag to build SPL using the Thumb instruction set for
427 ARM architectures. Thumb instruction set provides better code
428 density. For ARM architectures that support Thumb2 this flag will
429 result in Thumb2 code generated by GCC.
430
431 config TPL_SYS_THUMB_BUILD
432 bool "Build TPL using the Thumb instruction set"
433 default y if SYS_THUMB_BUILD
434 depends on TPL && !ARM64
435 help
436 Use this flag to build TPL using the Thumb instruction set for
437 ARM architectures. Thumb instruction set provides better code
438 density. For ARM architectures that support Thumb2 this flag will
439 result in Thumb2 code generated by GCC.
440
441
442 config SYS_L2CACHE_OFF
443 bool "L2cache off"
444 help
445 If SoC does not support L2CACHE or one does not want to enable
446 L2CACHE, choose this option.
447
448 config ENABLE_ARM_SOC_BOOT0_HOOK
449 bool "prepare BOOT0 header"
450 help
451 If the SoC's BOOT0 requires a header area filled with (magic)
452 values, then choose this option, and create a file included as
453 <asm/arch/boot0.h> which contains the required assembler code.
454
455 config ARM_CORTEX_CPU_IS_UP
456 bool
457
458 config USE_ARCH_MEMCPY
459 bool "Use an assembly optimized implementation of memcpy"
460 default y if !ARM64
461 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
462 help
463 Enable the generation of an optimized version of memcpy.
464 Such an implementation may be faster under some conditions
465 but may increase the binary size.
466
467 config SPL_USE_ARCH_MEMCPY
468 bool "Use an assembly optimized implementation of memcpy for SPL"
469 default y if USE_ARCH_MEMCPY
470 depends on SPL
471 help
472 Enable the generation of an optimized version of memcpy.
473 Such an implementation may be faster under some conditions
474 but may increase the binary size.
475
476 config TPL_USE_ARCH_MEMCPY
477 bool "Use an assembly optimized implementation of memcpy for TPL"
478 default y if USE_ARCH_MEMCPY
479 depends on TPL
480 help
481 Enable the generation of an optimized version of memcpy.
482 Such an implementation may be faster under some conditions
483 but may increase the binary size.
484
485 config USE_ARCH_MEMMOVE
486 bool "Use an assembly optimized implementation of memmove" if !ARM64
487 default USE_ARCH_MEMCPY if ARM64
488 depends on ARM64
489 help
490 Enable the generation of an optimized version of memmove.
491 Such an implementation may be faster under some conditions
492 but may increase the binary size.
493
494 config SPL_USE_ARCH_MEMMOVE
495 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
496 default SPL_USE_ARCH_MEMCPY if ARM64
497 depends on SPL && ARM64
498 help
499 Enable the generation of an optimized version of memmove.
500 Such an implementation may be faster under some conditions
501 but may increase the binary size.
502
503 config TPL_USE_ARCH_MEMMOVE
504 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
505 default TPL_USE_ARCH_MEMCPY if ARM64
506 depends on TPL && ARM64
507 help
508 Enable the generation of an optimized version of memmove.
509 Such an implementation may be faster under some conditions
510 but may increase the binary size.
511
512 config USE_ARCH_MEMSET
513 bool "Use an assembly optimized implementation of memset"
514 default y if !ARM64
515 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
516 help
517 Enable the generation of an optimized version of memset.
518 Such an implementation may be faster under some conditions
519 but may increase the binary size.
520
521 config SPL_USE_ARCH_MEMSET
522 bool "Use an assembly optimized implementation of memset for SPL"
523 default y if USE_ARCH_MEMSET
524 depends on SPL
525 help
526 Enable the generation of an optimized version of memset.
527 Such an implementation may be faster under some conditions
528 but may increase the binary size.
529
530 config TPL_USE_ARCH_MEMSET
531 bool "Use an assembly optimized implementation of memset for TPL"
532 default y if USE_ARCH_MEMSET
533 depends on TPL
534 help
535 Enable the generation of an optimized version of memset.
536 Such an implementation may be faster under some conditions
537 but may increase the binary size.
538
539 config ARM64_SUPPORT_AARCH32
540 bool "ARM64 system support AArch32 execution state"
541 depends on ARM64
542 default y if !TARGET_THUNDERX_88XX
543 help
544 This ARM64 system supports AArch32 execution state.
545
546 choice
547 prompt "Target select"
548 default TARGET_HIKEY
549
550 config ARCH_AT91
551 bool "Atmel AT91"
552 select GPIO_EXTRA_HEADER
553 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
554 select SPL_SEPARATE_BSS if SPL
555
556 config ARCH_DAVINCI
557 bool "TI DaVinci"
558 select CPU_ARM926EJS
559 select GPIO_EXTRA_HEADER
560 select SPL_DM_SPI if SPL
561 imply CMD_SAVES
562 help
563 Support for TI's DaVinci platform.
564
565 config ARCH_KIRKWOOD
566 bool "Marvell Kirkwood"
567 select ARCH_MISC_INIT
568 select BOARD_EARLY_INIT_F
569 select CPU_ARM926EJS
570 select GPIO_EXTRA_HEADER
571
572 config ARCH_MVEBU
573 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
574 select DM
575 select DM_ETH
576 select DM_SERIAL
577 select DM_SPI
578 select DM_SPI_FLASH
579 select GPIO_EXTRA_HEADER
580 select SPL_DM_SPI if SPL
581 select SPL_DM_SPI_FLASH if SPL
582 select OF_CONTROL
583 select OF_SEPARATE
584 select SPI
585 imply CMD_DM
586
587 config ARCH_ORION5X
588 bool "Marvell Orion"
589 select CPU_ARM926EJS
590 select GPIO_EXTRA_HEADER
591
592 config TARGET_STV0991
593 bool "Support stv0991"
594 select CPU_V7A
595 select DM
596 select DM_SERIAL
597 select DM_SPI
598 select DM_SPI_FLASH
599 select GPIO_EXTRA_HEADER
600 select PL01X_SERIAL
601 select SPI
602 select SPI_FLASH
603 imply CMD_DM
604
605 config ARCH_BCM283X
606 bool "Broadcom BCM283X family"
607 select DM
608 select DM_GPIO
609 select DM_SERIAL
610 select GPIO_EXTRA_HEADER
611 select OF_CONTROL
612 select PL01X_SERIAL
613 select SERIAL_SEARCH_ALL
614 imply CMD_DM
615 imply FAT_WRITE
616
617 config ARCH_BCM63158
618 bool "Broadcom BCM63158 family"
619 select DM
620 select OF_CONTROL
621 imply CMD_DM
622
623 config ARCH_BCM68360
624 bool "Broadcom BCM68360 family"
625 select DM
626 select OF_CONTROL
627 imply CMD_DM
628
629 config ARCH_BCM6858
630 bool "Broadcom BCM6858 family"
631 select DM
632 select OF_CONTROL
633 imply CMD_DM
634
635 config ARCH_BCMSTB
636 bool "Broadcom BCM7XXX family"
637 select CPU_V7A
638 select DM
639 select GPIO_EXTRA_HEADER
640 select OF_CONTROL
641 imply CMD_DM
642 imply OF_HAS_PRIOR_STAGE
643 help
644 This enables support for Broadcom ARM-based set-top box
645 chipsets, including the 7445 family of chips.
646
647 config TARGET_VEXPRESS_CA9X4
648 bool "Support vexpress_ca9x4"
649 select CPU_V7A
650 select PL011_SERIAL
651
652 config TARGET_BCMCYGNUS
653 bool "Support bcmcygnus"
654 select CPU_V7A
655 select GPIO_EXTRA_HEADER
656 imply BCM_SF2_ETH
657 imply BCM_SF2_ETH_GMAC
658 imply CMD_HASH
659 imply CRC32_VERIFY
660 imply FAT_WRITE
661 imply HASH_VERIFY
662 imply NETDEVICES
663
664 config TARGET_BCMNS2
665 bool "Support Broadcom Northstar2"
666 select ARM64
667 select GPIO_EXTRA_HEADER
668 help
669 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
670 ARMv8 Cortex-A57 processors targeting a broad range of networking
671 applications.
672
673 config TARGET_BCMNS3
674 bool "Support Broadcom NS3"
675 select ARM64
676 select BOARD_LATE_INIT
677 help
678 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
679 ARMv8 Cortex-A72 processors targeting a broad range of networking
680 applications.
681
682 config ARCH_EXYNOS
683 bool "Samsung EXYNOS"
684 select DM
685 select DM_GPIO
686 select DM_I2C
687 select DM_ETH
688 select DM_KEYBOARD
689 select DM_SERIAL
690 select DM_SPI
691 select DM_SPI_FLASH
692 select SPI
693 select GPIO_EXTRA_HEADER
694 imply SYS_THUMB_BUILD
695 imply CMD_DM
696 imply FAT_WRITE
697
698 config ARCH_S5PC1XX
699 bool "Samsung S5PC1XX"
700 select CPU_V7A
701 select DM
702 select DM_GPIO
703 select DM_I2C
704 select DM_SERIAL
705 select GPIO_EXTRA_HEADER
706 imply CMD_DM
707
708 config ARCH_HIGHBANK
709 bool "Calxeda Highbank"
710 select CPU_V7A
711 select PL01X_SERIAL
712 select DM
713 select DM_SERIAL
714 select OF_CONTROL
715 select CLK
716 select CLK_CCF
717 select AHCI
718 select DM_ETH
719 select PHYS_64BIT
720 imply OF_HAS_PRIOR_STAGE
721
722 config ARCH_INTEGRATOR
723 bool "ARM Ltd. Integrator family"
724 select DM
725 select DM_SERIAL
726 select GPIO_EXTRA_HEADER
727 select PL01X_SERIAL
728 imply CMD_DM
729
730 config ARCH_IPQ40XX
731 bool "Qualcomm IPQ40xx SoCs"
732 select CPU_V7A
733 select DM
734 select DM_GPIO
735 select DM_SERIAL
736 select DM_RESET
737 select GPIO_EXTRA_HEADER
738 select MSM_SMEM
739 select PINCTRL
740 select CLK
741 select SMEM
742 select OF_CONTROL
743 imply CMD_DM
744
745 config ARCH_KEYSTONE
746 bool "TI Keystone"
747 select CMD_POWEROFF
748 select CPU_V7A
749 select DDR_SPD
750 select GPIO_EXTRA_HEADER
751 select SUPPORT_SPL
752 select SYS_ARCH_TIMER
753 select SYS_THUMB_BUILD
754 imply CMD_MTDPARTS
755 imply CMD_SAVES
756 imply FIT
757
758 config ARCH_K3
759 bool "Texas Instruments' K3 Architecture"
760 select SPL
761 select SUPPORT_SPL
762 select FIT
763
764 config ARCH_OMAP2PLUS
765 bool "TI OMAP2+"
766 select CPU_V7A
767 select GPIO_EXTRA_HEADER
768 select SPL_BOARD_INIT if SPL
769 select SPL_STACK_R if SPL
770 select SUPPORT_SPL
771 imply TI_SYSC if DM && OF_CONTROL
772 imply FIT
773
774 config ARCH_MESON
775 bool "Amlogic Meson"
776 select GPIO_EXTRA_HEADER
777 imply DISTRO_DEFAULTS
778 imply DM_RNG
779 help
780 Support for the Meson SoC family developed by Amlogic Inc.,
781 targeted at media players and tablet computers. We currently
782 support the S905 (GXBaby) 64-bit SoC.
783
784 config ARCH_MEDIATEK
785 bool "MediaTek SoCs"
786 select DM
787 select GPIO_EXTRA_HEADER
788 select OF_CONTROL
789 select SPL_DM if SPL
790 select SPL_LIBCOMMON_SUPPORT if SPL
791 select SPL_LIBGENERIC_SUPPORT if SPL
792 select SPL_OF_CONTROL if SPL
793 select SUPPORT_SPL
794 help
795 Support for the MediaTek SoCs family developed by MediaTek Inc.
796 Please refer to doc/README.mediatek for more information.
797
798 config ARCH_LPC32XX
799 bool "NXP LPC32xx platform"
800 select CPU_ARM926EJS
801 select DM
802 select DM_GPIO
803 select DM_SERIAL
804 select GPIO_EXTRA_HEADER
805 select SPL_DM if SPL
806 select SUPPORT_SPL
807 imply CMD_DM
808
809 config ARCH_IMX8
810 bool "NXP i.MX8 platform"
811 select ARM64
812 select DM
813 select GPIO_EXTRA_HEADER
814 select MACH_IMX
815 select OF_CONTROL
816 select ENABLE_ARM_SOC_BOOT0_HOOK
817
818 config ARCH_IMX8M
819 bool "NXP i.MX8M platform"
820 select ARM64
821 select GPIO_EXTRA_HEADER
822 select MACH_IMX
823 select SYS_FSL_HAS_SEC if IMX_HAB
824 select SYS_FSL_SEC_COMPAT_4
825 select SYS_FSL_SEC_LE
826 select SYS_I2C_MXC
827 select DM
828 select SUPPORT_SPL
829 imply CMD_DM
830
831 config ARCH_IMX8ULP
832 bool "NXP i.MX8ULP platform"
833 select ARM64
834 select DM
835 select MACH_IMX
836 select OF_CONTROL
837 select SUPPORT_SPL
838 select GPIO_EXTRA_HEADER
839 imply CMD_DM
840
841 config ARCH_IMXRT
842 bool "NXP i.MXRT platform"
843 select CPU_V7M
844 select DM
845 select DM_SERIAL
846 select GPIO_EXTRA_HEADER
847 select MACH_IMX
848 select SUPPORT_SPL
849 imply CMD_DM
850
851 config ARCH_MX23
852 bool "NXP i.MX23 family"
853 select CPU_ARM926EJS
854 select GPIO_EXTRA_HEADER
855 select MACH_IMX
856 select PL011_SERIAL
857 select SUPPORT_SPL
858
859 config ARCH_MX28
860 bool "NXP i.MX28 family"
861 select CPU_ARM926EJS
862 select GPIO_EXTRA_HEADER
863 select PL011_SERIAL
864 select MACH_IMX
865 select SUPPORT_SPL
866
867 config ARCH_MX31
868 bool "NXP i.MX31 family"
869 select CPU_ARM1136
870 select GPIO_EXTRA_HEADER
871 select MACH_IMX
872
873 config ARCH_MX7ULP
874 bool "NXP MX7ULP"
875 select CPU_V7A
876 select GPIO_EXTRA_HEADER
877 select MACH_IMX
878 select SYS_FSL_HAS_SEC if IMX_HAB
879 select SYS_FSL_SEC_COMPAT_4
880 select SYS_FSL_SEC_LE
881 select ROM_UNIFIED_SECTIONS
882 imply MXC_GPIO
883 imply SYS_THUMB_BUILD
884
885 config ARCH_MX7
886 bool "Freescale MX7"
887 select ARCH_MISC_INIT
888 select CPU_V7A
889 select GPIO_EXTRA_HEADER
890 select MACH_IMX
891 select SYS_FSL_HAS_SEC if IMX_HAB
892 select SYS_FSL_SEC_COMPAT_4
893 select SYS_FSL_SEC_LE
894 imply BOARD_EARLY_INIT_F
895 imply MXC_GPIO
896 imply SYS_THUMB_BUILD
897
898 config ARCH_MX6
899 bool "Freescale MX6"
900 select CPU_V7A
901 select GPIO_EXTRA_HEADER
902 select MACH_IMX
903 select SYS_FSL_HAS_SEC
904 select SYS_FSL_SEC_COMPAT_4
905 select SYS_FSL_SEC_LE
906 imply MXC_GPIO
907 imply SYS_THUMB_BUILD
908
909 if ARCH_MX6
910 config SPL_LDSCRIPT
911 default "arch/arm/mach-omap2/u-boot-spl.lds"
912 endif
913
914 config ARCH_MX5
915 bool "Freescale MX5"
916 select BOARD_EARLY_INIT_F
917 select CPU_V7A
918 select GPIO_EXTRA_HEADER
919 select MACH_IMX
920 imply MXC_GPIO
921
922 config ARCH_NEXELL
923 bool "Nexell S5P4418/S5P6818 SoC"
924 select ENABLE_ARM_SOC_BOOT0_HOOK
925 select DM
926 select GPIO_EXTRA_HEADER
927
928 config ARCH_APPLE
929 bool "Apple SoCs"
930 select ARM64
931 select BLK
932 select CLK
933 select CMD_USB
934 select DM
935 select DM_GPIO
936 select DM_KEYBOARD
937 select DM_SERIAL
938 select DM_USB
939 select DM_VIDEO
940 select IOMMU
941 select LINUX_KERNEL_IMAGE_HEADER
942 select OF_CONTROL
943 select PINCTRL
944 select POSITION_INDEPENDENT
945 select USB
946 imply CMD_DM
947 imply CMD_GPT
948 imply DISTRO_DEFAULTS
949 imply OF_HAS_PRIOR_STAGE
950
951 config ARCH_OWL
952 bool "Actions Semi OWL SoCs"
953 select DM
954 select DM_ETH
955 select DM_SERIAL
956 select GPIO_EXTRA_HEADER
957 select OWL_SERIAL
958 select CLK
959 select CLK_OWL
960 select OF_CONTROL
961 select SYS_RELOC_GD_ENV_ADDR
962 imply CMD_DM
963
964 config ARCH_QEMU
965 bool "QEMU Virtual Platform"
966 select DM
967 select DM_SERIAL
968 select OF_CONTROL
969 select PL01X_SERIAL
970 imply CMD_DM
971 imply DM_RNG
972 imply DM_RTC
973 imply RTC_PL031
974 imply OF_HAS_PRIOR_STAGE
975
976 config ARCH_RMOBILE
977 bool "Renesas ARM SoCs"
978 select DM
979 select DM_SERIAL
980 select GPIO_EXTRA_HEADER
981 imply BOARD_EARLY_INIT_F
982 imply CMD_DM
983 imply FAT_WRITE
984 imply SYS_THUMB_BUILD
985 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
986
987 config ARCH_SNAPDRAGON
988 bool "Qualcomm Snapdragon SoCs"
989 select ARM64
990 select DM
991 select DM_GPIO
992 select DM_SERIAL
993 select GPIO_EXTRA_HEADER
994 select MSM_SMEM
995 select OF_CONTROL
996 select OF_SEPARATE
997 select SMEM
998 select SPMI
999 imply CMD_DM
1000
1001 config ARCH_SOCFPGA
1002 bool "Altera SOCFPGA family"
1003 select ARCH_EARLY_INIT_R
1004 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1005 select ARM64 if TARGET_SOCFPGA_SOC64
1006 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1007 select DM
1008 select DM_SERIAL
1009 select GICV2
1010 select GPIO_EXTRA_HEADER
1011 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1012 select OF_CONTROL
1013 select SPL_DM_RESET if DM_RESET
1014 select SPL_DM_SERIAL
1015 select SPL_LIBCOMMON_SUPPORT
1016 select SPL_LIBGENERIC_SUPPORT
1017 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
1018 select SPL_OF_CONTROL
1019 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1020 select SPL_SERIAL
1021 select SPL_SYSRESET
1022 select SPL_WATCHDOG
1023 select SUPPORT_SPL
1024 select SYS_NS16550
1025 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1026 select SYSRESET
1027 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1028 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1029 imply CMD_DM
1030 imply CMD_MTDPARTS
1031 imply CRC32_VERIFY
1032 imply DM_SPI
1033 imply DM_SPI_FLASH
1034 imply FAT_WRITE
1035 imply SPL
1036 imply SPL_DM
1037 imply SPL_DM_SPI
1038 imply SPL_DM_SPI_FLASH
1039 imply SPL_LIBDISK_SUPPORT
1040 imply SPL_MMC
1041 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1042 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1043 imply SPL_SPI_FLASH_SUPPORT
1044 imply SPL_SPI
1045 imply L2X0_CACHE
1046
1047 config ARCH_SUNXI
1048 bool "Support sunxi (Allwinner) SoCs"
1049 select BINMAN
1050 select CMD_GPIO
1051 select CMD_MMC if MMC
1052 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1053 select CLK
1054 select DM
1055 select DM_ETH
1056 select DM_GPIO
1057 select DM_I2C if I2C
1058 select DM_KEYBOARD
1059 select DM_MMC if MMC
1060 select DM_SCSI if SCSI
1061 select DM_SERIAL
1062 select GPIO_EXTRA_HEADER
1063 select OF_BOARD_SETUP
1064 select OF_CONTROL
1065 select OF_SEPARATE
1066 select SPECIFY_CONSOLE_INDEX
1067 select SPL_SEPARATE_BSS if SPL
1068 select SPL_STACK_R if SPL
1069 select SPL_SYS_MALLOC_SIMPLE if SPL
1070 select SPL_SYS_THUMB_BUILD if !ARM64
1071 select SUNXI_GPIO
1072 select SYS_NS16550
1073 select SYS_THUMB_BUILD if !ARM64
1074 select USB if DISTRO_DEFAULTS
1075 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1076 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1077 select SPL_USE_TINY_PRINTF
1078 select USE_PREBOOT
1079 select SYS_RELOC_GD_ENV_ADDR
1080 imply BOARD_LATE_INIT
1081 imply CMD_DM
1082 imply CMD_GPT
1083 imply CMD_UBI if MTD_RAW_NAND
1084 imply DISTRO_DEFAULTS
1085 imply FAT_WRITE
1086 imply FIT
1087 imply OF_LIBFDT_OVERLAY
1088 imply PRE_CONSOLE_BUFFER
1089 imply SPL_GPIO
1090 imply SPL_LIBCOMMON_SUPPORT
1091 imply SPL_LIBGENERIC_SUPPORT
1092 imply SPL_MMC if MMC
1093 imply SPL_POWER
1094 imply SPL_SERIAL
1095 imply SYSRESET
1096 imply SYSRESET_WATCHDOG
1097 imply SYSRESET_WATCHDOG_AUTO
1098 imply USB_GADGET
1099 imply WDT
1100
1101 config ARCH_U8500
1102 bool "ST-Ericsson U8500 Series"
1103 select CPU_V7A
1104 select DM
1105 select DM_GPIO
1106 select DM_MMC if MMC
1107 select DM_SERIAL
1108 select DM_USB_GADGET if DM_USB
1109 select OF_CONTROL
1110 select SYSRESET
1111 select TIMER
1112 imply AB8500_USB_PHY
1113 imply ARM_PL180_MMCI
1114 imply CLK
1115 imply DM_PMIC
1116 imply DM_RTC
1117 imply NOMADIK_GPIO
1118 imply NOMADIK_MTU_TIMER
1119 imply PHY
1120 imply PL01X_SERIAL
1121 imply PMIC_AB8500
1122 imply RTC_PL031
1123 imply SYS_THUMB_BUILD
1124 imply SYSRESET_SYSCON
1125
1126 config ARCH_VERSAL
1127 bool "Support Xilinx Versal Platform"
1128 select ARM64
1129 select CLK
1130 select DM
1131 select DM_ETH if NET
1132 select DM_MMC if MMC
1133 select DM_SERIAL
1134 select GICV3
1135 select GPIO_EXTRA_HEADER
1136 select OF_CONTROL
1137 select SOC_DEVICE
1138 imply BOARD_LATE_INIT
1139 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1140
1141 config ARCH_VF610
1142 bool "Freescale Vybrid"
1143 select CPU_V7A
1144 select GPIO_EXTRA_HEADER
1145 select MACH_IMX
1146 select SYS_FSL_ERRATUM_ESDHC111
1147 imply CMD_MTDPARTS
1148 imply MTD_RAW_NAND
1149
1150 config ARCH_ZYNQ
1151 bool "Xilinx Zynq based platform"
1152 select CLK
1153 select CLK_ZYNQ
1154 select CPU_V7A
1155 select DM
1156 select DM_ETH if NET
1157 select DM_MMC if MMC
1158 select DM_SERIAL
1159 select DM_SPI
1160 select DM_SPI_FLASH
1161 select GPIO_EXTRA_HEADER
1162 select OF_CONTROL
1163 select SPI
1164 select SPL_BOARD_INIT if SPL
1165 select SPL_CLK if SPL
1166 select SPL_DM if SPL
1167 select SPL_DM_SPI if SPL
1168 select SPL_DM_SPI_FLASH if SPL
1169 select SPL_OF_CONTROL if SPL
1170 select SPL_SEPARATE_BSS if SPL
1171 select SUPPORT_SPL
1172 imply ARCH_EARLY_INIT_R
1173 imply BOARD_LATE_INIT
1174 imply CMD_CLK
1175 imply CMD_DM
1176 imply CMD_SPL
1177 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1178 imply FAT_WRITE
1179
1180 config ARCH_ZYNQMP_R5
1181 bool "Xilinx ZynqMP R5 based platform"
1182 select CLK
1183 select CPU_V7R
1184 select DM
1185 select DM_ETH if NET
1186 select DM_MMC if MMC
1187 select DM_SERIAL
1188 select GPIO_EXTRA_HEADER
1189 select OF_CONTROL
1190 imply CMD_DM
1191 imply DM_USB_GADGET
1192
1193 config ARCH_ZYNQMP
1194 bool "Xilinx ZynqMP based platform"
1195 select ARM64
1196 select CLK
1197 select DM
1198 select DM_ETH if NET
1199 select DM_MAILBOX
1200 select DM_MMC if MMC
1201 select DM_SERIAL
1202 select DM_SPI if SPI
1203 select DM_SPI_FLASH if DM_SPI
1204 select FIRMWARE
1205 select GICV2
1206 select GPIO_EXTRA_HEADER
1207 select OF_CONTROL
1208 select SPL_BOARD_INIT if SPL
1209 select SPL_CLK if SPL
1210 select SPL_DM if SPL
1211 select SPL_DM_SPI if SPI && SPL_DM
1212 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1213 select SPL_DM_MAILBOX if SPL
1214 select SPL_FIRMWARE if SPL
1215 select SPL_SEPARATE_BSS if SPL
1216 select SUPPORT_SPL
1217 select ZYNQMP_IPI
1218 select SOC_DEVICE
1219 imply BOARD_LATE_INIT
1220 imply CMD_DM
1221 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1222 imply FAT_WRITE
1223 imply MP
1224 imply DM_USB_GADGET
1225
1226 config ARCH_TEGRA
1227 bool "NVIDIA Tegra"
1228 select GPIO_EXTRA_HEADER
1229 imply DISTRO_DEFAULTS
1230 imply FAT_WRITE
1231
1232 config TARGET_VEXPRESS64_AEMV8A
1233 bool "Support vexpress_aemv8a"
1234 select ARM64
1235 select GPIO_EXTRA_HEADER
1236 select PL01X_SERIAL
1237
1238 config TARGET_VEXPRESS64_BASE_FVP
1239 bool "Support Versatile Express ARMv8a FVP BASE model"
1240 select ARM64
1241 select GPIO_EXTRA_HEADER
1242 select PL01X_SERIAL
1243 select SEMIHOSTING
1244
1245 config TARGET_VEXPRESS64_JUNO
1246 bool "Support Versatile Express Juno Development Platform"
1247 select ARM64
1248 select GPIO_EXTRA_HEADER
1249 select PL01X_SERIAL
1250 select DM
1251 select OF_CONTROL
1252 select CLK
1253 select DM_SERIAL
1254 select ARM_PSCI_FW
1255 select PSCI_RESET
1256 select DM_ETH
1257 select BLK
1258 select USB
1259 imply OF_HAS_PRIOR_STAGE
1260
1261 config TARGET_TOTAL_COMPUTE
1262 bool "Support Total Compute Platform"
1263 select ARM64
1264 select PL01X_SERIAL
1265 select DM
1266 select DM_SERIAL
1267 select DM_MMC
1268 select DM_GPIO
1269
1270 config TARGET_LS2080A_EMU
1271 bool "Support ls2080a_emu"
1272 select ARCH_LS2080A
1273 select ARM64
1274 select ARMV8_MULTIENTRY
1275 select FSL_DDR_SYNC_REFRESH
1276 select GPIO_EXTRA_HEADER
1277 help
1278 Support for Freescale LS2080A_EMU platform.
1279 The LS2080A Development System (EMULATOR) is a pre-silicon
1280 development platform that supports the QorIQ LS2080A
1281 Layerscape Architecture processor.
1282
1283 config TARGET_LS1088AQDS
1284 bool "Support ls1088aqds"
1285 select ARCH_LS1088A
1286 select ARM64
1287 select ARMV8_MULTIENTRY
1288 select ARCH_SUPPORT_TFABOOT
1289 select BOARD_LATE_INIT
1290 select GPIO_EXTRA_HEADER
1291 select SUPPORT_SPL
1292 select FSL_DDR_INTERACTIVE if !SD_BOOT
1293 help
1294 Support for NXP LS1088AQDS platform.
1295 The LS1088A Development System (QDS) is a high-performance
1296 development platform that supports the QorIQ LS1088A
1297 Layerscape Architecture processor.
1298
1299 config TARGET_LS2080AQDS
1300 bool "Support ls2080aqds"
1301 select ARCH_LS2080A
1302 select ARM64
1303 select ARMV8_MULTIENTRY
1304 select ARCH_SUPPORT_TFABOOT
1305 select BOARD_LATE_INIT
1306 select GPIO_EXTRA_HEADER
1307 select SUPPORT_SPL
1308 imply SCSI
1309 imply SCSI_AHCI
1310 select FSL_DDR_BIST
1311 select FSL_DDR_INTERACTIVE if !SPL
1312 help
1313 Support for Freescale LS2080AQDS platform.
1314 The LS2080A Development System (QDS) is a high-performance
1315 development platform that supports the QorIQ LS2080A
1316 Layerscape Architecture processor.
1317
1318 config TARGET_LS2080ARDB
1319 bool "Support ls2080ardb"
1320 select ARCH_LS2080A
1321 select ARM64
1322 select ARMV8_MULTIENTRY
1323 select ARCH_SUPPORT_TFABOOT
1324 select BOARD_LATE_INIT
1325 select SUPPORT_SPL
1326 select FSL_DDR_BIST
1327 select FSL_DDR_INTERACTIVE if !SPL
1328 select GPIO_EXTRA_HEADER
1329 imply SCSI
1330 imply SCSI_AHCI
1331 help
1332 Support for Freescale LS2080ARDB platform.
1333 The LS2080A Reference design board (RDB) is a high-performance
1334 development platform that supports the QorIQ LS2080A
1335 Layerscape Architecture processor.
1336
1337 config TARGET_LS2081ARDB
1338 bool "Support ls2081ardb"
1339 select ARCH_LS2080A
1340 select ARM64
1341 select ARMV8_MULTIENTRY
1342 select BOARD_LATE_INIT
1343 select GPIO_EXTRA_HEADER
1344 select SUPPORT_SPL
1345 help
1346 Support for Freescale LS2081ARDB platform.
1347 The LS2081A Reference design board (RDB) is a high-performance
1348 development platform that supports the QorIQ LS2081A/LS2041A
1349 Layerscape Architecture processor.
1350
1351 config TARGET_LX2160ARDB
1352 bool "Support lx2160ardb"
1353 select ARCH_LX2160A
1354 select ARM64
1355 select ARMV8_MULTIENTRY
1356 select ARCH_SUPPORT_TFABOOT
1357 select BOARD_LATE_INIT
1358 select GPIO_EXTRA_HEADER
1359 help
1360 Support for NXP LX2160ARDB platform.
1361 The lx2160ardb (LX2160A Reference design board (RDB)
1362 is a high-performance development platform that supports the
1363 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1364
1365 config TARGET_LX2160AQDS
1366 bool "Support lx2160aqds"
1367 select ARCH_LX2160A
1368 select ARM64
1369 select ARMV8_MULTIENTRY
1370 select ARCH_SUPPORT_TFABOOT
1371 select BOARD_LATE_INIT
1372 select GPIO_EXTRA_HEADER
1373 help
1374 Support for NXP LX2160AQDS platform.
1375 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1376 is a high-performance development platform that supports the
1377 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1378
1379 config TARGET_LX2162AQDS
1380 bool "Support lx2162aqds"
1381 select ARCH_LX2162A
1382 select ARCH_MISC_INIT
1383 select ARM64
1384 select ARMV8_MULTIENTRY
1385 select ARCH_SUPPORT_TFABOOT
1386 select BOARD_LATE_INIT
1387 select GPIO_EXTRA_HEADER
1388 help
1389 Support for NXP LX2162AQDS platform.
1390 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1391
1392 config TARGET_HIKEY
1393 bool "Support HiKey 96boards Consumer Edition Platform"
1394 select ARM64
1395 select DM
1396 select DM_GPIO
1397 select DM_SERIAL
1398 select GPIO_EXTRA_HEADER
1399 select OF_CONTROL
1400 select PL01X_SERIAL
1401 select SPECIFY_CONSOLE_INDEX
1402 imply CMD_DM
1403 help
1404 Support for HiKey 96boards platform. It features a HI6220
1405 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1406
1407 config TARGET_HIKEY960
1408 bool "Support HiKey960 96boards Consumer Edition Platform"
1409 select ARM64
1410 select DM
1411 select DM_SERIAL
1412 select GPIO_EXTRA_HEADER
1413 select OF_CONTROL
1414 select PL01X_SERIAL
1415 imply CMD_DM
1416 help
1417 Support for HiKey960 96boards platform. It features a HI3660
1418 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1419
1420 config TARGET_POPLAR
1421 bool "Support Poplar 96boards Enterprise Edition Platform"
1422 select ARM64
1423 select DM
1424 select DM_SERIAL
1425 select GPIO_EXTRA_HEADER
1426 select OF_CONTROL
1427 select PL01X_SERIAL
1428 imply CMD_DM
1429 help
1430 Support for Poplar 96boards EE platform. It features a HI3798cv200
1431 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1432 making it capable of running any commercial set-top solution based on
1433 Linux or Android.
1434
1435 config TARGET_LS1012AQDS
1436 bool "Support ls1012aqds"
1437 select ARCH_LS1012A
1438 select ARM64
1439 select ARCH_SUPPORT_TFABOOT
1440 select BOARD_LATE_INIT
1441 select GPIO_EXTRA_HEADER
1442 help
1443 Support for Freescale LS1012AQDS platform.
1444 The LS1012A Development System (QDS) is a high-performance
1445 development platform that supports the QorIQ LS1012A
1446 Layerscape Architecture processor.
1447
1448 config TARGET_LS1012ARDB
1449 bool "Support ls1012ardb"
1450 select ARCH_LS1012A
1451 select ARM64
1452 select ARCH_SUPPORT_TFABOOT
1453 select BOARD_LATE_INIT
1454 select GPIO_EXTRA_HEADER
1455 imply SCSI
1456 imply SCSI_AHCI
1457 help
1458 Support for Freescale LS1012ARDB platform.
1459 The LS1012A Reference design board (RDB) is a high-performance
1460 development platform that supports the QorIQ LS1012A
1461 Layerscape Architecture processor.
1462
1463 config TARGET_LS1012A2G5RDB
1464 bool "Support ls1012a2g5rdb"
1465 select ARCH_LS1012A
1466 select ARM64
1467 select ARCH_SUPPORT_TFABOOT
1468 select BOARD_LATE_INIT
1469 select GPIO_EXTRA_HEADER
1470 imply SCSI
1471 help
1472 Support for Freescale LS1012A2G5RDB platform.
1473 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1474 development platform that supports the QorIQ LS1012A
1475 Layerscape Architecture processor.
1476
1477 config TARGET_LS1012AFRWY
1478 bool "Support ls1012afrwy"
1479 select ARCH_LS1012A
1480 select ARM64
1481 select ARCH_SUPPORT_TFABOOT
1482 select BOARD_LATE_INIT
1483 select GPIO_EXTRA_HEADER
1484 imply SCSI
1485 imply SCSI_AHCI
1486 help
1487 Support for Freescale LS1012AFRWY platform.
1488 The LS1012A FRWY board (FRWY) is a high-performance
1489 development platform that supports the QorIQ LS1012A
1490 Layerscape Architecture processor.
1491
1492 config TARGET_LS1012AFRDM
1493 bool "Support ls1012afrdm"
1494 select ARCH_LS1012A
1495 select ARM64
1496 select ARCH_SUPPORT_TFABOOT
1497 select GPIO_EXTRA_HEADER
1498 help
1499 Support for Freescale LS1012AFRDM platform.
1500 The LS1012A Freedom board (FRDM) is a high-performance
1501 development platform that supports the QorIQ LS1012A
1502 Layerscape Architecture processor.
1503
1504 config TARGET_LS1028AQDS
1505 bool "Support ls1028aqds"
1506 select ARCH_LS1028A
1507 select ARM64
1508 select ARMV8_MULTIENTRY
1509 select ARCH_SUPPORT_TFABOOT
1510 select BOARD_LATE_INIT
1511 select GPIO_EXTRA_HEADER
1512 help
1513 Support for Freescale LS1028AQDS platform
1514 The LS1028A Development System (QDS) is a high-performance
1515 development platform that supports the QorIQ LS1028A
1516 Layerscape Architecture processor.
1517
1518 config TARGET_LS1028ARDB
1519 bool "Support ls1028ardb"
1520 select ARCH_LS1028A
1521 select ARM64
1522 select ARMV8_MULTIENTRY
1523 select ARCH_SUPPORT_TFABOOT
1524 select BOARD_LATE_INIT
1525 select GPIO_EXTRA_HEADER
1526 help
1527 Support for Freescale LS1028ARDB platform
1528 The LS1028A Development System (RDB) is a high-performance
1529 development platform that supports the QorIQ LS1028A
1530 Layerscape Architecture processor.
1531
1532 config TARGET_LS1088ARDB
1533 bool "Support ls1088ardb"
1534 select ARCH_LS1088A
1535 select ARM64
1536 select ARMV8_MULTIENTRY
1537 select ARCH_SUPPORT_TFABOOT
1538 select BOARD_LATE_INIT
1539 select SUPPORT_SPL
1540 select FSL_DDR_INTERACTIVE if !SD_BOOT
1541 select GPIO_EXTRA_HEADER
1542 help
1543 Support for NXP LS1088ARDB platform.
1544 The LS1088A Reference design board (RDB) is a high-performance
1545 development platform that supports the QorIQ LS1088A
1546 Layerscape Architecture processor.
1547
1548 config TARGET_LS1021AQDS
1549 bool "Support ls1021aqds"
1550 select ARCH_LS1021A
1551 select ARCH_SUPPORT_PSCI
1552 select BOARD_EARLY_INIT_F
1553 select BOARD_LATE_INIT
1554 select CPU_V7A
1555 select CPU_V7_HAS_NONSEC
1556 select CPU_V7_HAS_VIRT
1557 select LS1_DEEP_SLEEP
1558 select SUPPORT_SPL
1559 select SYS_FSL_DDR
1560 select FSL_DDR_INTERACTIVE
1561 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1562 select GPIO_EXTRA_HEADER
1563 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1564 imply SCSI
1565
1566 config TARGET_LS1021ATWR
1567 bool "Support ls1021atwr"
1568 select ARCH_LS1021A
1569 select ARCH_SUPPORT_PSCI
1570 select BOARD_EARLY_INIT_F
1571 select BOARD_LATE_INIT
1572 select CPU_V7A
1573 select CPU_V7_HAS_NONSEC
1574 select CPU_V7_HAS_VIRT
1575 select LS1_DEEP_SLEEP
1576 select SUPPORT_SPL
1577 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1578 select GPIO_EXTRA_HEADER
1579 imply SCSI
1580
1581 config TARGET_PG_WCOM_SELI8
1582 bool "Support Hitachi-Powergrids SELI8 service unit card"
1583 select ARCH_LS1021A
1584 select ARCH_SUPPORT_PSCI
1585 select BOARD_EARLY_INIT_F
1586 select BOARD_LATE_INIT
1587 select CPU_V7A
1588 select CPU_V7_HAS_NONSEC
1589 select CPU_V7_HAS_VIRT
1590 select SYS_FSL_DDR
1591 select FSL_DDR_INTERACTIVE
1592 select GPIO_EXTRA_HEADER
1593 select VENDOR_KM
1594 imply SCSI
1595 help
1596 Support for Hitachi-Powergrids SELI8 service unit card.
1597 SELI8 is a QorIQ LS1021a based service unit card used
1598 in XMC20 and FOX615 product families.
1599
1600 config TARGET_PG_WCOM_EXPU1
1601 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1602 select ARCH_LS1021A
1603 select ARCH_SUPPORT_PSCI
1604 select BOARD_EARLY_INIT_F
1605 select BOARD_LATE_INIT
1606 select CPU_V7A
1607 select CPU_V7_HAS_NONSEC
1608 select CPU_V7_HAS_VIRT
1609 select SYS_FSL_DDR
1610 select FSL_DDR_INTERACTIVE
1611 select VENDOR_KM
1612 imply SCSI
1613 help
1614 Support for Hitachi-Powergrids EXPU1 service unit card.
1615 EXPU1 is a QorIQ LS1021a based service unit card used
1616 in XMC20 and FOX615 product families.
1617
1618 config TARGET_LS1021ATSN
1619 bool "Support ls1021atsn"
1620 select ARCH_LS1021A
1621 select ARCH_SUPPORT_PSCI
1622 select BOARD_EARLY_INIT_F
1623 select BOARD_LATE_INIT
1624 select CPU_V7A
1625 select CPU_V7_HAS_NONSEC
1626 select CPU_V7_HAS_VIRT
1627 select LS1_DEEP_SLEEP
1628 select SUPPORT_SPL
1629 select GPIO_EXTRA_HEADER
1630 imply SCSI
1631
1632 config TARGET_LS1021AIOT
1633 bool "Support ls1021aiot"
1634 select ARCH_LS1021A
1635 select ARCH_SUPPORT_PSCI
1636 select BOARD_LATE_INIT
1637 select CPU_V7A
1638 select CPU_V7_HAS_NONSEC
1639 select CPU_V7_HAS_VIRT
1640 select SUPPORT_SPL
1641 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1642 select GPIO_EXTRA_HEADER
1643 imply SCSI
1644 help
1645 Support for Freescale LS1021AIOT platform.
1646 The LS1021A Freescale board (IOT) is a high-performance
1647 development platform that supports the QorIQ LS1021A
1648 Layerscape Architecture processor.
1649
1650 config TARGET_LS1043AQDS
1651 bool "Support ls1043aqds"
1652 select ARCH_LS1043A
1653 select ARM64
1654 select ARMV8_MULTIENTRY
1655 select ARCH_SUPPORT_TFABOOT
1656 select BOARD_EARLY_INIT_F
1657 select BOARD_LATE_INIT
1658 select SUPPORT_SPL
1659 select FSL_DDR_INTERACTIVE if !SPL
1660 select FSL_DSPI if !SPL_NO_DSPI
1661 select DM_SPI_FLASH if FSL_DSPI
1662 select GPIO_EXTRA_HEADER
1663 imply SCSI
1664 imply SCSI_AHCI
1665 help
1666 Support for Freescale LS1043AQDS platform.
1667
1668 config TARGET_LS1043ARDB
1669 bool "Support ls1043ardb"
1670 select ARCH_LS1043A
1671 select ARM64
1672 select ARMV8_MULTIENTRY
1673 select ARCH_SUPPORT_TFABOOT
1674 select BOARD_EARLY_INIT_F
1675 select BOARD_LATE_INIT
1676 select SUPPORT_SPL
1677 select FSL_DSPI if !SPL_NO_DSPI
1678 select DM_SPI_FLASH if FSL_DSPI
1679 select GPIO_EXTRA_HEADER
1680 help
1681 Support for Freescale LS1043ARDB platform.
1682
1683 config TARGET_LS1046AQDS
1684 bool "Support ls1046aqds"
1685 select ARCH_LS1046A
1686 select ARM64
1687 select ARMV8_MULTIENTRY
1688 select ARCH_SUPPORT_TFABOOT
1689 select BOARD_EARLY_INIT_F
1690 select BOARD_LATE_INIT
1691 select DM_SPI_FLASH if DM_SPI
1692 select SUPPORT_SPL
1693 select FSL_DDR_BIST if !SPL
1694 select FSL_DDR_INTERACTIVE if !SPL
1695 select FSL_DDR_INTERACTIVE if !SPL
1696 select GPIO_EXTRA_HEADER
1697 imply SCSI
1698 help
1699 Support for Freescale LS1046AQDS platform.
1700 The LS1046A Development System (QDS) is a high-performance
1701 development platform that supports the QorIQ LS1046A
1702 Layerscape Architecture processor.
1703
1704 config TARGET_LS1046ARDB
1705 bool "Support ls1046ardb"
1706 select ARCH_LS1046A
1707 select ARM64
1708 select ARMV8_MULTIENTRY
1709 select ARCH_SUPPORT_TFABOOT
1710 select BOARD_EARLY_INIT_F
1711 select BOARD_LATE_INIT
1712 select DM_SPI_FLASH if DM_SPI
1713 select POWER_MC34VR500
1714 select SUPPORT_SPL
1715 select FSL_DDR_BIST
1716 select FSL_DDR_INTERACTIVE if !SPL
1717 select GPIO_EXTRA_HEADER
1718 imply SCSI
1719 help
1720 Support for Freescale LS1046ARDB platform.
1721 The LS1046A Reference Design Board (RDB) is a high-performance
1722 development platform that supports the QorIQ LS1046A
1723 Layerscape Architecture processor.
1724
1725 config TARGET_LS1046AFRWY
1726 bool "Support ls1046afrwy"
1727 select ARCH_LS1046A
1728 select ARM64
1729 select ARMV8_MULTIENTRY
1730 select ARCH_SUPPORT_TFABOOT
1731 select BOARD_EARLY_INIT_F
1732 select BOARD_LATE_INIT
1733 select DM_SPI_FLASH if DM_SPI
1734 select GPIO_EXTRA_HEADER
1735 imply SCSI
1736 help
1737 Support for Freescale LS1046AFRWY platform.
1738 The LS1046A Freeway Board (FRWY) is a high-performance
1739 development platform that supports the QorIQ LS1046A
1740 Layerscape Architecture processor.
1741
1742 config TARGET_SL28
1743 bool "Support sl28"
1744 select ARCH_LS1028A
1745 select ARM64
1746 select ARMV8_MULTIENTRY
1747 select SUPPORT_SPL
1748 select BINMAN
1749 select DM
1750 select DM_GPIO
1751 select DM_I2C
1752 select DM_MMC
1753 select DM_SPI_FLASH
1754 select DM_ETH
1755 select DM_MDIO
1756 select PCI
1757 select DM_RNG
1758 select DM_RTC
1759 select DM_SCSI
1760 select DM_SERIAL
1761 select DM_SPI
1762 select GPIO_EXTRA_HEADER
1763 select SPL_DM if SPL
1764 select SPL_DM_SPI if SPL
1765 select SPL_DM_SPI_FLASH if SPL
1766 select SPL_DM_I2C if SPL
1767 select SPL_DM_MMC if SPL
1768 select SPL_DM_SERIAL if SPL
1769 help
1770 Support for Kontron SMARC-sAL28 board.
1771
1772 config TARGET_COLIBRI_PXA270
1773 bool "Support colibri_pxa270"
1774 select CPU_PXA27X
1775 select GPIO_EXTRA_HEADER
1776
1777 config ARCH_UNIPHIER
1778 bool "Socionext UniPhier SoCs"
1779 select BOARD_LATE_INIT
1780 select DM
1781 select DM_ETH
1782 select DM_GPIO
1783 select DM_I2C
1784 select DM_MMC
1785 select DM_MTD
1786 select DM_RESET
1787 select DM_SERIAL
1788 select OF_BOARD_SETUP
1789 select OF_CONTROL
1790 select OF_LIBFDT
1791 select PINCTRL
1792 select SPL_BOARD_INIT if SPL
1793 select SPL_DM if SPL
1794 select SPL_LIBCOMMON_SUPPORT if SPL
1795 select SPL_LIBGENERIC_SUPPORT if SPL
1796 select SPL_OF_CONTROL if SPL
1797 select SPL_PINCTRL if SPL
1798 select SUPPORT_SPL
1799 imply CMD_DM
1800 imply DISTRO_DEFAULTS
1801 imply FAT_WRITE
1802 help
1803 Support for UniPhier SoC family developed by Socionext Inc.
1804 (formerly, System LSI Business Division of Panasonic Corporation)
1805
1806 config ARCH_SYNQUACER
1807 bool "Socionext SynQuacer SoCs"
1808 select ARM64
1809 select DM
1810 select GIC_V3
1811 select PSCI_RESET
1812 select SYSRESET
1813 select SYSRESET_PSCI
1814 select OF_CONTROL
1815 help
1816 Support for SynQuacer SoC family developed by Socionext Inc.
1817 This SoC is used on 96boards EE DeveloperBox.
1818
1819 config ARCH_STM32
1820 bool "Support STMicroelectronics STM32 MCU with cortex M"
1821 select CPU_V7M
1822 select DM
1823 select DM_SERIAL
1824 imply CMD_DM
1825
1826 config ARCH_STI
1827 bool "Support STMicrolectronics SoCs"
1828 select BLK
1829 select CPU_V7A
1830 select DM
1831 select DM_MMC
1832 select DM_RESET
1833 select DM_SERIAL
1834 imply CMD_DM
1835 help
1836 Support for STMicroelectronics STiH407/10 SoC family.
1837 This SoC is used on Linaro 96Board STiH410-B2260
1838
1839 config ARCH_STM32MP
1840 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1841 select ARCH_MISC_INIT
1842 select ARCH_SUPPORT_TFABOOT
1843 select BOARD_LATE_INIT
1844 select CLK
1845 select DM
1846 select DM_GPIO
1847 select DM_RESET
1848 select DM_SERIAL
1849 select MISC
1850 select OF_CONTROL
1851 select OF_LIBFDT
1852 select OF_SYSTEM_SETUP
1853 select PINCTRL
1854 select REGMAP
1855 select SUPPORT_SPL
1856 select SYSCON
1857 select SYSRESET
1858 select SYS_THUMB_BUILD
1859 imply SPL_SYSRESET
1860 imply CMD_DM
1861 imply CMD_POWEROFF
1862 imply OF_LIBFDT_OVERLAY
1863 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1864 imply USE_PREBOOT
1865 help
1866 Support for STM32MP SoC family developed by STMicroelectronics,
1867 MPUs based on ARM cortex A core
1868 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1869 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1870 chain.
1871 SPL is the unsecure FSBL for the basic boot chain.
1872
1873 config ARCH_ROCKCHIP
1874 bool "Support Rockchip SoCs"
1875 select BLK
1876 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1877 select DM
1878 select DM_GPIO
1879 select DM_I2C
1880 select DM_MMC
1881 select DM_PWM
1882 select DM_REGULATOR
1883 select DM_SERIAL
1884 select DM_SPI
1885 select DM_SPI_FLASH
1886 select ENABLE_ARM_SOC_BOOT0_HOOK
1887 select OF_CONTROL
1888 select SPI
1889 select SPL_DM if SPL
1890 select SPL_DM_SPI if SPL
1891 select SPL_DM_SPI_FLASH if SPL
1892 select SYS_MALLOC_F
1893 select SYS_THUMB_BUILD if !ARM64
1894 imply ADC
1895 imply CMD_DM
1896 imply DEBUG_UART_BOARD_INIT
1897 imply DISTRO_DEFAULTS
1898 imply FAT_WRITE
1899 imply SARADC_ROCKCHIP
1900 imply SPL_SYSRESET
1901 imply SPL_SYS_MALLOC_SIMPLE
1902 imply SYS_NS16550
1903 imply TPL_SYSRESET
1904 imply USB_FUNCTION_FASTBOOT
1905
1906 config ARCH_OCTEONTX
1907 bool "Support OcteonTX SoCs"
1908 select CLK
1909 select DM
1910 select GPIO_EXTRA_HEADER
1911 select ARM64
1912 select OF_CONTROL
1913 select OF_LIVE
1914 select BOARD_LATE_INIT
1915 select SYS_CACHE_SHIFT_7
1916 select SYS_PCI_64BIT if PCI
1917 imply OF_HAS_PRIOR_STAGE
1918
1919 config ARCH_OCTEONTX2
1920 bool "Support OcteonTX2 SoCs"
1921 select CLK
1922 select DM
1923 select GPIO_EXTRA_HEADER
1924 select ARM64
1925 select OF_CONTROL
1926 select OF_LIVE
1927 select BOARD_LATE_INIT
1928 select SYS_CACHE_SHIFT_7
1929 select SYS_PCI_64BIT if PCI
1930 imply OF_HAS_PRIOR_STAGE
1931
1932 config TARGET_THUNDERX_88XX
1933 bool "Support ThunderX 88xx"
1934 select ARM64
1935 select GPIO_EXTRA_HEADER
1936 select OF_CONTROL
1937 select PL01X_SERIAL
1938 select SYS_CACHE_SHIFT_7
1939
1940 config ARCH_ASPEED
1941 bool "Support Aspeed SoCs"
1942 select DM
1943 select OF_CONTROL
1944 imply CMD_DM
1945
1946 config TARGET_DURIAN
1947 bool "Support Phytium Durian Platform"
1948 select ARM64
1949 select GPIO_EXTRA_HEADER
1950 help
1951 Support for durian platform.
1952 It has 2GB Sdram, uart and pcie.
1953
1954 config TARGET_PRESIDIO_ASIC
1955 bool "Support Cortina Presidio ASIC Platform"
1956 select ARM64
1957 select GICV2
1958
1959 config TARGET_XENGUEST_ARM64
1960 bool "Xen guest ARM64"
1961 select ARM64
1962 select XEN
1963 select OF_CONTROL
1964 select LINUX_KERNEL_IMAGE_HEADER
1965 select XEN_SERIAL
1966 select SSCANF
1967 imply OF_HAS_PRIOR_STAGE
1968
1969 endchoice
1970
1971 config SUPPORT_PASSING_ATAGS
1972 bool "Support pre-devicetree ATAG-based booting"
1973 depends on !ARM64
1974 imply SETUP_MEMORY_TAGS
1975 help
1976 Support for booting older Linux kernels, using ATAGs rather than
1977 passing a devicetree. This is option is rarely used, and the
1978 semantics are defined at
1979 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
1980
1981 config SETUP_MEMORY_TAGS
1982 bool "Pass memory size information via ATAG"
1983 depends on SUPPORT_PASSING_ATAGS
1984
1985 config CMDLINE_TAG
1986 bool "Pass Linux kernel cmdline via ATAG"
1987 depends on SUPPORT_PASSING_ATAGS
1988
1989 config INITRD_TAG
1990 bool "Pass initrd starting point and size via ATAG"
1991 depends on SUPPORT_PASSING_ATAGS
1992
1993 config REVISION_TAG
1994 bool "Pass system revision via ATAG"
1995 depends on SUPPORT_PASSING_ATAGS
1996
1997 config SERIAL_TAG
1998 bool "Pass system serial number via ATAG"
1999 depends on SUPPORT_PASSING_ATAGS
2000
2001 config STATIC_MACH_TYPE
2002 bool "Statically define the Machine ID number"
2003 help
2004 When booting via ATAGs, enable this option if we know the correct
2005 machine ID number to use at compile time. Some systems will be
2006 passed the number dynamically by whatever loads U-Boot.
2007
2008 config MACH_TYPE
2009 int "Machine ID number"
2010 depends on STATIC_MACH_TYPE
2011 help
2012 When booting via ATAGs, the machine type must be passed as a number.
2013 For the full list see https://www.arm.linux.org.uk/developer/machines
2014
2015 config ARCH_SUPPORT_TFABOOT
2016 bool
2017
2018 config TFABOOT
2019 bool "Support for booting from TF-A"
2020 depends on ARCH_SUPPORT_TFABOOT
2021 help
2022 Some platforms support the setup of secure registers (for instance
2023 for CPU errata handling) or provide secure services like PSCI.
2024 Those services could also be provided by other firmware parts
2025 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2026 does not need to (and cannot) execute this code.
2027 Enabling this option will make a U-Boot binary that is relying
2028 on other firmware layers to provide secure functionality.
2029
2030 config TI_SECURE_DEVICE
2031 bool "HS Device Type Support"
2032 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2033 help
2034 If a high secure (HS) device type is being used, this config
2035 must be set. This option impacts various aspects of the
2036 build system (to create signed boot images that can be
2037 authenticated) and the code. See the doc/README.ti-secure
2038 file for further details.
2039
2040 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2041 config ISW_ENTRY_ADDR
2042 hex "Address in memory or XIP address of bootloader entry point"
2043 default 0x402F4000 if AM43XX
2044 default 0x402F0400 if AM33XX
2045 default 0x40301350 if OMAP54XX
2046 help
2047 After any reset, the boot ROM searches the boot media for a valid
2048 boot image. For non-XIP devices, the ROM then copies the image into
2049 internal memory. For all boot modes, after the ROM processes the
2050 boot image it eventually computes the entry point address depending
2051 on the device type (secure/non-secure), boot media (xip/non-xip) and
2052 image headers.
2053 endif
2054
2055 config SYS_KWD_CONFIG
2056 string "kwbimage config file path"
2057 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2058 default "arch/arm/mach-mvebu/kwbimage.cfg"
2059 help
2060 Path within the source directory to the kwbimage.cfg file to use
2061 when packaging the U-Boot image for use.
2062
2063 source "arch/arm/mach-apple/Kconfig"
2064
2065 source "arch/arm/mach-aspeed/Kconfig"
2066
2067 source "arch/arm/mach-at91/Kconfig"
2068
2069 source "arch/arm/mach-bcm283x/Kconfig"
2070
2071 source "arch/arm/mach-bcmstb/Kconfig"
2072
2073 source "arch/arm/mach-davinci/Kconfig"
2074
2075 source "arch/arm/mach-exynos/Kconfig"
2076
2077 source "arch/arm/mach-highbank/Kconfig"
2078
2079 source "arch/arm/mach-integrator/Kconfig"
2080
2081 source "arch/arm/mach-ipq40xx/Kconfig"
2082
2083 source "arch/arm/mach-k3/Kconfig"
2084
2085 source "arch/arm/mach-keystone/Kconfig"
2086
2087 source "arch/arm/mach-kirkwood/Kconfig"
2088
2089 source "arch/arm/mach-lpc32xx/Kconfig"
2090
2091 source "arch/arm/mach-mvebu/Kconfig"
2092
2093 source "arch/arm/mach-octeontx/Kconfig"
2094
2095 source "arch/arm/mach-octeontx2/Kconfig"
2096
2097 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2098
2099 source "arch/arm/mach-imx/mx3/Kconfig"
2100
2101 source "arch/arm/mach-imx/mx5/Kconfig"
2102
2103 source "arch/arm/mach-imx/mx6/Kconfig"
2104
2105 source "arch/arm/mach-imx/mx7/Kconfig"
2106
2107 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2108
2109 source "arch/arm/mach-imx/imx8/Kconfig"
2110
2111 source "arch/arm/mach-imx/imx8m/Kconfig"
2112
2113 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2114
2115 source "arch/arm/mach-imx/imxrt/Kconfig"
2116
2117 source "arch/arm/mach-imx/mxs/Kconfig"
2118
2119 source "arch/arm/mach-omap2/Kconfig"
2120
2121 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2122
2123 source "arch/arm/mach-orion5x/Kconfig"
2124
2125 source "arch/arm/mach-owl/Kconfig"
2126
2127 source "arch/arm/mach-rmobile/Kconfig"
2128
2129 source "arch/arm/mach-meson/Kconfig"
2130
2131 source "arch/arm/mach-mediatek/Kconfig"
2132
2133 source "arch/arm/mach-qemu/Kconfig"
2134
2135 source "arch/arm/mach-rockchip/Kconfig"
2136
2137 source "arch/arm/mach-s5pc1xx/Kconfig"
2138
2139 source "arch/arm/mach-snapdragon/Kconfig"
2140
2141 source "arch/arm/mach-socfpga/Kconfig"
2142
2143 source "arch/arm/mach-sti/Kconfig"
2144
2145 source "arch/arm/mach-stm32/Kconfig"
2146
2147 source "arch/arm/mach-stm32mp/Kconfig"
2148
2149 source "arch/arm/mach-sunxi/Kconfig"
2150
2151 source "arch/arm/mach-tegra/Kconfig"
2152
2153 source "arch/arm/mach-u8500/Kconfig"
2154
2155 source "arch/arm/mach-uniphier/Kconfig"
2156
2157 source "arch/arm/cpu/armv7/vf610/Kconfig"
2158
2159 source "arch/arm/mach-zynq/Kconfig"
2160
2161 source "arch/arm/mach-zynqmp/Kconfig"
2162
2163 source "arch/arm/mach-versal/Kconfig"
2164
2165 source "arch/arm/mach-zynqmp-r5/Kconfig"
2166
2167 source "arch/arm/cpu/armv7/Kconfig"
2168
2169 source "arch/arm/cpu/armv8/Kconfig"
2170
2171 source "arch/arm/mach-imx/Kconfig"
2172
2173 source "arch/arm/mach-nexell/Kconfig"
2174
2175 source "board/armltd/total_compute/Kconfig"
2176
2177 source "board/bosch/shc/Kconfig"
2178 source "board/bosch/guardian/Kconfig"
2179 source "board/Marvell/octeontx/Kconfig"
2180 source "board/Marvell/octeontx2/Kconfig"
2181 source "board/armltd/vexpress/Kconfig"
2182 source "board/armltd/vexpress64/Kconfig"
2183 source "board/cortina/presidio-asic/Kconfig"
2184 source "board/broadcom/bcm963158/Kconfig"
2185 source "board/broadcom/bcm968360bg/Kconfig"
2186 source "board/broadcom/bcm968580xref/Kconfig"
2187 source "board/broadcom/bcmns3/Kconfig"
2188 source "board/cavium/thunderx/Kconfig"
2189 source "board/eets/pdu001/Kconfig"
2190 source "board/emulation/qemu-arm/Kconfig"
2191 source "board/freescale/ls2080aqds/Kconfig"
2192 source "board/freescale/ls2080ardb/Kconfig"
2193 source "board/freescale/ls1088a/Kconfig"
2194 source "board/freescale/ls1028a/Kconfig"
2195 source "board/freescale/ls1021aqds/Kconfig"
2196 source "board/freescale/ls1043aqds/Kconfig"
2197 source "board/freescale/ls1021atwr/Kconfig"
2198 source "board/freescale/ls1021atsn/Kconfig"
2199 source "board/freescale/ls1021aiot/Kconfig"
2200 source "board/freescale/ls1046aqds/Kconfig"
2201 source "board/freescale/ls1043ardb/Kconfig"
2202 source "board/freescale/ls1046ardb/Kconfig"
2203 source "board/freescale/ls1046afrwy/Kconfig"
2204 source "board/freescale/ls1012aqds/Kconfig"
2205 source "board/freescale/ls1012ardb/Kconfig"
2206 source "board/freescale/ls1012afrdm/Kconfig"
2207 source "board/freescale/lx2160a/Kconfig"
2208 source "board/grinn/chiliboard/Kconfig"
2209 source "board/hisilicon/hikey/Kconfig"
2210 source "board/hisilicon/hikey960/Kconfig"
2211 source "board/hisilicon/poplar/Kconfig"
2212 source "board/isee/igep003x/Kconfig"
2213 source "board/kontron/sl28/Kconfig"
2214 source "board/myir/mys_6ulx/Kconfig"
2215 source "board/seeed/npi_imx6ull/Kconfig"
2216 source "board/socionext/developerbox/Kconfig"
2217 source "board/st/stv0991/Kconfig"
2218 source "board/tcl/sl50/Kconfig"
2219 source "board/toradex/colibri_pxa270/Kconfig"
2220 source "board/variscite/dart_6ul/Kconfig"
2221 source "board/vscom/baltos/Kconfig"
2222 source "board/phytium/durian/Kconfig"
2223 source "board/xen/xenguest_arm64/Kconfig"
2224 source "board/keymile/Kconfig"
2225
2226 source "arch/arm/Kconfig.debug"
2227
2228 endmenu
2229
2230 config SPL_LDSCRIPT
2231 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2232 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2233 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64