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Merge patch series "omap3: Make SPL_OMAP3_ID_NAND depend on NAND_OMAP_GPMC"
[thirdparty/u-boot.git] / arch / arm / Kconfig
1 menu "ARM architecture"
2 depends on ARM
3
4 config SYS_ARCH
5 default "arm"
6
7 config ARM64
8 bool
9 select PHYS_64BIT
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
12
13 config ARM64_CRC32
14 bool "Enable support for CRC32 instruction"
15 depends on ARM64 && CC_IS_GCC
16 default y
17 help
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
21 newer.
22
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
31 default 0
32 help
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
39
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
43 help
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
50
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
53 depends on ARM64
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
56 help
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
62
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
66
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
69 depends on ARM64
70 depends on INIT_SP_RELATIVE
71 default 524288
72 help
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
77
78 config SPL_SYS_NO_VECTOR_TABLE
79 depends on SPL
80 bool
81
82 config SPL_USE_SEPARATE_FAULT_HANDLERS
83 bool "Use separate fault handlers instead of a single common one"
84 depends on !SPL_SYS_NO_VECTOR_TABLE && !ARM64 && !CPU_V7M
85 help
86 Instead of a common fault handler, generate a separate one for
87 undefined_instruction, software_interrupt, prefetch_abort etc.
88 This is for debugging purposes, when you want to set breakpoints
89 on them separately.
90
91 config LINUX_KERNEL_IMAGE_HEADER
92 depends on ARM64
93 bool
94 help
95 Place a Linux kernel image header at the start of the U-Boot binary.
96 The format of the header is described in the Linux kernel source at
97 Documentation/arm64/booting.txt. This feature is useful since the
98 image header reports the amount of memory (BSS and similar) that
99 U-Boot needs to use, but which isn't part of the binary.
100
101 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
102 depends on LINUX_KERNEL_IMAGE_HEADER
103 hex
104 help
105 The value subtracted from CONFIG_TEXT_BASE to calculate the
106 TEXT_OFFSET value written to the Linux kernel image header.
107
108 config GICV2
109 bool
110
111 config GICV3
112 bool
113
114 config GIC_V3_ITS
115 bool "ARM GICV3 ITS"
116 select IRQ
117 help
118 ARM GICV3 Interrupt translation service (ITS).
119 Basic support for programming locality specific peripheral
120 interrupts (LPI) configuration tables and enable LPI tables.
121 LPI configuration table can be used by u-boot or Linux.
122 ARM GICV3 has limitation, once the LPI table is enabled, LPI
123 configuration table can not be re-programmed, unless GICV3 reset.
124
125 config STATIC_RELA
126 bool
127 default y if ARM64
128
129 config DMA_ADDR_T_64BIT
130 bool
131 default y if ARM64
132
133 config HAS_VBAR
134 bool
135
136 config HAS_THUMB2
137 bool
138
139 config GPIO_EXTRA_HEADER
140 bool
141
142 # Used for compatibility with asm files copied from the kernel
143 config ARM_ASM_UNIFIED
144 bool
145 default y
146
147 # Used for compatibility with asm files copied from the kernel
148 config THUMB2_KERNEL
149 bool
150
151 config SYS_ICACHE_OFF
152 bool "Do not enable icache"
153 help
154 Do not enable instruction cache in U-Boot.
155
156 config SPL_SYS_ICACHE_OFF
157 bool "Do not enable icache in SPL"
158 depends on SPL
159 default SYS_ICACHE_OFF
160 help
161 Do not enable instruction cache in SPL.
162
163 config SYS_DCACHE_OFF
164 bool "Do not enable dcache"
165 help
166 Do not enable data cache in U-Boot.
167
168 config SPL_SYS_DCACHE_OFF
169 bool "Do not enable dcache in SPL"
170 depends on SPL
171 default SYS_DCACHE_OFF
172 help
173 Do not enable data cache in SPL.
174
175 config SYS_ARM_CACHE_CP15
176 bool "CP15 based cache enabling support"
177 help
178 Select this if your processor suports enabling caches by using
179 CP15 registers.
180
181 config SYS_ARM_MMU
182 bool "MMU-based Paged Memory Management Support"
183 select SYS_ARM_CACHE_CP15
184 help
185 Select if you want MMU-based virtualised addressing space
186 support via paged memory management.
187
188 config SYS_ARM_MPU
189 bool 'Use the ARM v7 PMSA Compliant MPU'
190 help
191 Some ARM systems without an MMU have instead a Memory Protection
192 Unit (MPU) that defines the type and permissions for regions of
193 memory.
194 If your CPU has an MPU then you should choose 'y' here unless you
195 know that you do not want to use the MPU.
196
197 # If set, the workarounds for these ARM errata are applied early during U-Boot
198 # startup. Note that in general these options force the workarounds to be
199 # applied; no CPU-type/version detection exists, unlike the similar options in
200 # the Linux kernel. Do not set these options unless they apply! Also note that
201 # the following can be machine-specific errata. These do have ability to
202 # provide rudimentary version and machine-specific checks, but expect no
203 # product checks:
204 # CONFIG_ARM_ERRATA_430973
205 # CONFIG_ARM_ERRATA_454179
206 # CONFIG_ARM_ERRATA_621766
207 # CONFIG_ARM_ERRATA_798870
208 # CONFIG_ARM_ERRATA_801819
209 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
210 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
211
212 config ARM_ERRATA_430973
213 bool
214
215 config ARM_ERRATA_454179
216 bool
217
218 config ARM_ERRATA_621766
219 bool
220
221 config ARM_ERRATA_716044
222 bool
223
224 config ARM_ERRATA_725233
225 bool
226
227 config ARM_ERRATA_742230
228 bool
229
230 config ARM_ERRATA_743622
231 bool
232
233 config ARM_ERRATA_751472
234 bool
235
236 config ARM_ERRATA_761320
237 bool
238
239 config ARM_ERRATA_773022
240 bool
241
242 config ARM_ERRATA_774769
243 bool
244
245 config ARM_ERRATA_794072
246 bool
247
248 config ARM_ERRATA_798870
249 bool
250
251 config ARM_ERRATA_801819
252 bool
253
254 config ARM_ERRATA_826974
255 bool
256
257 config ARM_ERRATA_828024
258 bool
259
260 config ARM_ERRATA_829520
261 bool
262
263 config ARM_ERRATA_833069
264 bool
265
266 config ARM_ERRATA_833471
267 bool
268
269 config ARM_ERRATA_845369
270 bool
271
272 config ARM_ERRATA_852421
273 bool
274
275 config ARM_ERRATA_852423
276 bool
277
278 config ARM_ERRATA_855873
279 bool
280
281 config ARM_CORTEX_A8_CVE_2017_5715
282 bool
283
284 config ARM_CORTEX_A15_CVE_2017_5715
285 bool
286
287 config CPU_ARM720T
288 bool
289 select SYS_CACHE_SHIFT_5
290 imply SYS_ARM_MMU
291
292 config CPU_ARM920T
293 bool
294 select SYS_CACHE_SHIFT_5
295 imply SYS_ARM_MMU
296
297 config CPU_ARM926EJS
298 bool
299 select SYS_CACHE_SHIFT_5
300 imply SYS_ARM_MMU
301 imply SPL_SEPARATE_BSS
302
303 config CPU_ARM946ES
304 bool
305 select SYS_CACHE_SHIFT_5
306 imply SYS_ARM_MMU
307
308 config CPU_ARM1136
309 bool
310 select SYS_CACHE_SHIFT_5
311 imply SYS_ARM_MMU
312 imply SPL_SEPARATE_BSS
313
314 config CPU_ARM1176
315 bool
316 select HAS_VBAR
317 select SYS_CACHE_SHIFT_5
318 imply SYS_ARM_MMU
319
320 config CPU_V7A
321 bool
322 select HAS_THUMB2
323 select HAS_VBAR
324 select SYS_CACHE_SHIFT_6
325 imply SYS_ARM_MMU
326
327 config CPU_V7M
328 bool
329 select HAS_THUMB2
330 select SYS_ARM_MPU
331 select SYS_CACHE_SHIFT_5
332 select SYS_THUMB_BUILD
333 select THUMB2_KERNEL
334
335 config CPU_V7R
336 bool
337 select HAS_THUMB2
338 select SYS_ARM_CACHE_CP15
339 select SYS_ARM_MPU
340 select SYS_CACHE_SHIFT_6
341
342 config SYS_CPU
343 default "arm720t" if CPU_ARM720T
344 default "arm920t" if CPU_ARM920T
345 default "arm926ejs" if CPU_ARM926EJS
346 default "arm946es" if CPU_ARM946ES
347 default "arm1136" if CPU_ARM1136
348 default "arm1176" if CPU_ARM1176
349 default "armv7" if CPU_V7A
350 default "armv7" if CPU_V7R
351 default "armv7m" if CPU_V7M
352 default "armv8" if ARM64
353
354 config SYS_ARM_ARCH
355 int
356 default 4 if CPU_ARM720T
357 default 4 if CPU_ARM920T
358 default 5 if CPU_ARM926EJS
359 default 5 if CPU_ARM946ES
360 default 6 if CPU_ARM1136
361 default 6 if CPU_ARM1176
362 default 7 if CPU_V7A
363 default 7 if CPU_V7M
364 default 7 if CPU_V7R
365 default 8 if ARM64
366
367 choice
368 prompt "Select the ARM data write cache policy"
369 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMNS || RZA1
370 default SYS_ARM_CACHE_WRITEBACK
371
372 config SYS_ARM_CACHE_WRITEBACK
373 bool "Write-back (WB)"
374 help
375 A write updates the cache only and marks the cache line as dirty.
376 External memory is updated only when the line is evicted or explicitly
377 cleaned.
378
379 config SYS_ARM_CACHE_WRITETHROUGH
380 bool "Write-through (WT)"
381 help
382 A write updates both the cache and the external memory system.
383 This does not mark the cache line as dirty.
384
385 config SYS_ARM_CACHE_WRITEALLOC
386 bool "Write allocation (WA)"
387 help
388 A cache line is allocated on a write miss. This means that executing a
389 store instruction on the processor might cause a burst read to occur.
390 There is a linefill to obtain the data for the cache line, before the
391 write is performed.
392 endchoice
393
394 config ARCH_VERY_EARLY_INIT
395 bool
396
397 config SPL_ARCH_VERY_EARLY_INIT
398 bool
399
400 config ARCH_CPU_INIT
401 bool "Enable ARCH_CPU_INIT"
402 help
403 Some architectures require a call to arch_cpu_init().
404 Say Y here to enable it
405
406 config SYS_ARCH_TIMER
407 bool "ARM Generic Timer support"
408 depends on CPU_V7A || ARM64
409 default y if ARM64
410 help
411 The ARM Generic Timer (aka arch-timer) provides an architected
412 interface to a timer source on an SoC.
413 It is mandatory for ARMv8 implementation and widely available
414 on ARMv7 systems.
415
416 config ARM_SMCCC
417 bool "Support for ARM SMC Calling Convention (SMCCC)"
418 depends on CPU_V7A || ARM64
419 select ARM_PSCI_FW
420 help
421 Say Y here if you want to enable ARM SMC Calling Convention.
422 This should be enabled if U-Boot needs to communicate with system
423 firmware (for example, PSCI) according to SMCCC.
424
425 config SYS_THUMB_BUILD
426 bool "Build U-Boot using the Thumb instruction set"
427 depends on !ARM64
428 help
429 Use this flag to build U-Boot using the Thumb instruction set for
430 ARM architectures. Thumb instruction set provides better code
431 density. For ARM architectures that support Thumb2 this flag will
432 result in Thumb2 code generated by GCC.
433
434 config SPL_SYS_THUMB_BUILD
435 bool "Build SPL using the Thumb instruction set"
436 default y if SYS_THUMB_BUILD
437 depends on !ARM64 && SPL
438 help
439 Use this flag to build SPL using the Thumb instruction set for
440 ARM architectures. Thumb instruction set provides better code
441 density. For ARM architectures that support Thumb2 this flag will
442 result in Thumb2 code generated by GCC.
443
444 config TPL_SYS_THUMB_BUILD
445 bool "Build TPL using the Thumb instruction set"
446 default y if SYS_THUMB_BUILD
447 depends on TPL && !ARM64
448 help
449 Use this flag to build TPL using the Thumb instruction set for
450 ARM architectures. Thumb instruction set provides better code
451 density. For ARM architectures that support Thumb2 this flag will
452 result in Thumb2 code generated by GCC.
453
454 config SYS_L2_PL310
455 bool "ARM PL310 L2 cache controller"
456 help
457 Enable support for ARM PL310 L2 cache controller in U-Boot
458
459 config SPL_SYS_L2_PL310
460 bool "ARM PL310 L2 cache controller in SPL"
461 help
462 Enable support for ARM PL310 L2 cache controller in SPL
463
464 config SYS_L2CACHE_OFF
465 bool "L2cache off"
466 help
467 If SoC does not support L2CACHE or one does not want to enable
468 L2CACHE, choose this option.
469
470 config ENABLE_ARM_SOC_BOOT0_HOOK
471 bool "prepare BOOT0 header"
472 help
473 If the SoC's BOOT0 requires a header area filled with (magic)
474 values, then choose this option, and create a file included as
475 <asm/arch/boot0.h> which contains the required assembler code.
476
477 config USE_ARCH_MEMCPY
478 bool "Use an assembly optimized implementation of memcpy"
479 default y if !ARM64
480 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
481 help
482 Enable the generation of an optimized version of memcpy.
483 Such an implementation may be faster under some conditions
484 but may increase the binary size.
485
486 config SPL_USE_ARCH_MEMCPY
487 bool "Use an assembly optimized implementation of memcpy for SPL"
488 default y if USE_ARCH_MEMCPY
489 depends on SPL
490 help
491 Enable the generation of an optimized version of memcpy.
492 Such an implementation may be faster under some conditions
493 but may increase the binary size.
494
495 config TPL_USE_ARCH_MEMCPY
496 bool "Use an assembly optimized implementation of memcpy for TPL"
497 default y if USE_ARCH_MEMCPY
498 depends on TPL
499 help
500 Enable the generation of an optimized version of memcpy.
501 Such an implementation may be faster under some conditions
502 but may increase the binary size.
503
504 config USE_ARCH_MEMMOVE
505 bool "Use an assembly optimized implementation of memmove" if !ARM64
506 default USE_ARCH_MEMCPY if ARM64
507 depends on ARM64
508 help
509 Enable the generation of an optimized version of memmove.
510 Such an implementation may be faster under some conditions
511 but may increase the binary size.
512
513 config SPL_USE_ARCH_MEMMOVE
514 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
515 default SPL_USE_ARCH_MEMCPY if ARM64
516 depends on SPL && ARM64
517 help
518 Enable the generation of an optimized version of memmove.
519 Such an implementation may be faster under some conditions
520 but may increase the binary size.
521
522 config TPL_USE_ARCH_MEMMOVE
523 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
524 default TPL_USE_ARCH_MEMCPY if ARM64
525 depends on TPL && ARM64
526 help
527 Enable the generation of an optimized version of memmove.
528 Such an implementation may be faster under some conditions
529 but may increase the binary size.
530
531 config USE_ARCH_MEMSET
532 bool "Use an assembly optimized implementation of memset"
533 default y if !ARM64
534 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
535 help
536 Enable the generation of an optimized version of memset.
537 Such an implementation may be faster under some conditions
538 but may increase the binary size.
539
540 config SPL_USE_ARCH_MEMSET
541 bool "Use an assembly optimized implementation of memset for SPL"
542 default y if USE_ARCH_MEMSET
543 depends on SPL
544 help
545 Enable the generation of an optimized version of memset.
546 Such an implementation may be faster under some conditions
547 but may increase the binary size.
548
549 config TPL_USE_ARCH_MEMSET
550 bool "Use an assembly optimized implementation of memset for TPL"
551 default y if USE_ARCH_MEMSET
552 depends on TPL
553 help
554 Enable the generation of an optimized version of memset.
555 Such an implementation may be faster under some conditions
556 but may increase the binary size.
557
558 config ARM64_SUPPORT_AARCH32
559 bool "ARM64 system support AArch32 execution state"
560 depends on ARM64
561 default y if !TARGET_THUNDERX_88XX
562 help
563 This ARM64 system supports AArch32 execution state.
564
565 config IPROC
566 bool
567
568 config S5P
569 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
570
571 choice
572 prompt "Target select"
573 default TARGET_HIKEY
574
575 config ARCH_AT91
576 bool "Atmel AT91"
577 select GPIO_EXTRA_HEADER
578 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
579 select SPL_SEPARATE_BSS if SPL
580 imply SYS_THUMB_BUILD
581
582 config ARCH_DAVINCI
583 bool "TI DaVinci"
584 select CPU_ARM926EJS
585 select GPIO_EXTRA_HEADER
586 select SPL_DM_SPI if SPL
587 imply CMD_SAVES
588 help
589 Support for TI's DaVinci platform.
590
591 config ARCH_HISTB
592 bool "Hisilicon HiSTB SoCs"
593 select DM
594 select DM_SERIAL
595 select OF_CONTROL
596 select PL01X_SERIAL
597 imply CMD_DM
598 help
599 Support for HiSTB SoCs.
600
601 config ARCH_KIRKWOOD
602 bool "Marvell Kirkwood"
603 select ARCH_MISC_INIT
604 select BOARD_EARLY_INIT_F
605 select CPU_ARM926EJS
606 select GPIO_EXTRA_HEADER
607 select TIMER
608
609 config ARCH_MVEBU
610 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
611 select ARCH_EARLY_INIT_R if ARM64
612 select DM
613 select DM_SERIAL
614 select DM_SPI
615 select DM_SPI_FLASH
616 select GPIO_EXTRA_HEADER
617 select MTD
618 select SPL_DM_SPI if SPL
619 select SPL_DM_SPI_FLASH if SPL
620 select SPL_TIMER if SPL
621 select TIMER if !ARM64
622 select OF_CONTROL
623 select OF_SEPARATE
624 select SPI
625 imply CMD_DM
626
627 config ARCH_ORION5X
628 bool "Marvell Orion"
629 select CPU_ARM926EJS
630 select GPIO_EXTRA_HEADER
631 select SPL_SEPARATE_BSS if SPL
632 select TIMER
633
634 config TARGET_STV0991
635 bool "Support stv0991"
636 select CPU_V7A
637 select DM
638 select DM_SERIAL
639 select DM_SPI
640 select DM_SPI_FLASH
641 select GPIO_EXTRA_HEADER
642 select PL01X_SERIAL
643 select MTD
644 select SPI
645 select SPI_FLASH
646 imply CMD_DM
647
648 config ARCH_BCM283X
649 bool "Broadcom BCM283X family"
650 select DM
651 select DM_GPIO
652 select DM_SERIAL
653 select GPIO_EXTRA_HEADER
654 select OF_CONTROL
655 select PL01X_SERIAL
656 select SERIAL_SEARCH_ALL
657 imply CMD_DM
658 imply FAT_WRITE
659
660 config ARCH_BCMSTB
661 bool "Broadcom BCM7XXX family"
662 select CPU_V7A
663 select DM
664 select GPIO_EXTRA_HEADER
665 select OF_CONTROL
666 imply CMD_DM
667 imply OF_HAS_PRIOR_STAGE
668 help
669 This enables support for Broadcom ARM-based set-top box
670 chipsets, including the 7445 family of chips.
671
672 config ARCH_BCMBCA
673 bool "Broadcom broadband chip family"
674 select DM
675 select OF_CONTROL
676 imply CMD_DM
677
678 config TARGET_VEXPRESS_CA9X4
679 bool "Support vexpress_ca9x4"
680 select CPU_V7A
681 select PL011_SERIAL
682
683 config TARGET_BCMNS
684 bool "Support Broadcom Northstar"
685 select CPU_V7A
686 select DM
687 select DM_GPIO
688 select DM_SERIAL
689 select OF_CONTROL
690 select TIMER
691 select SYS_NS16550
692 select ARM_GLOBAL_TIMER
693 imply SYS_THUMB_BUILD
694 imply MTD_RAW_NAND
695 imply NAND_BRCMNAND
696 imply NAND_BRCMNAND_IPROC
697 help
698 Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit
699 ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094,
700 BCM5301x etc.
701
702 config TARGET_BCMNS2
703 bool "Support Broadcom Northstar2"
704 select ARM64
705 select GPIO_EXTRA_HEADER
706 help
707 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
708 ARMv8 Cortex-A57 processors targeting a broad range of networking
709 applications.
710
711 config TARGET_BCMNS3
712 bool "Support Broadcom NS3"
713 select ARM64
714 select BOARD_LATE_INIT
715 help
716 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
717 ARMv8 Cortex-A72 processors targeting a broad range of networking
718 applications.
719
720 config ARCH_EXYNOS
721 bool "Samsung EXYNOS"
722 select DM
723 select DM_GPIO
724 select DM_I2C
725 select DM_KEYBOARD
726 select DM_SERIAL
727 select DM_SPI
728 select DM_SPI_FLASH
729 select MTD
730 select SPI
731 select GPIO_EXTRA_HEADER
732 imply SYS_THUMB_BUILD
733 imply CMD_DM
734 imply FAT_WRITE
735
736 config ARCH_S5PC1XX
737 bool "Samsung S5PC1XX"
738 select CPU_V7A
739 select DM
740 select DM_GPIO
741 select DM_I2C
742 select DM_SERIAL
743 select GPIO_EXTRA_HEADER
744 imply CMD_DM
745
746 config ARCH_HIGHBANK
747 bool "Calxeda Highbank"
748 select CPU_V7A
749 select PL01X_SERIAL
750 select DM
751 select DM_SERIAL
752 select OF_CONTROL
753 select CLK
754 select CLK_CCF
755 select AHCI
756 select PHYS_64BIT
757 select TIMER
758 select SP804_TIMER
759 imply OF_HAS_PRIOR_STAGE
760
761 config ARCH_INTEGRATOR
762 bool "ARM Ltd. Integrator family"
763 select DM
764 select DM_SERIAL
765 select GPIO_EXTRA_HEADER
766 select PL01X_SERIAL
767 imply CMD_DM
768
769 config ARCH_IPQ40XX
770 bool "Qualcomm IPQ40xx SoCs"
771 select CPU_V7A
772 select DM
773 select DM_GPIO
774 select DM_SERIAL
775 select DM_RESET
776 select GPIO_EXTRA_HEADER
777 select MSM_SMEM
778 select PINCTRL
779 select CLK
780 select SMEM
781 select OF_CONTROL
782 select CLK_QCOM_IPQ4019
783 select PINCTRL_QCOM_IPQ4019
784 imply CMD_DM
785
786 config ARCH_KEYSTONE
787 bool "TI Keystone"
788 select CMD_POWEROFF
789 select CPU_V7A
790 select DDR_SPD
791 select SUPPORT_SPL
792 select SYS_ARCH_TIMER
793 select SYS_THUMB_BUILD
794 imply CMD_MTDPARTS
795 imply CMD_SAVES
796 imply FIT
797
798 config ARCH_K3
799 bool "Texas Instruments' K3 Architecture"
800 select SPL
801 select SUPPORT_SPL
802 select FIT
803 select REGEX
804 select FIT_SIGNATURE if ARM64
805 imply TI_SECURE_DEVICE
806
807 config ARCH_OMAP2PLUS
808 bool "TI OMAP2+"
809 select CPU_V7A
810 select GPIO_EXTRA_HEADER
811 select SPL_BOARD_INIT if SPL
812 select SPL_STACK_R if SPL
813 select SUPPORT_SPL
814 imply TI_SYSC if DM && OF_CONTROL
815 imply FIT
816 imply SPL_SEPARATE_BSS
817
818 config ARCH_MESON
819 bool "Amlogic Meson"
820 select GPIO_EXTRA_HEADER
821 imply DISTRO_DEFAULTS
822 imply DM_RNG
823 help
824 Support for the Meson SoC family developed by Amlogic Inc.,
825 targeted at media players and tablet computers. We currently
826 support the S905 (GXBaby) 64-bit SoC.
827
828 config ARCH_MEDIATEK
829 bool "MediaTek SoCs"
830 select DM
831 select GPIO_EXTRA_HEADER
832 select OF_CONTROL
833 select SPL_DM if SPL
834 select SPL_LIBCOMMON_SUPPORT if SPL
835 select SPL_LIBGENERIC_SUPPORT if SPL
836 select SPL_OF_CONTROL if SPL
837 select SUPPORT_SPL
838 help
839 Support for the MediaTek SoCs family developed by MediaTek Inc.
840 Please refer to doc/README.mediatek for more information.
841
842 config ARCH_LPC32XX
843 bool "NXP LPC32xx platform"
844 select CPU_ARM926EJS
845 select DM
846 select DM_GPIO
847 select DM_SERIAL
848 select GPIO_EXTRA_HEADER
849 select SPL_DM if SPL
850 select SUPPORT_SPL
851 imply CMD_DM
852
853 config ARCH_IMX8
854 bool "NXP i.MX8 platform"
855 select ARM64
856 select SYS_FSL_HAS_SEC
857 select SYS_FSL_SEC_COMPAT_4
858 select SYS_FSL_SEC_LE
859 select DM
860 select DM_EVENT
861 select GPIO_EXTRA_HEADER
862 select MACH_IMX
863 select OF_CONTROL
864 select ENABLE_ARM_SOC_BOOT0_HOOK
865
866 config ARCH_IMX8M
867 bool "NXP i.MX8M platform"
868 select ARM64
869 select GPIO_EXTRA_HEADER
870 select MACH_IMX
871 select SYS_FSL_HAS_SEC
872 select SYS_FSL_SEC_COMPAT_4
873 select SYS_FSL_SEC_LE
874 select SYS_I2C_MXC
875 select DM
876 select DM_EVENT if CLK
877 select SUPPORT_SPL
878 imply CMD_DM
879
880 config ARCH_IMX8ULP
881 bool "NXP i.MX8ULP platform"
882 select ARM64
883 select DM
884 select DM_EVENT
885 select MACH_IMX
886 select OF_CONTROL
887 select SUPPORT_SPL
888 select GPIO_EXTRA_HEADER
889 select MISC
890 select IMX_ELE
891 imply CMD_DM
892
893 config ARCH_IMX9
894 bool "NXP i.MX9 platform"
895 select ARM64
896 select DM
897 select DM_EVENT
898 select MACH_IMX
899 select SUPPORT_SPL
900 select GPIO_EXTRA_HEADER
901 select MISC
902 select IMX_ELE
903 imply CMD_DM
904
905 config ARCH_IMXRT
906 bool "NXP i.MXRT platform"
907 select CPU_V7M
908 select DM
909 select DM_SERIAL
910 select GPIO_EXTRA_HEADER
911 select MACH_IMX
912 select SUPPORT_SPL
913 imply CMD_DM
914
915 config ARCH_MX23
916 bool "NXP i.MX23 family"
917 select CPU_ARM926EJS
918 select GPIO_EXTRA_HEADER
919 select MACH_IMX
920 select SUPPORT_SPL
921
922 config ARCH_MX28
923 bool "NXP i.MX28 family"
924 select CPU_ARM926EJS
925 select GPIO_EXTRA_HEADER
926 select MACH_IMX
927 select SUPPORT_SPL
928
929 config ARCH_MX31
930 bool "NXP i.MX31 family"
931 select CPU_ARM1136
932 select GPIO_EXTRA_HEADER
933 select MACH_IMX
934
935 config ARCH_MX7ULP
936 bool "NXP MX7ULP"
937 select BOARD_POSTCLK_INIT
938 select CPU_V7A
939 select GPIO_EXTRA_HEADER
940 select MACH_IMX
941 select SYS_FSL_HAS_SEC
942 select SYS_FSL_SEC_COMPAT_4
943 select SYS_FSL_SEC_LE
944 select ROM_UNIFIED_SECTIONS
945 imply MXC_GPIO
946 imply SYS_THUMB_BUILD
947
948 config ARCH_MX7
949 bool "Freescale MX7"
950 select ARCH_MISC_INIT
951 select CPU_V7A
952 select GPIO_EXTRA_HEADER
953 select MACH_IMX
954 select MXC_GPT_HCLK
955 select SYS_FSL_HAS_SEC
956 select SYS_FSL_SEC_COMPAT_4
957 select SYS_FSL_SEC_LE
958 imply BOARD_EARLY_INIT_F
959 imply MXC_GPIO
960 imply SYS_THUMB_BUILD
961
962 config ARCH_MX6
963 bool "Freescale MX6"
964 select BOARD_POSTCLK_INIT
965 select CPU_V7A
966 select GPIO_EXTRA_HEADER
967 select MACH_IMX
968 select MXC_GPT_HCLK
969 select SYS_FSL_HAS_SEC
970 select SYS_FSL_SEC_COMPAT_4
971 select SYS_FSL_SEC_LE
972 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
973 imply MXC_GPIO
974 imply SYS_THUMB_BUILD
975 imply SPL_SEPARATE_BSS
976
977 config ARCH_MX5
978 bool "Freescale MX5"
979 select BOARD_EARLY_INIT_F
980 select CPU_V7A
981 select GPIO_EXTRA_HEADER
982 select MACH_IMX
983 imply MXC_GPIO
984
985 config ARCH_NEXELL
986 bool "Nexell S5P4418/S5P6818 SoC"
987 select ENABLE_ARM_SOC_BOOT0_HOOK
988 select DM
989 select GPIO_EXTRA_HEADER
990
991 config ARCH_NPCM
992 bool "Support Nuvoton SoCs"
993 select DM
994 select OF_CONTROL
995 imply CMD_DM
996
997 config ARCH_APPLE
998 bool "Apple SoCs"
999 select ARM64
1000 select CLK
1001 select CMD_PCI
1002 select CMD_USB
1003 select DM
1004 select DM_GPIO
1005 select DM_KEYBOARD
1006 select DM_MAILBOX
1007 select DM_RESET
1008 select DM_SERIAL
1009 select DM_SPI
1010 select DM_USB
1011 select VIDEO
1012 select IOMMU
1013 select LINUX_KERNEL_IMAGE_HEADER
1014 select MTD
1015 select OF_BOARD_SETUP
1016 select OF_CONTROL
1017 select PCI
1018 select PHY
1019 select PINCTRL
1020 select POSITION_INDEPENDENT
1021 select POWER_DOMAIN
1022 select REGMAP
1023 select SPI
1024 select SYSCON
1025 select SYSRESET
1026 select SYSRESET_WATCHDOG
1027 select SYSRESET_WATCHDOG_AUTO
1028 select USB
1029 imply CMD_DM
1030 imply CMD_GPT
1031 imply DISTRO_DEFAULTS
1032 imply OF_HAS_PRIOR_STAGE
1033
1034 config ARCH_OWL
1035 bool "Actions Semi OWL SoCs"
1036 select DM
1037 select DM_SERIAL
1038 select GPIO_EXTRA_HEADER
1039 select OWL_SERIAL
1040 select CLK
1041 select CLK_OWL
1042 select OF_CONTROL
1043 select SYS_RELOC_GD_ENV_ADDR
1044 imply CMD_DM
1045
1046 config ARCH_QEMU
1047 bool "QEMU Virtual Platform"
1048 select DM
1049 select DM_SERIAL
1050 select OF_CONTROL
1051 select PL01X_SERIAL
1052 imply CMD_DM
1053 imply DM_RNG
1054 imply DM_RTC
1055 imply RTC_PL031
1056 imply OF_HAS_PRIOR_STAGE
1057 imply VIDEO
1058 imply VIDEO_BOCHS
1059 imply SYS_WHITE_ON_BLACK
1060 imply SYS_CONSOLE_IS_IN_ENV
1061 imply PRE_CONSOLE_BUFFER
1062 imply USB
1063 imply USB_XHCI_HCD
1064 imply USB_XHCI_PCI
1065 imply USB_KEYBOARD
1066 imply CMD_USB
1067
1068 config ARCH_RMOBILE
1069 bool "Renesas ARM SoCs"
1070 select DM
1071 select DM_SERIAL
1072 select GPIO_EXTRA_HEADER
1073 imply BOARD_EARLY_INIT_F
1074 imply CMD_DM
1075 imply FAT_WRITE
1076 imply SYS_THUMB_BUILD
1077 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1078
1079 config ARCH_SNAPDRAGON
1080 bool "Qualcomm Snapdragon SoCs"
1081 select ARM64
1082 select DM
1083 select DM_GPIO
1084 select DM_SERIAL
1085 select DM_RESET
1086 select GPIO_EXTRA_HEADER
1087 select MSM_SMEM
1088 select OF_CONTROL
1089 select OF_SEPARATE
1090 select SMEM
1091 select SPMI
1092 imply CMD_DM
1093
1094 config ARCH_SOCFPGA
1095 bool "Altera SOCFPGA family"
1096 select ARCH_EARLY_INIT_R
1097 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1098 select ARM64 if TARGET_SOCFPGA_SOC64
1099 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1100 select DM
1101 select DM_SERIAL
1102 select GICV2
1103 select GPIO_EXTRA_HEADER
1104 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1105 select OF_CONTROL
1106 select SPL_DM_RESET if DM_RESET
1107 select SPL_DM_SERIAL
1108 select SPL_LIBCOMMON_SUPPORT
1109 select SPL_LIBGENERIC_SUPPORT
1110 select SPL_OF_CONTROL
1111 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1112 select SPL_SERIAL
1113 select SPL_SYSRESET
1114 select SPL_WATCHDOG
1115 select SUPPORT_SPL
1116 select SYS_NS16550
1117 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1118 select SYSRESET
1119 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1120 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1121 imply CMD_DM
1122 imply CMD_MTDPARTS
1123 imply CRC32_VERIFY
1124 imply DM_SPI
1125 imply DM_SPI_FLASH
1126 imply FAT_WRITE
1127 imply MTD
1128 imply SPL
1129 imply SPL_DM
1130 imply SPL_DM_SPI
1131 imply SPL_DM_SPI_FLASH
1132 imply SPL_LIBDISK_SUPPORT
1133 imply SPL_MMC
1134 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1135 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1136 imply SPL_SPI_FLASH_SUPPORT
1137 imply SPL_SPI
1138 imply L2X0_CACHE
1139
1140 config ARCH_SUNXI
1141 bool "Support sunxi (Allwinner) SoCs"
1142 select BINMAN
1143 select CMD_GPIO
1144 select CMD_MMC if MMC
1145 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1146 select CLK
1147 select DM
1148 select DM_GPIO
1149 select DM_I2C if I2C
1150 select DM_SPI if SPI
1151 select DM_SPI_FLASH if SPI && MTD
1152 select DM_KEYBOARD
1153 select DM_MMC if MMC
1154 select DM_SERIAL
1155 select OF_BOARD_SETUP
1156 select OF_CONTROL
1157 select OF_SEPARATE
1158 select PINCTRL
1159 select SPECIFY_CONSOLE_INDEX
1160 select SPL_SEPARATE_BSS if SPL
1161 select SPL_STACK_R if SPL
1162 select SPL_SYS_MALLOC_SIMPLE if SPL
1163 select SPL_SYS_THUMB_BUILD if !ARM64
1164 select SUNXI_GPIO
1165 select SYS_NS16550
1166 select SYS_THUMB_BUILD if !ARM64
1167 select USB if DISTRO_DEFAULTS
1168 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1169 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1170 select SPL_USE_TINY_PRINTF
1171 select USE_PREBOOT
1172 select SYS_RELOC_GD_ENV_ADDR
1173 imply BOARD_LATE_INIT
1174 imply CMD_DM
1175 imply CMD_GPT
1176 imply CMD_UBI if MTD_RAW_NAND
1177 imply DISTRO_DEFAULTS
1178 imply DM_REGULATOR
1179 imply DM_REGULATOR_FIXED
1180 imply FAT_WRITE
1181 imply FIT
1182 imply OF_LIBFDT_OVERLAY
1183 imply PRE_CONSOLE_BUFFER
1184 imply SPL_GPIO
1185 imply SPL_LIBCOMMON_SUPPORT
1186 imply SPL_LIBGENERIC_SUPPORT
1187 imply SPL_MMC if MMC
1188 imply SPL_POWER
1189 imply SPL_SERIAL
1190 imply SYSRESET
1191 imply SYSRESET_WATCHDOG
1192 imply SYSRESET_WATCHDOG_AUTO
1193 imply USB_GADGET
1194 imply WDT
1195
1196 config ARCH_U8500
1197 bool "ST-Ericsson U8500 Series"
1198 select CPU_V7A
1199 select DM
1200 select DM_GPIO
1201 select DM_MMC if MMC
1202 select DM_SERIAL
1203 select DM_USB_GADGET if DM_USB
1204 select OF_CONTROL
1205 select SYSRESET
1206 select TIMER
1207 imply AB8500_USB_PHY
1208 imply ARM_PL180_MMCI
1209 imply CLK
1210 imply DM_PMIC
1211 imply DM_RTC
1212 imply NOMADIK_GPIO
1213 imply NOMADIK_MTU_TIMER
1214 imply PHY
1215 imply PL01X_SERIAL
1216 imply PMIC_AB8500
1217 imply RTC_PL031
1218 imply SYS_THUMB_BUILD
1219 imply SYSRESET_SYSCON
1220
1221 config ARCH_VERSAL
1222 bool "Support Xilinx Versal Platform"
1223 select ARM64
1224 select CLK
1225 select DM
1226 select DM_MMC if MMC
1227 select DM_SERIAL
1228 select GICV3
1229 select OF_CONTROL
1230 select SOC_DEVICE
1231 imply BOARD_LATE_INIT
1232 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1233
1234 config ARCH_VERSAL_NET
1235 bool "Support Xilinx Versal NET Platform"
1236 select ARM64
1237 select CLK
1238 select DM
1239 select DM_MMC if MMC
1240 select DM_SERIAL
1241 select OF_CONTROL
1242 imply BOARD_LATE_INIT
1243 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1244
1245 config ARCH_VF610
1246 bool "Freescale Vybrid"
1247 select CPU_V7A
1248 select GPIO_EXTRA_HEADER
1249 select IOMUX_SHARE_CONF_REG
1250 select MACH_IMX
1251 select SYS_FSL_ERRATUM_ESDHC111
1252 imply CMD_MTDPARTS
1253 imply MTD_RAW_NAND
1254
1255 config ARCH_ZYNQ
1256 bool "Xilinx Zynq based platform"
1257 select ARM_TWD_TIMER
1258 select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA)
1259 select CLK
1260 select CLK_ZYNQ
1261 select CPU_V7A
1262 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1263 select DM
1264 select DM_MMC if MMC
1265 select DM_SERIAL
1266 select DM_SPI
1267 select DM_SPI_FLASH
1268 select OF_CONTROL
1269 select MTD
1270 select SPI
1271 select SPL_BOARD_INIT if SPL
1272 select SPL_CLK if SPL
1273 select SPL_DM if SPL
1274 select SPL_DM_SPI if SPL
1275 select SPL_DM_SPI_FLASH if SPL
1276 select SPL_OF_CONTROL if SPL
1277 select SPL_SEPARATE_BSS if SPL
1278 select SPL_TIMER if SPL
1279 select SUPPORT_SPL
1280 select TIMER
1281 imply BOARD_LATE_INIT
1282 imply CMD_CLK
1283 imply CMD_DM
1284 imply CMD_SPL
1285 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1286 imply FAT_WRITE
1287
1288 config ARCH_ZYNQMP_R5
1289 bool "Xilinx ZynqMP R5 based platform"
1290 select CLK
1291 select CPU_V7R
1292 select DM
1293 select DM_MMC if MMC
1294 select DM_SERIAL
1295 select OF_CONTROL
1296 imply CMD_DM
1297 imply DM_USB_GADGET
1298
1299 config ARCH_ZYNQMP
1300 bool "Xilinx ZynqMP based platform"
1301 select ARM64
1302 select CLK
1303 select DM
1304 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1305 imply DM_MAILBOX
1306 select DM_MMC if MMC
1307 select DM_SERIAL
1308 select MTD
1309 select DM_SPI if SPI
1310 select DM_SPI_FLASH if DM_SPI
1311 imply FIRMWARE
1312 select GICV2
1313 select OF_CONTROL
1314 select SPL_BOARD_INIT if SPL
1315 select SPL_CLK if SPL
1316 select SPL_DM if SPL
1317 select SPL_DM_SPI if SPI && SPL_DM
1318 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1319 select SPL_DM_MAILBOX if SPL
1320 imply SPL_FIRMWARE if SPL
1321 select SPL_SEPARATE_BSS if SPL
1322 select SUPPORT_SPL
1323 imply ZYNQMP_IPI if DM_MAILBOX
1324 select SOC_DEVICE
1325 imply BOARD_LATE_INIT
1326 imply CMD_DM
1327 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1328 imply FAT_WRITE
1329 imply MP
1330 imply DM_USB_GADGET
1331 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1332
1333 config ARCH_TEGRA
1334 bool "NVIDIA Tegra"
1335 select GPIO_EXTRA_HEADER
1336 imply DISTRO_DEFAULTS
1337 imply FAT_WRITE
1338 imply SPL_TIMER if SPL
1339
1340 config ARCH_VEXPRESS64
1341 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1342 select ARM64
1343 select DM
1344 select DM_SERIAL
1345 select PL01X_SERIAL
1346 select OF_CONTROL
1347 select CLK
1348 select BLK
1349 select MTD_NOR_FLASH if MTD
1350 select FLASH_CFI_DRIVER if MTD
1351 select ENV_IS_IN_FLASH if MTD
1352 imply DISTRO_DEFAULTS
1353
1354 config TARGET_CORSTONE1000
1355 bool "Support Corstone1000 Platform"
1356 select ARM64
1357 select PL01X_SERIAL
1358 select DM
1359
1360 config TARGET_TOTAL_COMPUTE
1361 bool "Support Total Compute Platform"
1362 select ARM64
1363 select PL01X_SERIAL
1364 select DM
1365 select DM_SERIAL
1366 select DM_MMC
1367 select DM_GPIO
1368
1369 config TARGET_LS2080A_EMU
1370 bool "Support ls2080a_emu"
1371 select ARCH_LS2080A
1372 select ARM64
1373 select ARMV8_MULTIENTRY
1374 select FSL_DDR_SYNC_REFRESH
1375 select GPIO_EXTRA_HEADER
1376 help
1377 Support for Freescale LS2080A_EMU platform.
1378 The LS2080A Development System (EMULATOR) is a pre-silicon
1379 development platform that supports the QorIQ LS2080A
1380 Layerscape Architecture processor.
1381
1382 config TARGET_LS1088AQDS
1383 bool "Support ls1088aqds"
1384 select ARCH_LS1088A
1385 select ARM64
1386 select ARMV8_MULTIENTRY
1387 select ARCH_SUPPORT_TFABOOT
1388 select BOARD_LATE_INIT
1389 select GPIO_EXTRA_HEADER
1390 select SUPPORT_SPL
1391 select FSL_DDR_INTERACTIVE if !SD_BOOT
1392 help
1393 Support for NXP LS1088AQDS platform.
1394 The LS1088A Development System (QDS) is a high-performance
1395 development platform that supports the QorIQ LS1088A
1396 Layerscape Architecture processor.
1397
1398 config TARGET_LS2080AQDS
1399 bool "Support ls2080aqds"
1400 select ARCH_LS2080A
1401 select ARM64
1402 select ARMV8_MULTIENTRY
1403 select ARCH_SUPPORT_TFABOOT
1404 select BOARD_LATE_INIT
1405 select GPIO_EXTRA_HEADER
1406 select SUPPORT_SPL
1407 imply SCSI
1408 imply SCSI_AHCI
1409 select FSL_DDR_BIST
1410 select FSL_DDR_INTERACTIVE if !SPL
1411 help
1412 Support for Freescale LS2080AQDS platform.
1413 The LS2080A Development System (QDS) is a high-performance
1414 development platform that supports the QorIQ LS2080A
1415 Layerscape Architecture processor.
1416
1417 config TARGET_LS2080ARDB
1418 bool "Support ls2080ardb"
1419 select ARCH_LS2080A
1420 select ARM64
1421 select ARMV8_MULTIENTRY
1422 select ARCH_SUPPORT_TFABOOT
1423 select BOARD_LATE_INIT
1424 select SUPPORT_SPL
1425 select FSL_DDR_BIST
1426 select FSL_DDR_INTERACTIVE if !SPL
1427 select GPIO_EXTRA_HEADER
1428 imply SCSI
1429 imply SCSI_AHCI
1430 help
1431 Support for Freescale LS2080ARDB platform.
1432 The LS2080A Reference design board (RDB) is a high-performance
1433 development platform that supports the QorIQ LS2080A
1434 Layerscape Architecture processor.
1435
1436 config TARGET_LS2081ARDB
1437 bool "Support ls2081ardb"
1438 select ARCH_LS2080A
1439 select ARM64
1440 select ARMV8_MULTIENTRY
1441 select BOARD_LATE_INIT
1442 select GPIO_EXTRA_HEADER
1443 select SUPPORT_SPL
1444 help
1445 Support for Freescale LS2081ARDB platform.
1446 The LS2081A Reference design board (RDB) is a high-performance
1447 development platform that supports the QorIQ LS2081A/LS2041A
1448 Layerscape Architecture processor.
1449
1450 config TARGET_LX2160ARDB
1451 bool "Support lx2160ardb"
1452 select ARCH_LX2160A
1453 select ARM64
1454 select ARMV8_MULTIENTRY
1455 select ARCH_SUPPORT_TFABOOT
1456 select BOARD_LATE_INIT
1457 select GPIO_EXTRA_HEADER
1458 help
1459 Support for NXP LX2160ARDB platform.
1460 The lx2160ardb (LX2160A Reference design board (RDB)
1461 is a high-performance development platform that supports the
1462 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1463
1464 config TARGET_LX2160AQDS
1465 bool "Support lx2160aqds"
1466 select ARCH_LX2160A
1467 select ARM64
1468 select ARMV8_MULTIENTRY
1469 select ARCH_SUPPORT_TFABOOT
1470 select BOARD_LATE_INIT
1471 select GPIO_EXTRA_HEADER
1472 help
1473 Support for NXP LX2160AQDS platform.
1474 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1475 is a high-performance development platform that supports the
1476 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1477
1478 config TARGET_LX2162AQDS
1479 bool "Support lx2162aqds"
1480 select ARCH_LX2162A
1481 select ARCH_MISC_INIT
1482 select ARM64
1483 select ARMV8_MULTIENTRY
1484 select ARCH_SUPPORT_TFABOOT
1485 select BOARD_LATE_INIT
1486 select GPIO_EXTRA_HEADER
1487 help
1488 Support for NXP LX2162AQDS platform.
1489 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1490
1491 config TARGET_HIKEY
1492 bool "Support HiKey 96boards Consumer Edition Platform"
1493 select ARM64
1494 select DM
1495 select DM_GPIO
1496 select DM_SERIAL
1497 select GPIO_EXTRA_HEADER
1498 select OF_CONTROL
1499 select PL01X_SERIAL
1500 select SPECIFY_CONSOLE_INDEX
1501 imply CMD_DM
1502 help
1503 Support for HiKey 96boards platform. It features a HI6220
1504 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1505
1506 config TARGET_HIKEY960
1507 bool "Support HiKey960 96boards Consumer Edition Platform"
1508 select ARM64
1509 select DM
1510 select DM_SERIAL
1511 select GPIO_EXTRA_HEADER
1512 select OF_CONTROL
1513 select PL01X_SERIAL
1514 imply CMD_DM
1515 help
1516 Support for HiKey960 96boards platform. It features a HI3660
1517 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1518
1519 config TARGET_POPLAR
1520 bool "Support Poplar 96boards Enterprise Edition Platform"
1521 select ARM64
1522 select DM
1523 select DM_SERIAL
1524 select GPIO_EXTRA_HEADER
1525 select OF_CONTROL
1526 select PL01X_SERIAL
1527 imply CMD_DM
1528 help
1529 Support for Poplar 96boards EE platform. It features a HI3798cv200
1530 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1531 making it capable of running any commercial set-top solution based on
1532 Linux or Android.
1533
1534 config TARGET_LS1012AQDS
1535 bool "Support ls1012aqds"
1536 select ARCH_LS1012A
1537 select ARM64
1538 select ARCH_SUPPORT_TFABOOT
1539 select BOARD_LATE_INIT
1540 select GPIO_EXTRA_HEADER
1541 help
1542 Support for Freescale LS1012AQDS platform.
1543 The LS1012A Development System (QDS) is a high-performance
1544 development platform that supports the QorIQ LS1012A
1545 Layerscape Architecture processor.
1546
1547 config TARGET_LS1012ARDB
1548 bool "Support ls1012ardb"
1549 select ARCH_LS1012A
1550 select ARM64
1551 select ARCH_SUPPORT_TFABOOT
1552 select BOARD_LATE_INIT
1553 select GPIO_EXTRA_HEADER
1554 imply SCSI
1555 imply SCSI_AHCI
1556 help
1557 Support for Freescale LS1012ARDB platform.
1558 The LS1012A Reference design board (RDB) is a high-performance
1559 development platform that supports the QorIQ LS1012A
1560 Layerscape Architecture processor.
1561
1562 config TARGET_LS1012A2G5RDB
1563 bool "Support ls1012a2g5rdb"
1564 select ARCH_LS1012A
1565 select ARM64
1566 select ARCH_SUPPORT_TFABOOT
1567 select BOARD_LATE_INIT
1568 select GPIO_EXTRA_HEADER
1569 imply SCSI
1570 help
1571 Support for Freescale LS1012A2G5RDB platform.
1572 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1573 development platform that supports the QorIQ LS1012A
1574 Layerscape Architecture processor.
1575
1576 config TARGET_LS1012AFRWY
1577 bool "Support ls1012afrwy"
1578 select ARCH_LS1012A
1579 select ARM64
1580 select ARCH_SUPPORT_TFABOOT
1581 select BOARD_LATE_INIT
1582 select GPIO_EXTRA_HEADER
1583 imply SCSI
1584 imply SCSI_AHCI
1585 help
1586 Support for Freescale LS1012AFRWY platform.
1587 The LS1012A FRWY board (FRWY) is a high-performance
1588 development platform that supports the QorIQ LS1012A
1589 Layerscape Architecture processor.
1590
1591 config TARGET_LS1012AFRDM
1592 bool "Support ls1012afrdm"
1593 select ARCH_LS1012A
1594 select ARM64
1595 select ARCH_SUPPORT_TFABOOT
1596 select GPIO_EXTRA_HEADER
1597 help
1598 Support for Freescale LS1012AFRDM platform.
1599 The LS1012A Freedom board (FRDM) is a high-performance
1600 development platform that supports the QorIQ LS1012A
1601 Layerscape Architecture processor.
1602
1603 config TARGET_LS1028AQDS
1604 bool "Support ls1028aqds"
1605 select ARCH_LS1028A
1606 select ARM64
1607 select ARMV8_MULTIENTRY
1608 select ARCH_SUPPORT_TFABOOT
1609 select BOARD_LATE_INIT
1610 select GPIO_EXTRA_HEADER
1611 help
1612 Support for Freescale LS1028AQDS platform
1613 The LS1028A Development System (QDS) is a high-performance
1614 development platform that supports the QorIQ LS1028A
1615 Layerscape Architecture processor.
1616
1617 config TARGET_LS1028ARDB
1618 bool "Support ls1028ardb"
1619 select ARCH_LS1028A
1620 select ARM64
1621 select ARMV8_MULTIENTRY
1622 select ARCH_SUPPORT_TFABOOT
1623 select BOARD_LATE_INIT
1624 select GPIO_EXTRA_HEADER
1625 help
1626 Support for Freescale LS1028ARDB platform
1627 The LS1028A Development System (RDB) is a high-performance
1628 development platform that supports the QorIQ LS1028A
1629 Layerscape Architecture processor.
1630
1631 config TARGET_LS1088ARDB
1632 bool "Support ls1088ardb"
1633 select ARCH_LS1088A
1634 select ARM64
1635 select ARMV8_MULTIENTRY
1636 select ARCH_SUPPORT_TFABOOT
1637 select BOARD_LATE_INIT
1638 select SUPPORT_SPL
1639 select FSL_DDR_INTERACTIVE if !SD_BOOT
1640 select GPIO_EXTRA_HEADER
1641 help
1642 Support for NXP LS1088ARDB platform.
1643 The LS1088A Reference design board (RDB) is a high-performance
1644 development platform that supports the QorIQ LS1088A
1645 Layerscape Architecture processor.
1646
1647 config TARGET_LS1021AQDS
1648 bool "Support ls1021aqds"
1649 select ARCH_LS1021A
1650 select ARCH_SUPPORT_PSCI
1651 select BOARD_EARLY_INIT_F
1652 select BOARD_LATE_INIT
1653 select CPU_V7A
1654 select CPU_V7_HAS_NONSEC
1655 select CPU_V7_HAS_VIRT
1656 select LS1_DEEP_SLEEP
1657 select PEN_ADDR_BIG_ENDIAN
1658 select SUPPORT_SPL
1659 select SYS_FSL_DDR
1660 select FSL_DDR_INTERACTIVE
1661 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1662 select GPIO_EXTRA_HEADER
1663 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1664 imply SCSI
1665
1666 config TARGET_LS1021ATWR
1667 bool "Support ls1021atwr"
1668 select ARCH_LS1021A
1669 select ARCH_SUPPORT_PSCI
1670 select BOARD_EARLY_INIT_F
1671 select BOARD_LATE_INIT
1672 select CPU_V7A
1673 select CPU_V7_HAS_NONSEC
1674 select CPU_V7_HAS_VIRT
1675 select LS1_DEEP_SLEEP
1676 select PEN_ADDR_BIG_ENDIAN
1677 select SUPPORT_SPL
1678 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1679 select GPIO_EXTRA_HEADER
1680 imply SCSI
1681
1682 config TARGET_PG_WCOM_SELI8
1683 bool "Support Hitachi-Powergrids SELI8 service unit card"
1684 select ARCH_LS1021A
1685 select ARCH_SUPPORT_PSCI
1686 select BOARD_EARLY_INIT_F
1687 select BOARD_LATE_INIT
1688 select CPU_V7A
1689 select CPU_V7_HAS_NONSEC
1690 select CPU_V7_HAS_VIRT
1691 select SYS_FSL_DDR
1692 select FSL_DDR_INTERACTIVE
1693 select GPIO_EXTRA_HEADER
1694 select VENDOR_KM
1695 imply SCSI
1696 help
1697 Support for Hitachi-Powergrids SELI8 service unit card.
1698 SELI8 is a QorIQ LS1021a based service unit card used
1699 in XMC20 and FOX615 product families.
1700
1701 config TARGET_PG_WCOM_EXPU1
1702 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1703 select ARCH_LS1021A
1704 select ARCH_SUPPORT_PSCI
1705 select BOARD_EARLY_INIT_F
1706 select BOARD_LATE_INIT
1707 select CPU_V7A
1708 select CPU_V7_HAS_NONSEC
1709 select CPU_V7_HAS_VIRT
1710 select SYS_FSL_DDR
1711 select FSL_DDR_INTERACTIVE
1712 select VENDOR_KM
1713 imply SCSI
1714 help
1715 Support for Hitachi-Powergrids EXPU1 service unit card.
1716 EXPU1 is a QorIQ LS1021a based service unit card used
1717 in XMC20 and FOX615 product families.
1718
1719 config TARGET_LS1021ATSN
1720 bool "Support ls1021atsn"
1721 select ARCH_LS1021A
1722 select ARCH_SUPPORT_PSCI
1723 select BOARD_EARLY_INIT_F
1724 select BOARD_LATE_INIT
1725 select CPU_V7A
1726 select CPU_V7_HAS_NONSEC
1727 select CPU_V7_HAS_VIRT
1728 select LS1_DEEP_SLEEP
1729 select SUPPORT_SPL
1730 select GPIO_EXTRA_HEADER
1731 imply SCSI
1732
1733 config TARGET_LS1021AIOT
1734 bool "Support ls1021aiot"
1735 select ARCH_LS1021A
1736 select ARCH_SUPPORT_PSCI
1737 select BOARD_LATE_INIT
1738 select CPU_V7A
1739 select CPU_V7_HAS_NONSEC
1740 select CPU_V7_HAS_VIRT
1741 select PEN_ADDR_BIG_ENDIAN
1742 select SUPPORT_SPL
1743 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1744 select GPIO_EXTRA_HEADER
1745 imply SCSI
1746 help
1747 Support for Freescale LS1021AIOT platform.
1748 The LS1021A Freescale board (IOT) is a high-performance
1749 development platform that supports the QorIQ LS1021A
1750 Layerscape Architecture processor.
1751
1752 config TARGET_LS1043AQDS
1753 bool "Support ls1043aqds"
1754 select ARCH_LS1043A
1755 select ARM64
1756 select ARMV8_MULTIENTRY
1757 select ARCH_SUPPORT_TFABOOT
1758 select BOARD_EARLY_INIT_F
1759 select BOARD_LATE_INIT
1760 select SUPPORT_SPL
1761 select FSL_DDR_INTERACTIVE if !SPL
1762 select FSL_DSPI if !SPL_NO_DSPI
1763 select DM_SPI_FLASH if FSL_DSPI
1764 select GPIO_EXTRA_HEADER
1765 imply SCSI
1766 imply SCSI_AHCI
1767 help
1768 Support for Freescale LS1043AQDS platform.
1769
1770 config TARGET_LS1043ARDB
1771 bool "Support ls1043ardb"
1772 select ARCH_LS1043A
1773 select ARM64
1774 select ARMV8_MULTIENTRY
1775 select ARCH_SUPPORT_TFABOOT
1776 select BOARD_EARLY_INIT_F
1777 select BOARD_LATE_INIT
1778 select SUPPORT_SPL
1779 select FSL_DSPI if !SPL_NO_DSPI
1780 select DM_SPI_FLASH if FSL_DSPI
1781 select GPIO_EXTRA_HEADER
1782 help
1783 Support for Freescale LS1043ARDB platform.
1784
1785 config TARGET_LS1046AQDS
1786 bool "Support ls1046aqds"
1787 select ARCH_LS1046A
1788 select ARM64
1789 select ARMV8_MULTIENTRY
1790 select ARCH_SUPPORT_TFABOOT
1791 select BOARD_EARLY_INIT_F
1792 select BOARD_LATE_INIT
1793 select DM_SPI_FLASH if DM_SPI
1794 select SUPPORT_SPL
1795 select FSL_DDR_BIST if !SPL
1796 select FSL_DDR_INTERACTIVE if !SPL
1797 select FSL_DDR_INTERACTIVE if !SPL
1798 select GPIO_EXTRA_HEADER
1799 imply SCSI
1800 help
1801 Support for Freescale LS1046AQDS platform.
1802 The LS1046A Development System (QDS) is a high-performance
1803 development platform that supports the QorIQ LS1046A
1804 Layerscape Architecture processor.
1805
1806 config TARGET_LS1046ARDB
1807 bool "Support ls1046ardb"
1808 select ARCH_LS1046A
1809 select ARM64
1810 select ARMV8_MULTIENTRY
1811 select ARCH_SUPPORT_TFABOOT
1812 select BOARD_EARLY_INIT_F
1813 select BOARD_LATE_INIT
1814 select DM_SPI_FLASH if DM_SPI
1815 select POWER_MC34VR500
1816 select SUPPORT_SPL
1817 select FSL_DDR_BIST
1818 select FSL_DDR_INTERACTIVE if !SPL
1819 select GPIO_EXTRA_HEADER
1820 imply SCSI
1821 help
1822 Support for Freescale LS1046ARDB platform.
1823 The LS1046A Reference Design Board (RDB) is a high-performance
1824 development platform that supports the QorIQ LS1046A
1825 Layerscape Architecture processor.
1826
1827 config TARGET_LS1046AFRWY
1828 bool "Support ls1046afrwy"
1829 select ARCH_LS1046A
1830 select ARM64
1831 select ARMV8_MULTIENTRY
1832 select ARCH_SUPPORT_TFABOOT
1833 select BOARD_EARLY_INIT_F
1834 select BOARD_LATE_INIT
1835 select DM_SPI_FLASH if DM_SPI
1836 select GPIO_EXTRA_HEADER
1837 imply SCSI
1838 help
1839 Support for Freescale LS1046AFRWY platform.
1840 The LS1046A Freeway Board (FRWY) is a high-performance
1841 development platform that supports the QorIQ LS1046A
1842 Layerscape Architecture processor.
1843
1844 config TARGET_SL28
1845 bool "Support sl28"
1846 select ARCH_LS1028A
1847 select ARM64
1848 select ARMV8_MULTIENTRY
1849 select SUPPORT_SPL
1850 select BINMAN
1851 select DM
1852 select DM_GPIO
1853 select DM_I2C
1854 select DM_MMC
1855 select MTD
1856 select DM_SPI_FLASH
1857 select DM_MDIO
1858 select PCI
1859 select DM_RNG
1860 select DM_RTC
1861 select SCSI
1862 select DM_SERIAL
1863 select DM_SPI
1864 select GPIO_EXTRA_HEADER
1865 select SPL_DM if SPL
1866 select SPL_DM_SPI if SPL
1867 select SPL_DM_SPI_FLASH if SPL
1868 select SPL_DM_I2C if SPL
1869 select SPL_DM_MMC if SPL
1870 select SPL_DM_SERIAL if SPL
1871 help
1872 Support for Kontron SMARC-sAL28 board.
1873
1874 config TARGET_TEN64
1875 bool "Support ten64"
1876 select ARCH_LS1088A
1877 select ARCH_MISC_INIT
1878 select ARM64
1879 select ARMV8_MULTIENTRY
1880 select ARCH_SUPPORT_TFABOOT
1881 select BOARD_LATE_INIT
1882 select SUPPORT_SPL
1883 select FSL_DDR_INTERACTIVE if !SD_BOOT
1884 select GPIO_EXTRA_HEADER
1885 help
1886 Support for Traverse Technologies Ten64 board, based
1887 on NXP LS1088A.
1888
1889 config ARCH_UNIPHIER
1890 bool "Socionext UniPhier SoCs"
1891 select BOARD_LATE_INIT
1892 select DM
1893 select DM_GPIO
1894 select DM_I2C
1895 select DM_MMC
1896 select DM_MTD
1897 select DM_RESET
1898 select DM_SERIAL
1899 select OF_BOARD_SETUP
1900 select OF_CONTROL
1901 select OF_LIBFDT
1902 select PINCTRL
1903 select SPL_BOARD_INIT if SPL
1904 select SPL_DM if SPL
1905 select SPL_LIBCOMMON_SUPPORT if SPL
1906 select SPL_LIBGENERIC_SUPPORT if SPL
1907 select SPL_OF_CONTROL if SPL
1908 select SPL_PINCTRL if SPL
1909 select SUPPORT_SPL
1910 imply CMD_DM
1911 imply DISTRO_DEFAULTS
1912 imply FAT_WRITE
1913 help
1914 Support for UniPhier SoC family developed by Socionext Inc.
1915 (formerly, System LSI Business Division of Panasonic Corporation)
1916
1917 config ARCH_SYNQUACER
1918 bool "Socionext SynQuacer SoCs"
1919 select ARM64
1920 select DM
1921 select GIC_V3
1922 select PSCI_RESET
1923 select SYSRESET
1924 select SYSRESET_PSCI
1925 select OF_CONTROL
1926 help
1927 Support for SynQuacer SoC family developed by Socionext Inc.
1928 This SoC is used on 96boards EE DeveloperBox.
1929
1930 config ARCH_STM32
1931 bool "Support STMicroelectronics STM32 MCU with cortex M"
1932 select CPU_V7M
1933 select DM
1934 select DM_SERIAL
1935 imply CMD_DM
1936
1937 config ARCH_STI
1938 bool "Support STMicroelectronics SoCs"
1939 select BLK
1940 select CPU_V7A
1941 select DM
1942 select DM_MMC
1943 select DM_RESET
1944 select DM_SERIAL
1945 imply CMD_DM
1946 help
1947 Support for STMicroelectronics STiH407/10 SoC family.
1948 This SoC is used on Linaro 96Board STiH410-B2260
1949
1950 config ARCH_STM32MP
1951 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1952 select ARCH_MISC_INIT
1953 select ARCH_SUPPORT_TFABOOT
1954 select BOARD_LATE_INIT
1955 select CLK
1956 select DM
1957 select DM_GPIO
1958 select DM_RESET
1959 select DM_SERIAL
1960 select MISC
1961 select OF_CONTROL
1962 select OF_LIBFDT
1963 select OF_SYSTEM_SETUP
1964 select PINCTRL
1965 select REGMAP
1966 select SYSCON
1967 select SYSRESET
1968 select SYS_THUMB_BUILD if !ARM64
1969 imply SPL_SYSRESET
1970 imply CMD_DM
1971 imply CMD_POWEROFF
1972 imply OF_LIBFDT_OVERLAY
1973 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1974 imply USE_PREBOOT
1975 imply TIMESTAMP
1976 help
1977 Support for STM32MP SoC family developed by STMicroelectronics,
1978 MPUs based on ARM cortex A core
1979 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1980 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1981 chain.
1982 SPL is the unsecure FSBL for the basic boot chain.
1983
1984 config ARCH_ROCKCHIP
1985 bool "Support Rockchip SoCs"
1986 select BLK
1987 select BINMAN if SPL_OPTEE || SPL
1988 select DM
1989 select DM_GPIO
1990 select DM_I2C
1991 select DM_MMC
1992 select DM_PWM
1993 select DM_REGULATOR
1994 select DM_SERIAL
1995 select DM_SPI
1996 select DM_SPI_FLASH
1997 select DM_USB_GADGET if USB_DWC3_GADGET
1998 select ENABLE_ARM_SOC_BOOT0_HOOK
1999 select OF_CONTROL
2000 select MTD
2001 select SPI
2002 select SPL_DM if SPL
2003 select SPL_DM_SPI if SPL
2004 select SPL_DM_SPI_FLASH if SPL
2005 select SYS_MALLOC_F
2006 select SYS_THUMB_BUILD if !ARM64
2007 imply ADC
2008 imply CMD_DM
2009 imply DEBUG_UART_BOARD_INIT
2010 imply BOOTSTD_DEFAULTS
2011 imply FAT_WRITE
2012 imply SARADC_ROCKCHIP
2013 imply SPL_SYSRESET
2014 imply SPL_SYS_MALLOC_SIMPLE
2015 imply SYS_NS16550
2016 imply TPL_SYSRESET
2017 imply USB_FUNCTION_FASTBOOT
2018
2019 config ARCH_OCTEONTX
2020 bool "Support OcteonTX SoCs"
2021 select CLK
2022 select DM
2023 select GPIO_EXTRA_HEADER
2024 select ARM64
2025 select OF_CONTROL
2026 select OF_LIVE
2027 select BOARD_LATE_INIT
2028 select SYS_CACHE_SHIFT_7
2029 select SYS_PCI_64BIT if PCI
2030 imply OF_HAS_PRIOR_STAGE
2031
2032 config ARCH_OCTEONTX2
2033 bool "Support OcteonTX2 SoCs"
2034 select CLK
2035 select DM
2036 select GPIO_EXTRA_HEADER
2037 select ARM64
2038 select OF_CONTROL
2039 select OF_LIVE
2040 select BOARD_LATE_INIT
2041 select SYS_CACHE_SHIFT_7
2042 select SYS_PCI_64BIT if PCI
2043 imply OF_HAS_PRIOR_STAGE
2044
2045 config TARGET_THUNDERX_88XX
2046 bool "Support ThunderX 88xx"
2047 select ARM64
2048 select GPIO_EXTRA_HEADER
2049 select OF_CONTROL
2050 select PL01X_SERIAL
2051 select SYS_CACHE_SHIFT_7
2052
2053 config ARCH_ASPEED
2054 bool "Support Aspeed SoCs"
2055 select DM
2056 select OF_CONTROL
2057 imply CMD_DM
2058
2059 config TARGET_DURIAN
2060 bool "Support Phytium Durian Platform"
2061 select ARM64
2062 select GPIO_EXTRA_HEADER
2063 help
2064 Support for durian platform.
2065 It has 2GB Sdram, uart and pcie.
2066
2067 config TARGET_POMELO
2068 bool "Support Phytium Pomelo Platform"
2069 select ARM64
2070 select DM
2071 select AHCI
2072 select SCSI_AHCI
2073 select AHCI_PCI
2074 select BLK
2075 select PCI
2076 select DM_PCI
2077 select SCSI
2078 select DM_SERIAL
2079 imply CMD_PCI
2080 help
2081 Support for pomelo platform.
2082 It has 8GB Sdram, uart and pcie.
2083
2084 config TARGET_PE2201
2085 bool "Support Phytium PE2201 Platform"
2086 select ARM64
2087 help
2088 Support for pe2201 platform.It has 2GB Sdram, uart and pcie.
2089
2090 config TARGET_PRESIDIO_ASIC
2091 bool "Support Cortina Presidio ASIC Platform"
2092 select ARM64
2093 select GICV2
2094
2095 config TARGET_XENGUEST_ARM64
2096 bool "Xen guest ARM64"
2097 select ARM64
2098 select XEN
2099 select OF_CONTROL
2100 select LINUX_KERNEL_IMAGE_HEADER
2101 select XEN_SERIAL
2102 imply OF_HAS_PRIOR_STAGE
2103
2104 config ARCH_GXP
2105 bool "Support HPE GXP SoCs"
2106 select DM
2107 select OF_CONTROL
2108 imply CMD_DM
2109
2110 endchoice
2111
2112 config SUPPORT_PASSING_ATAGS
2113 bool "Support pre-devicetree ATAG-based booting"
2114 depends on !ARM64
2115 imply SETUP_MEMORY_TAGS
2116 help
2117 Support for booting older Linux kernels, using ATAGs rather than
2118 passing a devicetree. This is option is rarely used, and the
2119 semantics are defined at
2120 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2121
2122 config SETUP_MEMORY_TAGS
2123 bool "Pass memory size information via ATAG"
2124 depends on SUPPORT_PASSING_ATAGS
2125
2126 config CMDLINE_TAG
2127 bool "Pass Linux kernel cmdline via ATAG"
2128 depends on SUPPORT_PASSING_ATAGS
2129
2130 config INITRD_TAG
2131 bool "Pass initrd starting point and size via ATAG"
2132 depends on SUPPORT_PASSING_ATAGS
2133
2134 config REVISION_TAG
2135 bool "Pass system revision via ATAG"
2136 depends on SUPPORT_PASSING_ATAGS
2137
2138 config SERIAL_TAG
2139 bool "Pass system serial number via ATAG"
2140 depends on SUPPORT_PASSING_ATAGS
2141
2142 config STATIC_MACH_TYPE
2143 bool "Statically define the Machine ID number"
2144 default y if TARGET_DS109 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2145 help
2146 When booting via ATAGs, enable this option if we know the correct
2147 machine ID number to use at compile time. Some systems will be
2148 passed the number dynamically by whatever loads U-Boot.
2149
2150 config MACH_TYPE
2151 int "Machine ID number"
2152 depends on STATIC_MACH_TYPE
2153 default 527 if TARGET_DS109
2154 default 3036 if TARGET_DS414
2155 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2156 help
2157 When booting via ATAGs, the machine type must be passed as a number.
2158 For the full list see https://www.arm.linux.org.uk/developer/machines
2159
2160 config ARCH_SUPPORT_TFABOOT
2161 bool
2162
2163 config TFABOOT
2164 bool "Support for booting from TF-A"
2165 depends on ARCH_SUPPORT_TFABOOT
2166 help
2167 Some platforms support the setup of secure registers (for instance
2168 for CPU errata handling) or provide secure services like PSCI.
2169 Those services could also be provided by other firmware parts
2170 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2171 does not need to (and cannot) execute this code.
2172 Enabling this option will make a U-Boot binary that is relying
2173 on other firmware layers to provide secure functionality.
2174
2175 config TI_SECURE_DEVICE
2176 bool "HS Device Type Support"
2177 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2178 help
2179 If a high secure (HS) device type is being used, this config
2180 must be set. This option impacts various aspects of the
2181 build system (to create signed boot images that can be
2182 authenticated) and the code. See the doc/README.ti-secure
2183 file for further details.
2184
2185 config SYS_KWD_CONFIG
2186 string "kwbimage config file path"
2187 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2188 default "arch/arm/mach-mvebu/kwbimage.cfg"
2189 help
2190 Path within the source directory to the kwbimage.cfg file to use
2191 when packaging the U-Boot image for use.
2192
2193 source "arch/arm/mach-apple/Kconfig"
2194
2195 source "arch/arm/mach-aspeed/Kconfig"
2196
2197 source "arch/arm/mach-at91/Kconfig"
2198
2199 source "arch/arm/mach-bcm283x/Kconfig"
2200
2201 source "arch/arm/mach-bcmbca/Kconfig"
2202
2203 source "arch/arm/mach-bcmstb/Kconfig"
2204
2205 source "arch/arm/mach-davinci/Kconfig"
2206
2207 source "arch/arm/mach-exynos/Kconfig"
2208
2209 source "arch/arm/mach-hpe/gxp/Kconfig"
2210
2211 source "arch/arm/mach-highbank/Kconfig"
2212
2213 source "arch/arm/mach-histb/Kconfig"
2214
2215 source "arch/arm/mach-integrator/Kconfig"
2216
2217 source "arch/arm/mach-ipq40xx/Kconfig"
2218
2219 source "arch/arm/mach-k3/Kconfig"
2220
2221 source "arch/arm/mach-keystone/Kconfig"
2222
2223 source "arch/arm/mach-kirkwood/Kconfig"
2224
2225 source "arch/arm/mach-lpc32xx/Kconfig"
2226
2227 source "arch/arm/mach-mvebu/Kconfig"
2228
2229 source "arch/arm/mach-octeontx/Kconfig"
2230
2231 source "arch/arm/mach-octeontx2/Kconfig"
2232
2233 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2234
2235 source "arch/arm/mach-imx/mx3/Kconfig"
2236
2237 source "arch/arm/mach-imx/mx5/Kconfig"
2238
2239 source "arch/arm/mach-imx/mx6/Kconfig"
2240
2241 source "arch/arm/mach-imx/mx7/Kconfig"
2242
2243 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2244
2245 source "arch/arm/mach-imx/imx8/Kconfig"
2246
2247 source "arch/arm/mach-imx/imx8m/Kconfig"
2248
2249 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2250
2251 source "arch/arm/mach-imx/imx9/Kconfig"
2252
2253 source "arch/arm/mach-imx/imxrt/Kconfig"
2254
2255 source "arch/arm/mach-imx/mxs/Kconfig"
2256
2257 source "arch/arm/mach-omap2/Kconfig"
2258
2259 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2260
2261 source "arch/arm/mach-orion5x/Kconfig"
2262
2263 source "arch/arm/mach-owl/Kconfig"
2264
2265 source "arch/arm/mach-rmobile/Kconfig"
2266
2267 source "arch/arm/mach-meson/Kconfig"
2268
2269 source "arch/arm/mach-mediatek/Kconfig"
2270
2271 source "arch/arm/mach-qemu/Kconfig"
2272
2273 source "arch/arm/mach-rockchip/Kconfig"
2274
2275 source "arch/arm/mach-s5pc1xx/Kconfig"
2276
2277 source "arch/arm/mach-snapdragon/Kconfig"
2278
2279 source "arch/arm/mach-socfpga/Kconfig"
2280
2281 source "arch/arm/mach-sti/Kconfig"
2282
2283 source "arch/arm/mach-stm32/Kconfig"
2284
2285 source "arch/arm/mach-stm32mp/Kconfig"
2286
2287 source "arch/arm/mach-sunxi/Kconfig"
2288
2289 source "arch/arm/mach-tegra/Kconfig"
2290
2291 source "arch/arm/mach-u8500/Kconfig"
2292
2293 source "arch/arm/mach-uniphier/Kconfig"
2294
2295 source "arch/arm/cpu/armv7/vf610/Kconfig"
2296
2297 source "arch/arm/mach-zynq/Kconfig"
2298
2299 source "arch/arm/mach-zynqmp/Kconfig"
2300
2301 source "arch/arm/mach-versal/Kconfig"
2302
2303 source "arch/arm/mach-versal-net/Kconfig"
2304
2305 source "arch/arm/mach-zynqmp-r5/Kconfig"
2306
2307 source "arch/arm/cpu/armv7/Kconfig"
2308
2309 source "arch/arm/cpu/armv8/Kconfig"
2310
2311 source "arch/arm/mach-imx/Kconfig"
2312
2313 source "arch/arm/mach-nexell/Kconfig"
2314
2315 source "arch/arm/mach-npcm/Kconfig"
2316
2317 source "board/armltd/total_compute/Kconfig"
2318 source "board/armltd/corstone1000/Kconfig"
2319 source "board/bosch/shc/Kconfig"
2320 source "board/bosch/guardian/Kconfig"
2321 source "board/Marvell/octeontx/Kconfig"
2322 source "board/Marvell/octeontx2/Kconfig"
2323 source "board/armltd/vexpress/Kconfig"
2324 source "board/armltd/vexpress64/Kconfig"
2325 source "board/cortina/presidio-asic/Kconfig"
2326 source "board/broadcom/bcmns/Kconfig"
2327 source "board/broadcom/bcmns3/Kconfig"
2328 source "board/cavium/thunderx/Kconfig"
2329 source "board/eets/pdu001/Kconfig"
2330 source "board/emulation/qemu-arm/Kconfig"
2331 source "board/freescale/ls2080aqds/Kconfig"
2332 source "board/freescale/ls2080ardb/Kconfig"
2333 source "board/freescale/ls1088a/Kconfig"
2334 source "board/freescale/ls1028a/Kconfig"
2335 source "board/freescale/ls1021aqds/Kconfig"
2336 source "board/freescale/ls1043aqds/Kconfig"
2337 source "board/freescale/ls1021atwr/Kconfig"
2338 source "board/freescale/ls1021atsn/Kconfig"
2339 source "board/freescale/ls1021aiot/Kconfig"
2340 source "board/freescale/ls1046aqds/Kconfig"
2341 source "board/freescale/ls1043ardb/Kconfig"
2342 source "board/freescale/ls1046ardb/Kconfig"
2343 source "board/freescale/ls1046afrwy/Kconfig"
2344 source "board/freescale/ls1012aqds/Kconfig"
2345 source "board/freescale/ls1012ardb/Kconfig"
2346 source "board/freescale/ls1012afrdm/Kconfig"
2347 source "board/freescale/lx2160a/Kconfig"
2348 source "board/grinn/chiliboard/Kconfig"
2349 source "board/hisilicon/hikey/Kconfig"
2350 source "board/hisilicon/hikey960/Kconfig"
2351 source "board/hisilicon/poplar/Kconfig"
2352 source "board/isee/igep003x/Kconfig"
2353 source "board/kontron/sl28/Kconfig"
2354 source "board/myir/mys_6ulx/Kconfig"
2355 source "board/samsung/common/Kconfig"
2356 source "board/siemens/common/Kconfig"
2357 source "board/seeed/npi_imx6ull/Kconfig"
2358 source "board/socionext/developerbox/Kconfig"
2359 source "board/st/stv0991/Kconfig"
2360 source "board/tcl/sl50/Kconfig"
2361 source "board/traverse/ten64/Kconfig"
2362 source "board/variscite/dart_6ul/Kconfig"
2363 source "board/vscom/baltos/Kconfig"
2364 source "board/phytium/durian/Kconfig"
2365 source "board/phytium/pomelo/Kconfig"
2366 source "board/phytium/pe2201/Kconfig"
2367 source "board/xen/xenguest_arm64/Kconfig"
2368
2369 source "arch/arm/Kconfig.debug"
2370
2371 endmenu