1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
14 bool "Enable support for CRC32 instruction"
15 depends on ARM64 && CC_IS_GCC
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
70 depends on INIT_SP_RELATIVE
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
78 config SPL_SYS_NO_VECTOR_TABLE
82 config SPL_USE_SEPARATE_FAULT_HANDLERS
83 bool "Use separate fault handlers instead of a single common one"
84 depends on !SPL_SYS_NO_VECTOR_TABLE && !ARM64 && !CPU_V7M
86 Instead of a common fault handler, generate a separate one for
87 undefined_instruction, software_interrupt, prefetch_abort etc.
88 This is for debugging purposes, when you want to set breakpoints
91 config LINUX_KERNEL_IMAGE_HEADER
95 Place a Linux kernel image header at the start of the U-Boot binary.
96 The format of the header is described in the Linux kernel source at
97 Documentation/arm64/booting.txt. This feature is useful since the
98 image header reports the amount of memory (BSS and similar) that
99 U-Boot needs to use, but which isn't part of the binary.
101 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
102 depends on LINUX_KERNEL_IMAGE_HEADER
105 The value subtracted from CONFIG_TEXT_BASE to calculate the
106 TEXT_OFFSET value written to the Linux kernel image header.
118 ARM GICV3 Interrupt translation service (ITS).
119 Basic support for programming locality specific peripheral
120 interrupts (LPI) configuration tables and enable LPI tables.
121 LPI configuration table can be used by u-boot or Linux.
122 ARM GICV3 has limitation, once the LPI table is enabled, LPI
123 configuration table can not be re-programmed, unless GICV3 reset.
129 config DMA_ADDR_T_64BIT
139 config GPIO_EXTRA_HEADER
142 # Used for compatibility with asm files copied from the kernel
143 config ARM_ASM_UNIFIED
147 # Used for compatibility with asm files copied from the kernel
151 config SYS_ICACHE_OFF
152 bool "Do not enable icache"
154 Do not enable instruction cache in U-Boot.
156 config SPL_SYS_ICACHE_OFF
157 bool "Do not enable icache in SPL"
159 default SYS_ICACHE_OFF
161 Do not enable instruction cache in SPL.
163 config SYS_DCACHE_OFF
164 bool "Do not enable dcache"
166 Do not enable data cache in U-Boot.
168 config SPL_SYS_DCACHE_OFF
169 bool "Do not enable dcache in SPL"
171 default SYS_DCACHE_OFF
173 Do not enable data cache in SPL.
175 config SYS_ARM_CACHE_CP15
176 bool "CP15 based cache enabling support"
178 Select this if your processor suports enabling caches by using
182 bool "MMU-based Paged Memory Management Support"
183 select SYS_ARM_CACHE_CP15
185 Select if you want MMU-based virtualised addressing space
186 support via paged memory management.
189 bool 'Use the ARM v7 PMSA Compliant MPU'
191 Some ARM systems without an MMU have instead a Memory Protection
192 Unit (MPU) that defines the type and permissions for regions of
194 If your CPU has an MPU then you should choose 'y' here unless you
195 know that you do not want to use the MPU.
197 # If set, the workarounds for these ARM errata are applied early during U-Boot
198 # startup. Note that in general these options force the workarounds to be
199 # applied; no CPU-type/version detection exists, unlike the similar options in
200 # the Linux kernel. Do not set these options unless they apply! Also note that
201 # the following can be machine-specific errata. These do have ability to
202 # provide rudimentary version and machine-specific checks, but expect no
204 # CONFIG_ARM_ERRATA_430973
205 # CONFIG_ARM_ERRATA_454179
206 # CONFIG_ARM_ERRATA_621766
207 # CONFIG_ARM_ERRATA_798870
208 # CONFIG_ARM_ERRATA_801819
209 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
210 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
212 config ARM_ERRATA_430973
215 config ARM_ERRATA_454179
218 config ARM_ERRATA_621766
221 config ARM_ERRATA_716044
224 config ARM_ERRATA_725233
227 config ARM_ERRATA_742230
230 config ARM_ERRATA_743622
233 config ARM_ERRATA_751472
236 config ARM_ERRATA_761320
239 config ARM_ERRATA_773022
242 config ARM_ERRATA_774769
245 config ARM_ERRATA_794072
248 config ARM_ERRATA_798870
251 config ARM_ERRATA_801819
254 config ARM_ERRATA_826974
257 config ARM_ERRATA_828024
260 config ARM_ERRATA_829520
263 config ARM_ERRATA_833069
266 config ARM_ERRATA_833471
269 config ARM_ERRATA_845369
272 config ARM_ERRATA_852421
275 config ARM_ERRATA_852423
278 config ARM_ERRATA_855873
281 config ARM_CORTEX_A8_CVE_2017_5715
284 config ARM_CORTEX_A15_CVE_2017_5715
289 select SYS_CACHE_SHIFT_5
294 select SYS_CACHE_SHIFT_5
299 select SYS_CACHE_SHIFT_5
301 imply SPL_SEPARATE_BSS
305 select SYS_CACHE_SHIFT_5
310 select SYS_CACHE_SHIFT_5
312 imply SPL_SEPARATE_BSS
317 select SYS_CACHE_SHIFT_5
324 select SYS_CACHE_SHIFT_6
331 select SYS_CACHE_SHIFT_5
332 select SYS_THUMB_BUILD
338 select SYS_ARM_CACHE_CP15
340 select SYS_CACHE_SHIFT_6
343 default "arm720t" if CPU_ARM720T
344 default "arm920t" if CPU_ARM920T
345 default "arm926ejs" if CPU_ARM926EJS
346 default "arm946es" if CPU_ARM946ES
347 default "arm1136" if CPU_ARM1136
348 default "arm1176" if CPU_ARM1176
349 default "armv7" if CPU_V7A
350 default "armv7" if CPU_V7R
351 default "armv7m" if CPU_V7M
352 default "armv8" if ARM64
356 default 4 if CPU_ARM720T
357 default 4 if CPU_ARM920T
358 default 5 if CPU_ARM926EJS
359 default 5 if CPU_ARM946ES
360 default 6 if CPU_ARM1136
361 default 6 if CPU_ARM1176
368 prompt "Select the ARM data write cache policy"
369 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMNS || RZA1
370 default SYS_ARM_CACHE_WRITEBACK
372 config SYS_ARM_CACHE_WRITEBACK
373 bool "Write-back (WB)"
375 A write updates the cache only and marks the cache line as dirty.
376 External memory is updated only when the line is evicted or explicitly
379 config SYS_ARM_CACHE_WRITETHROUGH
380 bool "Write-through (WT)"
382 A write updates both the cache and the external memory system.
383 This does not mark the cache line as dirty.
385 config SYS_ARM_CACHE_WRITEALLOC
386 bool "Write allocation (WA)"
388 A cache line is allocated on a write miss. This means that executing a
389 store instruction on the processor might cause a burst read to occur.
390 There is a linefill to obtain the data for the cache line, before the
394 config ARCH_VERY_EARLY_INIT
397 config SPL_ARCH_VERY_EARLY_INIT
401 bool "Enable ARCH_CPU_INIT"
403 Some architectures require a call to arch_cpu_init().
404 Say Y here to enable it
406 config SYS_ARCH_TIMER
407 bool "ARM Generic Timer support"
408 depends on CPU_V7A || ARM64
411 The ARM Generic Timer (aka arch-timer) provides an architected
412 interface to a timer source on an SoC.
413 It is mandatory for ARMv8 implementation and widely available
417 bool "Support for ARM SMC Calling Convention (SMCCC)"
418 depends on CPU_V7A || ARM64
421 Say Y here if you want to enable ARM SMC Calling Convention.
422 This should be enabled if U-Boot needs to communicate with system
423 firmware (for example, PSCI) according to SMCCC.
425 config SYS_THUMB_BUILD
426 bool "Build U-Boot using the Thumb instruction set"
429 Use this flag to build U-Boot using the Thumb instruction set for
430 ARM architectures. Thumb instruction set provides better code
431 density. For ARM architectures that support Thumb2 this flag will
432 result in Thumb2 code generated by GCC.
434 config SPL_SYS_THUMB_BUILD
435 bool "Build SPL using the Thumb instruction set"
436 default y if SYS_THUMB_BUILD
437 depends on !ARM64 && SPL
439 Use this flag to build SPL using the Thumb instruction set for
440 ARM architectures. Thumb instruction set provides better code
441 density. For ARM architectures that support Thumb2 this flag will
442 result in Thumb2 code generated by GCC.
444 config TPL_SYS_THUMB_BUILD
445 bool "Build TPL using the Thumb instruction set"
446 default y if SYS_THUMB_BUILD
447 depends on TPL && !ARM64
449 Use this flag to build TPL using the Thumb instruction set for
450 ARM architectures. Thumb instruction set provides better code
451 density. For ARM architectures that support Thumb2 this flag will
452 result in Thumb2 code generated by GCC.
455 bool "ARM PL310 L2 cache controller"
457 Enable support for ARM PL310 L2 cache controller in U-Boot
459 config SPL_SYS_L2_PL310
460 bool "ARM PL310 L2 cache controller in SPL"
462 Enable support for ARM PL310 L2 cache controller in SPL
464 config SYS_L2CACHE_OFF
467 If SoC does not support L2CACHE or one does not want to enable
468 L2CACHE, choose this option.
470 config ENABLE_ARM_SOC_BOOT0_HOOK
471 bool "prepare BOOT0 header"
473 If the SoC's BOOT0 requires a header area filled with (magic)
474 values, then choose this option, and create a file included as
475 <asm/arch/boot0.h> which contains the required assembler code.
477 config USE_ARCH_MEMCPY
478 bool "Use an assembly optimized implementation of memcpy"
480 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
482 Enable the generation of an optimized version of memcpy.
483 Such an implementation may be faster under some conditions
484 but may increase the binary size.
486 config SPL_USE_ARCH_MEMCPY
487 bool "Use an assembly optimized implementation of memcpy for SPL"
488 default y if USE_ARCH_MEMCPY
491 Enable the generation of an optimized version of memcpy.
492 Such an implementation may be faster under some conditions
493 but may increase the binary size.
495 config TPL_USE_ARCH_MEMCPY
496 bool "Use an assembly optimized implementation of memcpy for TPL"
497 default y if USE_ARCH_MEMCPY
500 Enable the generation of an optimized version of memcpy.
501 Such an implementation may be faster under some conditions
502 but may increase the binary size.
504 config USE_ARCH_MEMMOVE
505 bool "Use an assembly optimized implementation of memmove" if !ARM64
506 default USE_ARCH_MEMCPY if ARM64
509 Enable the generation of an optimized version of memmove.
510 Such an implementation may be faster under some conditions
511 but may increase the binary size.
513 config SPL_USE_ARCH_MEMMOVE
514 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
515 default SPL_USE_ARCH_MEMCPY if ARM64
516 depends on SPL && ARM64
518 Enable the generation of an optimized version of memmove.
519 Such an implementation may be faster under some conditions
520 but may increase the binary size.
522 config TPL_USE_ARCH_MEMMOVE
523 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
524 default TPL_USE_ARCH_MEMCPY if ARM64
525 depends on TPL && ARM64
527 Enable the generation of an optimized version of memmove.
528 Such an implementation may be faster under some conditions
529 but may increase the binary size.
531 config USE_ARCH_MEMSET
532 bool "Use an assembly optimized implementation of memset"
534 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
536 Enable the generation of an optimized version of memset.
537 Such an implementation may be faster under some conditions
538 but may increase the binary size.
540 config SPL_USE_ARCH_MEMSET
541 bool "Use an assembly optimized implementation of memset for SPL"
542 default y if USE_ARCH_MEMSET
545 Enable the generation of an optimized version of memset.
546 Such an implementation may be faster under some conditions
547 but may increase the binary size.
549 config TPL_USE_ARCH_MEMSET
550 bool "Use an assembly optimized implementation of memset for TPL"
551 default y if USE_ARCH_MEMSET
554 Enable the generation of an optimized version of memset.
555 Such an implementation may be faster under some conditions
556 but may increase the binary size.
558 config ARM64_SUPPORT_AARCH32
559 bool "ARM64 system support AArch32 execution state"
561 default y if !TARGET_THUNDERX_88XX
563 This ARM64 system supports AArch32 execution state.
569 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
572 prompt "Target select"
577 select GPIO_EXTRA_HEADER
578 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
579 select SPL_SEPARATE_BSS if SPL
580 imply SYS_THUMB_BUILD
585 select GPIO_EXTRA_HEADER
586 select SPL_DM_SPI if SPL
589 Support for TI's DaVinci platform.
592 bool "Hisilicon HiSTB SoCs"
599 Support for HiSTB SoCs.
602 bool "Marvell Kirkwood"
603 select ARCH_MISC_INIT
604 select BOARD_EARLY_INIT_F
606 select GPIO_EXTRA_HEADER
610 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
611 select ARCH_EARLY_INIT_R if ARM64
616 select GPIO_EXTRA_HEADER
618 select SPL_DM_SPI if SPL
619 select SPL_DM_SPI_FLASH if SPL
620 select SPL_TIMER if SPL
621 select TIMER if !ARM64
630 select GPIO_EXTRA_HEADER
631 select SPL_SEPARATE_BSS if SPL
634 config TARGET_STV0991
635 bool "Support stv0991"
641 select GPIO_EXTRA_HEADER
649 bool "Broadcom BCM283X family"
653 select GPIO_EXTRA_HEADER
656 select SERIAL_SEARCH_ALL
661 bool "Broadcom BCM7XXX family"
664 select GPIO_EXTRA_HEADER
667 imply OF_HAS_PRIOR_STAGE
669 This enables support for Broadcom ARM-based set-top box
670 chipsets, including the 7445 family of chips.
673 bool "Broadcom broadband chip family"
678 config TARGET_VEXPRESS_CA9X4
679 bool "Support vexpress_ca9x4"
684 bool "Support Broadcom Northstar"
692 select ARM_GLOBAL_TIMER
693 imply SYS_THUMB_BUILD
696 imply NAND_BRCMNAND_IPROC
698 Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit
699 ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094,
703 bool "Support Broadcom Northstar2"
705 select GPIO_EXTRA_HEADER
707 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
708 ARMv8 Cortex-A57 processors targeting a broad range of networking
712 bool "Support Broadcom NS3"
714 select BOARD_LATE_INIT
716 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
717 ARMv8 Cortex-A72 processors targeting a broad range of networking
721 bool "Samsung EXYNOS"
731 select GPIO_EXTRA_HEADER
732 imply SYS_THUMB_BUILD
737 bool "Samsung S5PC1XX"
743 select GPIO_EXTRA_HEADER
747 bool "Calxeda Highbank"
759 imply OF_HAS_PRIOR_STAGE
761 config ARCH_INTEGRATOR
762 bool "ARM Ltd. Integrator family"
765 select GPIO_EXTRA_HEADER
770 bool "Qualcomm IPQ40xx SoCs"
776 select GPIO_EXTRA_HEADER
782 select CLK_QCOM_IPQ4019
783 select PINCTRL_QCOM_IPQ4019
792 select SYS_ARCH_TIMER
793 select SYS_THUMB_BUILD
799 bool "Texas Instruments' K3 Architecture"
804 select FIT_SIGNATURE if ARM64
805 imply TI_SECURE_DEVICE
807 config ARCH_OMAP2PLUS
810 select GPIO_EXTRA_HEADER
811 select SPL_BOARD_INIT if SPL
812 select SPL_STACK_R if SPL
814 imply TI_SYSC if DM && OF_CONTROL
816 imply SPL_SEPARATE_BSS
820 select GPIO_EXTRA_HEADER
821 imply DISTRO_DEFAULTS
824 Support for the Meson SoC family developed by Amlogic Inc.,
825 targeted at media players and tablet computers. We currently
826 support the S905 (GXBaby) 64-bit SoC.
831 select GPIO_EXTRA_HEADER
834 select SPL_LIBCOMMON_SUPPORT if SPL
835 select SPL_LIBGENERIC_SUPPORT if SPL
836 select SPL_OF_CONTROL if SPL
839 Support for the MediaTek SoCs family developed by MediaTek Inc.
840 Please refer to doc/README.mediatek for more information.
843 bool "NXP LPC32xx platform"
848 select GPIO_EXTRA_HEADER
854 bool "NXP i.MX8 platform"
856 select SYS_FSL_HAS_SEC
857 select SYS_FSL_SEC_COMPAT_4
858 select SYS_FSL_SEC_LE
861 select GPIO_EXTRA_HEADER
864 select ENABLE_ARM_SOC_BOOT0_HOOK
867 bool "NXP i.MX8M platform"
869 select GPIO_EXTRA_HEADER
871 select SYS_FSL_HAS_SEC
872 select SYS_FSL_SEC_COMPAT_4
873 select SYS_FSL_SEC_LE
876 select DM_EVENT if CLK
881 bool "NXP i.MX8ULP platform"
888 select GPIO_EXTRA_HEADER
894 bool "NXP i.MX9 platform"
900 select GPIO_EXTRA_HEADER
906 bool "NXP i.MXRT platform"
910 select GPIO_EXTRA_HEADER
916 bool "NXP i.MX23 family"
918 select GPIO_EXTRA_HEADER
923 bool "NXP i.MX28 family"
925 select GPIO_EXTRA_HEADER
930 bool "NXP i.MX31 family"
932 select GPIO_EXTRA_HEADER
937 select BOARD_POSTCLK_INIT
939 select GPIO_EXTRA_HEADER
941 select SYS_FSL_HAS_SEC
942 select SYS_FSL_SEC_COMPAT_4
943 select SYS_FSL_SEC_LE
944 select ROM_UNIFIED_SECTIONS
946 imply SYS_THUMB_BUILD
950 select ARCH_MISC_INIT
952 select GPIO_EXTRA_HEADER
955 select SYS_FSL_HAS_SEC
956 select SYS_FSL_SEC_COMPAT_4
957 select SYS_FSL_SEC_LE
958 imply BOARD_EARLY_INIT_F
960 imply SYS_THUMB_BUILD
964 select BOARD_POSTCLK_INIT
966 select GPIO_EXTRA_HEADER
969 select SYS_FSL_HAS_SEC
970 select SYS_FSL_SEC_COMPAT_4
971 select SYS_FSL_SEC_LE
972 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
974 imply SYS_THUMB_BUILD
975 imply SPL_SEPARATE_BSS
979 select BOARD_EARLY_INIT_F
981 select GPIO_EXTRA_HEADER
986 bool "Nexell S5P4418/S5P6818 SoC"
987 select ENABLE_ARM_SOC_BOOT0_HOOK
989 select GPIO_EXTRA_HEADER
992 bool "Support Nuvoton SoCs"
1013 select LINUX_KERNEL_IMAGE_HEADER
1015 select OF_BOARD_SETUP
1020 select POSITION_INDEPENDENT
1026 select SYSRESET_WATCHDOG
1027 select SYSRESET_WATCHDOG_AUTO
1031 imply DISTRO_DEFAULTS
1032 imply OF_HAS_PRIOR_STAGE
1035 bool "Actions Semi OWL SoCs"
1038 select GPIO_EXTRA_HEADER
1043 select SYS_RELOC_GD_ENV_ADDR
1047 bool "QEMU Virtual Platform"
1056 imply OF_HAS_PRIOR_STAGE
1059 imply SYS_WHITE_ON_BLACK
1060 imply SYS_CONSOLE_IS_IN_ENV
1061 imply PRE_CONSOLE_BUFFER
1069 bool "Renesas ARM SoCs"
1072 select GPIO_EXTRA_HEADER
1073 imply BOARD_EARLY_INIT_F
1076 imply SYS_THUMB_BUILD
1077 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1079 config ARCH_SNAPDRAGON
1080 bool "Qualcomm Snapdragon SoCs"
1086 select GPIO_EXTRA_HEADER
1095 bool "Altera SOCFPGA family"
1096 select ARCH_EARLY_INIT_R
1097 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1098 select ARM64 if TARGET_SOCFPGA_SOC64
1099 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1103 select GPIO_EXTRA_HEADER
1104 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1106 select SPL_DM_RESET if DM_RESET
1107 select SPL_DM_SERIAL
1108 select SPL_LIBCOMMON_SUPPORT
1109 select SPL_LIBGENERIC_SUPPORT
1110 select SPL_OF_CONTROL
1111 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1117 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1119 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1120 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1131 imply SPL_DM_SPI_FLASH
1132 imply SPL_LIBDISK_SUPPORT
1134 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1135 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1136 imply SPL_SPI_FLASH_SUPPORT
1141 bool "Support sunxi (Allwinner) SoCs"
1144 select CMD_MMC if MMC
1145 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1149 select DM_I2C if I2C
1150 select DM_SPI if SPI
1151 select DM_SPI_FLASH if SPI && MTD
1153 select DM_MMC if MMC
1155 select OF_BOARD_SETUP
1159 select SPECIFY_CONSOLE_INDEX
1160 select SPL_SEPARATE_BSS if SPL
1161 select SPL_STACK_R if SPL
1162 select SPL_SYS_MALLOC_SIMPLE if SPL
1163 select SPL_SYS_THUMB_BUILD if !ARM64
1166 select SYS_THUMB_BUILD if !ARM64
1167 select USB if DISTRO_DEFAULTS
1168 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1169 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1170 select SPL_USE_TINY_PRINTF
1172 select SYS_RELOC_GD_ENV_ADDR
1173 imply BOARD_LATE_INIT
1176 imply CMD_UBI if MTD_RAW_NAND
1177 imply DISTRO_DEFAULTS
1179 imply DM_REGULATOR_FIXED
1182 imply OF_LIBFDT_OVERLAY
1183 imply PRE_CONSOLE_BUFFER
1185 imply SPL_LIBCOMMON_SUPPORT
1186 imply SPL_LIBGENERIC_SUPPORT
1187 imply SPL_MMC if MMC
1191 imply SYSRESET_WATCHDOG
1192 imply SYSRESET_WATCHDOG_AUTO
1197 bool "ST-Ericsson U8500 Series"
1201 select DM_MMC if MMC
1203 select DM_USB_GADGET if DM_USB
1207 imply AB8500_USB_PHY
1208 imply ARM_PL180_MMCI
1213 imply NOMADIK_MTU_TIMER
1218 imply SYS_THUMB_BUILD
1219 imply SYSRESET_SYSCON
1222 bool "Support Xilinx Versal Platform"
1226 select DM_MMC if MMC
1231 imply BOARD_LATE_INIT
1232 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1234 config ARCH_VERSAL_NET
1235 bool "Support Xilinx Versal NET Platform"
1239 select DM_MMC if MMC
1242 imply BOARD_LATE_INIT
1243 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1246 bool "Freescale Vybrid"
1248 select GPIO_EXTRA_HEADER
1249 select IOMUX_SHARE_CONF_REG
1251 select SYS_FSL_ERRATUM_ESDHC111
1256 bool "Xilinx Zynq based platform"
1257 select ARM_TWD_TIMER
1258 select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA)
1262 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1264 select DM_MMC if MMC
1271 select SPL_BOARD_INIT if SPL
1272 select SPL_CLK if SPL
1273 select SPL_DM if SPL
1274 select SPL_DM_SPI if SPL
1275 select SPL_DM_SPI_FLASH if SPL
1276 select SPL_OF_CONTROL if SPL
1277 select SPL_SEPARATE_BSS if SPL
1278 select SPL_TIMER if SPL
1281 imply BOARD_LATE_INIT
1285 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1288 config ARCH_ZYNQMP_R5
1289 bool "Xilinx ZynqMP R5 based platform"
1293 select DM_MMC if MMC
1300 bool "Xilinx ZynqMP based platform"
1304 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1306 select DM_MMC if MMC
1309 select DM_SPI if SPI
1310 select DM_SPI_FLASH if DM_SPI
1314 select SPL_BOARD_INIT if SPL
1315 select SPL_CLK if SPL
1316 select SPL_DM if SPL
1317 select SPL_DM_SPI if SPI && SPL_DM
1318 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1319 select SPL_DM_MAILBOX if SPL
1320 imply SPL_FIRMWARE if SPL
1321 select SPL_SEPARATE_BSS if SPL
1323 imply ZYNQMP_IPI if DM_MAILBOX
1325 imply BOARD_LATE_INIT
1327 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1331 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1335 select GPIO_EXTRA_HEADER
1336 imply DISTRO_DEFAULTS
1338 imply SPL_TIMER if SPL
1340 config ARCH_VEXPRESS64
1341 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1349 select MTD_NOR_FLASH if MTD
1350 select FLASH_CFI_DRIVER if MTD
1351 select ENV_IS_IN_FLASH if MTD
1352 imply DISTRO_DEFAULTS
1354 config TARGET_CORSTONE1000
1355 bool "Support Corstone1000 Platform"
1360 config TARGET_TOTAL_COMPUTE
1361 bool "Support Total Compute Platform"
1369 config TARGET_LS2080A_EMU
1370 bool "Support ls2080a_emu"
1373 select ARMV8_MULTIENTRY
1374 select FSL_DDR_SYNC_REFRESH
1375 select GPIO_EXTRA_HEADER
1377 Support for Freescale LS2080A_EMU platform.
1378 The LS2080A Development System (EMULATOR) is a pre-silicon
1379 development platform that supports the QorIQ LS2080A
1380 Layerscape Architecture processor.
1382 config TARGET_LS1088AQDS
1383 bool "Support ls1088aqds"
1386 select ARMV8_MULTIENTRY
1387 select ARCH_SUPPORT_TFABOOT
1388 select BOARD_LATE_INIT
1389 select GPIO_EXTRA_HEADER
1391 select FSL_DDR_INTERACTIVE if !SD_BOOT
1393 Support for NXP LS1088AQDS platform.
1394 The LS1088A Development System (QDS) is a high-performance
1395 development platform that supports the QorIQ LS1088A
1396 Layerscape Architecture processor.
1398 config TARGET_LS2080AQDS
1399 bool "Support ls2080aqds"
1402 select ARMV8_MULTIENTRY
1403 select ARCH_SUPPORT_TFABOOT
1404 select BOARD_LATE_INIT
1405 select GPIO_EXTRA_HEADER
1410 select FSL_DDR_INTERACTIVE if !SPL
1412 Support for Freescale LS2080AQDS platform.
1413 The LS2080A Development System (QDS) is a high-performance
1414 development platform that supports the QorIQ LS2080A
1415 Layerscape Architecture processor.
1417 config TARGET_LS2080ARDB
1418 bool "Support ls2080ardb"
1421 select ARMV8_MULTIENTRY
1422 select ARCH_SUPPORT_TFABOOT
1423 select BOARD_LATE_INIT
1426 select FSL_DDR_INTERACTIVE if !SPL
1427 select GPIO_EXTRA_HEADER
1431 Support for Freescale LS2080ARDB platform.
1432 The LS2080A Reference design board (RDB) is a high-performance
1433 development platform that supports the QorIQ LS2080A
1434 Layerscape Architecture processor.
1436 config TARGET_LS2081ARDB
1437 bool "Support ls2081ardb"
1440 select ARMV8_MULTIENTRY
1441 select BOARD_LATE_INIT
1442 select GPIO_EXTRA_HEADER
1445 Support for Freescale LS2081ARDB platform.
1446 The LS2081A Reference design board (RDB) is a high-performance
1447 development platform that supports the QorIQ LS2081A/LS2041A
1448 Layerscape Architecture processor.
1450 config TARGET_LX2160ARDB
1451 bool "Support lx2160ardb"
1454 select ARMV8_MULTIENTRY
1455 select ARCH_SUPPORT_TFABOOT
1456 select BOARD_LATE_INIT
1457 select GPIO_EXTRA_HEADER
1459 Support for NXP LX2160ARDB platform.
1460 The lx2160ardb (LX2160A Reference design board (RDB)
1461 is a high-performance development platform that supports the
1462 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1464 config TARGET_LX2160AQDS
1465 bool "Support lx2160aqds"
1468 select ARMV8_MULTIENTRY
1469 select ARCH_SUPPORT_TFABOOT
1470 select BOARD_LATE_INIT
1471 select GPIO_EXTRA_HEADER
1473 Support for NXP LX2160AQDS platform.
1474 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1475 is a high-performance development platform that supports the
1476 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1478 config TARGET_LX2162AQDS
1479 bool "Support lx2162aqds"
1481 select ARCH_MISC_INIT
1483 select ARMV8_MULTIENTRY
1484 select ARCH_SUPPORT_TFABOOT
1485 select BOARD_LATE_INIT
1486 select GPIO_EXTRA_HEADER
1488 Support for NXP LX2162AQDS platform.
1489 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1492 bool "Support HiKey 96boards Consumer Edition Platform"
1497 select GPIO_EXTRA_HEADER
1500 select SPECIFY_CONSOLE_INDEX
1503 Support for HiKey 96boards platform. It features a HI6220
1504 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1506 config TARGET_HIKEY960
1507 bool "Support HiKey960 96boards Consumer Edition Platform"
1511 select GPIO_EXTRA_HEADER
1516 Support for HiKey960 96boards platform. It features a HI3660
1517 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1519 config TARGET_POPLAR
1520 bool "Support Poplar 96boards Enterprise Edition Platform"
1524 select GPIO_EXTRA_HEADER
1529 Support for Poplar 96boards EE platform. It features a HI3798cv200
1530 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1531 making it capable of running any commercial set-top solution based on
1534 config TARGET_LS1012AQDS
1535 bool "Support ls1012aqds"
1538 select ARCH_SUPPORT_TFABOOT
1539 select BOARD_LATE_INIT
1540 select GPIO_EXTRA_HEADER
1542 Support for Freescale LS1012AQDS platform.
1543 The LS1012A Development System (QDS) is a high-performance
1544 development platform that supports the QorIQ LS1012A
1545 Layerscape Architecture processor.
1547 config TARGET_LS1012ARDB
1548 bool "Support ls1012ardb"
1551 select ARCH_SUPPORT_TFABOOT
1552 select BOARD_LATE_INIT
1553 select GPIO_EXTRA_HEADER
1557 Support for Freescale LS1012ARDB platform.
1558 The LS1012A Reference design board (RDB) is a high-performance
1559 development platform that supports the QorIQ LS1012A
1560 Layerscape Architecture processor.
1562 config TARGET_LS1012A2G5RDB
1563 bool "Support ls1012a2g5rdb"
1566 select ARCH_SUPPORT_TFABOOT
1567 select BOARD_LATE_INIT
1568 select GPIO_EXTRA_HEADER
1571 Support for Freescale LS1012A2G5RDB platform.
1572 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1573 development platform that supports the QorIQ LS1012A
1574 Layerscape Architecture processor.
1576 config TARGET_LS1012AFRWY
1577 bool "Support ls1012afrwy"
1580 select ARCH_SUPPORT_TFABOOT
1581 select BOARD_LATE_INIT
1582 select GPIO_EXTRA_HEADER
1586 Support for Freescale LS1012AFRWY platform.
1587 The LS1012A FRWY board (FRWY) is a high-performance
1588 development platform that supports the QorIQ LS1012A
1589 Layerscape Architecture processor.
1591 config TARGET_LS1012AFRDM
1592 bool "Support ls1012afrdm"
1595 select ARCH_SUPPORT_TFABOOT
1596 select GPIO_EXTRA_HEADER
1598 Support for Freescale LS1012AFRDM platform.
1599 The LS1012A Freedom board (FRDM) is a high-performance
1600 development platform that supports the QorIQ LS1012A
1601 Layerscape Architecture processor.
1603 config TARGET_LS1028AQDS
1604 bool "Support ls1028aqds"
1607 select ARMV8_MULTIENTRY
1608 select ARCH_SUPPORT_TFABOOT
1609 select BOARD_LATE_INIT
1610 select GPIO_EXTRA_HEADER
1612 Support for Freescale LS1028AQDS platform
1613 The LS1028A Development System (QDS) is a high-performance
1614 development platform that supports the QorIQ LS1028A
1615 Layerscape Architecture processor.
1617 config TARGET_LS1028ARDB
1618 bool "Support ls1028ardb"
1621 select ARMV8_MULTIENTRY
1622 select ARCH_SUPPORT_TFABOOT
1623 select BOARD_LATE_INIT
1624 select GPIO_EXTRA_HEADER
1626 Support for Freescale LS1028ARDB platform
1627 The LS1028A Development System (RDB) is a high-performance
1628 development platform that supports the QorIQ LS1028A
1629 Layerscape Architecture processor.
1631 config TARGET_LS1088ARDB
1632 bool "Support ls1088ardb"
1635 select ARMV8_MULTIENTRY
1636 select ARCH_SUPPORT_TFABOOT
1637 select BOARD_LATE_INIT
1639 select FSL_DDR_INTERACTIVE if !SD_BOOT
1640 select GPIO_EXTRA_HEADER
1642 Support for NXP LS1088ARDB platform.
1643 The LS1088A Reference design board (RDB) is a high-performance
1644 development platform that supports the QorIQ LS1088A
1645 Layerscape Architecture processor.
1647 config TARGET_LS1021AQDS
1648 bool "Support ls1021aqds"
1650 select ARCH_SUPPORT_PSCI
1651 select BOARD_EARLY_INIT_F
1652 select BOARD_LATE_INIT
1654 select CPU_V7_HAS_NONSEC
1655 select CPU_V7_HAS_VIRT
1656 select LS1_DEEP_SLEEP
1657 select PEN_ADDR_BIG_ENDIAN
1660 select FSL_DDR_INTERACTIVE
1661 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1662 select GPIO_EXTRA_HEADER
1663 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1666 config TARGET_LS1021ATWR
1667 bool "Support ls1021atwr"
1669 select ARCH_SUPPORT_PSCI
1670 select BOARD_EARLY_INIT_F
1671 select BOARD_LATE_INIT
1673 select CPU_V7_HAS_NONSEC
1674 select CPU_V7_HAS_VIRT
1675 select LS1_DEEP_SLEEP
1676 select PEN_ADDR_BIG_ENDIAN
1678 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1679 select GPIO_EXTRA_HEADER
1682 config TARGET_PG_WCOM_SELI8
1683 bool "Support Hitachi-Powergrids SELI8 service unit card"
1685 select ARCH_SUPPORT_PSCI
1686 select BOARD_EARLY_INIT_F
1687 select BOARD_LATE_INIT
1689 select CPU_V7_HAS_NONSEC
1690 select CPU_V7_HAS_VIRT
1692 select FSL_DDR_INTERACTIVE
1693 select GPIO_EXTRA_HEADER
1697 Support for Hitachi-Powergrids SELI8 service unit card.
1698 SELI8 is a QorIQ LS1021a based service unit card used
1699 in XMC20 and FOX615 product families.
1701 config TARGET_PG_WCOM_EXPU1
1702 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1704 select ARCH_SUPPORT_PSCI
1705 select BOARD_EARLY_INIT_F
1706 select BOARD_LATE_INIT
1708 select CPU_V7_HAS_NONSEC
1709 select CPU_V7_HAS_VIRT
1711 select FSL_DDR_INTERACTIVE
1715 Support for Hitachi-Powergrids EXPU1 service unit card.
1716 EXPU1 is a QorIQ LS1021a based service unit card used
1717 in XMC20 and FOX615 product families.
1719 config TARGET_LS1021ATSN
1720 bool "Support ls1021atsn"
1722 select ARCH_SUPPORT_PSCI
1723 select BOARD_EARLY_INIT_F
1724 select BOARD_LATE_INIT
1726 select CPU_V7_HAS_NONSEC
1727 select CPU_V7_HAS_VIRT
1728 select LS1_DEEP_SLEEP
1730 select GPIO_EXTRA_HEADER
1733 config TARGET_LS1021AIOT
1734 bool "Support ls1021aiot"
1736 select ARCH_SUPPORT_PSCI
1737 select BOARD_LATE_INIT
1739 select CPU_V7_HAS_NONSEC
1740 select CPU_V7_HAS_VIRT
1741 select PEN_ADDR_BIG_ENDIAN
1743 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1744 select GPIO_EXTRA_HEADER
1747 Support for Freescale LS1021AIOT platform.
1748 The LS1021A Freescale board (IOT) is a high-performance
1749 development platform that supports the QorIQ LS1021A
1750 Layerscape Architecture processor.
1752 config TARGET_LS1043AQDS
1753 bool "Support ls1043aqds"
1756 select ARMV8_MULTIENTRY
1757 select ARCH_SUPPORT_TFABOOT
1758 select BOARD_EARLY_INIT_F
1759 select BOARD_LATE_INIT
1761 select FSL_DDR_INTERACTIVE if !SPL
1762 select FSL_DSPI if !SPL_NO_DSPI
1763 select DM_SPI_FLASH if FSL_DSPI
1764 select GPIO_EXTRA_HEADER
1768 Support for Freescale LS1043AQDS platform.
1770 config TARGET_LS1043ARDB
1771 bool "Support ls1043ardb"
1774 select ARMV8_MULTIENTRY
1775 select ARCH_SUPPORT_TFABOOT
1776 select BOARD_EARLY_INIT_F
1777 select BOARD_LATE_INIT
1779 select FSL_DSPI if !SPL_NO_DSPI
1780 select DM_SPI_FLASH if FSL_DSPI
1781 select GPIO_EXTRA_HEADER
1783 Support for Freescale LS1043ARDB platform.
1785 config TARGET_LS1046AQDS
1786 bool "Support ls1046aqds"
1789 select ARMV8_MULTIENTRY
1790 select ARCH_SUPPORT_TFABOOT
1791 select BOARD_EARLY_INIT_F
1792 select BOARD_LATE_INIT
1793 select DM_SPI_FLASH if DM_SPI
1795 select FSL_DDR_BIST if !SPL
1796 select FSL_DDR_INTERACTIVE if !SPL
1797 select FSL_DDR_INTERACTIVE if !SPL
1798 select GPIO_EXTRA_HEADER
1801 Support for Freescale LS1046AQDS platform.
1802 The LS1046A Development System (QDS) is a high-performance
1803 development platform that supports the QorIQ LS1046A
1804 Layerscape Architecture processor.
1806 config TARGET_LS1046ARDB
1807 bool "Support ls1046ardb"
1810 select ARMV8_MULTIENTRY
1811 select ARCH_SUPPORT_TFABOOT
1812 select BOARD_EARLY_INIT_F
1813 select BOARD_LATE_INIT
1814 select DM_SPI_FLASH if DM_SPI
1815 select POWER_MC34VR500
1818 select FSL_DDR_INTERACTIVE if !SPL
1819 select GPIO_EXTRA_HEADER
1822 Support for Freescale LS1046ARDB platform.
1823 The LS1046A Reference Design Board (RDB) is a high-performance
1824 development platform that supports the QorIQ LS1046A
1825 Layerscape Architecture processor.
1827 config TARGET_LS1046AFRWY
1828 bool "Support ls1046afrwy"
1831 select ARMV8_MULTIENTRY
1832 select ARCH_SUPPORT_TFABOOT
1833 select BOARD_EARLY_INIT_F
1834 select BOARD_LATE_INIT
1835 select DM_SPI_FLASH if DM_SPI
1836 select GPIO_EXTRA_HEADER
1839 Support for Freescale LS1046AFRWY platform.
1840 The LS1046A Freeway Board (FRWY) is a high-performance
1841 development platform that supports the QorIQ LS1046A
1842 Layerscape Architecture processor.
1848 select ARMV8_MULTIENTRY
1864 select GPIO_EXTRA_HEADER
1865 select SPL_DM if SPL
1866 select SPL_DM_SPI if SPL
1867 select SPL_DM_SPI_FLASH if SPL
1868 select SPL_DM_I2C if SPL
1869 select SPL_DM_MMC if SPL
1870 select SPL_DM_SERIAL if SPL
1872 Support for Kontron SMARC-sAL28 board.
1875 bool "Support ten64"
1877 select ARCH_MISC_INIT
1879 select ARMV8_MULTIENTRY
1880 select ARCH_SUPPORT_TFABOOT
1881 select BOARD_LATE_INIT
1883 select FSL_DDR_INTERACTIVE if !SD_BOOT
1884 select GPIO_EXTRA_HEADER
1886 Support for Traverse Technologies Ten64 board, based
1889 config ARCH_UNIPHIER
1890 bool "Socionext UniPhier SoCs"
1891 select BOARD_LATE_INIT
1899 select OF_BOARD_SETUP
1903 select SPL_BOARD_INIT if SPL
1904 select SPL_DM if SPL
1905 select SPL_LIBCOMMON_SUPPORT if SPL
1906 select SPL_LIBGENERIC_SUPPORT if SPL
1907 select SPL_OF_CONTROL if SPL
1908 select SPL_PINCTRL if SPL
1911 imply DISTRO_DEFAULTS
1914 Support for UniPhier SoC family developed by Socionext Inc.
1915 (formerly, System LSI Business Division of Panasonic Corporation)
1917 config ARCH_SYNQUACER
1918 bool "Socionext SynQuacer SoCs"
1924 select SYSRESET_PSCI
1927 Support for SynQuacer SoC family developed by Socionext Inc.
1928 This SoC is used on 96boards EE DeveloperBox.
1931 bool "Support STMicroelectronics STM32 MCU with cortex M"
1938 bool "Support STMicroelectronics SoCs"
1947 Support for STMicroelectronics STiH407/10 SoC family.
1948 This SoC is used on Linaro 96Board STiH410-B2260
1951 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1952 select ARCH_MISC_INIT
1953 select ARCH_SUPPORT_TFABOOT
1954 select BOARD_LATE_INIT
1963 select OF_SYSTEM_SETUP
1968 select SYS_THUMB_BUILD if !ARM64
1972 imply OF_LIBFDT_OVERLAY
1973 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1977 Support for STM32MP SoC family developed by STMicroelectronics,
1978 MPUs based on ARM cortex A core
1979 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1980 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1982 SPL is the unsecure FSBL for the basic boot chain.
1984 config ARCH_ROCKCHIP
1985 bool "Support Rockchip SoCs"
1987 select BINMAN if SPL_OPTEE || SPL
1997 select DM_USB_GADGET if USB_DWC3_GADGET
1998 select ENABLE_ARM_SOC_BOOT0_HOOK
2002 select SPL_DM if SPL
2003 select SPL_DM_SPI if SPL
2004 select SPL_DM_SPI_FLASH if SPL
2006 select SYS_THUMB_BUILD if !ARM64
2009 imply DEBUG_UART_BOARD_INIT
2010 imply BOOTSTD_DEFAULTS
2012 imply SARADC_ROCKCHIP
2014 imply SPL_SYS_MALLOC_SIMPLE
2017 imply USB_FUNCTION_FASTBOOT
2019 config ARCH_OCTEONTX
2020 bool "Support OcteonTX SoCs"
2023 select GPIO_EXTRA_HEADER
2027 select BOARD_LATE_INIT
2028 select SYS_CACHE_SHIFT_7
2029 select SYS_PCI_64BIT if PCI
2030 imply OF_HAS_PRIOR_STAGE
2032 config ARCH_OCTEONTX2
2033 bool "Support OcteonTX2 SoCs"
2036 select GPIO_EXTRA_HEADER
2040 select BOARD_LATE_INIT
2041 select SYS_CACHE_SHIFT_7
2042 select SYS_PCI_64BIT if PCI
2043 imply OF_HAS_PRIOR_STAGE
2045 config TARGET_THUNDERX_88XX
2046 bool "Support ThunderX 88xx"
2048 select GPIO_EXTRA_HEADER
2051 select SYS_CACHE_SHIFT_7
2054 bool "Support Aspeed SoCs"
2059 config TARGET_DURIAN
2060 bool "Support Phytium Durian Platform"
2062 select GPIO_EXTRA_HEADER
2064 Support for durian platform.
2065 It has 2GB Sdram, uart and pcie.
2067 config TARGET_POMELO
2068 bool "Support Phytium Pomelo Platform"
2081 Support for pomelo platform.
2082 It has 8GB Sdram, uart and pcie.
2084 config TARGET_PE2201
2085 bool "Support Phytium PE2201 Platform"
2088 Support for pe2201 platform.It has 2GB Sdram, uart and pcie.
2090 config TARGET_PRESIDIO_ASIC
2091 bool "Support Cortina Presidio ASIC Platform"
2095 config TARGET_XENGUEST_ARM64
2096 bool "Xen guest ARM64"
2100 select LINUX_KERNEL_IMAGE_HEADER
2102 imply OF_HAS_PRIOR_STAGE
2105 bool "Support HPE GXP SoCs"
2112 config SUPPORT_PASSING_ATAGS
2113 bool "Support pre-devicetree ATAG-based booting"
2115 imply SETUP_MEMORY_TAGS
2117 Support for booting older Linux kernels, using ATAGs rather than
2118 passing a devicetree. This is option is rarely used, and the
2119 semantics are defined at
2120 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2122 config SETUP_MEMORY_TAGS
2123 bool "Pass memory size information via ATAG"
2124 depends on SUPPORT_PASSING_ATAGS
2127 bool "Pass Linux kernel cmdline via ATAG"
2128 depends on SUPPORT_PASSING_ATAGS
2131 bool "Pass initrd starting point and size via ATAG"
2132 depends on SUPPORT_PASSING_ATAGS
2135 bool "Pass system revision via ATAG"
2136 depends on SUPPORT_PASSING_ATAGS
2139 bool "Pass system serial number via ATAG"
2140 depends on SUPPORT_PASSING_ATAGS
2142 config STATIC_MACH_TYPE
2143 bool "Statically define the Machine ID number"
2144 default y if TARGET_DS109 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2146 When booting via ATAGs, enable this option if we know the correct
2147 machine ID number to use at compile time. Some systems will be
2148 passed the number dynamically by whatever loads U-Boot.
2151 int "Machine ID number"
2152 depends on STATIC_MACH_TYPE
2153 default 527 if TARGET_DS109
2154 default 3036 if TARGET_DS414
2155 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2157 When booting via ATAGs, the machine type must be passed as a number.
2158 For the full list see https://www.arm.linux.org.uk/developer/machines
2160 config ARCH_SUPPORT_TFABOOT
2164 bool "Support for booting from TF-A"
2165 depends on ARCH_SUPPORT_TFABOOT
2167 Some platforms support the setup of secure registers (for instance
2168 for CPU errata handling) or provide secure services like PSCI.
2169 Those services could also be provided by other firmware parts
2170 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2171 does not need to (and cannot) execute this code.
2172 Enabling this option will make a U-Boot binary that is relying
2173 on other firmware layers to provide secure functionality.
2175 config TI_SECURE_DEVICE
2176 bool "HS Device Type Support"
2177 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2179 If a high secure (HS) device type is being used, this config
2180 must be set. This option impacts various aspects of the
2181 build system (to create signed boot images that can be
2182 authenticated) and the code. See the doc/README.ti-secure
2183 file for further details.
2185 config SYS_KWD_CONFIG
2186 string "kwbimage config file path"
2187 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2188 default "arch/arm/mach-mvebu/kwbimage.cfg"
2190 Path within the source directory to the kwbimage.cfg file to use
2191 when packaging the U-Boot image for use.
2193 source "arch/arm/mach-apple/Kconfig"
2195 source "arch/arm/mach-aspeed/Kconfig"
2197 source "arch/arm/mach-at91/Kconfig"
2199 source "arch/arm/mach-bcm283x/Kconfig"
2201 source "arch/arm/mach-bcmbca/Kconfig"
2203 source "arch/arm/mach-bcmstb/Kconfig"
2205 source "arch/arm/mach-davinci/Kconfig"
2207 source "arch/arm/mach-exynos/Kconfig"
2209 source "arch/arm/mach-hpe/gxp/Kconfig"
2211 source "arch/arm/mach-highbank/Kconfig"
2213 source "arch/arm/mach-histb/Kconfig"
2215 source "arch/arm/mach-integrator/Kconfig"
2217 source "arch/arm/mach-ipq40xx/Kconfig"
2219 source "arch/arm/mach-k3/Kconfig"
2221 source "arch/arm/mach-keystone/Kconfig"
2223 source "arch/arm/mach-kirkwood/Kconfig"
2225 source "arch/arm/mach-lpc32xx/Kconfig"
2227 source "arch/arm/mach-mvebu/Kconfig"
2229 source "arch/arm/mach-octeontx/Kconfig"
2231 source "arch/arm/mach-octeontx2/Kconfig"
2233 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2235 source "arch/arm/mach-imx/mx3/Kconfig"
2237 source "arch/arm/mach-imx/mx5/Kconfig"
2239 source "arch/arm/mach-imx/mx6/Kconfig"
2241 source "arch/arm/mach-imx/mx7/Kconfig"
2243 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2245 source "arch/arm/mach-imx/imx8/Kconfig"
2247 source "arch/arm/mach-imx/imx8m/Kconfig"
2249 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2251 source "arch/arm/mach-imx/imx9/Kconfig"
2253 source "arch/arm/mach-imx/imxrt/Kconfig"
2255 source "arch/arm/mach-imx/mxs/Kconfig"
2257 source "arch/arm/mach-omap2/Kconfig"
2259 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2261 source "arch/arm/mach-orion5x/Kconfig"
2263 source "arch/arm/mach-owl/Kconfig"
2265 source "arch/arm/mach-rmobile/Kconfig"
2267 source "arch/arm/mach-meson/Kconfig"
2269 source "arch/arm/mach-mediatek/Kconfig"
2271 source "arch/arm/mach-qemu/Kconfig"
2273 source "arch/arm/mach-rockchip/Kconfig"
2275 source "arch/arm/mach-s5pc1xx/Kconfig"
2277 source "arch/arm/mach-snapdragon/Kconfig"
2279 source "arch/arm/mach-socfpga/Kconfig"
2281 source "arch/arm/mach-sti/Kconfig"
2283 source "arch/arm/mach-stm32/Kconfig"
2285 source "arch/arm/mach-stm32mp/Kconfig"
2287 source "arch/arm/mach-sunxi/Kconfig"
2289 source "arch/arm/mach-tegra/Kconfig"
2291 source "arch/arm/mach-u8500/Kconfig"
2293 source "arch/arm/mach-uniphier/Kconfig"
2295 source "arch/arm/cpu/armv7/vf610/Kconfig"
2297 source "arch/arm/mach-zynq/Kconfig"
2299 source "arch/arm/mach-zynqmp/Kconfig"
2301 source "arch/arm/mach-versal/Kconfig"
2303 source "arch/arm/mach-versal-net/Kconfig"
2305 source "arch/arm/mach-zynqmp-r5/Kconfig"
2307 source "arch/arm/cpu/armv7/Kconfig"
2309 source "arch/arm/cpu/armv8/Kconfig"
2311 source "arch/arm/mach-imx/Kconfig"
2313 source "arch/arm/mach-nexell/Kconfig"
2315 source "arch/arm/mach-npcm/Kconfig"
2317 source "board/armltd/total_compute/Kconfig"
2318 source "board/armltd/corstone1000/Kconfig"
2319 source "board/bosch/shc/Kconfig"
2320 source "board/bosch/guardian/Kconfig"
2321 source "board/Marvell/octeontx/Kconfig"
2322 source "board/Marvell/octeontx2/Kconfig"
2323 source "board/armltd/vexpress/Kconfig"
2324 source "board/armltd/vexpress64/Kconfig"
2325 source "board/cortina/presidio-asic/Kconfig"
2326 source "board/broadcom/bcmns/Kconfig"
2327 source "board/broadcom/bcmns3/Kconfig"
2328 source "board/cavium/thunderx/Kconfig"
2329 source "board/eets/pdu001/Kconfig"
2330 source "board/emulation/qemu-arm/Kconfig"
2331 source "board/freescale/ls2080aqds/Kconfig"
2332 source "board/freescale/ls2080ardb/Kconfig"
2333 source "board/freescale/ls1088a/Kconfig"
2334 source "board/freescale/ls1028a/Kconfig"
2335 source "board/freescale/ls1021aqds/Kconfig"
2336 source "board/freescale/ls1043aqds/Kconfig"
2337 source "board/freescale/ls1021atwr/Kconfig"
2338 source "board/freescale/ls1021atsn/Kconfig"
2339 source "board/freescale/ls1021aiot/Kconfig"
2340 source "board/freescale/ls1046aqds/Kconfig"
2341 source "board/freescale/ls1043ardb/Kconfig"
2342 source "board/freescale/ls1046ardb/Kconfig"
2343 source "board/freescale/ls1046afrwy/Kconfig"
2344 source "board/freescale/ls1012aqds/Kconfig"
2345 source "board/freescale/ls1012ardb/Kconfig"
2346 source "board/freescale/ls1012afrdm/Kconfig"
2347 source "board/freescale/lx2160a/Kconfig"
2348 source "board/grinn/chiliboard/Kconfig"
2349 source "board/hisilicon/hikey/Kconfig"
2350 source "board/hisilicon/hikey960/Kconfig"
2351 source "board/hisilicon/poplar/Kconfig"
2352 source "board/isee/igep003x/Kconfig"
2353 source "board/kontron/sl28/Kconfig"
2354 source "board/myir/mys_6ulx/Kconfig"
2355 source "board/samsung/common/Kconfig"
2356 source "board/siemens/common/Kconfig"
2357 source "board/seeed/npi_imx6ull/Kconfig"
2358 source "board/socionext/developerbox/Kconfig"
2359 source "board/st/stv0991/Kconfig"
2360 source "board/tcl/sl50/Kconfig"
2361 source "board/traverse/ten64/Kconfig"
2362 source "board/variscite/dart_6ul/Kconfig"
2363 source "board/vscom/baltos/Kconfig"
2364 source "board/phytium/durian/Kconfig"
2365 source "board/phytium/pomelo/Kconfig"
2366 source "board/phytium/pe2201/Kconfig"
2367 source "board/xen/xenguest_arm64/Kconfig"
2369 source "arch/arm/Kconfig.debug"