arch/arm/Kconfig

   1 menu "ARM architecture"
   2         depends on ARM
   3
   4 config SYS_ARCH
   5         default "arm"
   6
   7 config ARM64
   8         bool
   9         select PHYS_64BIT
  10         select SYS_CACHE_SHIFT_6
  11
  12 config ARM64_CRC32
  13         bool "Enable support for CRC32 instruction"
  14         depends on ARM64
  15         default y
  16         help
  17           ARMv8 implements dedicated crc32 instruction for crc32 calculation.
  18           This is faster than software crc32 calculation. This instruction may
  19           not be present on all ARMv8.0, but is always present on ARMv8.1 and
  20           newer.
  21
  22 config POSITION_INDEPENDENT
  23         bool "Generate position-independent pre-relocation code"
  24         depends on ARM64 || CPU_V7A
  25         help
  26           U-Boot expects to be linked to a specific hard-coded address, and to
  27           be loaded to and run from that address. This option lifts that
  28           restriction, thus allowing the code to be loaded to and executed from
  29           almost any 4K aligned address. This logic relies on the relocation
  30           information that is embedded in the binary to support U-Boot
  31           relocating itself to the top-of-RAM later during execution.
  32
  33 config INIT_SP_RELATIVE
  34         bool "Specify the early stack pointer relative to the .bss section"
  35         depends on ARM64
  36         default n if ARCH_QEMU
  37         default y if POSITION_INDEPENDENT
  38         help
  39           U-Boot typically uses a hard-coded value for the stack pointer
  40           before relocation. Enable this option to instead calculate the
  41           initial SP at run-time. This is useful to avoid hard-coding addresses
  42           into U-Boot, so that it can be loaded and executed at arbitrary
  43           addresses and thus avoid using arbitrary addresses at runtime.
  44
  45           If this option is enabled, the early stack pointer is set to
  46           &_bss_start with a offset value added. The offset is specified by
  47           SYS_INIT_SP_BSS_OFFSET.
  48
  49 config SYS_INIT_SP_BSS_OFFSET
  50         int "Early stack offset from the .bss base address"
  51         depends on ARM64
  52         depends on INIT_SP_RELATIVE
  53         default 524288
  54         help
  55           This option's value is the offset added to &_bss_start in order to
  56           calculate the stack pointer. This offset should be large enough so
  57           that the early malloc region, global data (gd), and early stack usage
  58           do not overlap any appended DTB.
  59
  60 config LINUX_KERNEL_IMAGE_HEADER
  61         depends on ARM64
  62         bool
  63         help
  64           Place a Linux kernel image header at the start of the U-Boot binary.
  65           The format of the header is described in the Linux kernel source at
  66           Documentation/arm64/booting.txt. This feature is useful since the
  67           image header reports the amount of memory (BSS and similar) that
  68           U-Boot needs to use, but which isn't part of the binary.
  69
  70 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  71         depends on LINUX_KERNEL_IMAGE_HEADER
  72         hex
  73         help
  74           The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  75           TEXT_OFFSET value written to the Linux kernel image header.
  76
  77 config GICV2
  78         bool
  79
  80 config GICV3
  81         bool
  82
  83 config GIC_V3_ITS
  84         bool "ARM GICV3 ITS"
  85         select IRQ
  86         help
  87           ARM GICV3 Interrupt translation service (ITS).
  88           Basic support for programming locality specific peripheral
  89           interrupts (LPI) configuration tables and enable LPI tables.
  90           LPI configuration table can be used by u-boot or Linux.
  91           ARM GICV3 has limitation, once the LPI table is enabled, LPI
  92           configuration table can not be re-programmed, unless GICV3 reset.
  93
  94 config STATIC_RELA
  95         bool
  96         default y if ARM64
  97
  98 config DMA_ADDR_T_64BIT
  99         bool
 100         default y if ARM64
 101
 102 config HAS_VBAR
 103         bool
 104
 105 config HAS_THUMB2
 106         bool
 107
 108 config GPIO_EXTRA_HEADER
 109         bool
 110
 111 # Used for compatibility with asm files copied from the kernel
 112 config ARM_ASM_UNIFIED
 113         bool
 114         default y
 115
 116 # Used for compatibility with asm files copied from the kernel
 117 config THUMB2_KERNEL
 118         bool
 119
 120 config SYS_ICACHE_OFF
 121         bool "Do not enable icache"
 122         help
 123           Do not enable instruction cache in U-Boot.
 124
 125 config SPL_SYS_ICACHE_OFF
 126         bool "Do not enable icache in SPL"
 127         depends on SPL
 128         default SYS_ICACHE_OFF
 129         help
 130           Do not enable instruction cache in SPL.
 131
 132 config SYS_DCACHE_OFF
 133         bool "Do not enable dcache"
 134         help
 135           Do not enable data cache in U-Boot.
 136
 137 config SPL_SYS_DCACHE_OFF
 138         bool "Do not enable dcache in SPL"
 139         depends on SPL
 140         default SYS_DCACHE_OFF
 141         help
 142           Do not enable data cache in SPL.
 143
 144 config SYS_ARM_CACHE_CP15
 145         bool "CP15 based cache enabling support"
 146         help
 147           Select this if your processor suports enabling caches by using
 148           CP15 registers.
 149
 150 config SYS_ARM_MMU
 151         bool "MMU-based Paged Memory Management Support"
 152         select SYS_ARM_CACHE_CP15
 153         help
 154           Select if you want MMU-based virtualised addressing space
 155           support via paged memory management.
 156
 157 config SYS_ARM_MPU
 158         bool 'Use the ARM v7 PMSA Compliant MPU'
 159         help
 160           Some ARM systems without an MMU have instead a Memory Protection
 161           Unit (MPU) that defines the type and permissions for regions of
 162           memory.
 163           If your CPU has an MPU then you should choose 'y' here unless you
 164           know that you do not want to use the MPU.
 165
 166 # If set, the workarounds for these ARM errata are applied early during U-Boot
 167 # startup. Note that in general these options force the workarounds to be
 168 # applied; no CPU-type/version detection exists, unlike the similar options in
 169 # the Linux kernel. Do not set these options unless they apply!  Also note that
 170 # the following can be machine-specific errata. These do have ability to
 171 # provide rudimentary version and machine-specific checks, but expect no
 172 # product checks:
 173 # CONFIG_ARM_ERRATA_430973
 174 # CONFIG_ARM_ERRATA_454179
 175 # CONFIG_ARM_ERRATA_621766
 176 # CONFIG_ARM_ERRATA_798870
 177 # CONFIG_ARM_ERRATA_801819
 178 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
 179 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
 180
 181 config ARM_ERRATA_430973
 182         bool
 183
 184 config ARM_ERRATA_454179
 185         bool
 186
 187 config ARM_ERRATA_621766
 188         bool
 189
 190 config ARM_ERRATA_716044
 191         bool
 192
 193 config ARM_ERRATA_725233
 194         bool
 195
 196 config ARM_ERRATA_742230
 197         bool
 198
 199 config ARM_ERRATA_743622
 200         bool
 201
 202 config ARM_ERRATA_751472
 203         bool
 204
 205 config ARM_ERRATA_761320
 206         bool
 207
 208 config ARM_ERRATA_773022
 209         bool
 210
 211 config ARM_ERRATA_774769
 212         bool
 213
 214 config ARM_ERRATA_794072
 215         bool
 216
 217 config ARM_ERRATA_798870
 218         bool
 219
 220 config ARM_ERRATA_801819
 221         bool
 222
 223 config ARM_ERRATA_826974
 224         bool
 225
 226 config ARM_ERRATA_828024
 227         bool
 228
 229 config ARM_ERRATA_829520
 230         bool
 231
 232 config ARM_ERRATA_833069
 233         bool
 234
 235 config ARM_ERRATA_833471
 236         bool
 237
 238 config ARM_ERRATA_845369
 239         bool
 240
 241 config ARM_ERRATA_852421
 242         bool
 243
 244 config ARM_ERRATA_852423
 245         bool
 246
 247 config ARM_ERRATA_855873
 248         bool
 249
 250 config ARM_CORTEX_A8_CVE_2017_5715
 251         bool
 252
 253 config ARM_CORTEX_A15_CVE_2017_5715
 254         bool
 255
 256 config CPU_ARM720T
 257         bool
 258         select SYS_CACHE_SHIFT_5
 259         imply SYS_ARM_MMU
 260
 261 config CPU_ARM920T
 262         bool
 263         select SYS_CACHE_SHIFT_5
 264         imply SYS_ARM_MMU
 265
 266 config CPU_ARM926EJS
 267         bool
 268         select SYS_CACHE_SHIFT_5
 269         imply SYS_ARM_MMU
 270
 271 config CPU_ARM946ES
 272         bool
 273         select SYS_CACHE_SHIFT_5
 274         imply SYS_ARM_MMU
 275
 276 config CPU_ARM1136
 277         bool
 278         select SYS_CACHE_SHIFT_5
 279         imply SYS_ARM_MMU
 280
 281 config CPU_ARM1176
 282         bool
 283         select HAS_VBAR
 284         select SYS_CACHE_SHIFT_5
 285         imply SYS_ARM_MMU
 286
 287 config CPU_V7A
 288         bool
 289         select HAS_THUMB2
 290         select HAS_VBAR
 291         select SYS_CACHE_SHIFT_6
 292         imply SYS_ARM_MMU
 293
 294 config CPU_V7M
 295         bool
 296         select HAS_THUMB2
 297         select SYS_ARM_MPU
 298         select SYS_CACHE_SHIFT_5
 299         select SYS_THUMB_BUILD
 300         select THUMB2_KERNEL
 301
 302 config CPU_V7R
 303         bool
 304         select HAS_THUMB2
 305         select SYS_ARM_CACHE_CP15
 306         select SYS_ARM_MPU
 307         select SYS_CACHE_SHIFT_6
 308
 309 config CPU_PXA
 310         bool
 311         select SYS_CACHE_SHIFT_5
 312         imply SYS_ARM_MMU
 313
 314 config CPU_SA1100
 315         bool
 316         select SYS_CACHE_SHIFT_5
 317         imply SYS_ARM_MMU
 318
 319 config SYS_CPU
 320         default "arm720t" if CPU_ARM720T
 321         default "arm920t" if CPU_ARM920T
 322         default "arm926ejs" if CPU_ARM926EJS
 323         default "arm946es" if CPU_ARM946ES
 324         default "arm1136" if CPU_ARM1136
 325         default "arm1176" if CPU_ARM1176
 326         default "armv7" if CPU_V7A
 327         default "armv7" if CPU_V7R
 328         default "armv7m" if CPU_V7M
 329         default "pxa" if CPU_PXA
 330         default "sa1100" if CPU_SA1100
 331         default "armv8" if ARM64
 332
 333 config SYS_ARM_ARCH
 334         int
 335         default 4 if CPU_ARM720T
 336         default 4 if CPU_ARM920T
 337         default 5 if CPU_ARM926EJS
 338         default 5 if CPU_ARM946ES
 339         default 6 if CPU_ARM1136
 340         default 6 if CPU_ARM1176
 341         default 7 if CPU_V7A
 342         default 7 if CPU_V7M
 343         default 7 if CPU_V7R
 344         default 5 if CPU_PXA
 345         default 4 if CPU_SA1100
 346         default 8 if ARM64
 347
 348 choice
 349         prompt "Select the ARM data write cache policy"
 350         default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
 351                                               CPU_PXA || RZA1
 352         default SYS_ARM_CACHE_WRITEBACK
 353
 354 config SYS_ARM_CACHE_WRITEBACK
 355         bool "Write-back (WB)"
 356         help
 357           A write updates the cache only and marks the cache line as dirty.
 358           External memory is updated only when the line is evicted or explicitly
 359           cleaned.
 360
 361 config SYS_ARM_CACHE_WRITETHROUGH
 362         bool "Write-through (WT)"
 363         help
 364           A write updates both the cache and the external memory system.
 365           This does not mark the cache line as dirty.
 366
 367 config SYS_ARM_CACHE_WRITEALLOC
 368         bool "Write allocation (WA)"
 369         help
 370           A cache line is allocated on a write miss. This means that executing a
 371           store instruction on the processor might cause a burst read to occur.
 372           There is a linefill to obtain the data for the cache line, before the
 373           write is performed.
 374 endchoice
 375
 376 config ARCH_CPU_INIT
 377         bool "Enable ARCH_CPU_INIT"
 378         help
 379           Some architectures require a call to arch_cpu_init().
 380           Say Y here to enable it
 381
 382 config SYS_ARCH_TIMER
 383         bool "ARM Generic Timer support"
 384         depends on CPU_V7A || ARM64
 385         default y if ARM64
 386         help
 387           The ARM Generic Timer (aka arch-timer) provides an architected
 388           interface to a timer source on an SoC.
 389           It is mandatory for ARMv8 implementation and widely available
 390           on ARMv7 systems.
 391
 392 config ARM_SMCCC
 393         bool "Support for ARM SMC Calling Convention (SMCCC)"
 394         depends on CPU_V7A || ARM64
 395         select ARM_PSCI_FW
 396         help
 397           Say Y here if you want to enable ARM SMC Calling Convention.
 398           This should be enabled if U-Boot needs to communicate with system
 399           firmware (for example, PSCI) according to SMCCC.
 400
 401 config SEMIHOSTING
 402         bool "support boot from semihosting"
 403         help
 404           In emulated environments, semihosting is a way for
 405           the hosted environment to call out to the emulator to
 406           retrieve files from the host machine.
 407
 408 config SYS_THUMB_BUILD
 409         bool "Build U-Boot using the Thumb instruction set"
 410         depends on !ARM64
 411         help
 412            Use this flag to build U-Boot using the Thumb instruction set for
 413            ARM architectures. Thumb instruction set provides better code
 414            density. For ARM architectures that support Thumb2 this flag will
 415            result in Thumb2 code generated by GCC.
 416
 417 config SPL_SYS_THUMB_BUILD
 418         bool "Build SPL using the Thumb instruction set"
 419         default y if SYS_THUMB_BUILD
 420         depends on !ARM64 && SPL
 421         help
 422            Use this flag to build SPL using the Thumb instruction set for
 423            ARM architectures. Thumb instruction set provides better code
 424            density. For ARM architectures that support Thumb2 this flag will
 425            result in Thumb2 code generated by GCC.
 426
 427 config TPL_SYS_THUMB_BUILD
 428         bool "Build TPL using the Thumb instruction set"
 429         default y if SYS_THUMB_BUILD
 430         depends on TPL && !ARM64
 431         help
 432            Use this flag to build TPL using the Thumb instruction set for
 433            ARM architectures. Thumb instruction set provides better code
 434            density. For ARM architectures that support Thumb2 this flag will
 435            result in Thumb2 code generated by GCC.
 436
 437
 438 config SYS_L2CACHE_OFF
 439         bool "L2cache off"
 440         help
 441           If SoC does not support L2CACHE or one does not want to enable
 442           L2CACHE, choose this option.
 443
 444 config ENABLE_ARM_SOC_BOOT0_HOOK
 445         bool "prepare BOOT0 header"
 446         help
 447           If the SoC's BOOT0 requires a header area filled with (magic)
 448           values, then choose this option, and create a file included as
 449           <asm/arch/boot0.h> which contains the required assembler code.
 450
 451 config ARM_CORTEX_CPU_IS_UP
 452         bool
 453
 454 config USE_ARCH_MEMCPY
 455         bool "Use an assembly optimized implementation of memcpy"
 456         default y if !ARM64
 457         depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
 458         help
 459           Enable the generation of an optimized version of memcpy.
 460           Such an implementation may be faster under some conditions
 461           but may increase the binary size.
 462
 463 config SPL_USE_ARCH_MEMCPY
 464         bool "Use an assembly optimized implementation of memcpy for SPL"
 465         default y if USE_ARCH_MEMCPY
 466         depends on SPL
 467         help
 468           Enable the generation of an optimized version of memcpy.
 469           Such an implementation may be faster under some conditions
 470           but may increase the binary size.
 471
 472 config TPL_USE_ARCH_MEMCPY
 473         bool "Use an assembly optimized implementation of memcpy for TPL"
 474         default y if USE_ARCH_MEMCPY
 475         depends on TPL
 476         help
 477           Enable the generation of an optimized version of memcpy.
 478           Such an implementation may be faster under some conditions
 479           but may increase the binary size.
 480
 481 config USE_ARCH_MEMMOVE
 482         bool "Use an assembly optimized implementation of memmove" if !ARM64
 483         default USE_ARCH_MEMCPY if ARM64
 484         depends on ARM64
 485         help
 486           Enable the generation of an optimized version of memmove.
 487           Such an implementation may be faster under some conditions
 488           but may increase the binary size.
 489
 490 config SPL_USE_ARCH_MEMMOVE
 491         bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
 492         default SPL_USE_ARCH_MEMCPY if ARM64
 493         depends on SPL && ARM64
 494         help
 495           Enable the generation of an optimized version of memmove.
 496           Such an implementation may be faster under some conditions
 497           but may increase the binary size.
 498
 499 config TPL_USE_ARCH_MEMMOVE
 500         bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
 501         default TPL_USE_ARCH_MEMCPY if ARM64
 502         depends on TPL && ARM64
 503         help
 504           Enable the generation of an optimized version of memmove.
 505           Such an implementation may be faster under some conditions
 506           but may increase the binary size.
 507
 508 config USE_ARCH_MEMSET
 509         bool "Use an assembly optimized implementation of memset"
 510         default y if !ARM64
 511         depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
 512         help
 513           Enable the generation of an optimized version of memset.
 514           Such an implementation may be faster under some conditions
 515           but may increase the binary size.
 516
 517 config SPL_USE_ARCH_MEMSET
 518         bool "Use an assembly optimized implementation of memset for SPL"
 519         default y if USE_ARCH_MEMSET
 520         depends on SPL
 521         help
 522           Enable the generation of an optimized version of memset.
 523           Such an implementation may be faster under some conditions
 524           but may increase the binary size.
 525
 526 config TPL_USE_ARCH_MEMSET
 527         bool "Use an assembly optimized implementation of memset for TPL"
 528         default y if USE_ARCH_MEMSET
 529         depends on TPL
 530         help
 531           Enable the generation of an optimized version of memset.
 532           Such an implementation may be faster under some conditions
 533           but may increase the binary size.
 534
 535 config ARM64_SUPPORT_AARCH32
 536         bool "ARM64 system support AArch32 execution state"
 537         depends on ARM64
 538         default y if !TARGET_THUNDERX_88XX
 539         help
 540           This ARM64 system supports AArch32 execution state.
 541
 542 choice
 543         prompt "Target select"
 544         default TARGET_HIKEY
 545
 546 config ARCH_AT91
 547         bool "Atmel AT91"
 548         select GPIO_EXTRA_HEADER
 549         select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
 550         select SPL_SEPARATE_BSS if SPL
 551
 552 config ARCH_DAVINCI
 553         bool "TI DaVinci"
 554         select CPU_ARM926EJS
 555         select GPIO_EXTRA_HEADER
 556         select SPL_DM_SPI if SPL
 557         imply CMD_SAVES
 558         help
 559           Support for TI's DaVinci platform.
 560
 561 config ARCH_KIRKWOOD
 562         bool "Marvell Kirkwood"
 563         select ARCH_MISC_INIT
 564         select BOARD_EARLY_INIT_F
 565         select CPU_ARM926EJS
 566         select GPIO_EXTRA_HEADER
 567
 568 config ARCH_MVEBU
 569         bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
 570         select DM
 571         select DM_ETH
 572         select DM_SERIAL
 573         select DM_SPI
 574         select DM_SPI_FLASH
 575         select GPIO_EXTRA_HEADER
 576         select SPL_DM_SPI if SPL
 577         select SPL_DM_SPI_FLASH if SPL
 578         select OF_CONTROL
 579         select OF_SEPARATE
 580         select SPI
 581         imply CMD_DM
 582
 583 config ARCH_ORION5X
 584         bool "Marvell Orion"
 585         select CPU_ARM926EJS
 586         select GPIO_EXTRA_HEADER
 587
 588 config TARGET_STV0991
 589         bool "Support stv0991"
 590         select CPU_V7A
 591         select DM
 592         select DM_SERIAL
 593         select DM_SPI
 594         select DM_SPI_FLASH
 595         select GPIO_EXTRA_HEADER
 596         select PL01X_SERIAL
 597         select SPI
 598         select SPI_FLASH
 599         imply CMD_DM
 600
 601 config ARCH_BCM283X
 602         bool "Broadcom BCM283X family"
 603         select DM
 604         select DM_GPIO
 605         select DM_SERIAL
 606         select GPIO_EXTRA_HEADER
 607         select OF_CONTROL
 608         select PL01X_SERIAL
 609         select SERIAL_SEARCH_ALL
 610         imply CMD_DM
 611         imply FAT_WRITE
 612
 613 config ARCH_BCM63158
 614         bool "Broadcom BCM63158 family"
 615         select DM
 616         select OF_CONTROL
 617         imply CMD_DM
 618
 619 config ARCH_BCM68360
 620         bool "Broadcom BCM68360 family"
 621         select DM
 622         select OF_CONTROL
 623         imply CMD_DM
 624
 625 config ARCH_BCM6858
 626         bool "Broadcom BCM6858 family"
 627         select DM
 628         select OF_CONTROL
 629         imply CMD_DM
 630
 631 config ARCH_BCMSTB
 632         bool "Broadcom BCM7XXX family"
 633         select CPU_V7A
 634         select DM
 635         select GPIO_EXTRA_HEADER
 636         select OF_CONTROL
 637         imply CMD_DM
 638         help
 639           This enables support for Broadcom ARM-based set-top box
 640           chipsets, including the 7445 family of chips.
 641
 642 config TARGET_VEXPRESS_CA9X4
 643         bool "Support vexpress_ca9x4"
 644         select CPU_V7A
 645         select PL011_SERIAL
 646
 647 config TARGET_BCMCYGNUS
 648         bool "Support bcmcygnus"
 649         select CPU_V7A
 650         select GPIO_EXTRA_HEADER
 651         imply BCM_SF2_ETH
 652         imply BCM_SF2_ETH_GMAC
 653         imply CMD_HASH
 654         imply CRC32_VERIFY
 655         imply FAT_WRITE
 656         imply HASH_VERIFY
 657         imply NETDEVICES
 658
 659 config TARGET_BCMNS2
 660         bool "Support Broadcom Northstar2"
 661         select ARM64
 662         select GPIO_EXTRA_HEADER
 663         help
 664           Support for Broadcom Northstar 2 SoCs.  NS2 is a quad-core 64-bit
 665           ARMv8 Cortex-A57 processors targeting a broad range of networking
 666           applications.
 667
 668 config TARGET_BCMNS3
 669         bool "Support Broadcom NS3"
 670         select ARM64
 671         select BOARD_LATE_INIT
 672         help
 673           Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
 674           ARMv8 Cortex-A72 processors targeting a broad range of networking
 675           applications.
 676
 677 config ARCH_EXYNOS
 678         bool "Samsung EXYNOS"
 679         select DM
 680         select DM_GPIO
 681         select DM_I2C
 682         select DM_ETH
 683         select DM_KEYBOARD
 684         select DM_SERIAL
 685         select DM_SPI
 686         select DM_SPI_FLASH
 687         select SPI
 688         select GPIO_EXTRA_HEADER
 689         imply SYS_THUMB_BUILD
 690         imply CMD_DM
 691         imply FAT_WRITE
 692
 693 config ARCH_S5PC1XX
 694         bool "Samsung S5PC1XX"
 695         select CPU_V7A
 696         select DM
 697         select DM_GPIO
 698         select DM_I2C
 699         select DM_SERIAL
 700         select GPIO_EXTRA_HEADER
 701         imply CMD_DM
 702
 703 config ARCH_HIGHBANK
 704         bool "Calxeda Highbank"
 705         select CPU_V7A
 706         select PL01X_SERIAL
 707         select DM
 708         select DM_SERIAL
 709         select OF_CONTROL
 710         select OF_BOARD
 711         select CLK
 712         select CLK_CCF
 713         select AHCI
 714         select DM_ETH
 715         select PHYS_64BIT
 716
 717 config ARCH_INTEGRATOR
 718         bool "ARM Ltd. Integrator family"
 719         select DM
 720         select DM_SERIAL
 721         select GPIO_EXTRA_HEADER
 722         select PL01X_SERIAL
 723         imply CMD_DM
 724
 725 config ARCH_IPQ40XX
 726         bool "Qualcomm IPQ40xx SoCs"
 727         select CPU_V7A
 728         select DM
 729         select DM_GPIO
 730         select DM_SERIAL
 731         select DM_RESET
 732         select GPIO_EXTRA_HEADER
 733         select MSM_SMEM
 734         select PINCTRL
 735         select CLK
 736         select SMEM
 737         select OF_CONTROL
 738         imply CMD_DM
 739
 740 config ARCH_KEYSTONE
 741         bool "TI Keystone"
 742         select CMD_POWEROFF
 743         select CPU_V7A
 744         select DDR_SPD
 745         select GPIO_EXTRA_HEADER
 746         select SUPPORT_SPL
 747         select SYS_ARCH_TIMER
 748         select SYS_THUMB_BUILD
 749         imply CMD_MTDPARTS
 750         imply CMD_SAVES
 751         imply FIT
 752
 753 config ARCH_K3
 754         bool "Texas Instruments' K3 Architecture"
 755         select SPL
 756         select SUPPORT_SPL
 757         select FIT
 758
 759 config ARCH_OMAP2PLUS
 760         bool "TI OMAP2+"
 761         select CPU_V7A
 762         select GPIO_EXTRA_HEADER
 763         select SPL_BOARD_INIT if SPL
 764         select SPL_STACK_R if SPL
 765         select SUPPORT_SPL
 766         imply TI_SYSC if DM && OF_CONTROL
 767         imply FIT
 768
 769 config ARCH_MESON
 770         bool "Amlogic Meson"
 771         select GPIO_EXTRA_HEADER
 772         imply DISTRO_DEFAULTS
 773         imply DM_RNG
 774         help
 775           Support for the Meson SoC family developed by Amlogic Inc.,
 776           targeted at media players and tablet computers. We currently
 777           support the S905 (GXBaby) 64-bit SoC.
 778
 779 config ARCH_MEDIATEK
 780         bool "MediaTek SoCs"
 781         select DM
 782         select GPIO_EXTRA_HEADER
 783         select OF_CONTROL
 784         select SPL_DM if SPL
 785         select SPL_LIBCOMMON_SUPPORT if SPL
 786         select SPL_LIBGENERIC_SUPPORT if SPL
 787         select SPL_OF_CONTROL if SPL
 788         select SUPPORT_SPL
 789         help
 790           Support for the MediaTek SoCs family developed by MediaTek Inc.
 791           Please refer to doc/README.mediatek for more information.
 792
 793 config ARCH_LPC32XX
 794         bool "NXP LPC32xx platform"
 795         select CPU_ARM926EJS
 796         select DM
 797         select DM_GPIO
 798         select DM_SERIAL
 799         select GPIO_EXTRA_HEADER
 800         select SPL_DM if SPL
 801         select SUPPORT_SPL
 802         imply CMD_DM
 803
 804 config ARCH_IMX8
 805         bool "NXP i.MX8 platform"
 806         select ARM64
 807         select DM
 808         select GPIO_EXTRA_HEADER
 809         select MACH_IMX
 810         select OF_CONTROL
 811         select ENABLE_ARM_SOC_BOOT0_HOOK
 812
 813 config ARCH_IMX8M
 814         bool "NXP i.MX8M platform"
 815         select ARM64
 816         select GPIO_EXTRA_HEADER
 817         select MACH_IMX
 818         select SYS_FSL_HAS_SEC if IMX_HAB
 819         select SYS_FSL_SEC_COMPAT_4
 820         select SYS_FSL_SEC_LE
 821         select SYS_I2C_MXC
 822         select DM
 823         select SUPPORT_SPL
 824         imply CMD_DM
 825
 826 config ARCH_IMX8ULP
 827         bool "NXP i.MX8ULP platform"
 828         select ARM64
 829         select DM
 830         select MACH_IMX
 831         select OF_CONTROL
 832         select SUPPORT_SPL
 833         select GPIO_EXTRA_HEADER
 834         imply CMD_DM
 835
 836 config ARCH_IMXRT
 837         bool "NXP i.MXRT platform"
 838         select CPU_V7M
 839         select DM
 840         select DM_SERIAL
 841         select GPIO_EXTRA_HEADER
 842         select MACH_IMX
 843         select SUPPORT_SPL
 844         imply CMD_DM
 845
 846 config ARCH_MX23
 847         bool "NXP i.MX23 family"
 848         select CPU_ARM926EJS
 849         select GPIO_EXTRA_HEADER
 850         select MACH_IMX
 851         select PL011_SERIAL
 852         select SUPPORT_SPL
 853
 854 config ARCH_MX28
 855         bool "NXP i.MX28 family"
 856         select CPU_ARM926EJS
 857         select GPIO_EXTRA_HEADER
 858         select PL011_SERIAL
 859         select MACH_IMX
 860         select SUPPORT_SPL
 861
 862 config ARCH_MX31
 863         bool "NXP i.MX31 family"
 864         select CPU_ARM1136
 865         select GPIO_EXTRA_HEADER
 866         select MACH_IMX
 867
 868 config ARCH_MX7ULP
 869         bool "NXP MX7ULP"
 870         select CPU_V7A
 871         select GPIO_EXTRA_HEADER
 872         select MACH_IMX
 873         select SYS_FSL_HAS_SEC if IMX_HAB
 874         select SYS_FSL_SEC_COMPAT_4
 875         select SYS_FSL_SEC_LE
 876         select ROM_UNIFIED_SECTIONS
 877         imply MXC_GPIO
 878         imply SYS_THUMB_BUILD
 879
 880 config ARCH_MX7
 881         bool "Freescale MX7"
 882         select ARCH_MISC_INIT
 883         select CPU_V7A
 884         select GPIO_EXTRA_HEADER
 885         select MACH_IMX
 886         select SYS_FSL_HAS_SEC if IMX_HAB
 887         select SYS_FSL_SEC_COMPAT_4
 888         select SYS_FSL_SEC_LE
 889         imply BOARD_EARLY_INIT_F
 890         imply MXC_GPIO
 891         imply SYS_THUMB_BUILD
 892
 893 config ARCH_MX6
 894         bool "Freescale MX6"
 895         select CPU_V7A
 896         select GPIO_EXTRA_HEADER
 897         select MACH_IMX
 898         select SYS_FSL_HAS_SEC
 899         select SYS_FSL_SEC_COMPAT_4
 900         select SYS_FSL_SEC_LE
 901         imply MXC_GPIO
 902         imply SYS_THUMB_BUILD
 903
 904 if ARCH_MX6
 905 config SPL_LDSCRIPT
 906         default "arch/arm/mach-omap2/u-boot-spl.lds"
 907 endif
 908
 909 config ARCH_MX5
 910         bool "Freescale MX5"
 911         select BOARD_EARLY_INIT_F
 912         select CPU_V7A
 913         select GPIO_EXTRA_HEADER
 914         select MACH_IMX
 915         imply MXC_GPIO
 916
 917 config ARCH_NEXELL
 918         bool "Nexell S5P4418/S5P6818 SoC"
 919         select ENABLE_ARM_SOC_BOOT0_HOOK
 920         select DM
 921         select GPIO_EXTRA_HEADER
 922
 923 config ARCH_APPLE
 924         bool "Apple SoCs"
 925         select ARM64
 926         select BLK
 927         select CLK
 928         select CMD_USB
 929         select DM
 930         select DM_KEYBOARD
 931         select DM_SERIAL
 932         select DM_USB
 933         select DM_VIDEO
 934         select IOMMU
 935         select LINUX_KERNEL_IMAGE_HEADER
 936         select OF_CONTROL
 937         select OF_BOARD
 938         select POSITION_INDEPENDENT
 939         select USB
 940         imply CMD_DM
 941         imply CMD_GPT
 942         imply DISTRO_DEFAULTS
 943
 944 config ARCH_OWL
 945         bool "Actions Semi OWL SoCs"
 946         select DM
 947         select DM_ETH
 948         select DM_SERIAL
 949         select GPIO_EXTRA_HEADER
 950         select OWL_SERIAL
 951         select CLK
 952         select CLK_OWL
 953         select OF_CONTROL
 954         select SYS_RELOC_GD_ENV_ADDR
 955         imply CMD_DM
 956
 957 config ARCH_QEMU
 958         bool "QEMU Virtual Platform"
 959         select DM
 960         select DM_SERIAL
 961         select OF_CONTROL
 962         select PL01X_SERIAL
 963         imply CMD_DM
 964         imply DM_RNG
 965         imply DM_RTC
 966         imply RTC_PL031
 967
 968 config ARCH_RMOBILE
 969         bool "Renesas ARM SoCs"
 970         select DM
 971         select DM_SERIAL
 972         select GPIO_EXTRA_HEADER
 973         imply BOARD_EARLY_INIT_F
 974         imply CMD_DM
 975         imply FAT_WRITE
 976         imply SYS_THUMB_BUILD
 977         imply ARCH_MISC_INIT if DISPLAY_CPUINFO
 978
 979 config ARCH_SNAPDRAGON
 980         bool "Qualcomm Snapdragon SoCs"
 981         select ARM64
 982         select DM
 983         select DM_GPIO
 984         select DM_SERIAL
 985         select GPIO_EXTRA_HEADER
 986         select MSM_SMEM
 987         select OF_CONTROL
 988         select OF_SEPARATE
 989         select SMEM
 990         select SPMI
 991         imply CMD_DM
 992
 993 config ARCH_SOCFPGA
 994         bool "Altera SOCFPGA family"
 995         select ARCH_EARLY_INIT_R
 996         select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
 997         select ARM64 if TARGET_SOCFPGA_SOC64
 998         select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
 999         select DM
1000         select DM_SERIAL
1001         select GICV2
1002         select GPIO_EXTRA_HEADER
1003         select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1004         select OF_CONTROL
1005         select SPL_DM_RESET if DM_RESET
1006         select SPL_DM_SERIAL
1007         select SPL_LIBCOMMON_SUPPORT
1008         select SPL_LIBGENERIC_SUPPORT
1009         select SPL_NAND_SUPPORT if SPL_NAND_DENALI
1010         select SPL_OF_CONTROL
1011         select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1012         select SPL_SERIAL
1013         select SPL_SYSRESET
1014         select SPL_WATCHDOG
1015         select SUPPORT_SPL
1016         select SYS_NS16550
1017         select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1018         select SYSRESET
1019         select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1020         select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1021         imply CMD_DM
1022         imply CMD_MTDPARTS
1023         imply CRC32_VERIFY
1024         imply DM_SPI
1025         imply DM_SPI_FLASH
1026         imply FAT_WRITE
1027         imply SPL
1028         imply SPL_DM
1029         imply SPL_DM_SPI
1030         imply SPL_DM_SPI_FLASH
1031         imply SPL_LIBDISK_SUPPORT
1032         imply SPL_MMC
1033         imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1034         imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1035         imply SPL_SPI_FLASH_SUPPORT
1036         imply SPL_SPI
1037         imply L2X0_CACHE
1038
1039 config ARCH_SUNXI
1040         bool "Support sunxi (Allwinner) SoCs"
1041         select BINMAN
1042         select CMD_GPIO
1043         select CMD_MMC if MMC
1044         select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1045         select CLK
1046         select DM
1047         select DM_ETH
1048         select DM_GPIO
1049         select DM_I2C if I2C
1050         select DM_KEYBOARD
1051         select DM_MMC if MMC
1052         select DM_SCSI if SCSI
1053         select DM_SERIAL
1054         select GPIO_EXTRA_HEADER
1055         select OF_BOARD_SETUP
1056         select OF_CONTROL
1057         select OF_SEPARATE
1058         select SPECIFY_CONSOLE_INDEX
1059         select SPL_SEPARATE_BSS if SPL
1060         select SPL_STACK_R if SPL
1061         select SPL_SYS_MALLOC_SIMPLE if SPL
1062         select SPL_SYS_THUMB_BUILD if !ARM64
1063         select SUNXI_GPIO
1064         select SYS_NS16550
1065         select SYS_THUMB_BUILD if !ARM64
1066         select USB if DISTRO_DEFAULTS
1067         select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1068         select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1069         select SPL_USE_TINY_PRINTF
1070         select USE_PREBOOT
1071         select SYS_RELOC_GD_ENV_ADDR
1072         imply BOARD_LATE_INIT
1073         imply CMD_DM
1074         imply CMD_GPT
1075         imply CMD_UBI if MTD_RAW_NAND
1076         imply DISTRO_DEFAULTS
1077         imply FAT_WRITE
1078         imply FIT
1079         imply OF_LIBFDT_OVERLAY
1080         imply PRE_CONSOLE_BUFFER
1081         imply SPL_GPIO
1082         imply SPL_LIBCOMMON_SUPPORT
1083         imply SPL_LIBGENERIC_SUPPORT
1084         imply SPL_MMC if MMC
1085         imply SPL_POWER
1086         imply SPL_SERIAL
1087         imply SYSRESET
1088         imply SYSRESET_WATCHDOG
1089         imply SYSRESET_WATCHDOG_AUTO
1090         imply USB_GADGET
1091         imply WDT
1092
1093 config ARCH_U8500
1094         bool "ST-Ericsson U8500 Series"
1095         select CPU_V7A
1096         select DM
1097         select DM_GPIO
1098         select DM_MMC if MMC
1099         select DM_SERIAL
1100         select DM_USB_GADGET if DM_USB
1101         select OF_CONTROL
1102         select SYSRESET
1103         select TIMER
1104         imply AB8500_USB_PHY
1105         imply ARM_PL180_MMCI
1106         imply CLK
1107         imply DM_PMIC
1108         imply DM_RTC
1109         imply NOMADIK_GPIO
1110         imply NOMADIK_MTU_TIMER
1111         imply PHY
1112         imply PL01X_SERIAL
1113         imply PMIC_AB8500
1114         imply RTC_PL031
1115         imply SYS_THUMB_BUILD
1116         imply SYSRESET_SYSCON
1117
1118 config ARCH_VERSAL
1119         bool "Support Xilinx Versal Platform"
1120         select ARM64
1121         select CLK
1122         select DM
1123         select DM_ETH if NET
1124         select DM_MMC if MMC
1125         select DM_SERIAL
1126         select GICV3
1127         select GPIO_EXTRA_HEADER
1128         select OF_CONTROL
1129         select SOC_DEVICE
1130         imply BOARD_LATE_INIT
1131         imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1132
1133 config ARCH_VF610
1134         bool "Freescale Vybrid"
1135         select CPU_V7A
1136         select GPIO_EXTRA_HEADER
1137         select MACH_IMX
1138         select SYS_FSL_ERRATUM_ESDHC111
1139         imply CMD_MTDPARTS
1140         imply MTD_RAW_NAND
1141
1142 config ARCH_ZYNQ
1143         bool "Xilinx Zynq based platform"
1144         select CLK
1145         select CLK_ZYNQ
1146         select CPU_V7A
1147         select DM
1148         select DM_ETH if NET
1149         select DM_MMC if MMC
1150         select DM_SERIAL
1151         select DM_SPI
1152         select DM_SPI_FLASH
1153         select GPIO_EXTRA_HEADER
1154         select OF_CONTROL
1155         select SPI
1156         select SPL_BOARD_INIT if SPL
1157         select SPL_CLK if SPL
1158         select SPL_DM if SPL
1159         select SPL_DM_SPI if SPL
1160         select SPL_DM_SPI_FLASH if SPL
1161         select SPL_OF_CONTROL if SPL
1162         select SPL_SEPARATE_BSS if SPL
1163         select SUPPORT_SPL
1164         imply ARCH_EARLY_INIT_R
1165         imply BOARD_LATE_INIT
1166         imply CMD_CLK
1167         imply CMD_DM
1168         imply CMD_SPL
1169         imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1170         imply FAT_WRITE
1171
1172 config ARCH_ZYNQMP_R5
1173         bool "Xilinx ZynqMP R5 based platform"
1174         select CLK
1175         select CPU_V7R
1176         select DM
1177         select DM_ETH if NET
1178         select DM_MMC if MMC
1179         select DM_SERIAL
1180         select GPIO_EXTRA_HEADER
1181         select OF_CONTROL
1182         imply CMD_DM
1183         imply DM_USB_GADGET
1184
1185 config ARCH_ZYNQMP
1186         bool "Xilinx ZynqMP based platform"
1187         select ARM64
1188         select CLK
1189         select DM
1190         select DM_ETH if NET
1191         select DM_MAILBOX
1192         select DM_MMC if MMC
1193         select DM_SERIAL
1194         select DM_SPI if SPI
1195         select DM_SPI_FLASH if DM_SPI
1196         select FIRMWARE
1197         select GICV2
1198         select GPIO_EXTRA_HEADER
1199         select OF_CONTROL
1200         select SPL_BOARD_INIT if SPL
1201         select SPL_CLK if SPL
1202         select SPL_DM if SPL
1203         select SPL_DM_SPI if SPI && SPL_DM
1204         select SPL_DM_SPI_FLASH if SPL_DM_SPI
1205         select SPL_DM_MAILBOX if SPL
1206         select SPL_FIRMWARE if SPL
1207         select SPL_SEPARATE_BSS if SPL
1208         select SUPPORT_SPL
1209         select ZYNQMP_IPI
1210         select SOC_DEVICE
1211         imply BOARD_LATE_INIT
1212         imply CMD_DM
1213         imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1214         imply FAT_WRITE
1215         imply MP
1216         imply DM_USB_GADGET
1217
1218 config ARCH_TEGRA
1219         bool "NVIDIA Tegra"
1220         select GPIO_EXTRA_HEADER
1221         imply DISTRO_DEFAULTS
1222         imply FAT_WRITE
1223
1224 config TARGET_VEXPRESS64_AEMV8A
1225         bool "Support vexpress_aemv8a"
1226         select ARM64
1227         select GPIO_EXTRA_HEADER
1228         select PL01X_SERIAL
1229
1230 config TARGET_VEXPRESS64_BASE_FVP
1231         bool "Support Versatile Express ARMv8a FVP BASE model"
1232         select ARM64
1233         select GPIO_EXTRA_HEADER
1234         select PL01X_SERIAL
1235         select SEMIHOSTING
1236
1237 config TARGET_VEXPRESS64_JUNO
1238         bool "Support Versatile Express Juno Development Platform"
1239         select ARM64
1240         select GPIO_EXTRA_HEADER
1241         select PL01X_SERIAL
1242         select DM
1243         select OF_CONTROL
1244         select OF_BOARD
1245         select CLK
1246         select DM_SERIAL
1247         select ARM_PSCI_FW
1248         select PSCI_RESET
1249         select DM_ETH
1250         select BLK
1251         select USB
1252
1253 config TARGET_TOTAL_COMPUTE
1254         bool "Support Total Compute Platform"
1255         select ARM64
1256         select PL01X_SERIAL
1257         select DM
1258         select DM_SERIAL
1259         select DM_MMC
1260         select DM_GPIO
1261
1262 config TARGET_LS2080A_EMU
1263         bool "Support ls2080a_emu"
1264         select ARCH_LS2080A
1265         select ARM64
1266         select ARMV8_MULTIENTRY
1267         select FSL_DDR_SYNC_REFRESH
1268         select GPIO_EXTRA_HEADER
1269         help
1270           Support for Freescale LS2080A_EMU platform.
1271           The LS2080A Development System (EMULATOR) is a pre-silicon
1272           development platform that supports the QorIQ LS2080A
1273           Layerscape Architecture processor.
1274
1275 config TARGET_LS1088AQDS
1276         bool "Support ls1088aqds"
1277         select ARCH_LS1088A
1278         select ARM64
1279         select ARMV8_MULTIENTRY
1280         select ARCH_SUPPORT_TFABOOT
1281         select BOARD_LATE_INIT
1282         select GPIO_EXTRA_HEADER
1283         select SUPPORT_SPL
1284         select FSL_DDR_INTERACTIVE if !SD_BOOT
1285         help
1286           Support for NXP LS1088AQDS platform.
1287           The LS1088A Development System (QDS) is a high-performance
1288           development platform that supports the QorIQ LS1088A
1289           Layerscape Architecture processor.
1290
1291 config TARGET_LS2080AQDS
1292         bool "Support ls2080aqds"
1293         select ARCH_LS2080A
1294         select ARM64
1295         select ARMV8_MULTIENTRY
1296         select ARCH_SUPPORT_TFABOOT
1297         select BOARD_LATE_INIT
1298         select GPIO_EXTRA_HEADER
1299         select SUPPORT_SPL
1300         imply SCSI
1301         imply SCSI_AHCI
1302         select FSL_DDR_BIST
1303         select FSL_DDR_INTERACTIVE if !SPL
1304         help
1305           Support for Freescale LS2080AQDS platform.
1306           The LS2080A Development System (QDS) is a high-performance
1307           development platform that supports the QorIQ LS2080A
1308           Layerscape Architecture processor.
1309
1310 config TARGET_LS2080ARDB
1311         bool "Support ls2080ardb"
1312         select ARCH_LS2080A
1313         select ARM64
1314         select ARMV8_MULTIENTRY
1315         select ARCH_SUPPORT_TFABOOT
1316         select BOARD_LATE_INIT
1317         select SUPPORT_SPL
1318         select FSL_DDR_BIST
1319         select FSL_DDR_INTERACTIVE if !SPL
1320         select GPIO_EXTRA_HEADER
1321         imply SCSI
1322         imply SCSI_AHCI
1323         help
1324           Support for Freescale LS2080ARDB platform.
1325           The LS2080A Reference design board (RDB) is a high-performance
1326           development platform that supports the QorIQ LS2080A
1327           Layerscape Architecture processor.
1328
1329 config TARGET_LS2081ARDB
1330         bool "Support ls2081ardb"
1331         select ARCH_LS2080A
1332         select ARM64
1333         select ARMV8_MULTIENTRY
1334         select BOARD_LATE_INIT
1335         select GPIO_EXTRA_HEADER
1336         select SUPPORT_SPL
1337         help
1338           Support for Freescale LS2081ARDB platform.
1339           The LS2081A Reference design board (RDB) is a high-performance
1340           development platform that supports the QorIQ LS2081A/LS2041A
1341           Layerscape Architecture processor.
1342
1343 config TARGET_LX2160ARDB
1344         bool "Support lx2160ardb"
1345         select ARCH_LX2160A
1346         select ARM64
1347         select ARMV8_MULTIENTRY
1348         select ARCH_SUPPORT_TFABOOT
1349         select BOARD_LATE_INIT
1350         select GPIO_EXTRA_HEADER
1351         help
1352           Support for NXP LX2160ARDB platform.
1353           The lx2160ardb (LX2160A Reference design board (RDB)
1354           is a high-performance development platform that supports the
1355           QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1356
1357 config TARGET_LX2160AQDS
1358         bool "Support lx2160aqds"
1359         select ARCH_LX2160A
1360         select ARM64
1361         select ARMV8_MULTIENTRY
1362         select ARCH_SUPPORT_TFABOOT
1363         select BOARD_LATE_INIT
1364         select GPIO_EXTRA_HEADER
1365         help
1366           Support for NXP LX2160AQDS platform.
1367           The lx2160aqds (LX2160A QorIQ Development System (QDS)
1368           is a high-performance development platform that supports the
1369           QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1370
1371 config TARGET_LX2162AQDS
1372         bool "Support lx2162aqds"
1373         select ARCH_LX2162A
1374         select ARCH_MISC_INIT
1375         select ARM64
1376         select ARMV8_MULTIENTRY
1377         select ARCH_SUPPORT_TFABOOT
1378         select BOARD_LATE_INIT
1379         select GPIO_EXTRA_HEADER
1380         help
1381           Support for NXP LX2162AQDS platform.
1382           The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1383
1384 config TARGET_HIKEY
1385         bool "Support HiKey 96boards Consumer Edition Platform"
1386         select ARM64
1387         select DM
1388         select DM_GPIO
1389         select DM_SERIAL
1390         select GPIO_EXTRA_HEADER
1391         select OF_CONTROL
1392         select PL01X_SERIAL
1393         select SPECIFY_CONSOLE_INDEX
1394         imply CMD_DM
1395           help
1396           Support for HiKey 96boards platform. It features a HI6220
1397           SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1398
1399 config TARGET_HIKEY960
1400         bool "Support HiKey960 96boards Consumer Edition Platform"
1401         select ARM64
1402         select DM
1403         select DM_SERIAL
1404         select GPIO_EXTRA_HEADER
1405         select OF_CONTROL
1406         select PL01X_SERIAL
1407         imply CMD_DM
1408           help
1409           Support for HiKey960 96boards platform. It features a HI3660
1410           SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1411
1412 config TARGET_POPLAR
1413         bool "Support Poplar 96boards Enterprise Edition Platform"
1414         select ARM64
1415         select DM
1416         select DM_SERIAL
1417         select GPIO_EXTRA_HEADER
1418         select OF_CONTROL
1419         select PL01X_SERIAL
1420         imply CMD_DM
1421           help
1422           Support for Poplar 96boards EE platform. It features a HI3798cv200
1423           SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1424           making it capable of running any commercial set-top solution based on
1425           Linux or Android.
1426
1427 config TARGET_LS1012AQDS
1428         bool "Support ls1012aqds"
1429         select ARCH_LS1012A
1430         select ARM64
1431         select ARCH_SUPPORT_TFABOOT
1432         select BOARD_LATE_INIT
1433         select GPIO_EXTRA_HEADER
1434         help
1435           Support for Freescale LS1012AQDS platform.
1436           The LS1012A Development System (QDS) is a high-performance
1437           development platform that supports the QorIQ LS1012A
1438           Layerscape Architecture processor.
1439
1440 config TARGET_LS1012ARDB
1441         bool "Support ls1012ardb"
1442         select ARCH_LS1012A
1443         select ARM64
1444         select ARCH_SUPPORT_TFABOOT
1445         select BOARD_LATE_INIT
1446         select GPIO_EXTRA_HEADER
1447         imply SCSI
1448         imply SCSI_AHCI
1449         help
1450           Support for Freescale LS1012ARDB platform.
1451           The LS1012A Reference design board (RDB) is a high-performance
1452           development platform that supports the QorIQ LS1012A
1453           Layerscape Architecture processor.
1454
1455 config TARGET_LS1012A2G5RDB
1456         bool "Support ls1012a2g5rdb"
1457         select ARCH_LS1012A
1458         select ARM64
1459         select ARCH_SUPPORT_TFABOOT
1460         select BOARD_LATE_INIT
1461         select GPIO_EXTRA_HEADER
1462         imply SCSI
1463         help
1464           Support for Freescale LS1012A2G5RDB platform.
1465           The LS1012A 2G5 Reference design board (RDB) is a high-performance
1466           development platform that supports the QorIQ LS1012A
1467           Layerscape Architecture processor.
1468
1469 config TARGET_LS1012AFRWY
1470         bool "Support ls1012afrwy"
1471         select ARCH_LS1012A
1472         select ARM64
1473         select ARCH_SUPPORT_TFABOOT
1474         select BOARD_LATE_INIT
1475         select GPIO_EXTRA_HEADER
1476         imply SCSI
1477         imply SCSI_AHCI
1478         help
1479          Support for Freescale LS1012AFRWY platform.
1480          The LS1012A FRWY board (FRWY) is a high-performance
1481          development platform that supports the QorIQ LS1012A
1482          Layerscape Architecture processor.
1483
1484 config TARGET_LS1012AFRDM
1485         bool "Support ls1012afrdm"
1486         select ARCH_LS1012A
1487         select ARM64
1488         select ARCH_SUPPORT_TFABOOT
1489         select GPIO_EXTRA_HEADER
1490         help
1491           Support for Freescale LS1012AFRDM platform.
1492           The LS1012A Freedom  board (FRDM) is a high-performance
1493           development platform that supports the QorIQ LS1012A
1494           Layerscape Architecture processor.
1495
1496 config TARGET_LS1028AQDS
1497         bool "Support ls1028aqds"
1498         select ARCH_LS1028A
1499         select ARM64
1500         select ARMV8_MULTIENTRY
1501         select ARCH_SUPPORT_TFABOOT
1502         select BOARD_LATE_INIT
1503         select GPIO_EXTRA_HEADER
1504         help
1505           Support for Freescale LS1028AQDS platform
1506           The LS1028A Development System (QDS) is a high-performance
1507           development platform that supports the QorIQ LS1028A
1508           Layerscape Architecture processor.
1509
1510 config TARGET_LS1028ARDB
1511         bool "Support ls1028ardb"
1512         select ARCH_LS1028A
1513         select ARM64
1514         select ARMV8_MULTIENTRY
1515         select ARCH_SUPPORT_TFABOOT
1516         select BOARD_LATE_INIT
1517         select GPIO_EXTRA_HEADER
1518         help
1519           Support for Freescale LS1028ARDB platform
1520           The LS1028A Development System (RDB) is a high-performance
1521           development platform that supports the QorIQ LS1028A
1522           Layerscape Architecture processor.
1523
1524 config TARGET_LS1088ARDB
1525         bool "Support ls1088ardb"
1526         select ARCH_LS1088A
1527         select ARM64
1528         select ARMV8_MULTIENTRY
1529         select ARCH_SUPPORT_TFABOOT
1530         select BOARD_LATE_INIT
1531         select SUPPORT_SPL
1532         select FSL_DDR_INTERACTIVE if !SD_BOOT
1533         select GPIO_EXTRA_HEADER
1534         help
1535           Support for NXP LS1088ARDB platform.
1536           The LS1088A Reference design board (RDB) is a high-performance
1537           development platform that supports the QorIQ LS1088A
1538           Layerscape Architecture processor.
1539
1540 config TARGET_LS1021AQDS
1541         bool "Support ls1021aqds"
1542         select ARCH_LS1021A
1543         select ARCH_SUPPORT_PSCI
1544         select BOARD_EARLY_INIT_F
1545         select BOARD_LATE_INIT
1546         select CPU_V7A
1547         select CPU_V7_HAS_NONSEC
1548         select CPU_V7_HAS_VIRT
1549         select LS1_DEEP_SLEEP
1550         select SUPPORT_SPL
1551         select SYS_FSL_DDR
1552         select FSL_DDR_INTERACTIVE
1553         select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1554         select GPIO_EXTRA_HEADER
1555         select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1556         imply SCSI
1557
1558 config TARGET_LS1021ATWR
1559         bool "Support ls1021atwr"
1560         select ARCH_LS1021A
1561         select ARCH_SUPPORT_PSCI
1562         select BOARD_EARLY_INIT_F
1563         select BOARD_LATE_INIT
1564         select CPU_V7A
1565         select CPU_V7_HAS_NONSEC
1566         select CPU_V7_HAS_VIRT
1567         select LS1_DEEP_SLEEP
1568         select SUPPORT_SPL
1569         select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1570         select GPIO_EXTRA_HEADER
1571         imply SCSI
1572
1573 config TARGET_PG_WCOM_SELI8
1574         bool "Support Hitachi-Powergrids SELI8 service unit card"
1575         select ARCH_LS1021A
1576         select ARCH_SUPPORT_PSCI
1577         select BOARD_EARLY_INIT_F
1578         select BOARD_LATE_INIT
1579         select CPU_V7A
1580         select CPU_V7_HAS_NONSEC
1581         select CPU_V7_HAS_VIRT
1582         select SYS_FSL_DDR
1583         select FSL_DDR_INTERACTIVE
1584         select GPIO_EXTRA_HEADER
1585         select VENDOR_KM
1586         imply SCSI
1587         help
1588          Support for Hitachi-Powergrids SELI8 service unit card.
1589          SELI8 is a QorIQ LS1021a based service unit card used
1590          in XMC20 and FOX615 product families.
1591
1592 config TARGET_PG_WCOM_EXPU1
1593         bool "Support Hitachi-Powergrids EXPU1 service unit card"
1594         select ARCH_LS1021A
1595         select ARCH_SUPPORT_PSCI
1596         select BOARD_EARLY_INIT_F
1597         select BOARD_LATE_INIT
1598         select CPU_V7A
1599         select CPU_V7_HAS_NONSEC
1600         select CPU_V7_HAS_VIRT
1601         select SYS_FSL_DDR
1602         select FSL_DDR_INTERACTIVE
1603         select VENDOR_KM
1604         imply SCSI
1605         help
1606          Support for Hitachi-Powergrids EXPU1 service unit card.
1607          EXPU1 is a QorIQ LS1021a based service unit card used
1608          in XMC20 and FOX615 product families.
1609
1610 config TARGET_LS1021ATSN
1611         bool "Support ls1021atsn"
1612         select ARCH_LS1021A
1613         select ARCH_SUPPORT_PSCI
1614         select BOARD_EARLY_INIT_F
1615         select BOARD_LATE_INIT
1616         select CPU_V7A
1617         select CPU_V7_HAS_NONSEC
1618         select CPU_V7_HAS_VIRT
1619         select LS1_DEEP_SLEEP
1620         select SUPPORT_SPL
1621         select GPIO_EXTRA_HEADER
1622         imply SCSI
1623
1624 config TARGET_LS1021AIOT
1625         bool "Support ls1021aiot"
1626         select ARCH_LS1021A
1627         select ARCH_SUPPORT_PSCI
1628         select BOARD_LATE_INIT
1629         select CPU_V7A
1630         select CPU_V7_HAS_NONSEC
1631         select CPU_V7_HAS_VIRT
1632         select SUPPORT_SPL
1633         select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1634         select GPIO_EXTRA_HEADER
1635         imply SCSI
1636         help
1637           Support for Freescale LS1021AIOT platform.
1638           The LS1021A Freescale board (IOT) is a high-performance
1639           development platform that supports the QorIQ LS1021A
1640           Layerscape Architecture processor.
1641
1642 config TARGET_LS1043AQDS
1643         bool "Support ls1043aqds"
1644         select ARCH_LS1043A
1645         select ARM64
1646         select ARMV8_MULTIENTRY
1647         select ARCH_SUPPORT_TFABOOT
1648         select BOARD_EARLY_INIT_F
1649         select BOARD_LATE_INIT
1650         select SUPPORT_SPL
1651         select FSL_DDR_INTERACTIVE if !SPL
1652         select FSL_DSPI if !SPL_NO_DSPI
1653         select DM_SPI_FLASH if FSL_DSPI
1654         select GPIO_EXTRA_HEADER
1655         imply SCSI
1656         imply SCSI_AHCI
1657         help
1658           Support for Freescale LS1043AQDS platform.
1659
1660 config TARGET_LS1043ARDB
1661         bool "Support ls1043ardb"
1662         select ARCH_LS1043A
1663         select ARM64
1664         select ARMV8_MULTIENTRY
1665         select ARCH_SUPPORT_TFABOOT
1666         select BOARD_EARLY_INIT_F
1667         select BOARD_LATE_INIT
1668         select SUPPORT_SPL
1669         select FSL_DSPI if !SPL_NO_DSPI
1670         select DM_SPI_FLASH if FSL_DSPI
1671         select GPIO_EXTRA_HEADER
1672         help
1673           Support for Freescale LS1043ARDB platform.
1674
1675 config TARGET_LS1046AQDS
1676         bool "Support ls1046aqds"
1677         select ARCH_LS1046A
1678         select ARM64
1679         select ARMV8_MULTIENTRY
1680         select ARCH_SUPPORT_TFABOOT
1681         select BOARD_EARLY_INIT_F
1682         select BOARD_LATE_INIT
1683         select DM_SPI_FLASH if DM_SPI
1684         select SUPPORT_SPL
1685         select FSL_DDR_BIST if !SPL
1686         select FSL_DDR_INTERACTIVE  if !SPL
1687         select FSL_DDR_INTERACTIVE if !SPL
1688         select GPIO_EXTRA_HEADER
1689         imply SCSI
1690         help
1691           Support for Freescale LS1046AQDS platform.
1692           The LS1046A Development System (QDS) is a high-performance
1693           development platform that supports the QorIQ LS1046A
1694           Layerscape Architecture processor.
1695
1696 config TARGET_LS1046ARDB
1697         bool "Support ls1046ardb"
1698         select ARCH_LS1046A
1699         select ARM64
1700         select ARMV8_MULTIENTRY
1701         select ARCH_SUPPORT_TFABOOT
1702         select BOARD_EARLY_INIT_F
1703         select BOARD_LATE_INIT
1704         select DM_SPI_FLASH if DM_SPI
1705         select POWER_MC34VR500
1706         select SUPPORT_SPL
1707         select FSL_DDR_BIST
1708         select FSL_DDR_INTERACTIVE if !SPL
1709         select GPIO_EXTRA_HEADER
1710         imply SCSI
1711         help
1712           Support for Freescale LS1046ARDB platform.
1713           The LS1046A Reference Design Board (RDB) is a high-performance
1714           development platform that supports the QorIQ LS1046A
1715           Layerscape Architecture processor.
1716
1717 config TARGET_LS1046AFRWY
1718         bool "Support ls1046afrwy"
1719         select ARCH_LS1046A
1720         select ARM64
1721         select ARMV8_MULTIENTRY
1722         select ARCH_SUPPORT_TFABOOT
1723         select BOARD_EARLY_INIT_F
1724         select BOARD_LATE_INIT
1725         select DM_SPI_FLASH if DM_SPI
1726         select GPIO_EXTRA_HEADER
1727         imply SCSI
1728         help
1729           Support for Freescale LS1046AFRWY platform.
1730           The LS1046A Freeway Board (FRWY) is a high-performance
1731           development platform that supports the QorIQ LS1046A
1732           Layerscape Architecture processor.
1733
1734 config TARGET_SL28
1735         bool "Support sl28"
1736         select ARCH_LS1028A
1737         select ARM64
1738         select ARMV8_MULTIENTRY
1739         select SUPPORT_SPL
1740         select BINMAN
1741         select DM
1742         select DM_GPIO
1743         select DM_I2C
1744         select DM_MMC
1745         select DM_SPI_FLASH
1746         select DM_ETH
1747         select DM_MDIO
1748         select PCI
1749         select DM_RNG
1750         select DM_RTC
1751         select DM_SCSI
1752         select DM_SERIAL
1753         select DM_SPI
1754         select GPIO_EXTRA_HEADER
1755         select SPL_DM if SPL
1756         select SPL_DM_SPI if SPL
1757         select SPL_DM_SPI_FLASH if SPL
1758         select SPL_DM_I2C if SPL
1759         select SPL_DM_MMC if SPL
1760         select SPL_DM_SERIAL if SPL
1761         help
1762           Support for Kontron SMARC-sAL28 board.
1763
1764 config TARGET_COLIBRI_PXA270
1765         bool "Support colibri_pxa270"
1766         select CPU_PXA
1767         select GPIO_EXTRA_HEADER
1768
1769 config ARCH_UNIPHIER
1770         bool "Socionext UniPhier SoCs"
1771         select BOARD_LATE_INIT
1772         select DM
1773         select DM_ETH
1774         select DM_GPIO
1775         select DM_I2C
1776         select DM_MMC
1777         select DM_MTD
1778         select DM_RESET
1779         select DM_SERIAL
1780         select OF_BOARD_SETUP
1781         select OF_CONTROL
1782         select OF_LIBFDT
1783         select PINCTRL
1784         select SPL_BOARD_INIT if SPL
1785         select SPL_DM if SPL
1786         select SPL_LIBCOMMON_SUPPORT if SPL
1787         select SPL_LIBGENERIC_SUPPORT if SPL
1788         select SPL_OF_CONTROL if SPL
1789         select SPL_PINCTRL if SPL
1790         select SUPPORT_SPL
1791         imply CMD_DM
1792         imply DISTRO_DEFAULTS
1793         imply FAT_WRITE
1794         help
1795           Support for UniPhier SoC family developed by Socionext Inc.
1796           (formerly, System LSI Business Division of Panasonic Corporation)
1797
1798 config ARCH_SYNQUACER
1799         bool "Socionext SynQuacer SoCs"
1800         select ARM64
1801         select DM
1802         select GIC_V3
1803         select PSCI_RESET
1804         select SYSRESET
1805         select SYSRESET_PSCI
1806         select OF_CONTROL
1807         help
1808           Support for SynQuacer SoC family developed by Socionext Inc.
1809           This SoC is used on 96boards EE DeveloperBox.
1810
1811 config ARCH_STM32
1812         bool "Support STMicroelectronics STM32 MCU with cortex M"
1813         select CPU_V7M
1814         select DM
1815         select DM_SERIAL
1816         select GPIO_EXTRA_HEADER
1817         imply CMD_DM
1818
1819 config ARCH_STI
1820         bool "Support STMicrolectronics SoCs"
1821         select BLK
1822         select CPU_V7A
1823         select DM
1824         select DM_MMC
1825         select DM_RESET
1826         select DM_SERIAL
1827         imply CMD_DM
1828         help
1829           Support for STMicroelectronics STiH407/10 SoC family.
1830           This SoC is used on Linaro 96Board STiH410-B2260
1831
1832 config ARCH_STM32MP
1833         bool "Support STMicroelectronics STM32MP Socs with cortex A"
1834         select ARCH_MISC_INIT
1835         select ARCH_SUPPORT_TFABOOT
1836         select BOARD_LATE_INIT
1837         select CLK
1838         select DM
1839         select DM_GPIO
1840         select DM_RESET
1841         select DM_SERIAL
1842         select GPIO_EXTRA_HEADER
1843         select MISC
1844         select OF_CONTROL
1845         select OF_LIBFDT
1846         select OF_SYSTEM_SETUP
1847         select PINCTRL
1848         select REGMAP
1849         select SUPPORT_SPL
1850         select SYSCON
1851         select SYSRESET
1852         select SYS_THUMB_BUILD
1853         imply SPL_SYSRESET
1854         imply CMD_DM
1855         imply CMD_POWEROFF
1856         imply OF_LIBFDT_OVERLAY
1857         imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1858         imply USE_PREBOOT
1859         help
1860           Support for STM32MP SoC family developed by STMicroelectronics,
1861           MPUs based on ARM cortex A core
1862           U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1863           FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1864           chain.
1865           SPL is the unsecure FSBL for the basic boot chain.
1866
1867 config ARCH_ROCKCHIP
1868         bool "Support Rockchip SoCs"
1869         select BLK
1870         select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1871         select DM
1872         select DM_GPIO
1873         select DM_I2C
1874         select DM_MMC
1875         select DM_PWM
1876         select DM_REGULATOR
1877         select DM_SERIAL
1878         select DM_SPI
1879         select DM_SPI_FLASH
1880         select ENABLE_ARM_SOC_BOOT0_HOOK
1881         select OF_CONTROL
1882         select SPI
1883         select SPL_DM if SPL
1884         select SPL_DM_SPI if SPL
1885         select SPL_DM_SPI_FLASH if SPL
1886         select SYS_MALLOC_F
1887         select SYS_THUMB_BUILD if !ARM64
1888         imply ADC
1889         imply CMD_DM
1890         imply DEBUG_UART_BOARD_INIT
1891         imply DISTRO_DEFAULTS
1892         imply FAT_WRITE
1893         imply SARADC_ROCKCHIP
1894         imply SPL_SYSRESET
1895         imply SPL_SYS_MALLOC_SIMPLE
1896         imply SYS_NS16550
1897         imply TPL_SYSRESET
1898         imply USB_FUNCTION_FASTBOOT
1899
1900 config ARCH_OCTEONTX
1901         bool "Support OcteonTX SoCs"
1902         select CLK
1903         select DM
1904         select GPIO_EXTRA_HEADER
1905         select ARM64
1906         select OF_CONTROL
1907         select OF_LIVE
1908         select BOARD_LATE_INIT
1909         select SYS_CACHE_SHIFT_7
1910
1911 config ARCH_OCTEONTX2
1912         bool "Support OcteonTX2 SoCs"
1913         select CLK
1914         select DM
1915         select GPIO_EXTRA_HEADER
1916         select ARM64
1917         select OF_CONTROL
1918         select OF_LIVE
1919         select BOARD_LATE_INIT
1920         select SYS_CACHE_SHIFT_7
1921
1922 config TARGET_THUNDERX_88XX
1923         bool "Support ThunderX 88xx"
1924         select ARM64
1925         select GPIO_EXTRA_HEADER
1926         select OF_CONTROL
1927         select PL01X_SERIAL
1928         select SYS_CACHE_SHIFT_7
1929
1930 config ARCH_ASPEED
1931         bool "Support Aspeed SoCs"
1932         select DM
1933         select OF_CONTROL
1934         imply CMD_DM
1935
1936 config TARGET_DURIAN
1937         bool "Support Phytium Durian Platform"
1938         select ARM64
1939         select GPIO_EXTRA_HEADER
1940         help
1941           Support for durian platform.
1942           It has 2GB Sdram, uart and pcie.
1943
1944 config TARGET_PRESIDIO_ASIC
1945         bool "Support Cortina Presidio ASIC Platform"
1946         select ARM64
1947         select GICV2
1948
1949 config TARGET_XENGUEST_ARM64
1950         bool "Xen guest ARM64"
1951         select ARM64
1952         select XEN
1953         select OF_CONTROL
1954         select LINUX_KERNEL_IMAGE_HEADER
1955         select XEN_SERIAL
1956         select SSCANF
1957 endchoice
1958
1959 config SUPPORT_PASSING_ATAGS
1960         bool "Support pre-devicetree ATAG-based booting"
1961         depends on !ARM64
1962         imply SETUP_MEMORY_TAGS
1963         help
1964           Support for booting older Linux kernels, using ATAGs rather than
1965           passing a devicetree.  This is option is rarely used, and the
1966           semantics are defined at
1967           https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
1968
1969 config SETUP_MEMORY_TAGS
1970         bool "Pass memory size information via ATAG"
1971         depends on SUPPORT_PASSING_ATAGS
1972
1973 config CMDLINE_TAG
1974         bool "Pass Linux kernel cmdline via ATAG"
1975         depends on SUPPORT_PASSING_ATAGS
1976
1977 config INITRD_TAG
1978         bool "Pass initrd starting point and size via ATAG"
1979         depends on SUPPORT_PASSING_ATAGS
1980
1981 config REVISION_TAG
1982         bool "Pass system revision via ATAG"
1983         depends on SUPPORT_PASSING_ATAGS
1984
1985 config SERIAL_TAG
1986         bool "Pass system serial number via ATAG"
1987         depends on SUPPORT_PASSING_ATAGS
1988
1989 config STATIC_MACH_TYPE
1990         bool "Statically define the Machine ID number"
1991         help
1992           When booting via ATAGs, enable this option if we know the correct
1993           machine ID number to use at compile time.  Some systems will be
1994           passed the number dynamically by whatever loads U-Boot.
1995
1996 config MACH_TYPE
1997         int "Machine ID number"
1998         depends on STATIC_MACH_TYPE
1999         help
2000           When booting via ATAGs, the machine type must be passed as a number.
2001           For the full list see https://www.arm.linux.org.uk/developer/machines
2002
2003 config ARCH_SUPPORT_TFABOOT
2004         bool
2005
2006 config TFABOOT
2007         bool "Support for booting from TF-A"
2008         depends on ARCH_SUPPORT_TFABOOT
2009         help
2010           Some platforms support the setup of secure registers (for instance
2011           for CPU errata handling) or provide secure services like PSCI.
2012           Those services could also be provided by other firmware parts
2013           like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2014           does not need to (and cannot) execute this code.
2015           Enabling this option will make a U-Boot binary that is relying
2016           on other firmware layers to provide secure functionality.
2017
2018 config TI_SECURE_DEVICE
2019         bool "HS Device Type Support"
2020         depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2021         help
2022           If a high secure (HS) device type is being used, this config
2023           must be set. This option impacts various aspects of the
2024           build system (to create signed boot images that can be
2025           authenticated) and the code. See the doc/README.ti-secure
2026           file for further details.
2027
2028 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2029 config ISW_ENTRY_ADDR
2030         hex "Address in memory or XIP address of bootloader entry point"
2031         default 0x402F4000 if AM43XX
2032         default 0x402F0400 if AM33XX
2033         default 0x40301350 if OMAP54XX
2034         help
2035           After any reset, the boot ROM searches the boot media for a valid
2036           boot image. For non-XIP devices, the ROM then copies the image into
2037           internal memory. For all boot modes, after the ROM processes the
2038           boot image it eventually computes the entry point address depending
2039           on the device type (secure/non-secure), boot media (xip/non-xip) and
2040           image headers.
2041 endif
2042
2043 source "arch/arm/mach-apple/Kconfig"
2044
2045 source "arch/arm/mach-aspeed/Kconfig"
2046
2047 source "arch/arm/mach-at91/Kconfig"
2048
2049 source "arch/arm/mach-bcm283x/Kconfig"
2050
2051 source "arch/arm/mach-bcmstb/Kconfig"
2052
2053 source "arch/arm/mach-davinci/Kconfig"
2054
2055 source "arch/arm/mach-exynos/Kconfig"
2056
2057 source "arch/arm/mach-highbank/Kconfig"
2058
2059 source "arch/arm/mach-integrator/Kconfig"
2060
2061 source "arch/arm/mach-ipq40xx/Kconfig"
2062
2063 source "arch/arm/mach-k3/Kconfig"
2064
2065 source "arch/arm/mach-keystone/Kconfig"
2066
2067 source "arch/arm/mach-kirkwood/Kconfig"
2068
2069 source "arch/arm/mach-lpc32xx/Kconfig"
2070
2071 source "arch/arm/mach-mvebu/Kconfig"
2072
2073 source "arch/arm/mach-octeontx/Kconfig"
2074
2075 source "arch/arm/mach-octeontx2/Kconfig"
2076
2077 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2078
2079 source "arch/arm/mach-imx/mx3/Kconfig"
2080
2081 source "arch/arm/mach-imx/mx5/Kconfig"
2082
2083 source "arch/arm/mach-imx/mx6/Kconfig"
2084
2085 source "arch/arm/mach-imx/mx7/Kconfig"
2086
2087 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2088
2089 source "arch/arm/mach-imx/imx8/Kconfig"
2090
2091 source "arch/arm/mach-imx/imx8m/Kconfig"
2092
2093 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2094
2095 source "arch/arm/mach-imx/imxrt/Kconfig"
2096
2097 source "arch/arm/mach-imx/mxs/Kconfig"
2098
2099 source "arch/arm/mach-omap2/Kconfig"
2100
2101 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2102
2103 source "arch/arm/mach-orion5x/Kconfig"
2104
2105 source "arch/arm/mach-owl/Kconfig"
2106
2107 source "arch/arm/mach-rmobile/Kconfig"
2108
2109 source "arch/arm/mach-meson/Kconfig"
2110
2111 source "arch/arm/mach-mediatek/Kconfig"
2112
2113 source "arch/arm/mach-qemu/Kconfig"
2114
2115 source "arch/arm/mach-rockchip/Kconfig"
2116
2117 source "arch/arm/mach-s5pc1xx/Kconfig"
2118
2119 source "arch/arm/mach-snapdragon/Kconfig"
2120
2121 source "arch/arm/mach-socfpga/Kconfig"
2122
2123 source "arch/arm/mach-sti/Kconfig"
2124
2125 source "arch/arm/mach-stm32/Kconfig"
2126
2127 source "arch/arm/mach-stm32mp/Kconfig"
2128
2129 source "arch/arm/mach-sunxi/Kconfig"
2130
2131 source "arch/arm/mach-tegra/Kconfig"
2132
2133 source "arch/arm/mach-u8500/Kconfig"
2134
2135 source "arch/arm/mach-uniphier/Kconfig"
2136
2137 source "arch/arm/cpu/armv7/vf610/Kconfig"
2138
2139 source "arch/arm/mach-zynq/Kconfig"
2140
2141 source "arch/arm/mach-zynqmp/Kconfig"
2142
2143 source "arch/arm/mach-versal/Kconfig"
2144
2145 source "arch/arm/mach-zynqmp-r5/Kconfig"
2146
2147 source "arch/arm/cpu/armv7/Kconfig"
2148
2149 source "arch/arm/cpu/armv8/Kconfig"
2150
2151 source "arch/arm/mach-imx/Kconfig"
2152
2153 source "arch/arm/mach-nexell/Kconfig"
2154
2155 source "board/armltd/total_compute/Kconfig"
2156
2157 source "board/bosch/shc/Kconfig"
2158 source "board/bosch/guardian/Kconfig"
2159 source "board/Marvell/octeontx/Kconfig"
2160 source "board/Marvell/octeontx2/Kconfig"
2161 source "board/armltd/vexpress/Kconfig"
2162 source "board/armltd/vexpress64/Kconfig"
2163 source "board/cortina/presidio-asic/Kconfig"
2164 source "board/broadcom/bcm963158/Kconfig"
2165 source "board/broadcom/bcm968360bg/Kconfig"
2166 source "board/broadcom/bcm968580xref/Kconfig"
2167 source "board/broadcom/bcmns3/Kconfig"
2168 source "board/cavium/thunderx/Kconfig"
2169 source "board/eets/pdu001/Kconfig"
2170 source "board/emulation/qemu-arm/Kconfig"
2171 source "board/freescale/ls2080aqds/Kconfig"
2172 source "board/freescale/ls2080ardb/Kconfig"
2173 source "board/freescale/ls1088a/Kconfig"
2174 source "board/freescale/ls1028a/Kconfig"
2175 source "board/freescale/ls1021aqds/Kconfig"
2176 source "board/freescale/ls1043aqds/Kconfig"
2177 source "board/freescale/ls1021atwr/Kconfig"
2178 source "board/freescale/ls1021atsn/Kconfig"
2179 source "board/freescale/ls1021aiot/Kconfig"
2180 source "board/freescale/ls1046aqds/Kconfig"
2181 source "board/freescale/ls1043ardb/Kconfig"
2182 source "board/freescale/ls1046ardb/Kconfig"
2183 source "board/freescale/ls1046afrwy/Kconfig"
2184 source "board/freescale/ls1012aqds/Kconfig"
2185 source "board/freescale/ls1012ardb/Kconfig"
2186 source "board/freescale/ls1012afrdm/Kconfig"
2187 source "board/freescale/lx2160a/Kconfig"
2188 source "board/grinn/chiliboard/Kconfig"
2189 source "board/hisilicon/hikey/Kconfig"
2190 source "board/hisilicon/hikey960/Kconfig"
2191 source "board/hisilicon/poplar/Kconfig"
2192 source "board/isee/igep003x/Kconfig"
2193 source "board/kontron/sl28/Kconfig"
2194 source "board/myir/mys_6ulx/Kconfig"
2195 source "board/seeed/npi_imx6ull/Kconfig"
2196 source "board/socionext/developerbox/Kconfig"
2197 source "board/st/stv0991/Kconfig"
2198 source "board/tcl/sl50/Kconfig"
2199 source "board/toradex/colibri_pxa270/Kconfig"
2200 source "board/variscite/dart_6ul/Kconfig"
2201 source "board/vscom/baltos/Kconfig"
2202 source "board/phytium/durian/Kconfig"
2203 source "board/xen/xenguest_arm64/Kconfig"
2204 source "board/keymile/Kconfig"
2205
2206 source "arch/arm/Kconfig.debug"
2207
2208 endmenu
2209
2210 config SPL_LDSCRIPT
2211         default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2212         default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2213         default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64