1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
14 bool "Enable support for CRC32 instruction"
15 depends on ARM64 && CC_IS_GCC
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
70 depends on INIT_SP_RELATIVE
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
78 config SPL_SYS_NO_VECTOR_TABLE
82 config SPL_USE_SEPARATE_FAULT_HANDLERS
83 bool "Use separate fault handlers instead of a single common one"
84 depends on !SPL_SYS_NO_VECTOR_TABLE && !ARM64 && !CPU_V7M
86 Instead of a common fault handler, generate a separate one for
87 undefined_instruction, software_interrupt, prefetch_abort etc.
88 This is for debugging purposes, when you want to set breakpoints
91 config LINUX_KERNEL_IMAGE_HEADER
95 Place a Linux kernel image header at the start of the U-Boot binary.
96 The format of the header is described in the Linux kernel source at
97 Documentation/arm64/booting.txt. This feature is useful since the
98 image header reports the amount of memory (BSS and similar) that
99 U-Boot needs to use, but which isn't part of the binary.
101 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
102 depends on LINUX_KERNEL_IMAGE_HEADER
105 The value subtracted from CONFIG_TEXT_BASE to calculate the
106 TEXT_OFFSET value written to the Linux kernel image header.
118 ARM GICV3 Interrupt translation service (ITS).
119 Basic support for programming locality specific peripheral
120 interrupts (LPI) configuration tables and enable LPI tables.
121 LPI configuration table can be used by u-boot or Linux.
122 ARM GICV3 has limitation, once the LPI table is enabled, LPI
123 configuration table can not be re-programmed, unless GICV3 reset.
129 config DMA_ADDR_T_64BIT
139 config GPIO_EXTRA_HEADER
142 # Used for compatibility with asm files copied from the kernel
143 config ARM_ASM_UNIFIED
147 # Used for compatibility with asm files copied from the kernel
151 config SYS_ICACHE_OFF
152 bool "Do not enable icache"
154 Do not enable instruction cache in U-Boot.
156 config SPL_SYS_ICACHE_OFF
157 bool "Do not enable icache in SPL"
159 default SYS_ICACHE_OFF
161 Do not enable instruction cache in SPL.
163 config SYS_DCACHE_OFF
164 bool "Do not enable dcache"
166 Do not enable data cache in U-Boot.
168 config SPL_SYS_DCACHE_OFF
169 bool "Do not enable dcache in SPL"
171 default SYS_DCACHE_OFF
173 Do not enable data cache in SPL.
175 config SYS_ARM_CACHE_CP15
176 bool "CP15 based cache enabling support"
178 Select this if your processor suports enabling caches by using
182 bool "MMU-based Paged Memory Management Support"
183 select SYS_ARM_CACHE_CP15
185 Select if you want MMU-based virtualised addressing space
186 support via paged memory management.
189 bool 'Use the ARM v7 PMSA Compliant MPU'
191 Some ARM systems without an MMU have instead a Memory Protection
192 Unit (MPU) that defines the type and permissions for regions of
194 If your CPU has an MPU then you should choose 'y' here unless you
195 know that you do not want to use the MPU.
197 # If set, the workarounds for these ARM errata are applied early during U-Boot
198 # startup. Note that in general these options force the workarounds to be
199 # applied; no CPU-type/version detection exists, unlike the similar options in
200 # the Linux kernel. Do not set these options unless they apply! Also note that
201 # the following can be machine-specific errata. These do have ability to
202 # provide rudimentary version and machine-specific checks, but expect no
204 # CONFIG_ARM_ERRATA_430973
205 # CONFIG_ARM_ERRATA_454179
206 # CONFIG_ARM_ERRATA_621766
207 # CONFIG_ARM_ERRATA_798870
208 # CONFIG_ARM_ERRATA_801819
209 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
210 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
212 config ARM_ERRATA_430973
215 config ARM_ERRATA_454179
218 config ARM_ERRATA_621766
221 config ARM_ERRATA_716044
224 config ARM_ERRATA_725233
227 config ARM_ERRATA_742230
230 config ARM_ERRATA_743622
233 config ARM_ERRATA_751472
236 config ARM_ERRATA_761320
239 config ARM_ERRATA_773022
242 config ARM_ERRATA_774769
245 config ARM_ERRATA_794072
248 config ARM_ERRATA_798870
251 config ARM_ERRATA_801819
254 config ARM_ERRATA_826974
257 config ARM_ERRATA_828024
260 config ARM_ERRATA_829520
263 config ARM_ERRATA_833069
266 config ARM_ERRATA_833471
269 config ARM_ERRATA_845369
272 config ARM_ERRATA_852421
275 config ARM_ERRATA_852423
278 config ARM_ERRATA_855873
281 config ARM_CORTEX_A8_CVE_2017_5715
284 config ARM_CORTEX_A15_CVE_2017_5715
289 select SYS_CACHE_SHIFT_5
294 select SYS_CACHE_SHIFT_5
299 select SYS_CACHE_SHIFT_5
301 imply SPL_SEPARATE_BSS
305 select SYS_CACHE_SHIFT_5
310 select SYS_CACHE_SHIFT_5
312 imply SPL_SEPARATE_BSS
317 select SYS_CACHE_SHIFT_5
324 select SYS_CACHE_SHIFT_6
331 select SYS_CACHE_SHIFT_5
332 select SYS_THUMB_BUILD
338 select SYS_ARM_CACHE_CP15
340 select SYS_CACHE_SHIFT_6
343 default "arm720t" if CPU_ARM720T
344 default "arm920t" if CPU_ARM920T
345 default "arm926ejs" if CPU_ARM926EJS
346 default "arm946es" if CPU_ARM946ES
347 default "arm1136" if CPU_ARM1136
348 default "arm1176" if CPU_ARM1176
349 default "armv7" if CPU_V7A
350 default "armv7" if CPU_V7R
351 default "armv7m" if CPU_V7M
352 default "armv8" if ARM64
356 default 4 if CPU_ARM720T
357 default 4 if CPU_ARM920T
358 default 5 if CPU_ARM926EJS
359 default 5 if CPU_ARM946ES
360 default 6 if CPU_ARM1136
361 default 6 if CPU_ARM1176
368 prompt "Select the ARM data write cache policy"
369 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMNS || RZA1
370 default SYS_ARM_CACHE_WRITEBACK
372 config SYS_ARM_CACHE_WRITEBACK
373 bool "Write-back (WB)"
375 A write updates the cache only and marks the cache line as dirty.
376 External memory is updated only when the line is evicted or explicitly
379 config SYS_ARM_CACHE_WRITETHROUGH
380 bool "Write-through (WT)"
382 A write updates both the cache and the external memory system.
383 This does not mark the cache line as dirty.
385 config SYS_ARM_CACHE_WRITEALLOC
386 bool "Write allocation (WA)"
388 A cache line is allocated on a write miss. This means that executing a
389 store instruction on the processor might cause a burst read to occur.
390 There is a linefill to obtain the data for the cache line, before the
394 config ARCH_VERY_EARLY_INIT
397 config SPL_ARCH_VERY_EARLY_INIT
401 bool "Enable ARCH_CPU_INIT"
403 Some architectures require a call to arch_cpu_init().
404 Say Y here to enable it
406 config SYS_ARCH_TIMER
407 bool "ARM Generic Timer support"
408 depends on CPU_V7A || ARM64
411 The ARM Generic Timer (aka arch-timer) provides an architected
412 interface to a timer source on an SoC.
413 It is mandatory for ARMv8 implementation and widely available
417 bool "Support for ARM SMC Calling Convention (SMCCC)"
418 depends on CPU_V7A || ARM64
421 Say Y here if you want to enable ARM SMC Calling Convention.
422 This should be enabled if U-Boot needs to communicate with system
423 firmware (for example, PSCI) according to SMCCC.
425 config SYS_THUMB_BUILD
426 bool "Build U-Boot using the Thumb instruction set"
429 Use this flag to build U-Boot using the Thumb instruction set for
430 ARM architectures. Thumb instruction set provides better code
431 density. For ARM architectures that support Thumb2 this flag will
432 result in Thumb2 code generated by GCC.
434 config SPL_SYS_THUMB_BUILD
435 bool "Build SPL using the Thumb instruction set"
436 default y if SYS_THUMB_BUILD
437 depends on !ARM64 && SPL
439 Use this flag to build SPL using the Thumb instruction set for
440 ARM architectures. Thumb instruction set provides better code
441 density. For ARM architectures that support Thumb2 this flag will
442 result in Thumb2 code generated by GCC.
444 config TPL_SYS_THUMB_BUILD
445 bool "Build TPL using the Thumb instruction set"
446 default y if SYS_THUMB_BUILD
447 depends on TPL && !ARM64
449 Use this flag to build TPL using the Thumb instruction set for
450 ARM architectures. Thumb instruction set provides better code
451 density. For ARM architectures that support Thumb2 this flag will
452 result in Thumb2 code generated by GCC.
455 bool "ARM PL310 L2 cache controller"
457 Enable support for ARM PL310 L2 cache controller in U-Boot
459 config SPL_SYS_L2_PL310
460 bool "ARM PL310 L2 cache controller in SPL"
462 Enable support for ARM PL310 L2 cache controller in SPL
464 config SYS_L2CACHE_OFF
467 If SoC does not support L2CACHE or one does not want to enable
468 L2CACHE, choose this option.
470 config ENABLE_ARM_SOC_BOOT0_HOOK
471 bool "prepare BOOT0 header"
473 If the SoC's BOOT0 requires a header area filled with (magic)
474 values, then choose this option, and create a file included as
475 <asm/arch/boot0.h> which contains the required assembler code.
477 config USE_ARCH_MEMCPY
478 bool "Use an assembly optimized implementation of memcpy"
480 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
482 Enable the generation of an optimized version of memcpy.
483 Such an implementation may be faster under some conditions
484 but may increase the binary size.
486 config SPL_USE_ARCH_MEMCPY
487 bool "Use an assembly optimized implementation of memcpy for SPL"
488 default y if USE_ARCH_MEMCPY
491 Enable the generation of an optimized version of memcpy.
492 Such an implementation may be faster under some conditions
493 but may increase the binary size.
495 config TPL_USE_ARCH_MEMCPY
496 bool "Use an assembly optimized implementation of memcpy for TPL"
497 default y if USE_ARCH_MEMCPY
500 Enable the generation of an optimized version of memcpy.
501 Such an implementation may be faster under some conditions
502 but may increase the binary size.
504 config USE_ARCH_MEMMOVE
505 bool "Use an assembly optimized implementation of memmove" if !ARM64
506 default USE_ARCH_MEMCPY if ARM64
509 Enable the generation of an optimized version of memmove.
510 Such an implementation may be faster under some conditions
511 but may increase the binary size.
513 config SPL_USE_ARCH_MEMMOVE
514 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
515 default SPL_USE_ARCH_MEMCPY if ARM64
516 depends on SPL && ARM64
518 Enable the generation of an optimized version of memmove.
519 Such an implementation may be faster under some conditions
520 but may increase the binary size.
522 config TPL_USE_ARCH_MEMMOVE
523 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
524 default TPL_USE_ARCH_MEMCPY if ARM64
525 depends on TPL && ARM64
527 Enable the generation of an optimized version of memmove.
528 Such an implementation may be faster under some conditions
529 but may increase the binary size.
531 config USE_ARCH_MEMSET
532 bool "Use an assembly optimized implementation of memset"
534 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
536 Enable the generation of an optimized version of memset.
537 Such an implementation may be faster under some conditions
538 but may increase the binary size.
540 config SPL_USE_ARCH_MEMSET
541 bool "Use an assembly optimized implementation of memset for SPL"
542 default y if USE_ARCH_MEMSET
545 Enable the generation of an optimized version of memset.
546 Such an implementation may be faster under some conditions
547 but may increase the binary size.
549 config TPL_USE_ARCH_MEMSET
550 bool "Use an assembly optimized implementation of memset for TPL"
551 default y if USE_ARCH_MEMSET
554 Enable the generation of an optimized version of memset.
555 Such an implementation may be faster under some conditions
556 but may increase the binary size.
558 config ARM64_SUPPORT_AARCH32
559 bool "ARM64 system support AArch32 execution state"
561 default y if !TARGET_THUNDERX_88XX
563 This ARM64 system supports AArch32 execution state.
569 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
572 prompt "Target select"
577 select GPIO_EXTRA_HEADER
578 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
579 select SPL_SEPARATE_BSS if SPL
580 imply SYS_THUMB_BUILD
585 select GPIO_EXTRA_HEADER
586 select SPL_DM_SPI if SPL
589 Support for TI's DaVinci platform.
592 bool "Hisilicon HiSTB SoCs"
599 Support for HiSTB SoCs.
602 bool "Marvell Kirkwood"
603 select ARCH_MISC_INIT
604 select BOARD_EARLY_INIT_F
606 select GPIO_EXTRA_HEADER
610 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
611 select ARCH_EARLY_INIT_R if ARM64
616 select GPIO_EXTRA_HEADER
618 select SPL_DM_SPI if SPL
619 select SPL_DM_SPI_FLASH if SPL
620 select SPL_TIMER if SPL
621 select TIMER if !ARM64
630 select GPIO_EXTRA_HEADER
631 select SPL_SEPARATE_BSS if SPL
634 config TARGET_STV0991
635 bool "Support stv0991"
641 select GPIO_EXTRA_HEADER
649 bool "Broadcom BCM283X family"
653 select GPIO_EXTRA_HEADER
656 select SERIAL_SEARCH_ALL
661 bool "Broadcom BCM7XXX family"
664 select GPIO_EXTRA_HEADER
667 imply OF_HAS_PRIOR_STAGE
669 This enables support for Broadcom ARM-based set-top box
670 chipsets, including the 7445 family of chips.
673 bool "Broadcom broadband chip family"
678 config TARGET_VEXPRESS_CA9X4
679 bool "Support vexpress_ca9x4"
684 bool "Support Broadcom Northstar"
692 select ARM_GLOBAL_TIMER
693 imply SYS_THUMB_BUILD
696 imply NAND_BRCMNAND_IPROC
698 Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit
699 ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094,
703 bool "Support Broadcom NS3"
705 select BOARD_LATE_INIT
707 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
708 ARMv8 Cortex-A72 processors targeting a broad range of networking
712 bool "Samsung EXYNOS"
722 select GPIO_EXTRA_HEADER
723 imply SYS_THUMB_BUILD
728 bool "Samsung S5PC1XX"
734 select GPIO_EXTRA_HEADER
738 bool "Calxeda Highbank"
750 imply OF_HAS_PRIOR_STAGE
752 config ARCH_INTEGRATOR
753 bool "ARM Ltd. Integrator family"
756 select GPIO_EXTRA_HEADER
761 bool "Qualcomm IPQ40xx SoCs"
767 select GPIO_EXTRA_HEADER
773 select CLK_QCOM_IPQ4019
774 select PINCTRL_QCOM_IPQ4019
783 select SPL_BOARD_INIT if SPL
785 select SYS_ARCH_TIMER
786 select SYS_THUMB_BUILD
793 imply TI_KEYSTONE_SERDES
796 bool "Texas Instruments' K3 Architecture"
801 select FIT_SIGNATURE if ARM64
802 imply TI_SECURE_DEVICE
804 config ARCH_OMAP2PLUS
807 select GPIO_EXTRA_HEADER
808 select SPL_BOARD_INIT if SPL
809 select SPL_STACK_R if SPL
811 imply TI_SYSC if DM && OF_CONTROL
813 imply SPL_SEPARATE_BSS
817 select GPIO_EXTRA_HEADER
818 imply DISTRO_DEFAULTS
821 Support for the Meson SoC family developed by Amlogic Inc.,
822 targeted at media players and tablet computers. We currently
823 support the S905 (GXBaby) 64-bit SoC.
828 select GPIO_EXTRA_HEADER
831 select SPL_LIBCOMMON_SUPPORT if SPL
832 select SPL_LIBGENERIC_SUPPORT if SPL
833 select SPL_OF_CONTROL if SPL
836 Support for the MediaTek SoCs family developed by MediaTek Inc.
837 Please refer to doc/README.mediatek for more information.
840 bool "NXP LPC32xx platform"
845 select GPIO_EXTRA_HEADER
851 bool "NXP i.MX8 platform"
853 select SYS_FSL_HAS_SEC
854 select SYS_FSL_SEC_COMPAT_4
855 select SYS_FSL_SEC_LE
858 select GPIO_EXTRA_HEADER
861 select ENABLE_ARM_SOC_BOOT0_HOOK
864 bool "NXP i.MX8M platform"
866 select GPIO_EXTRA_HEADER
868 select SYS_FSL_HAS_SEC
869 select SYS_FSL_SEC_COMPAT_4
870 select SYS_FSL_SEC_LE
873 select DM_EVENT if CLK
878 bool "NXP i.MX8ULP platform"
885 select GPIO_EXTRA_HEADER
891 bool "NXP i.MX9 platform"
897 select GPIO_EXTRA_HEADER
903 bool "NXP i.MXRT platform"
907 select GPIO_EXTRA_HEADER
913 bool "NXP i.MX23 family"
915 select GPIO_EXTRA_HEADER
920 bool "NXP i.MX28 family"
922 select GPIO_EXTRA_HEADER
927 bool "NXP i.MX31 family"
929 select GPIO_EXTRA_HEADER
934 select BOARD_POSTCLK_INIT
936 select GPIO_EXTRA_HEADER
938 select SYS_FSL_HAS_SEC
939 select SYS_FSL_SEC_COMPAT_4
940 select SYS_FSL_SEC_LE
941 select ROM_UNIFIED_SECTIONS
943 imply SYS_THUMB_BUILD
947 select ARCH_MISC_INIT
949 select GPIO_EXTRA_HEADER
952 select SYS_FSL_HAS_SEC
953 select SYS_FSL_SEC_COMPAT_4
954 select SYS_FSL_SEC_LE
955 imply BOARD_EARLY_INIT_F
957 imply SYS_THUMB_BUILD
961 select BOARD_POSTCLK_INIT
963 select GPIO_EXTRA_HEADER
966 select SYS_FSL_HAS_SEC
967 select SYS_FSL_SEC_COMPAT_4
968 select SYS_FSL_SEC_LE
969 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
971 imply SYS_THUMB_BUILD
972 imply SPL_SEPARATE_BSS
976 select BOARD_EARLY_INIT_F
978 select GPIO_EXTRA_HEADER
983 bool "Nexell S5P4418/S5P6818 SoC"
984 select ENABLE_ARM_SOC_BOOT0_HOOK
986 select GPIO_EXTRA_HEADER
989 bool "Support Nuvoton SoCs"
1010 select LINUX_KERNEL_IMAGE_HEADER
1012 select OF_BOARD_SETUP
1017 select POSITION_INDEPENDENT
1023 select SYSRESET_WATCHDOG
1024 select SYSRESET_WATCHDOG_AUTO
1028 imply DISTRO_DEFAULTS
1029 imply OF_HAS_PRIOR_STAGE
1032 bool "Actions Semi OWL SoCs"
1035 select GPIO_EXTRA_HEADER
1040 select SYS_RELOC_GD_ENV_ADDR
1044 bool "QEMU Virtual Platform"
1053 imply OF_HAS_PRIOR_STAGE
1056 imply SYS_WHITE_ON_BLACK
1057 imply SYS_CONSOLE_IS_IN_ENV
1058 imply PRE_CONSOLE_BUFFER
1066 bool "Renesas ARM SoCs"
1069 select GPIO_EXTRA_HEADER
1071 imply BOARD_EARLY_INIT_F
1074 imply SYS_THUMB_BUILD
1075 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1077 config ARCH_SNAPDRAGON
1078 bool "Qualcomm Snapdragon SoCs"
1084 select GPIO_EXTRA_HEADER
1090 select BOARD_LATE_INIT
1092 select SAVE_PREV_BL_FDT_ADDR
1093 select LINUX_KERNEL_IMAGE_HEADER
1097 bool "Altera SOCFPGA family"
1098 select ARCH_EARLY_INIT_R
1099 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1100 select ARM64 if TARGET_SOCFPGA_SOC64
1101 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1105 select GPIO_EXTRA_HEADER
1106 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1108 select SPL_DM_RESET if DM_RESET
1109 select SPL_DM_SERIAL
1110 select SPL_LIBCOMMON_SUPPORT
1111 select SPL_LIBGENERIC_SUPPORT
1112 select SPL_OF_CONTROL
1113 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1119 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1121 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1122 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1133 imply SPL_DM_SPI_FLASH
1134 imply SPL_LIBDISK_SUPPORT
1136 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1137 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1138 imply SPL_SPI_FLASH_SUPPORT
1143 bool "Support sunxi (Allwinner) SoCs"
1146 select CMD_MMC if MMC
1147 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1151 select DM_I2C if I2C
1152 select DM_SPI if SPI
1153 select DM_SPI_FLASH if SPI && MTD
1155 select DM_MMC if MMC
1157 select OF_BOARD_SETUP
1161 select SPECIFY_CONSOLE_INDEX
1162 select SPL_SEPARATE_BSS if SPL
1163 select SPL_STACK_R if SPL
1164 select SPL_SYS_MALLOC_SIMPLE if SPL
1165 select SPL_SYS_THUMB_BUILD if SPL && !ARM64
1168 select SYS_THUMB_BUILD if !ARM64
1169 select USB if DISTRO_DEFAULTS
1170 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1171 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1172 select SPL_USE_TINY_PRINTF if SPL
1174 select SYS_RELOC_GD_ENV_ADDR
1175 imply BOARD_LATE_INIT
1178 imply CMD_UBI if MTD_RAW_NAND
1179 imply DISTRO_DEFAULTS
1181 imply DM_REGULATOR_FIXED
1184 imply OF_LIBFDT_OVERLAY
1185 imply PRE_CONSOLE_BUFFER
1187 imply SPL_LIBCOMMON_SUPPORT
1188 imply SPL_LIBGENERIC_SUPPORT
1189 imply SPL_MMC if MMC
1193 imply SYSRESET_WATCHDOG
1194 imply SYSRESET_WATCHDOG_AUTO
1199 bool "ST-Ericsson U8500 Series"
1203 select DM_MMC if MMC
1205 select DM_USB_GADGET if DM_USB
1209 imply AB8500_USB_PHY
1210 imply ARM_PL180_MMCI
1215 imply NOMADIK_MTU_TIMER
1220 imply SYS_THUMB_BUILD
1221 imply SYSRESET_SYSCON
1224 bool "Support Xilinx Versal Platform"
1228 select DM_MMC if MMC
1233 imply BOARD_LATE_INIT
1234 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1236 config ARCH_VERSAL_NET
1237 bool "Support Xilinx Versal NET Platform"
1241 select DM_MMC if MMC
1244 imply BOARD_LATE_INIT
1245 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1248 bool "Freescale Vybrid"
1250 select GPIO_EXTRA_HEADER
1251 select IOMUX_SHARE_CONF_REG
1253 select SYS_FSL_ERRATUM_ESDHC111
1258 bool "Xilinx Zynq based platform"
1259 select ARM_TWD_TIMER
1260 select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA)
1264 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1266 select DM_MMC if MMC
1273 select SPL_BOARD_INIT if SPL
1274 select SPL_CLK if SPL
1275 select SPL_DM if SPL
1276 select SPL_DM_SPI if SPL
1277 select SPL_DM_SPI_FLASH if SPL
1278 select SPL_OF_CONTROL if SPL
1279 select SPL_SEPARATE_BSS if SPL
1280 select SPL_TIMER if SPL
1283 imply BOARD_LATE_INIT
1287 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1290 config ARCH_ZYNQMP_R5
1291 bool "Xilinx ZynqMP R5 based platform"
1295 select DM_MMC if MMC
1302 bool "Xilinx ZynqMP based platform"
1306 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1308 select DM_MMC if MMC
1311 select DM_SPI if SPI
1312 select DM_SPI_FLASH if DM_SPI
1316 select SPL_BOARD_INIT if SPL
1317 select SPL_CLK if SPL
1318 select SPL_DM if SPL
1319 select SPL_DM_SPI if SPI && SPL_DM
1320 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1321 select SPL_DM_MAILBOX if SPL
1322 imply SPL_FIRMWARE if SPL
1323 select SPL_SEPARATE_BSS if SPL
1325 imply ZYNQMP_IPI if DM_MAILBOX
1327 imply BOARD_LATE_INIT
1329 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1333 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1337 select GPIO_EXTRA_HEADER
1338 imply DISTRO_DEFAULTS
1340 imply SPL_TIMER if SPL
1342 config ARCH_VEXPRESS64
1343 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1351 select MTD_NOR_FLASH if MTD
1352 select FLASH_CFI_DRIVER if MTD
1353 select ENV_IS_IN_FLASH if MTD
1354 imply DISTRO_DEFAULTS
1356 config TARGET_CORSTONE1000
1357 bool "Support Corstone1000 Platform"
1362 config TARGET_TOTAL_COMPUTE
1363 bool "Support Total Compute Platform"
1371 config TARGET_LS2080A_EMU
1372 bool "Support ls2080a_emu"
1375 select ARMV8_MULTIENTRY
1376 select FSL_DDR_SYNC_REFRESH
1377 select GPIO_EXTRA_HEADER
1379 Support for Freescale LS2080A_EMU platform.
1380 The LS2080A Development System (EMULATOR) is a pre-silicon
1381 development platform that supports the QorIQ LS2080A
1382 Layerscape Architecture processor.
1384 config TARGET_LS1088AQDS
1385 bool "Support ls1088aqds"
1388 select ARMV8_MULTIENTRY
1389 select ARCH_SUPPORT_TFABOOT
1390 select BOARD_LATE_INIT
1391 select GPIO_EXTRA_HEADER
1393 select FSL_DDR_INTERACTIVE if !SD_BOOT
1395 Support for NXP LS1088AQDS platform.
1396 The LS1088A Development System (QDS) is a high-performance
1397 development platform that supports the QorIQ LS1088A
1398 Layerscape Architecture processor.
1400 config TARGET_LS2080AQDS
1401 bool "Support ls2080aqds"
1404 select ARMV8_MULTIENTRY
1405 select ARCH_SUPPORT_TFABOOT
1406 select BOARD_LATE_INIT
1407 select GPIO_EXTRA_HEADER
1412 select FSL_DDR_INTERACTIVE if !SPL
1414 Support for Freescale LS2080AQDS platform.
1415 The LS2080A Development System (QDS) is a high-performance
1416 development platform that supports the QorIQ LS2080A
1417 Layerscape Architecture processor.
1419 config TARGET_LS2080ARDB
1420 bool "Support ls2080ardb"
1423 select ARMV8_MULTIENTRY
1424 select ARCH_SUPPORT_TFABOOT
1425 select BOARD_LATE_INIT
1428 select FSL_DDR_INTERACTIVE if !SPL
1429 select GPIO_EXTRA_HEADER
1433 Support for Freescale LS2080ARDB platform.
1434 The LS2080A Reference design board (RDB) is a high-performance
1435 development platform that supports the QorIQ LS2080A
1436 Layerscape Architecture processor.
1438 config TARGET_LS2081ARDB
1439 bool "Support ls2081ardb"
1442 select ARMV8_MULTIENTRY
1443 select BOARD_LATE_INIT
1444 select GPIO_EXTRA_HEADER
1447 Support for Freescale LS2081ARDB platform.
1448 The LS2081A Reference design board (RDB) is a high-performance
1449 development platform that supports the QorIQ LS2081A/LS2041A
1450 Layerscape Architecture processor.
1452 config TARGET_LX2160ARDB
1453 bool "Support lx2160ardb"
1456 select ARMV8_MULTIENTRY
1457 select ARCH_SUPPORT_TFABOOT
1458 select BOARD_LATE_INIT
1459 select GPIO_EXTRA_HEADER
1461 Support for NXP LX2160ARDB platform.
1462 The lx2160ardb (LX2160A Reference design board (RDB)
1463 is a high-performance development platform that supports the
1464 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1466 config TARGET_LX2160AQDS
1467 bool "Support lx2160aqds"
1470 select ARMV8_MULTIENTRY
1471 select ARCH_SUPPORT_TFABOOT
1472 select BOARD_LATE_INIT
1473 select GPIO_EXTRA_HEADER
1475 Support for NXP LX2160AQDS platform.
1476 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1477 is a high-performance development platform that supports the
1478 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1480 config TARGET_LX2162AQDS
1481 bool "Support lx2162aqds"
1483 select ARCH_MISC_INIT
1485 select ARMV8_MULTIENTRY
1486 select ARCH_SUPPORT_TFABOOT
1487 select BOARD_LATE_INIT
1488 select GPIO_EXTRA_HEADER
1490 Support for NXP LX2162AQDS platform.
1491 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1494 bool "Support HiKey 96boards Consumer Edition Platform"
1499 select GPIO_EXTRA_HEADER
1502 select SPECIFY_CONSOLE_INDEX
1505 Support for HiKey 96boards platform. It features a HI6220
1506 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1508 config TARGET_HIKEY960
1509 bool "Support HiKey960 96boards Consumer Edition Platform"
1513 select GPIO_EXTRA_HEADER
1518 Support for HiKey960 96boards platform. It features a HI3660
1519 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1521 config TARGET_POPLAR
1522 bool "Support Poplar 96boards Enterprise Edition Platform"
1526 select GPIO_EXTRA_HEADER
1531 Support for Poplar 96boards EE platform. It features a HI3798cv200
1532 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1533 making it capable of running any commercial set-top solution based on
1536 config TARGET_LS1012AQDS
1537 bool "Support ls1012aqds"
1540 select ARCH_SUPPORT_TFABOOT
1541 select BOARD_LATE_INIT
1542 select GPIO_EXTRA_HEADER
1544 Support for Freescale LS1012AQDS platform.
1545 The LS1012A Development System (QDS) is a high-performance
1546 development platform that supports the QorIQ LS1012A
1547 Layerscape Architecture processor.
1549 config TARGET_LS1012ARDB
1550 bool "Support ls1012ardb"
1553 select ARCH_SUPPORT_TFABOOT
1554 select BOARD_LATE_INIT
1555 select GPIO_EXTRA_HEADER
1559 Support for Freescale LS1012ARDB platform.
1560 The LS1012A Reference design board (RDB) is a high-performance
1561 development platform that supports the QorIQ LS1012A
1562 Layerscape Architecture processor.
1564 config TARGET_LS1012A2G5RDB
1565 bool "Support ls1012a2g5rdb"
1568 select ARCH_SUPPORT_TFABOOT
1569 select BOARD_LATE_INIT
1570 select GPIO_EXTRA_HEADER
1573 Support for Freescale LS1012A2G5RDB platform.
1574 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1575 development platform that supports the QorIQ LS1012A
1576 Layerscape Architecture processor.
1578 config TARGET_LS1012AFRWY
1579 bool "Support ls1012afrwy"
1582 select ARCH_SUPPORT_TFABOOT
1583 select BOARD_LATE_INIT
1584 select GPIO_EXTRA_HEADER
1588 Support for Freescale LS1012AFRWY platform.
1589 The LS1012A FRWY board (FRWY) is a high-performance
1590 development platform that supports the QorIQ LS1012A
1591 Layerscape Architecture processor.
1593 config TARGET_LS1012AFRDM
1594 bool "Support ls1012afrdm"
1597 select ARCH_SUPPORT_TFABOOT
1598 select GPIO_EXTRA_HEADER
1600 Support for Freescale LS1012AFRDM platform.
1601 The LS1012A Freedom board (FRDM) is a high-performance
1602 development platform that supports the QorIQ LS1012A
1603 Layerscape Architecture processor.
1605 config TARGET_LS1028AQDS
1606 bool "Support ls1028aqds"
1609 select ARMV8_MULTIENTRY
1610 select ARCH_SUPPORT_TFABOOT
1611 select BOARD_LATE_INIT
1612 select GPIO_EXTRA_HEADER
1614 Support for Freescale LS1028AQDS platform
1615 The LS1028A Development System (QDS) is a high-performance
1616 development platform that supports the QorIQ LS1028A
1617 Layerscape Architecture processor.
1619 config TARGET_LS1028ARDB
1620 bool "Support ls1028ardb"
1623 select ARMV8_MULTIENTRY
1624 select ARCH_SUPPORT_TFABOOT
1625 select BOARD_LATE_INIT
1626 select GPIO_EXTRA_HEADER
1628 Support for Freescale LS1028ARDB platform
1629 The LS1028A Development System (RDB) is a high-performance
1630 development platform that supports the QorIQ LS1028A
1631 Layerscape Architecture processor.
1633 config TARGET_LS1088ARDB
1634 bool "Support ls1088ardb"
1637 select ARMV8_MULTIENTRY
1638 select ARCH_SUPPORT_TFABOOT
1639 select BOARD_LATE_INIT
1641 select FSL_DDR_INTERACTIVE if !SD_BOOT
1642 select GPIO_EXTRA_HEADER
1644 Support for NXP LS1088ARDB platform.
1645 The LS1088A Reference design board (RDB) is a high-performance
1646 development platform that supports the QorIQ LS1088A
1647 Layerscape Architecture processor.
1649 config TARGET_LS1021AQDS
1650 bool "Support ls1021aqds"
1652 select ARCH_SUPPORT_PSCI
1653 select BOARD_EARLY_INIT_F
1654 select BOARD_LATE_INIT
1656 select CPU_V7_HAS_NONSEC
1657 select CPU_V7_HAS_VIRT
1658 select LS1_DEEP_SLEEP
1659 select PEN_ADDR_BIG_ENDIAN
1662 select FSL_DDR_INTERACTIVE
1663 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1664 select GPIO_EXTRA_HEADER
1665 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1668 config TARGET_LS1021ATWR
1669 bool "Support ls1021atwr"
1671 select ARCH_SUPPORT_PSCI
1672 select BOARD_EARLY_INIT_F
1673 select BOARD_LATE_INIT
1675 select CPU_V7_HAS_NONSEC
1676 select CPU_V7_HAS_VIRT
1677 select LS1_DEEP_SLEEP
1678 select PEN_ADDR_BIG_ENDIAN
1680 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1681 select GPIO_EXTRA_HEADER
1684 config TARGET_PG_WCOM_SELI8
1685 bool "Support Hitachi-Powergrids SELI8 service unit card"
1687 select ARCH_SUPPORT_PSCI
1688 select BOARD_EARLY_INIT_F
1689 select BOARD_LATE_INIT
1691 select CPU_V7_HAS_NONSEC
1692 select CPU_V7_HAS_VIRT
1694 select FSL_DDR_INTERACTIVE
1695 select GPIO_EXTRA_HEADER
1699 Support for Hitachi-Powergrids SELI8 service unit card.
1700 SELI8 is a QorIQ LS1021a based service unit card used
1701 in XMC20 and FOX615 product families.
1703 config TARGET_PG_WCOM_EXPU1
1704 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1706 select ARCH_SUPPORT_PSCI
1707 select BOARD_EARLY_INIT_F
1708 select BOARD_LATE_INIT
1710 select CPU_V7_HAS_NONSEC
1711 select CPU_V7_HAS_VIRT
1713 select FSL_DDR_INTERACTIVE
1717 Support for Hitachi-Powergrids EXPU1 service unit card.
1718 EXPU1 is a QorIQ LS1021a based service unit card used
1719 in XMC20 and FOX615 product families.
1721 config TARGET_LS1021ATSN
1722 bool "Support ls1021atsn"
1724 select ARCH_SUPPORT_PSCI
1725 select BOARD_EARLY_INIT_F
1726 select BOARD_LATE_INIT
1728 select CPU_V7_HAS_NONSEC
1729 select CPU_V7_HAS_VIRT
1730 select LS1_DEEP_SLEEP
1732 select GPIO_EXTRA_HEADER
1735 config TARGET_LS1021AIOT
1736 bool "Support ls1021aiot"
1738 select ARCH_SUPPORT_PSCI
1739 select BOARD_LATE_INIT
1741 select CPU_V7_HAS_NONSEC
1742 select CPU_V7_HAS_VIRT
1743 select PEN_ADDR_BIG_ENDIAN
1745 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1746 select GPIO_EXTRA_HEADER
1749 Support for Freescale LS1021AIOT platform.
1750 The LS1021A Freescale board (IOT) is a high-performance
1751 development platform that supports the QorIQ LS1021A
1752 Layerscape Architecture processor.
1754 config TARGET_LS1043AQDS
1755 bool "Support ls1043aqds"
1758 select ARMV8_MULTIENTRY
1759 select ARCH_SUPPORT_TFABOOT
1760 select BOARD_EARLY_INIT_F
1761 select BOARD_LATE_INIT
1763 select FSL_DDR_INTERACTIVE if !SPL
1764 select FSL_DSPI if !SPL_NO_DSPI
1765 select DM_SPI_FLASH if FSL_DSPI
1766 select GPIO_EXTRA_HEADER
1770 Support for Freescale LS1043AQDS platform.
1772 config TARGET_LS1043ARDB
1773 bool "Support ls1043ardb"
1776 select ARMV8_MULTIENTRY
1777 select ARCH_SUPPORT_TFABOOT
1778 select BOARD_EARLY_INIT_F
1779 select BOARD_LATE_INIT
1781 select FSL_DSPI if !SPL_NO_DSPI
1782 select DM_SPI_FLASH if FSL_DSPI
1783 select GPIO_EXTRA_HEADER
1785 Support for Freescale LS1043ARDB platform.
1787 config TARGET_LS1046AQDS
1788 bool "Support ls1046aqds"
1791 select ARMV8_MULTIENTRY
1792 select ARCH_SUPPORT_TFABOOT
1793 select BOARD_EARLY_INIT_F
1794 select BOARD_LATE_INIT
1795 select DM_SPI_FLASH if DM_SPI
1797 select FSL_DDR_BIST if !SPL
1798 select FSL_DDR_INTERACTIVE if !SPL
1799 select FSL_DDR_INTERACTIVE if !SPL
1800 select GPIO_EXTRA_HEADER
1803 Support for Freescale LS1046AQDS platform.
1804 The LS1046A Development System (QDS) is a high-performance
1805 development platform that supports the QorIQ LS1046A
1806 Layerscape Architecture processor.
1808 config TARGET_LS1046ARDB
1809 bool "Support ls1046ardb"
1812 select ARMV8_MULTIENTRY
1813 select ARCH_SUPPORT_TFABOOT
1814 select BOARD_EARLY_INIT_F
1815 select BOARD_LATE_INIT
1816 select DM_SPI_FLASH if DM_SPI
1817 select POWER_MC34VR500
1820 select FSL_DDR_INTERACTIVE if !SPL
1821 select GPIO_EXTRA_HEADER
1824 Support for Freescale LS1046ARDB platform.
1825 The LS1046A Reference Design Board (RDB) is a high-performance
1826 development platform that supports the QorIQ LS1046A
1827 Layerscape Architecture processor.
1829 config TARGET_LS1046AFRWY
1830 bool "Support ls1046afrwy"
1833 select ARMV8_MULTIENTRY
1834 select ARCH_SUPPORT_TFABOOT
1835 select BOARD_EARLY_INIT_F
1836 select BOARD_LATE_INIT
1837 select DM_SPI_FLASH if DM_SPI
1838 select GPIO_EXTRA_HEADER
1841 Support for Freescale LS1046AFRWY platform.
1842 The LS1046A Freeway Board (FRWY) is a high-performance
1843 development platform that supports the QorIQ LS1046A
1844 Layerscape Architecture processor.
1850 select ARMV8_MULTIENTRY
1866 select GPIO_EXTRA_HEADER
1867 select SPL_DM if SPL
1868 select SPL_DM_SPI if SPL
1869 select SPL_DM_SPI_FLASH if SPL
1870 select SPL_DM_I2C if SPL
1871 select SPL_DM_MMC if SPL
1872 select SPL_DM_SERIAL if SPL
1874 Support for Kontron SMARC-sAL28 board.
1877 bool "Support ten64"
1879 select ARCH_MISC_INIT
1881 select ARMV8_MULTIENTRY
1882 select ARCH_SUPPORT_TFABOOT
1883 select BOARD_LATE_INIT
1885 select FSL_DDR_INTERACTIVE if !SD_BOOT
1886 select GPIO_EXTRA_HEADER
1888 Support for Traverse Technologies Ten64 board, based
1891 config ARCH_UNIPHIER
1892 bool "Socionext UniPhier SoCs"
1893 select BOARD_LATE_INIT
1901 select OF_BOARD_SETUP
1905 select SPL_BOARD_INIT if SPL
1906 select SPL_DM if SPL
1907 select SPL_LIBCOMMON_SUPPORT if SPL
1908 select SPL_LIBGENERIC_SUPPORT if SPL
1909 select SPL_OF_CONTROL if SPL
1910 select SPL_PINCTRL if SPL
1913 imply DISTRO_DEFAULTS
1916 Support for UniPhier SoC family developed by Socionext Inc.
1917 (formerly, System LSI Business Division of Panasonic Corporation)
1919 config ARCH_SYNQUACER
1920 bool "Socionext SynQuacer SoCs"
1926 select SYSRESET_PSCI
1929 Support for SynQuacer SoC family developed by Socionext Inc.
1930 This SoC is used on 96boards EE DeveloperBox.
1933 bool "Support STMicroelectronics STM32 MCU with cortex M"
1940 bool "Support STMicroelectronics SoCs"
1949 Support for STMicroelectronics STiH407/10 SoC family.
1950 This SoC is used on Linaro 96Board STiH410-B2260
1953 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1954 select ARCH_MISC_INIT
1955 select ARCH_SUPPORT_TFABOOT
1956 select BOARD_LATE_INIT
1965 select OF_SYSTEM_SETUP
1970 select SYS_THUMB_BUILD if !ARM64
1974 imply OF_LIBFDT_OVERLAY
1975 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1979 Support for STM32MP SoC family developed by STMicroelectronics,
1980 MPUs based on ARM cortex A core
1981 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1982 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1984 SPL is the unsecure FSBL for the basic boot chain.
1986 config ARCH_ROCKCHIP
1987 bool "Support Rockchip SoCs"
1989 select BINMAN if SPL_OPTEE || SPL
1999 select DM_USB_GADGET if USB_DWC3_GADGET
2000 select ENABLE_ARM_SOC_BOOT0_HOOK
2004 select SPL_DM if SPL
2005 select SPL_DM_SPI if SPL
2006 select SPL_DM_SPI_FLASH if SPL
2008 select SYS_THUMB_BUILD if !ARM64
2011 imply DEBUG_UART_BOARD_INIT
2012 imply BOOTSTD_DEFAULTS
2014 imply SARADC_ROCKCHIP
2016 imply SPL_SYS_MALLOC_SIMPLE
2019 imply USB_FUNCTION_FASTBOOT
2021 config ARCH_OCTEONTX
2022 bool "Support OcteonTX SoCs"
2025 select GPIO_EXTRA_HEADER
2029 select BOARD_LATE_INIT
2030 select SYS_CACHE_SHIFT_7
2031 select SYS_PCI_64BIT if PCI
2032 imply OF_HAS_PRIOR_STAGE
2034 config ARCH_OCTEONTX2
2035 bool "Support OcteonTX2 SoCs"
2038 select GPIO_EXTRA_HEADER
2042 select BOARD_LATE_INIT
2043 select SYS_CACHE_SHIFT_7
2044 select SYS_PCI_64BIT if PCI
2045 imply OF_HAS_PRIOR_STAGE
2047 config TARGET_THUNDERX_88XX
2048 bool "Support ThunderX 88xx"
2050 select GPIO_EXTRA_HEADER
2053 select SYS_CACHE_SHIFT_7
2056 bool "Support Aspeed SoCs"
2061 config TARGET_DURIAN
2062 bool "Support Phytium Durian Platform"
2064 select GPIO_EXTRA_HEADER
2066 Support for durian platform.
2067 It has 2GB Sdram, uart and pcie.
2069 config TARGET_POMELO
2070 bool "Support Phytium Pomelo Platform"
2083 Support for pomelo platform.
2084 It has 8GB Sdram, uart and pcie.
2086 config TARGET_PE2201
2087 bool "Support Phytium PE2201 Platform"
2090 Support for pe2201 platform.It has 2GB Sdram, uart and pcie.
2092 config TARGET_PRESIDIO_ASIC
2093 bool "Support Cortina Presidio ASIC Platform"
2097 config TARGET_XENGUEST_ARM64
2098 bool "Xen guest ARM64"
2102 select LINUX_KERNEL_IMAGE_HEADER
2104 imply OF_HAS_PRIOR_STAGE
2107 bool "Support HPE GXP SoCs"
2114 config SUPPORT_PASSING_ATAGS
2115 bool "Support pre-devicetree ATAG-based booting"
2117 imply SETUP_MEMORY_TAGS
2119 Support for booting older Linux kernels, using ATAGs rather than
2120 passing a devicetree. This is option is rarely used, and the
2121 semantics are defined at
2122 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2124 config SETUP_MEMORY_TAGS
2125 bool "Pass memory size information via ATAG"
2126 depends on SUPPORT_PASSING_ATAGS
2129 bool "Pass Linux kernel cmdline via ATAG"
2130 depends on SUPPORT_PASSING_ATAGS
2133 bool "Pass initrd starting point and size via ATAG"
2134 depends on SUPPORT_PASSING_ATAGS
2137 bool "Pass system revision via ATAG"
2138 depends on SUPPORT_PASSING_ATAGS
2141 bool "Pass system serial number via ATAG"
2142 depends on SUPPORT_PASSING_ATAGS
2144 config STATIC_MACH_TYPE
2145 bool "Statically define the Machine ID number"
2146 default y if TARGET_DS109 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2148 When booting via ATAGs, enable this option if we know the correct
2149 machine ID number to use at compile time. Some systems will be
2150 passed the number dynamically by whatever loads U-Boot.
2153 int "Machine ID number"
2154 depends on STATIC_MACH_TYPE
2155 default 527 if TARGET_DS109
2156 default 3036 if TARGET_DS414
2157 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2159 When booting via ATAGs, the machine type must be passed as a number.
2160 For the full list see https://www.arm.linux.org.uk/developer/machines
2162 config ARCH_SUPPORT_TFABOOT
2166 bool "Support for booting from TF-A"
2167 depends on ARCH_SUPPORT_TFABOOT
2169 Some platforms support the setup of secure registers (for instance
2170 for CPU errata handling) or provide secure services like PSCI.
2171 Those services could also be provided by other firmware parts
2172 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2173 does not need to (and cannot) execute this code.
2174 Enabling this option will make a U-Boot binary that is relying
2175 on other firmware layers to provide secure functionality.
2177 config TI_SECURE_DEVICE
2178 bool "HS Device Type Support"
2179 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2181 If a high secure (HS) device type is being used, this config
2182 must be set. This option impacts various aspects of the
2183 build system (to create signed boot images that can be
2184 authenticated) and the code. See the doc/README.ti-secure
2185 file for further details.
2187 config SYS_KWD_CONFIG
2188 string "kwbimage config file path"
2189 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2190 default "arch/arm/mach-mvebu/kwbimage.cfg"
2192 Path within the source directory to the kwbimage.cfg file to use
2193 when packaging the U-Boot image for use.
2195 source "arch/arm/mach-apple/Kconfig"
2197 source "arch/arm/mach-aspeed/Kconfig"
2199 source "arch/arm/mach-at91/Kconfig"
2201 source "arch/arm/mach-bcm283x/Kconfig"
2203 source "arch/arm/mach-bcmbca/Kconfig"
2205 source "arch/arm/mach-bcmstb/Kconfig"
2207 source "arch/arm/mach-davinci/Kconfig"
2209 source "arch/arm/mach-exynos/Kconfig"
2211 source "arch/arm/mach-hpe/gxp/Kconfig"
2213 source "arch/arm/mach-highbank/Kconfig"
2215 source "arch/arm/mach-histb/Kconfig"
2217 source "arch/arm/mach-integrator/Kconfig"
2219 source "arch/arm/mach-ipq40xx/Kconfig"
2221 source "arch/arm/mach-k3/Kconfig"
2223 source "arch/arm/mach-keystone/Kconfig"
2225 source "arch/arm/mach-kirkwood/Kconfig"
2227 source "arch/arm/mach-lpc32xx/Kconfig"
2229 source "arch/arm/mach-mvebu/Kconfig"
2231 source "arch/arm/mach-octeontx/Kconfig"
2233 source "arch/arm/mach-octeontx2/Kconfig"
2235 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2237 source "arch/arm/mach-imx/mx3/Kconfig"
2239 source "arch/arm/mach-imx/mx5/Kconfig"
2241 source "arch/arm/mach-imx/mx6/Kconfig"
2243 source "arch/arm/mach-imx/mx7/Kconfig"
2245 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2247 source "arch/arm/mach-imx/imx8/Kconfig"
2249 source "arch/arm/mach-imx/imx8m/Kconfig"
2251 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2253 source "arch/arm/mach-imx/imx9/Kconfig"
2255 source "arch/arm/mach-imx/imxrt/Kconfig"
2257 source "arch/arm/mach-imx/mxs/Kconfig"
2259 source "arch/arm/mach-omap2/Kconfig"
2261 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2263 source "arch/arm/mach-orion5x/Kconfig"
2265 source "arch/arm/mach-owl/Kconfig"
2267 source "arch/arm/mach-rmobile/Kconfig"
2269 source "arch/arm/mach-meson/Kconfig"
2271 source "arch/arm/mach-mediatek/Kconfig"
2273 source "arch/arm/mach-qemu/Kconfig"
2275 source "arch/arm/mach-rockchip/Kconfig"
2277 source "arch/arm/mach-s5pc1xx/Kconfig"
2279 source "arch/arm/mach-snapdragon/Kconfig"
2281 source "arch/arm/mach-socfpga/Kconfig"
2283 source "arch/arm/mach-sti/Kconfig"
2285 source "arch/arm/mach-stm32/Kconfig"
2287 source "arch/arm/mach-stm32mp/Kconfig"
2289 source "arch/arm/mach-sunxi/Kconfig"
2291 source "arch/arm/mach-tegra/Kconfig"
2293 source "arch/arm/mach-u8500/Kconfig"
2295 source "arch/arm/mach-uniphier/Kconfig"
2297 source "arch/arm/cpu/armv7/vf610/Kconfig"
2299 source "arch/arm/mach-zynq/Kconfig"
2301 source "arch/arm/mach-zynqmp/Kconfig"
2303 source "arch/arm/mach-versal/Kconfig"
2305 source "arch/arm/mach-versal-net/Kconfig"
2307 source "arch/arm/mach-zynqmp-r5/Kconfig"
2309 source "arch/arm/cpu/armv7/Kconfig"
2311 source "arch/arm/cpu/armv8/Kconfig"
2313 source "arch/arm/mach-imx/Kconfig"
2315 source "arch/arm/mach-nexell/Kconfig"
2317 source "arch/arm/mach-npcm/Kconfig"
2319 source "board/armltd/total_compute/Kconfig"
2320 source "board/armltd/corstone1000/Kconfig"
2321 source "board/bosch/shc/Kconfig"
2322 source "board/bosch/guardian/Kconfig"
2323 source "board/Marvell/octeontx/Kconfig"
2324 source "board/Marvell/octeontx2/Kconfig"
2325 source "board/armltd/vexpress/Kconfig"
2326 source "board/armltd/vexpress64/Kconfig"
2327 source "board/cortina/presidio-asic/Kconfig"
2328 source "board/broadcom/bcmns/Kconfig"
2329 source "board/broadcom/bcmns3/Kconfig"
2330 source "board/cavium/thunderx/Kconfig"
2331 source "board/eets/pdu001/Kconfig"
2332 source "board/emulation/qemu-arm/Kconfig"
2333 source "board/freescale/ls2080aqds/Kconfig"
2334 source "board/freescale/ls2080ardb/Kconfig"
2335 source "board/freescale/ls1088a/Kconfig"
2336 source "board/freescale/ls1028a/Kconfig"
2337 source "board/freescale/ls1021aqds/Kconfig"
2338 source "board/freescale/ls1043aqds/Kconfig"
2339 source "board/freescale/ls1021atwr/Kconfig"
2340 source "board/freescale/ls1021atsn/Kconfig"
2341 source "board/freescale/ls1021aiot/Kconfig"
2342 source "board/freescale/ls1046aqds/Kconfig"
2343 source "board/freescale/ls1043ardb/Kconfig"
2344 source "board/freescale/ls1046ardb/Kconfig"
2345 source "board/freescale/ls1046afrwy/Kconfig"
2346 source "board/freescale/ls1012aqds/Kconfig"
2347 source "board/freescale/ls1012ardb/Kconfig"
2348 source "board/freescale/ls1012afrdm/Kconfig"
2349 source "board/freescale/lx2160a/Kconfig"
2350 source "board/grinn/chiliboard/Kconfig"
2351 source "board/hisilicon/hikey/Kconfig"
2352 source "board/hisilicon/hikey960/Kconfig"
2353 source "board/hisilicon/poplar/Kconfig"
2354 source "board/isee/igep003x/Kconfig"
2355 source "board/kontron/sl28/Kconfig"
2356 source "board/myir/mys_6ulx/Kconfig"
2357 source "board/samsung/common/Kconfig"
2358 source "board/siemens/common/Kconfig"
2359 source "board/seeed/npi_imx6ull/Kconfig"
2360 source "board/socionext/developerbox/Kconfig"
2361 source "board/st/stv0991/Kconfig"
2362 source "board/tcl/sl50/Kconfig"
2363 source "board/traverse/ten64/Kconfig"
2364 source "board/variscite/dart_6ul/Kconfig"
2365 source "board/vscom/baltos/Kconfig"
2366 source "board/phytium/durian/Kconfig"
2367 source "board/phytium/pomelo/Kconfig"
2368 source "board/phytium/pe2201/Kconfig"
2369 source "board/xen/xenguest_arm64/Kconfig"
2371 source "arch/arm/Kconfig.debug"