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Merge patch series "board: beagle: Enable 32k and debounce configuration and fixups"
[thirdparty/u-boot.git] / arch / arm / Kconfig
1 menu "ARM architecture"
2 depends on ARM
3
4 config SYS_ARCH
5 default "arm"
6
7 config ARM64
8 bool
9 select PHYS_64BIT
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
12
13 config ARM64_CRC32
14 bool "Enable support for CRC32 instruction"
15 depends on ARM64 && CC_IS_GCC
16 default y
17 help
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
21 newer.
22
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
31 default 0
32 help
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
39
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
43 help
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
50
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
53 depends on ARM64
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
56 help
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
62
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
66
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
69 depends on ARM64
70 depends on INIT_SP_RELATIVE
71 default 524288
72 help
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
77
78 config SPL_SYS_NO_VECTOR_TABLE
79 depends on SPL
80 bool
81
82 config SPL_USE_SEPARATE_FAULT_HANDLERS
83 bool "Use separate fault handlers instead of a single common one"
84 depends on !SPL_SYS_NO_VECTOR_TABLE && !ARM64 && !CPU_V7M
85 help
86 Instead of a common fault handler, generate a separate one for
87 undefined_instruction, software_interrupt, prefetch_abort etc.
88 This is for debugging purposes, when you want to set breakpoints
89 on them separately.
90
91 config LINUX_KERNEL_IMAGE_HEADER
92 depends on ARM64
93 bool
94 help
95 Place a Linux kernel image header at the start of the U-Boot binary.
96 The format of the header is described in the Linux kernel source at
97 Documentation/arm64/booting.txt. This feature is useful since the
98 image header reports the amount of memory (BSS and similar) that
99 U-Boot needs to use, but which isn't part of the binary.
100
101 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
102 depends on LINUX_KERNEL_IMAGE_HEADER
103 hex
104 help
105 The value subtracted from CONFIG_TEXT_BASE to calculate the
106 TEXT_OFFSET value written to the Linux kernel image header.
107
108 config GICV2
109 bool
110
111 config GICV3
112 bool
113
114 config GIC_V3_ITS
115 bool "ARM GICV3 ITS"
116 select IRQ
117 help
118 ARM GICV3 Interrupt translation service (ITS).
119 Basic support for programming locality specific peripheral
120 interrupts (LPI) configuration tables and enable LPI tables.
121 LPI configuration table can be used by u-boot or Linux.
122 ARM GICV3 has limitation, once the LPI table is enabled, LPI
123 configuration table can not be re-programmed, unless GICV3 reset.
124
125 config STATIC_RELA
126 bool
127 default y if ARM64
128
129 config DMA_ADDR_T_64BIT
130 bool
131 default y if ARM64
132
133 config HAS_VBAR
134 bool
135
136 config HAS_THUMB2
137 bool
138
139 config GPIO_EXTRA_HEADER
140 bool
141
142 # Used for compatibility with asm files copied from the kernel
143 config ARM_ASM_UNIFIED
144 bool
145 default y
146
147 # Used for compatibility with asm files copied from the kernel
148 config THUMB2_KERNEL
149 bool
150
151 config SYS_ICACHE_OFF
152 bool "Do not enable icache"
153 help
154 Do not enable instruction cache in U-Boot.
155
156 config SPL_SYS_ICACHE_OFF
157 bool "Do not enable icache in SPL"
158 depends on SPL
159 default SYS_ICACHE_OFF
160 help
161 Do not enable instruction cache in SPL.
162
163 config SYS_DCACHE_OFF
164 bool "Do not enable dcache"
165 help
166 Do not enable data cache in U-Boot.
167
168 config SPL_SYS_DCACHE_OFF
169 bool "Do not enable dcache in SPL"
170 depends on SPL
171 default SYS_DCACHE_OFF
172 help
173 Do not enable data cache in SPL.
174
175 config SYS_ARM_CACHE_CP15
176 bool "CP15 based cache enabling support"
177 help
178 Select this if your processor suports enabling caches by using
179 CP15 registers.
180
181 config SYS_ARM_MMU
182 bool "MMU-based Paged Memory Management Support"
183 select SYS_ARM_CACHE_CP15
184 help
185 Select if you want MMU-based virtualised addressing space
186 support via paged memory management.
187
188 config SYS_ARM_MPU
189 bool 'Use the ARM v7 PMSA Compliant MPU'
190 help
191 Some ARM systems without an MMU have instead a Memory Protection
192 Unit (MPU) that defines the type and permissions for regions of
193 memory.
194 If your CPU has an MPU then you should choose 'y' here unless you
195 know that you do not want to use the MPU.
196
197 # If set, the workarounds for these ARM errata are applied early during U-Boot
198 # startup. Note that in general these options force the workarounds to be
199 # applied; no CPU-type/version detection exists, unlike the similar options in
200 # the Linux kernel. Do not set these options unless they apply! Also note that
201 # the following can be machine-specific errata. These do have ability to
202 # provide rudimentary version and machine-specific checks, but expect no
203 # product checks:
204 # CONFIG_ARM_ERRATA_430973
205 # CONFIG_ARM_ERRATA_454179
206 # CONFIG_ARM_ERRATA_621766
207 # CONFIG_ARM_ERRATA_798870
208 # CONFIG_ARM_ERRATA_801819
209 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
210 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
211
212 config ARM_ERRATA_430973
213 bool
214
215 config ARM_ERRATA_454179
216 bool
217
218 config ARM_ERRATA_621766
219 bool
220
221 config ARM_ERRATA_716044
222 bool
223
224 config ARM_ERRATA_725233
225 bool
226
227 config ARM_ERRATA_742230
228 bool
229
230 config ARM_ERRATA_743622
231 bool
232
233 config ARM_ERRATA_751472
234 bool
235
236 config ARM_ERRATA_761320
237 bool
238
239 config ARM_ERRATA_773022
240 bool
241
242 config ARM_ERRATA_774769
243 bool
244
245 config ARM_ERRATA_794072
246 bool
247
248 config ARM_ERRATA_798870
249 bool
250
251 config ARM_ERRATA_801819
252 bool
253
254 config ARM_ERRATA_826974
255 bool
256
257 config ARM_ERRATA_828024
258 bool
259
260 config ARM_ERRATA_829520
261 bool
262
263 config ARM_ERRATA_833069
264 bool
265
266 config ARM_ERRATA_833471
267 bool
268
269 config ARM_ERRATA_845369
270 bool
271
272 config ARM_ERRATA_852421
273 bool
274
275 config ARM_ERRATA_852423
276 bool
277
278 config ARM_ERRATA_855873
279 bool
280
281 config ARM_CORTEX_A8_CVE_2017_5715
282 bool
283
284 config ARM_CORTEX_A15_CVE_2017_5715
285 bool
286
287 config CPU_ARM720T
288 bool
289 select SYS_CACHE_SHIFT_5
290 imply SYS_ARM_MMU
291
292 config CPU_ARM920T
293 bool
294 select SYS_CACHE_SHIFT_5
295 imply SYS_ARM_MMU
296
297 config CPU_ARM926EJS
298 bool
299 select SYS_CACHE_SHIFT_5
300 imply SYS_ARM_MMU
301 imply SPL_SEPARATE_BSS
302
303 config CPU_ARM946ES
304 bool
305 select SYS_CACHE_SHIFT_5
306 imply SYS_ARM_MMU
307
308 config CPU_ARM1136
309 bool
310 select SYS_CACHE_SHIFT_5
311 imply SYS_ARM_MMU
312 imply SPL_SEPARATE_BSS
313
314 config CPU_ARM1176
315 bool
316 select HAS_VBAR
317 select SYS_CACHE_SHIFT_5
318 imply SYS_ARM_MMU
319
320 config CPU_V7A
321 bool
322 select HAS_THUMB2
323 select HAS_VBAR
324 select SYS_CACHE_SHIFT_6
325 imply SYS_ARM_MMU
326
327 config CPU_V7M
328 bool
329 select HAS_THUMB2
330 select SYS_ARM_MPU
331 select SYS_CACHE_SHIFT_5
332 select SYS_THUMB_BUILD
333 select THUMB2_KERNEL
334
335 config CPU_V7R
336 bool
337 select HAS_THUMB2
338 select SYS_ARM_CACHE_CP15
339 select SYS_ARM_MPU
340 select SYS_CACHE_SHIFT_6
341
342 config SYS_CPU
343 default "arm720t" if CPU_ARM720T
344 default "arm920t" if CPU_ARM920T
345 default "arm926ejs" if CPU_ARM926EJS
346 default "arm946es" if CPU_ARM946ES
347 default "arm1136" if CPU_ARM1136
348 default "arm1176" if CPU_ARM1176
349 default "armv7" if CPU_V7A
350 default "armv7" if CPU_V7R
351 default "armv7m" if CPU_V7M
352 default "armv8" if ARM64
353
354 config SYS_ARM_ARCH
355 int
356 default 4 if CPU_ARM720T
357 default 4 if CPU_ARM920T
358 default 5 if CPU_ARM926EJS
359 default 5 if CPU_ARM946ES
360 default 6 if CPU_ARM1136
361 default 6 if CPU_ARM1176
362 default 7 if CPU_V7A
363 default 7 if CPU_V7M
364 default 7 if CPU_V7R
365 default 8 if ARM64
366
367 choice
368 prompt "Select the ARM data write cache policy"
369 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMNS || RZA1
370 default SYS_ARM_CACHE_WRITEBACK
371
372 config SYS_ARM_CACHE_WRITEBACK
373 bool "Write-back (WB)"
374 help
375 A write updates the cache only and marks the cache line as dirty.
376 External memory is updated only when the line is evicted or explicitly
377 cleaned.
378
379 config SYS_ARM_CACHE_WRITETHROUGH
380 bool "Write-through (WT)"
381 help
382 A write updates both the cache and the external memory system.
383 This does not mark the cache line as dirty.
384
385 config SYS_ARM_CACHE_WRITEALLOC
386 bool "Write allocation (WA)"
387 help
388 A cache line is allocated on a write miss. This means that executing a
389 store instruction on the processor might cause a burst read to occur.
390 There is a linefill to obtain the data for the cache line, before the
391 write is performed.
392 endchoice
393
394 config ARCH_VERY_EARLY_INIT
395 bool
396
397 config SPL_ARCH_VERY_EARLY_INIT
398 bool
399
400 config ARCH_CPU_INIT
401 bool "Enable ARCH_CPU_INIT"
402 help
403 Some architectures require a call to arch_cpu_init().
404 Say Y here to enable it
405
406 config SYS_ARCH_TIMER
407 bool "ARM Generic Timer support"
408 depends on CPU_V7A || ARM64
409 default y if ARM64
410 help
411 The ARM Generic Timer (aka arch-timer) provides an architected
412 interface to a timer source on an SoC.
413 It is mandatory for ARMv8 implementation and widely available
414 on ARMv7 systems.
415
416 config ARM_SMCCC
417 bool "Support for ARM SMC Calling Convention (SMCCC)"
418 depends on CPU_V7A || ARM64
419 select ARM_PSCI_FW
420 help
421 Say Y here if you want to enable ARM SMC Calling Convention.
422 This should be enabled if U-Boot needs to communicate with system
423 firmware (for example, PSCI) according to SMCCC.
424
425 config SYS_THUMB_BUILD
426 bool "Build U-Boot using the Thumb instruction set"
427 depends on !ARM64
428 help
429 Use this flag to build U-Boot using the Thumb instruction set for
430 ARM architectures. Thumb instruction set provides better code
431 density. For ARM architectures that support Thumb2 this flag will
432 result in Thumb2 code generated by GCC.
433
434 config SPL_SYS_THUMB_BUILD
435 bool "Build SPL using the Thumb instruction set"
436 default y if SYS_THUMB_BUILD
437 depends on !ARM64 && SPL
438 help
439 Use this flag to build SPL using the Thumb instruction set for
440 ARM architectures. Thumb instruction set provides better code
441 density. For ARM architectures that support Thumb2 this flag will
442 result in Thumb2 code generated by GCC.
443
444 config TPL_SYS_THUMB_BUILD
445 bool "Build TPL using the Thumb instruction set"
446 default y if SYS_THUMB_BUILD
447 depends on TPL && !ARM64
448 help
449 Use this flag to build TPL using the Thumb instruction set for
450 ARM architectures. Thumb instruction set provides better code
451 density. For ARM architectures that support Thumb2 this flag will
452 result in Thumb2 code generated by GCC.
453
454 config SYS_L2_PL310
455 bool "ARM PL310 L2 cache controller"
456 help
457 Enable support for ARM PL310 L2 cache controller in U-Boot
458
459 config SPL_SYS_L2_PL310
460 bool "ARM PL310 L2 cache controller in SPL"
461 help
462 Enable support for ARM PL310 L2 cache controller in SPL
463
464 config SYS_L2CACHE_OFF
465 bool "L2cache off"
466 help
467 If SoC does not support L2CACHE or one does not want to enable
468 L2CACHE, choose this option.
469
470 config ENABLE_ARM_SOC_BOOT0_HOOK
471 bool "prepare BOOT0 header"
472 help
473 If the SoC's BOOT0 requires a header area filled with (magic)
474 values, then choose this option, and create a file included as
475 <asm/arch/boot0.h> which contains the required assembler code.
476
477 config USE_ARCH_MEMCPY
478 bool "Use an assembly optimized implementation of memcpy"
479 default y if !ARM64
480 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
481 help
482 Enable the generation of an optimized version of memcpy.
483 Such an implementation may be faster under some conditions
484 but may increase the binary size.
485
486 config SPL_USE_ARCH_MEMCPY
487 bool "Use an assembly optimized implementation of memcpy for SPL"
488 default y if USE_ARCH_MEMCPY
489 depends on SPL
490 help
491 Enable the generation of an optimized version of memcpy.
492 Such an implementation may be faster under some conditions
493 but may increase the binary size.
494
495 config TPL_USE_ARCH_MEMCPY
496 bool "Use an assembly optimized implementation of memcpy for TPL"
497 default y if USE_ARCH_MEMCPY
498 depends on TPL
499 help
500 Enable the generation of an optimized version of memcpy.
501 Such an implementation may be faster under some conditions
502 but may increase the binary size.
503
504 config USE_ARCH_MEMMOVE
505 bool "Use an assembly optimized implementation of memmove" if !ARM64
506 default USE_ARCH_MEMCPY if ARM64
507 depends on ARM64
508 help
509 Enable the generation of an optimized version of memmove.
510 Such an implementation may be faster under some conditions
511 but may increase the binary size.
512
513 config SPL_USE_ARCH_MEMMOVE
514 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
515 default SPL_USE_ARCH_MEMCPY if ARM64
516 depends on SPL && ARM64
517 help
518 Enable the generation of an optimized version of memmove.
519 Such an implementation may be faster under some conditions
520 but may increase the binary size.
521
522 config TPL_USE_ARCH_MEMMOVE
523 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
524 default TPL_USE_ARCH_MEMCPY if ARM64
525 depends on TPL && ARM64
526 help
527 Enable the generation of an optimized version of memmove.
528 Such an implementation may be faster under some conditions
529 but may increase the binary size.
530
531 config USE_ARCH_MEMSET
532 bool "Use an assembly optimized implementation of memset"
533 default y if !ARM64
534 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
535 help
536 Enable the generation of an optimized version of memset.
537 Such an implementation may be faster under some conditions
538 but may increase the binary size.
539
540 config SPL_USE_ARCH_MEMSET
541 bool "Use an assembly optimized implementation of memset for SPL"
542 default y if USE_ARCH_MEMSET
543 depends on SPL
544 help
545 Enable the generation of an optimized version of memset.
546 Such an implementation may be faster under some conditions
547 but may increase the binary size.
548
549 config TPL_USE_ARCH_MEMSET
550 bool "Use an assembly optimized implementation of memset for TPL"
551 default y if USE_ARCH_MEMSET
552 depends on TPL
553 help
554 Enable the generation of an optimized version of memset.
555 Such an implementation may be faster under some conditions
556 but may increase the binary size.
557
558 config ARM64_SUPPORT_AARCH32
559 bool "ARM64 system support AArch32 execution state"
560 depends on ARM64
561 default y if !TARGET_THUNDERX_88XX
562 help
563 This ARM64 system supports AArch32 execution state.
564
565 config IPROC
566 bool
567
568 config S5P
569 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
570
571 choice
572 prompt "Target select"
573 default TARGET_HIKEY
574
575 config ARCH_AT91
576 bool "Atmel AT91"
577 select GPIO_EXTRA_HEADER
578 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
579 select SPL_SEPARATE_BSS if SPL
580 imply SYS_THUMB_BUILD
581
582 config ARCH_DAVINCI
583 bool "TI DaVinci"
584 select CPU_ARM926EJS
585 select GPIO_EXTRA_HEADER
586 select SPL_DM_SPI if SPL
587 imply CMD_SAVES
588 help
589 Support for TI's DaVinci platform.
590
591 config ARCH_HISTB
592 bool "Hisilicon HiSTB SoCs"
593 select DM
594 select DM_SERIAL
595 select OF_CONTROL
596 select PL01X_SERIAL
597 imply CMD_DM
598 help
599 Support for HiSTB SoCs.
600
601 config ARCH_KIRKWOOD
602 bool "Marvell Kirkwood"
603 select ARCH_MISC_INIT
604 select BOARD_EARLY_INIT_F
605 select CPU_ARM926EJS
606 select GPIO_EXTRA_HEADER
607 select TIMER
608
609 config ARCH_MVEBU
610 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
611 select ARCH_EARLY_INIT_R if ARM64
612 select DM
613 select DM_SERIAL
614 select DM_SPI
615 select DM_SPI_FLASH
616 select GPIO_EXTRA_HEADER
617 select MTD
618 select SPL_DM_SPI if SPL
619 select SPL_DM_SPI_FLASH if SPL
620 select SPL_TIMER if SPL
621 select TIMER if !ARM64
622 select OF_CONTROL
623 select OF_SEPARATE
624 select SPI
625 imply CMD_DM
626
627 config ARCH_ORION5X
628 bool "Marvell Orion"
629 select CPU_ARM926EJS
630 select GPIO_EXTRA_HEADER
631 select SPL_SEPARATE_BSS if SPL
632 select TIMER
633
634 config TARGET_STV0991
635 bool "Support stv0991"
636 select CPU_V7A
637 select DM
638 select DM_SERIAL
639 select DM_SPI
640 select DM_SPI_FLASH
641 select GPIO_EXTRA_HEADER
642 select PL01X_SERIAL
643 select MTD
644 select SPI
645 select SPI_FLASH
646 imply CMD_DM
647
648 config ARCH_BCM283X
649 bool "Broadcom BCM283X family"
650 select DM
651 select DM_GPIO
652 select DM_SERIAL
653 select GPIO_EXTRA_HEADER
654 select OF_CONTROL
655 select PL01X_SERIAL
656 select SERIAL_SEARCH_ALL
657 imply CMD_DM
658 imply FAT_WRITE
659
660 config ARCH_BCMSTB
661 bool "Broadcom BCM7XXX family"
662 select CPU_V7A
663 select DM
664 select GPIO_EXTRA_HEADER
665 select OF_CONTROL
666 imply CMD_DM
667 imply OF_HAS_PRIOR_STAGE
668 help
669 This enables support for Broadcom ARM-based set-top box
670 chipsets, including the 7445 family of chips.
671
672 config ARCH_BCMBCA
673 bool "Broadcom broadband chip family"
674 select DM
675 select OF_CONTROL
676 imply CMD_DM
677
678 config TARGET_VEXPRESS_CA9X4
679 bool "Support vexpress_ca9x4"
680 select CPU_V7A
681 select PL01X_SERIAL
682
683 config TARGET_BCMNS
684 bool "Support Broadcom Northstar"
685 select CPU_V7A
686 select DM
687 select DM_GPIO
688 select DM_SERIAL
689 select OF_CONTROL
690 select TIMER
691 select SYS_NS16550
692 select ARM_GLOBAL_TIMER
693 imply SYS_THUMB_BUILD
694 imply MTD_RAW_NAND
695 imply NAND_BRCMNAND
696 imply NAND_BRCMNAND_IPROC
697 help
698 Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit
699 ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094,
700 BCM5301x etc.
701
702 config TARGET_BCMNS3
703 bool "Support Broadcom NS3"
704 select ARM64
705 select BOARD_LATE_INIT
706 help
707 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
708 ARMv8 Cortex-A72 processors targeting a broad range of networking
709 applications.
710
711 config ARCH_EXYNOS
712 bool "Samsung EXYNOS"
713 select DM
714 select DM_GPIO
715 select DM_I2C
716 select DM_KEYBOARD
717 select DM_SERIAL
718 select DM_SPI
719 select DM_SPI_FLASH
720 select MTD
721 select SPI
722 select GPIO_EXTRA_HEADER
723 imply SYS_THUMB_BUILD
724 imply CMD_DM
725 imply FAT_WRITE
726
727 config ARCH_S5PC1XX
728 bool "Samsung S5PC1XX"
729 select CPU_V7A
730 select DM
731 select DM_GPIO
732 select DM_I2C
733 select DM_SERIAL
734 select GPIO_EXTRA_HEADER
735 imply CMD_DM
736
737 config ARCH_HIGHBANK
738 bool "Calxeda Highbank"
739 select CPU_V7A
740 select PL01X_SERIAL
741 select DM
742 select DM_SERIAL
743 select OF_CONTROL
744 select CLK
745 select CLK_CCF
746 select AHCI
747 select PHYS_64BIT
748 select TIMER
749 select SP804_TIMER
750 imply OF_HAS_PRIOR_STAGE
751
752 config ARCH_INTEGRATOR
753 bool "ARM Ltd. Integrator family"
754 select DM
755 select DM_SERIAL
756 select GPIO_EXTRA_HEADER
757 select PL01X_SERIAL
758 imply CMD_DM
759
760 config ARCH_IPQ40XX
761 bool "Qualcomm IPQ40xx SoCs"
762 select CPU_V7A
763 select DM
764 select DM_GPIO
765 select DM_SERIAL
766 select DM_RESET
767 select GPIO_EXTRA_HEADER
768 select MSM_SMEM
769 select PINCTRL
770 select CLK
771 select SMEM
772 select OF_CONTROL
773 select CLK_QCOM_IPQ4019
774 select PINCTRL_QCOM_IPQ4019
775 imply CMD_DM
776
777 config ARCH_KEYSTONE
778 bool "TI Keystone"
779 select CMD_DDR3
780 select CMD_POWEROFF
781 select CPU_V7A
782 select DDR_SPD
783 select SPL_BOARD_INIT if SPL
784 select SUPPORT_SPL
785 select SYS_ARCH_TIMER
786 select SYS_THUMB_BUILD
787 imply CMD_MTDPARTS
788 imply CMD_NFS
789 imply CMD_SAVES
790 imply DM_I2C
791 imply FIT
792 imply SOC_TI
793 imply TI_KEYSTONE_SERDES
794
795 config ARCH_K3
796 bool "Texas Instruments' K3 Architecture"
797 select SPL
798 select SUPPORT_SPL
799 select FIT
800 select REGEX
801 select FIT_SIGNATURE if ARM64
802 imply TI_SECURE_DEVICE
803
804 config ARCH_OMAP2PLUS
805 bool "TI OMAP2+"
806 select CPU_V7A
807 select GPIO_EXTRA_HEADER
808 select SPL_BOARD_INIT if SPL
809 select SPL_STACK_R if SPL
810 select SUPPORT_SPL
811 imply TI_SYSC if DM && OF_CONTROL
812 imply FIT
813 imply SPL_SEPARATE_BSS
814
815 config ARCH_MESON
816 bool "Amlogic Meson"
817 select GPIO_EXTRA_HEADER
818 imply DISTRO_DEFAULTS
819 imply DM_RNG
820 help
821 Support for the Meson SoC family developed by Amlogic Inc.,
822 targeted at media players and tablet computers. We currently
823 support the S905 (GXBaby) 64-bit SoC.
824
825 config ARCH_MEDIATEK
826 bool "MediaTek SoCs"
827 select DM
828 select GPIO_EXTRA_HEADER
829 select OF_CONTROL
830 select SPL_DM if SPL
831 select SPL_LIBCOMMON_SUPPORT if SPL
832 select SPL_LIBGENERIC_SUPPORT if SPL
833 select SPL_OF_CONTROL if SPL
834 select SUPPORT_SPL
835 help
836 Support for the MediaTek SoCs family developed by MediaTek Inc.
837 Please refer to doc/README.mediatek for more information.
838
839 config ARCH_LPC32XX
840 bool "NXP LPC32xx platform"
841 select CPU_ARM926EJS
842 select DM
843 select DM_GPIO
844 select DM_SERIAL
845 select GPIO_EXTRA_HEADER
846 select SPL_DM if SPL
847 select SUPPORT_SPL
848 imply CMD_DM
849
850 config ARCH_IMX8
851 bool "NXP i.MX8 platform"
852 select ARM64
853 select SYS_FSL_HAS_SEC
854 select SYS_FSL_SEC_COMPAT_4
855 select SYS_FSL_SEC_LE
856 select DM
857 select DM_EVENT
858 select GPIO_EXTRA_HEADER
859 select MACH_IMX
860 select OF_CONTROL
861 select ENABLE_ARM_SOC_BOOT0_HOOK
862
863 config ARCH_IMX8M
864 bool "NXP i.MX8M platform"
865 select ARM64
866 select GPIO_EXTRA_HEADER
867 select MACH_IMX
868 select SYS_FSL_HAS_SEC
869 select SYS_FSL_SEC_COMPAT_4
870 select SYS_FSL_SEC_LE
871 select SYS_I2C_MXC
872 select DM
873 select DM_EVENT if CLK
874 select SUPPORT_SPL
875 imply CMD_DM
876
877 config ARCH_IMX8ULP
878 bool "NXP i.MX8ULP platform"
879 select ARM64
880 select DM
881 select DM_EVENT
882 select MACH_IMX
883 select OF_CONTROL
884 select SUPPORT_SPL
885 select GPIO_EXTRA_HEADER
886 select MISC
887 select IMX_ELE
888 imply CMD_DM
889
890 config ARCH_IMX9
891 bool "NXP i.MX9 platform"
892 select ARM64
893 select DM
894 select DM_EVENT
895 select MACH_IMX
896 select SUPPORT_SPL
897 select GPIO_EXTRA_HEADER
898 select MISC
899 select IMX_ELE
900 imply CMD_DM
901
902 config ARCH_IMXRT
903 bool "NXP i.MXRT platform"
904 select CPU_V7M
905 select DM
906 select DM_SERIAL
907 select GPIO_EXTRA_HEADER
908 select MACH_IMX
909 select SUPPORT_SPL
910 imply CMD_DM
911
912 config ARCH_MX23
913 bool "NXP i.MX23 family"
914 select CPU_ARM926EJS
915 select GPIO_EXTRA_HEADER
916 select MACH_IMX
917 select SUPPORT_SPL
918
919 config ARCH_MX28
920 bool "NXP i.MX28 family"
921 select CPU_ARM926EJS
922 select GPIO_EXTRA_HEADER
923 select MACH_IMX
924 select SUPPORT_SPL
925
926 config ARCH_MX31
927 bool "NXP i.MX31 family"
928 select CPU_ARM1136
929 select GPIO_EXTRA_HEADER
930 select MACH_IMX
931
932 config ARCH_MX7ULP
933 bool "NXP MX7ULP"
934 select BOARD_POSTCLK_INIT
935 select CPU_V7A
936 select GPIO_EXTRA_HEADER
937 select MACH_IMX
938 select SYS_FSL_HAS_SEC
939 select SYS_FSL_SEC_COMPAT_4
940 select SYS_FSL_SEC_LE
941 select ROM_UNIFIED_SECTIONS
942 imply MXC_GPIO
943 imply SYS_THUMB_BUILD
944
945 config ARCH_MX7
946 bool "Freescale MX7"
947 select ARCH_MISC_INIT
948 select CPU_V7A
949 select GPIO_EXTRA_HEADER
950 select MACH_IMX
951 select MXC_GPT_HCLK
952 select SYS_FSL_HAS_SEC
953 select SYS_FSL_SEC_COMPAT_4
954 select SYS_FSL_SEC_LE
955 imply BOARD_EARLY_INIT_F
956 imply MXC_GPIO
957 imply SYS_THUMB_BUILD
958
959 config ARCH_MX6
960 bool "Freescale MX6"
961 select BOARD_POSTCLK_INIT
962 select CPU_V7A
963 select GPIO_EXTRA_HEADER
964 select MACH_IMX
965 select MXC_GPT_HCLK
966 select SYS_FSL_HAS_SEC
967 select SYS_FSL_SEC_COMPAT_4
968 select SYS_FSL_SEC_LE
969 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
970 imply MXC_GPIO
971 imply SYS_THUMB_BUILD
972 imply SPL_SEPARATE_BSS
973
974 config ARCH_MX5
975 bool "Freescale MX5"
976 select BOARD_EARLY_INIT_F
977 select CPU_V7A
978 select GPIO_EXTRA_HEADER
979 select MACH_IMX
980 imply MXC_GPIO
981
982 config ARCH_NEXELL
983 bool "Nexell S5P4418/S5P6818 SoC"
984 select ENABLE_ARM_SOC_BOOT0_HOOK
985 select DM
986 select GPIO_EXTRA_HEADER
987
988 config ARCH_NPCM
989 bool "Support Nuvoton SoCs"
990 select DM
991 select OF_CONTROL
992 imply CMD_DM
993
994 config ARCH_APPLE
995 bool "Apple SoCs"
996 select ARM64
997 select CLK
998 select CMD_PCI
999 select CMD_USB
1000 select DM
1001 select DM_GPIO
1002 select DM_KEYBOARD
1003 select DM_MAILBOX
1004 select DM_RESET
1005 select DM_SERIAL
1006 select DM_SPI
1007 select DM_USB
1008 select VIDEO
1009 select IOMMU
1010 select LINUX_KERNEL_IMAGE_HEADER
1011 select MTD
1012 select OF_BOARD_SETUP
1013 select OF_CONTROL
1014 select PCI
1015 select PHY
1016 select PINCTRL
1017 select POSITION_INDEPENDENT
1018 select POWER_DOMAIN
1019 select REGMAP
1020 select SPI
1021 select SYSCON
1022 select SYSRESET
1023 select SYSRESET_WATCHDOG
1024 select SYSRESET_WATCHDOG_AUTO
1025 select USB
1026 imply CMD_DM
1027 imply CMD_GPT
1028 imply DISTRO_DEFAULTS
1029 imply OF_HAS_PRIOR_STAGE
1030
1031 config ARCH_OWL
1032 bool "Actions Semi OWL SoCs"
1033 select DM
1034 select DM_SERIAL
1035 select GPIO_EXTRA_HEADER
1036 select OWL_SERIAL
1037 select CLK
1038 select CLK_OWL
1039 select OF_CONTROL
1040 select SYS_RELOC_GD_ENV_ADDR
1041 imply CMD_DM
1042
1043 config ARCH_QEMU
1044 bool "QEMU Virtual Platform"
1045 select DM
1046 select DM_SERIAL
1047 select OF_CONTROL
1048 select PL01X_SERIAL
1049 imply CMD_DM
1050 imply DM_RNG
1051 imply DM_RTC
1052 imply RTC_PL031
1053 imply OF_HAS_PRIOR_STAGE
1054 imply VIDEO
1055 imply VIDEO_BOCHS
1056 imply SYS_WHITE_ON_BLACK
1057 imply SYS_CONSOLE_IS_IN_ENV
1058 imply PRE_CONSOLE_BUFFER
1059 imply USB
1060 imply USB_XHCI_HCD
1061 imply USB_XHCI_PCI
1062 imply USB_KEYBOARD
1063 imply CMD_USB
1064
1065 config ARCH_RMOBILE
1066 bool "Renesas ARM SoCs"
1067 select DM
1068 select DM_SERIAL
1069 select GPIO_EXTRA_HEADER
1070 select LTO
1071 imply BOARD_EARLY_INIT_F
1072 imply CMD_DM
1073 imply FAT_WRITE
1074 imply SYS_THUMB_BUILD
1075 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1076
1077 config ARCH_SNAPDRAGON
1078 bool "Qualcomm Snapdragon SoCs"
1079 select ARM64
1080 select DM
1081 select DM_GPIO
1082 select DM_SERIAL
1083 select DM_RESET
1084 select GPIO_EXTRA_HEADER
1085 select MSM_SMEM
1086 select OF_CONTROL
1087 select OF_SEPARATE
1088 select SMEM
1089 select SPMI
1090 select BOARD_LATE_INIT
1091 select OF_BOARD
1092 select SAVE_PREV_BL_FDT_ADDR
1093 select LINUX_KERNEL_IMAGE_HEADER
1094 imply CMD_DM
1095
1096 config ARCH_SOCFPGA
1097 bool "Altera SOCFPGA family"
1098 select ARCH_EARLY_INIT_R
1099 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1100 select ARM64 if TARGET_SOCFPGA_SOC64
1101 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1102 select DM
1103 select DM_SERIAL
1104 select GICV2
1105 select GPIO_EXTRA_HEADER
1106 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1107 select OF_CONTROL
1108 select SPL_DM_RESET if DM_RESET
1109 select SPL_DM_SERIAL
1110 select SPL_LIBCOMMON_SUPPORT
1111 select SPL_LIBGENERIC_SUPPORT
1112 select SPL_OF_CONTROL
1113 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1114 select SPL_SERIAL
1115 select SPL_SYSRESET
1116 select SPL_WATCHDOG
1117 select SUPPORT_SPL
1118 select SYS_NS16550
1119 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1120 select SYSRESET
1121 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1122 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1123 imply CMD_DM
1124 imply CMD_MTDPARTS
1125 imply CRC32_VERIFY
1126 imply DM_SPI
1127 imply DM_SPI_FLASH
1128 imply FAT_WRITE
1129 imply MTD
1130 imply SPL
1131 imply SPL_DM
1132 imply SPL_DM_SPI
1133 imply SPL_DM_SPI_FLASH
1134 imply SPL_LIBDISK_SUPPORT
1135 imply SPL_MMC
1136 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1137 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1138 imply SPL_SPI_FLASH_SUPPORT
1139 imply SPL_SPI
1140 imply L2X0_CACHE
1141
1142 config ARCH_SUNXI
1143 bool "Support sunxi (Allwinner) SoCs"
1144 select BINMAN
1145 select CMD_GPIO
1146 select CMD_MMC if MMC
1147 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1148 select CLK
1149 select DM
1150 select DM_GPIO
1151 select DM_I2C if I2C
1152 select DM_SPI if SPI
1153 select DM_SPI_FLASH if SPI && MTD
1154 select DM_KEYBOARD
1155 select DM_MMC if MMC
1156 select DM_SERIAL
1157 select OF_BOARD_SETUP
1158 select OF_CONTROL
1159 select OF_SEPARATE
1160 select PINCTRL
1161 select SPECIFY_CONSOLE_INDEX
1162 select SPL_SEPARATE_BSS if SPL
1163 select SPL_STACK_R if SPL
1164 select SPL_SYS_MALLOC_SIMPLE if SPL
1165 select SPL_SYS_THUMB_BUILD if SPL && !ARM64
1166 select SUNXI_GPIO
1167 select SYS_NS16550
1168 select SYS_THUMB_BUILD if !ARM64
1169 select USB if DISTRO_DEFAULTS
1170 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1171 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1172 select SPL_USE_TINY_PRINTF if SPL
1173 select USE_PREBOOT
1174 select SYS_RELOC_GD_ENV_ADDR
1175 imply BOARD_LATE_INIT
1176 imply CMD_DM
1177 imply CMD_GPT
1178 imply CMD_UBI if MTD_RAW_NAND
1179 imply DISTRO_DEFAULTS
1180 imply DM_REGULATOR
1181 imply DM_REGULATOR_FIXED
1182 imply FAT_WRITE
1183 imply FIT
1184 imply OF_LIBFDT_OVERLAY
1185 imply PRE_CONSOLE_BUFFER
1186 imply SPL_GPIO
1187 imply SPL_LIBCOMMON_SUPPORT
1188 imply SPL_LIBGENERIC_SUPPORT
1189 imply SPL_MMC if MMC
1190 imply SPL_POWER
1191 imply SPL_SERIAL
1192 imply SYSRESET
1193 imply SYSRESET_WATCHDOG
1194 imply SYSRESET_WATCHDOG_AUTO
1195 imply USB_GADGET
1196 imply WDT
1197
1198 config ARCH_U8500
1199 bool "ST-Ericsson U8500 Series"
1200 select CPU_V7A
1201 select DM
1202 select DM_GPIO
1203 select DM_MMC if MMC
1204 select DM_SERIAL
1205 select DM_USB_GADGET if DM_USB
1206 select OF_CONTROL
1207 select SYSRESET
1208 select TIMER
1209 imply AB8500_USB_PHY
1210 imply ARM_PL180_MMCI
1211 imply CLK
1212 imply DM_PMIC
1213 imply DM_RTC
1214 imply NOMADIK_GPIO
1215 imply NOMADIK_MTU_TIMER
1216 imply PHY
1217 imply PL01X_SERIAL
1218 imply PMIC_AB8500
1219 imply RTC_PL031
1220 imply SYS_THUMB_BUILD
1221 imply SYSRESET_SYSCON
1222
1223 config ARCH_VERSAL
1224 bool "Support Xilinx Versal Platform"
1225 select ARM64
1226 select CLK
1227 select DM
1228 select DM_MMC if MMC
1229 select DM_SERIAL
1230 select GICV3
1231 select OF_CONTROL
1232 select SOC_DEVICE
1233 imply BOARD_LATE_INIT
1234 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1235
1236 config ARCH_VERSAL_NET
1237 bool "Support Xilinx Versal NET Platform"
1238 select ARM64
1239 select CLK
1240 select DM
1241 select DM_MMC if MMC
1242 select DM_SERIAL
1243 select OF_CONTROL
1244 imply BOARD_LATE_INIT
1245 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1246
1247 config ARCH_VF610
1248 bool "Freescale Vybrid"
1249 select CPU_V7A
1250 select GPIO_EXTRA_HEADER
1251 select IOMUX_SHARE_CONF_REG
1252 select MACH_IMX
1253 select SYS_FSL_ERRATUM_ESDHC111
1254 imply CMD_MTDPARTS
1255 imply MTD_RAW_NAND
1256
1257 config ARCH_ZYNQ
1258 bool "Xilinx Zynq based platform"
1259 select ARM_TWD_TIMER
1260 select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA)
1261 select CLK
1262 select CLK_ZYNQ
1263 select CPU_V7A
1264 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1265 select DM
1266 select DM_MMC if MMC
1267 select DM_SERIAL
1268 select DM_SPI
1269 select DM_SPI_FLASH
1270 select OF_CONTROL
1271 select MTD
1272 select SPI
1273 select SPL_BOARD_INIT if SPL
1274 select SPL_CLK if SPL
1275 select SPL_DM if SPL
1276 select SPL_DM_SPI if SPL
1277 select SPL_DM_SPI_FLASH if SPL
1278 select SPL_OF_CONTROL if SPL
1279 select SPL_SEPARATE_BSS if SPL
1280 select SPL_TIMER if SPL
1281 select SUPPORT_SPL
1282 select TIMER
1283 imply BOARD_LATE_INIT
1284 imply CMD_CLK
1285 imply CMD_DM
1286 imply CMD_SPL
1287 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1288 imply FAT_WRITE
1289
1290 config ARCH_ZYNQMP_R5
1291 bool "Xilinx ZynqMP R5 based platform"
1292 select CLK
1293 select CPU_V7R
1294 select DM
1295 select DM_MMC if MMC
1296 select DM_SERIAL
1297 select OF_CONTROL
1298 imply CMD_DM
1299 imply DM_USB_GADGET
1300
1301 config ARCH_ZYNQMP
1302 bool "Xilinx ZynqMP based platform"
1303 select ARM64
1304 select CLK
1305 select DM
1306 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1307 imply DM_MAILBOX
1308 select DM_MMC if MMC
1309 select DM_SERIAL
1310 select MTD
1311 select DM_SPI if SPI
1312 select DM_SPI_FLASH if DM_SPI
1313 imply FIRMWARE
1314 select GICV2
1315 select OF_CONTROL
1316 select SPL_BOARD_INIT if SPL
1317 select SPL_CLK if SPL
1318 select SPL_DM if SPL
1319 select SPL_DM_SPI if SPI && SPL_DM
1320 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1321 select SPL_DM_MAILBOX if SPL
1322 imply SPL_FIRMWARE if SPL
1323 select SPL_SEPARATE_BSS if SPL
1324 select SUPPORT_SPL
1325 imply ZYNQMP_IPI if DM_MAILBOX
1326 select SOC_DEVICE
1327 imply BOARD_LATE_INIT
1328 imply CMD_DM
1329 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1330 imply FAT_WRITE
1331 imply MP
1332 imply DM_USB_GADGET
1333 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1334
1335 config ARCH_TEGRA
1336 bool "NVIDIA Tegra"
1337 select GPIO_EXTRA_HEADER
1338 imply DISTRO_DEFAULTS
1339 imply FAT_WRITE
1340 imply SPL_TIMER if SPL
1341
1342 config ARCH_VEXPRESS64
1343 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1344 select ARM64
1345 select DM
1346 select DM_SERIAL
1347 select PL01X_SERIAL
1348 select OF_CONTROL
1349 select CLK
1350 select BLK
1351 select MTD_NOR_FLASH if MTD
1352 select FLASH_CFI_DRIVER if MTD
1353 select ENV_IS_IN_FLASH if MTD
1354 imply DISTRO_DEFAULTS
1355
1356 config TARGET_CORSTONE1000
1357 bool "Support Corstone1000 Platform"
1358 select ARM64
1359 select PL01X_SERIAL
1360 select DM
1361
1362 config TARGET_TOTAL_COMPUTE
1363 bool "Support Total Compute Platform"
1364 select ARM64
1365 select PL01X_SERIAL
1366 select DM
1367 select DM_SERIAL
1368 select DM_MMC
1369 select DM_GPIO
1370
1371 config TARGET_LS2080A_EMU
1372 bool "Support ls2080a_emu"
1373 select ARCH_LS2080A
1374 select ARM64
1375 select ARMV8_MULTIENTRY
1376 select FSL_DDR_SYNC_REFRESH
1377 select GPIO_EXTRA_HEADER
1378 help
1379 Support for Freescale LS2080A_EMU platform.
1380 The LS2080A Development System (EMULATOR) is a pre-silicon
1381 development platform that supports the QorIQ LS2080A
1382 Layerscape Architecture processor.
1383
1384 config TARGET_LS1088AQDS
1385 bool "Support ls1088aqds"
1386 select ARCH_LS1088A
1387 select ARM64
1388 select ARMV8_MULTIENTRY
1389 select ARCH_SUPPORT_TFABOOT
1390 select BOARD_LATE_INIT
1391 select GPIO_EXTRA_HEADER
1392 select SUPPORT_SPL
1393 select FSL_DDR_INTERACTIVE if !SD_BOOT
1394 help
1395 Support for NXP LS1088AQDS platform.
1396 The LS1088A Development System (QDS) is a high-performance
1397 development platform that supports the QorIQ LS1088A
1398 Layerscape Architecture processor.
1399
1400 config TARGET_LS2080AQDS
1401 bool "Support ls2080aqds"
1402 select ARCH_LS2080A
1403 select ARM64
1404 select ARMV8_MULTIENTRY
1405 select ARCH_SUPPORT_TFABOOT
1406 select BOARD_LATE_INIT
1407 select GPIO_EXTRA_HEADER
1408 select SUPPORT_SPL
1409 imply SCSI
1410 imply SCSI_AHCI
1411 select FSL_DDR_BIST
1412 select FSL_DDR_INTERACTIVE if !SPL
1413 help
1414 Support for Freescale LS2080AQDS platform.
1415 The LS2080A Development System (QDS) is a high-performance
1416 development platform that supports the QorIQ LS2080A
1417 Layerscape Architecture processor.
1418
1419 config TARGET_LS2080ARDB
1420 bool "Support ls2080ardb"
1421 select ARCH_LS2080A
1422 select ARM64
1423 select ARMV8_MULTIENTRY
1424 select ARCH_SUPPORT_TFABOOT
1425 select BOARD_LATE_INIT
1426 select SUPPORT_SPL
1427 select FSL_DDR_BIST
1428 select FSL_DDR_INTERACTIVE if !SPL
1429 select GPIO_EXTRA_HEADER
1430 imply SCSI
1431 imply SCSI_AHCI
1432 help
1433 Support for Freescale LS2080ARDB platform.
1434 The LS2080A Reference design board (RDB) is a high-performance
1435 development platform that supports the QorIQ LS2080A
1436 Layerscape Architecture processor.
1437
1438 config TARGET_LS2081ARDB
1439 bool "Support ls2081ardb"
1440 select ARCH_LS2080A
1441 select ARM64
1442 select ARMV8_MULTIENTRY
1443 select BOARD_LATE_INIT
1444 select GPIO_EXTRA_HEADER
1445 select SUPPORT_SPL
1446 help
1447 Support for Freescale LS2081ARDB platform.
1448 The LS2081A Reference design board (RDB) is a high-performance
1449 development platform that supports the QorIQ LS2081A/LS2041A
1450 Layerscape Architecture processor.
1451
1452 config TARGET_LX2160ARDB
1453 bool "Support lx2160ardb"
1454 select ARCH_LX2160A
1455 select ARM64
1456 select ARMV8_MULTIENTRY
1457 select ARCH_SUPPORT_TFABOOT
1458 select BOARD_LATE_INIT
1459 select GPIO_EXTRA_HEADER
1460 help
1461 Support for NXP LX2160ARDB platform.
1462 The lx2160ardb (LX2160A Reference design board (RDB)
1463 is a high-performance development platform that supports the
1464 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1465
1466 config TARGET_LX2160AQDS
1467 bool "Support lx2160aqds"
1468 select ARCH_LX2160A
1469 select ARM64
1470 select ARMV8_MULTIENTRY
1471 select ARCH_SUPPORT_TFABOOT
1472 select BOARD_LATE_INIT
1473 select GPIO_EXTRA_HEADER
1474 help
1475 Support for NXP LX2160AQDS platform.
1476 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1477 is a high-performance development platform that supports the
1478 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1479
1480 config TARGET_LX2162AQDS
1481 bool "Support lx2162aqds"
1482 select ARCH_LX2162A
1483 select ARCH_MISC_INIT
1484 select ARM64
1485 select ARMV8_MULTIENTRY
1486 select ARCH_SUPPORT_TFABOOT
1487 select BOARD_LATE_INIT
1488 select GPIO_EXTRA_HEADER
1489 help
1490 Support for NXP LX2162AQDS platform.
1491 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1492
1493 config TARGET_HIKEY
1494 bool "Support HiKey 96boards Consumer Edition Platform"
1495 select ARM64
1496 select DM
1497 select DM_GPIO
1498 select DM_SERIAL
1499 select GPIO_EXTRA_HEADER
1500 select OF_CONTROL
1501 select PL01X_SERIAL
1502 select SPECIFY_CONSOLE_INDEX
1503 imply CMD_DM
1504 help
1505 Support for HiKey 96boards platform. It features a HI6220
1506 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1507
1508 config TARGET_HIKEY960
1509 bool "Support HiKey960 96boards Consumer Edition Platform"
1510 select ARM64
1511 select DM
1512 select DM_SERIAL
1513 select GPIO_EXTRA_HEADER
1514 select OF_CONTROL
1515 select PL01X_SERIAL
1516 imply CMD_DM
1517 help
1518 Support for HiKey960 96boards platform. It features a HI3660
1519 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1520
1521 config TARGET_POPLAR
1522 bool "Support Poplar 96boards Enterprise Edition Platform"
1523 select ARM64
1524 select DM
1525 select DM_SERIAL
1526 select GPIO_EXTRA_HEADER
1527 select OF_CONTROL
1528 select PL01X_SERIAL
1529 imply CMD_DM
1530 help
1531 Support for Poplar 96boards EE platform. It features a HI3798cv200
1532 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1533 making it capable of running any commercial set-top solution based on
1534 Linux or Android.
1535
1536 config TARGET_LS1012AQDS
1537 bool "Support ls1012aqds"
1538 select ARCH_LS1012A
1539 select ARM64
1540 select ARCH_SUPPORT_TFABOOT
1541 select BOARD_LATE_INIT
1542 select GPIO_EXTRA_HEADER
1543 help
1544 Support for Freescale LS1012AQDS platform.
1545 The LS1012A Development System (QDS) is a high-performance
1546 development platform that supports the QorIQ LS1012A
1547 Layerscape Architecture processor.
1548
1549 config TARGET_LS1012ARDB
1550 bool "Support ls1012ardb"
1551 select ARCH_LS1012A
1552 select ARM64
1553 select ARCH_SUPPORT_TFABOOT
1554 select BOARD_LATE_INIT
1555 select GPIO_EXTRA_HEADER
1556 imply SCSI
1557 imply SCSI_AHCI
1558 help
1559 Support for Freescale LS1012ARDB platform.
1560 The LS1012A Reference design board (RDB) is a high-performance
1561 development platform that supports the QorIQ LS1012A
1562 Layerscape Architecture processor.
1563
1564 config TARGET_LS1012A2G5RDB
1565 bool "Support ls1012a2g5rdb"
1566 select ARCH_LS1012A
1567 select ARM64
1568 select ARCH_SUPPORT_TFABOOT
1569 select BOARD_LATE_INIT
1570 select GPIO_EXTRA_HEADER
1571 imply SCSI
1572 help
1573 Support for Freescale LS1012A2G5RDB platform.
1574 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1575 development platform that supports the QorIQ LS1012A
1576 Layerscape Architecture processor.
1577
1578 config TARGET_LS1012AFRWY
1579 bool "Support ls1012afrwy"
1580 select ARCH_LS1012A
1581 select ARM64
1582 select ARCH_SUPPORT_TFABOOT
1583 select BOARD_LATE_INIT
1584 select GPIO_EXTRA_HEADER
1585 imply SCSI
1586 imply SCSI_AHCI
1587 help
1588 Support for Freescale LS1012AFRWY platform.
1589 The LS1012A FRWY board (FRWY) is a high-performance
1590 development platform that supports the QorIQ LS1012A
1591 Layerscape Architecture processor.
1592
1593 config TARGET_LS1012AFRDM
1594 bool "Support ls1012afrdm"
1595 select ARCH_LS1012A
1596 select ARM64
1597 select ARCH_SUPPORT_TFABOOT
1598 select GPIO_EXTRA_HEADER
1599 help
1600 Support for Freescale LS1012AFRDM platform.
1601 The LS1012A Freedom board (FRDM) is a high-performance
1602 development platform that supports the QorIQ LS1012A
1603 Layerscape Architecture processor.
1604
1605 config TARGET_LS1028AQDS
1606 bool "Support ls1028aqds"
1607 select ARCH_LS1028A
1608 select ARM64
1609 select ARMV8_MULTIENTRY
1610 select ARCH_SUPPORT_TFABOOT
1611 select BOARD_LATE_INIT
1612 select GPIO_EXTRA_HEADER
1613 help
1614 Support for Freescale LS1028AQDS platform
1615 The LS1028A Development System (QDS) is a high-performance
1616 development platform that supports the QorIQ LS1028A
1617 Layerscape Architecture processor.
1618
1619 config TARGET_LS1028ARDB
1620 bool "Support ls1028ardb"
1621 select ARCH_LS1028A
1622 select ARM64
1623 select ARMV8_MULTIENTRY
1624 select ARCH_SUPPORT_TFABOOT
1625 select BOARD_LATE_INIT
1626 select GPIO_EXTRA_HEADER
1627 help
1628 Support for Freescale LS1028ARDB platform
1629 The LS1028A Development System (RDB) is a high-performance
1630 development platform that supports the QorIQ LS1028A
1631 Layerscape Architecture processor.
1632
1633 config TARGET_LS1088ARDB
1634 bool "Support ls1088ardb"
1635 select ARCH_LS1088A
1636 select ARM64
1637 select ARMV8_MULTIENTRY
1638 select ARCH_SUPPORT_TFABOOT
1639 select BOARD_LATE_INIT
1640 select SUPPORT_SPL
1641 select FSL_DDR_INTERACTIVE if !SD_BOOT
1642 select GPIO_EXTRA_HEADER
1643 help
1644 Support for NXP LS1088ARDB platform.
1645 The LS1088A Reference design board (RDB) is a high-performance
1646 development platform that supports the QorIQ LS1088A
1647 Layerscape Architecture processor.
1648
1649 config TARGET_LS1021AQDS
1650 bool "Support ls1021aqds"
1651 select ARCH_LS1021A
1652 select ARCH_SUPPORT_PSCI
1653 select BOARD_EARLY_INIT_F
1654 select BOARD_LATE_INIT
1655 select CPU_V7A
1656 select CPU_V7_HAS_NONSEC
1657 select CPU_V7_HAS_VIRT
1658 select LS1_DEEP_SLEEP
1659 select PEN_ADDR_BIG_ENDIAN
1660 select SUPPORT_SPL
1661 select SYS_FSL_DDR
1662 select FSL_DDR_INTERACTIVE
1663 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1664 select GPIO_EXTRA_HEADER
1665 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1666 imply SCSI
1667
1668 config TARGET_LS1021ATWR
1669 bool "Support ls1021atwr"
1670 select ARCH_LS1021A
1671 select ARCH_SUPPORT_PSCI
1672 select BOARD_EARLY_INIT_F
1673 select BOARD_LATE_INIT
1674 select CPU_V7A
1675 select CPU_V7_HAS_NONSEC
1676 select CPU_V7_HAS_VIRT
1677 select LS1_DEEP_SLEEP
1678 select PEN_ADDR_BIG_ENDIAN
1679 select SUPPORT_SPL
1680 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1681 select GPIO_EXTRA_HEADER
1682 imply SCSI
1683
1684 config TARGET_PG_WCOM_SELI8
1685 bool "Support Hitachi-Powergrids SELI8 service unit card"
1686 select ARCH_LS1021A
1687 select ARCH_SUPPORT_PSCI
1688 select BOARD_EARLY_INIT_F
1689 select BOARD_LATE_INIT
1690 select CPU_V7A
1691 select CPU_V7_HAS_NONSEC
1692 select CPU_V7_HAS_VIRT
1693 select SYS_FSL_DDR
1694 select FSL_DDR_INTERACTIVE
1695 select GPIO_EXTRA_HEADER
1696 select VENDOR_KM
1697 imply SCSI
1698 help
1699 Support for Hitachi-Powergrids SELI8 service unit card.
1700 SELI8 is a QorIQ LS1021a based service unit card used
1701 in XMC20 and FOX615 product families.
1702
1703 config TARGET_PG_WCOM_EXPU1
1704 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1705 select ARCH_LS1021A
1706 select ARCH_SUPPORT_PSCI
1707 select BOARD_EARLY_INIT_F
1708 select BOARD_LATE_INIT
1709 select CPU_V7A
1710 select CPU_V7_HAS_NONSEC
1711 select CPU_V7_HAS_VIRT
1712 select SYS_FSL_DDR
1713 select FSL_DDR_INTERACTIVE
1714 select VENDOR_KM
1715 imply SCSI
1716 help
1717 Support for Hitachi-Powergrids EXPU1 service unit card.
1718 EXPU1 is a QorIQ LS1021a based service unit card used
1719 in XMC20 and FOX615 product families.
1720
1721 config TARGET_LS1021ATSN
1722 bool "Support ls1021atsn"
1723 select ARCH_LS1021A
1724 select ARCH_SUPPORT_PSCI
1725 select BOARD_EARLY_INIT_F
1726 select BOARD_LATE_INIT
1727 select CPU_V7A
1728 select CPU_V7_HAS_NONSEC
1729 select CPU_V7_HAS_VIRT
1730 select LS1_DEEP_SLEEP
1731 select SUPPORT_SPL
1732 select GPIO_EXTRA_HEADER
1733 imply SCSI
1734
1735 config TARGET_LS1021AIOT
1736 bool "Support ls1021aiot"
1737 select ARCH_LS1021A
1738 select ARCH_SUPPORT_PSCI
1739 select BOARD_LATE_INIT
1740 select CPU_V7A
1741 select CPU_V7_HAS_NONSEC
1742 select CPU_V7_HAS_VIRT
1743 select PEN_ADDR_BIG_ENDIAN
1744 select SUPPORT_SPL
1745 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1746 select GPIO_EXTRA_HEADER
1747 imply SCSI
1748 help
1749 Support for Freescale LS1021AIOT platform.
1750 The LS1021A Freescale board (IOT) is a high-performance
1751 development platform that supports the QorIQ LS1021A
1752 Layerscape Architecture processor.
1753
1754 config TARGET_LS1043AQDS
1755 bool "Support ls1043aqds"
1756 select ARCH_LS1043A
1757 select ARM64
1758 select ARMV8_MULTIENTRY
1759 select ARCH_SUPPORT_TFABOOT
1760 select BOARD_EARLY_INIT_F
1761 select BOARD_LATE_INIT
1762 select SUPPORT_SPL
1763 select FSL_DDR_INTERACTIVE if !SPL
1764 select FSL_DSPI if !SPL_NO_DSPI
1765 select DM_SPI_FLASH if FSL_DSPI
1766 select GPIO_EXTRA_HEADER
1767 imply SCSI
1768 imply SCSI_AHCI
1769 help
1770 Support for Freescale LS1043AQDS platform.
1771
1772 config TARGET_LS1043ARDB
1773 bool "Support ls1043ardb"
1774 select ARCH_LS1043A
1775 select ARM64
1776 select ARMV8_MULTIENTRY
1777 select ARCH_SUPPORT_TFABOOT
1778 select BOARD_EARLY_INIT_F
1779 select BOARD_LATE_INIT
1780 select SUPPORT_SPL
1781 select FSL_DSPI if !SPL_NO_DSPI
1782 select DM_SPI_FLASH if FSL_DSPI
1783 select GPIO_EXTRA_HEADER
1784 help
1785 Support for Freescale LS1043ARDB platform.
1786
1787 config TARGET_LS1046AQDS
1788 bool "Support ls1046aqds"
1789 select ARCH_LS1046A
1790 select ARM64
1791 select ARMV8_MULTIENTRY
1792 select ARCH_SUPPORT_TFABOOT
1793 select BOARD_EARLY_INIT_F
1794 select BOARD_LATE_INIT
1795 select DM_SPI_FLASH if DM_SPI
1796 select SUPPORT_SPL
1797 select FSL_DDR_BIST if !SPL
1798 select FSL_DDR_INTERACTIVE if !SPL
1799 select FSL_DDR_INTERACTIVE if !SPL
1800 select GPIO_EXTRA_HEADER
1801 imply SCSI
1802 help
1803 Support for Freescale LS1046AQDS platform.
1804 The LS1046A Development System (QDS) is a high-performance
1805 development platform that supports the QorIQ LS1046A
1806 Layerscape Architecture processor.
1807
1808 config TARGET_LS1046ARDB
1809 bool "Support ls1046ardb"
1810 select ARCH_LS1046A
1811 select ARM64
1812 select ARMV8_MULTIENTRY
1813 select ARCH_SUPPORT_TFABOOT
1814 select BOARD_EARLY_INIT_F
1815 select BOARD_LATE_INIT
1816 select DM_SPI_FLASH if DM_SPI
1817 select POWER_MC34VR500
1818 select SUPPORT_SPL
1819 select FSL_DDR_BIST
1820 select FSL_DDR_INTERACTIVE if !SPL
1821 select GPIO_EXTRA_HEADER
1822 imply SCSI
1823 help
1824 Support for Freescale LS1046ARDB platform.
1825 The LS1046A Reference Design Board (RDB) is a high-performance
1826 development platform that supports the QorIQ LS1046A
1827 Layerscape Architecture processor.
1828
1829 config TARGET_LS1046AFRWY
1830 bool "Support ls1046afrwy"
1831 select ARCH_LS1046A
1832 select ARM64
1833 select ARMV8_MULTIENTRY
1834 select ARCH_SUPPORT_TFABOOT
1835 select BOARD_EARLY_INIT_F
1836 select BOARD_LATE_INIT
1837 select DM_SPI_FLASH if DM_SPI
1838 select GPIO_EXTRA_HEADER
1839 imply SCSI
1840 help
1841 Support for Freescale LS1046AFRWY platform.
1842 The LS1046A Freeway Board (FRWY) is a high-performance
1843 development platform that supports the QorIQ LS1046A
1844 Layerscape Architecture processor.
1845
1846 config TARGET_SL28
1847 bool "Support sl28"
1848 select ARCH_LS1028A
1849 select ARM64
1850 select ARMV8_MULTIENTRY
1851 select SUPPORT_SPL
1852 select BINMAN
1853 select DM
1854 select DM_GPIO
1855 select DM_I2C
1856 select DM_MMC
1857 select MTD
1858 select DM_SPI_FLASH
1859 select DM_MDIO
1860 select PCI
1861 select DM_RNG
1862 select DM_RTC
1863 select SCSI
1864 select DM_SERIAL
1865 select DM_SPI
1866 select GPIO_EXTRA_HEADER
1867 select SPL_DM if SPL
1868 select SPL_DM_SPI if SPL
1869 select SPL_DM_SPI_FLASH if SPL
1870 select SPL_DM_I2C if SPL
1871 select SPL_DM_MMC if SPL
1872 select SPL_DM_SERIAL if SPL
1873 help
1874 Support for Kontron SMARC-sAL28 board.
1875
1876 config TARGET_TEN64
1877 bool "Support ten64"
1878 select ARCH_LS1088A
1879 select ARCH_MISC_INIT
1880 select ARM64
1881 select ARMV8_MULTIENTRY
1882 select ARCH_SUPPORT_TFABOOT
1883 select BOARD_LATE_INIT
1884 select SUPPORT_SPL
1885 select FSL_DDR_INTERACTIVE if !SD_BOOT
1886 select GPIO_EXTRA_HEADER
1887 help
1888 Support for Traverse Technologies Ten64 board, based
1889 on NXP LS1088A.
1890
1891 config ARCH_UNIPHIER
1892 bool "Socionext UniPhier SoCs"
1893 select BOARD_LATE_INIT
1894 select DM
1895 select DM_GPIO
1896 select DM_I2C
1897 select DM_MMC
1898 select DM_MTD
1899 select DM_RESET
1900 select DM_SERIAL
1901 select OF_BOARD_SETUP
1902 select OF_CONTROL
1903 select OF_LIBFDT
1904 select PINCTRL
1905 select SPL_BOARD_INIT if SPL
1906 select SPL_DM if SPL
1907 select SPL_LIBCOMMON_SUPPORT if SPL
1908 select SPL_LIBGENERIC_SUPPORT if SPL
1909 select SPL_OF_CONTROL if SPL
1910 select SPL_PINCTRL if SPL
1911 select SUPPORT_SPL
1912 imply CMD_DM
1913 imply DISTRO_DEFAULTS
1914 imply FAT_WRITE
1915 help
1916 Support for UniPhier SoC family developed by Socionext Inc.
1917 (formerly, System LSI Business Division of Panasonic Corporation)
1918
1919 config ARCH_SYNQUACER
1920 bool "Socionext SynQuacer SoCs"
1921 select ARM64
1922 select DM
1923 select GIC_V3
1924 select PSCI_RESET
1925 select SYSRESET
1926 select SYSRESET_PSCI
1927 select OF_CONTROL
1928 help
1929 Support for SynQuacer SoC family developed by Socionext Inc.
1930 This SoC is used on 96boards EE DeveloperBox.
1931
1932 config ARCH_STM32
1933 bool "Support STMicroelectronics STM32 MCU with cortex M"
1934 select CPU_V7M
1935 select DM
1936 select DM_SERIAL
1937 imply CMD_DM
1938
1939 config ARCH_STI
1940 bool "Support STMicroelectronics SoCs"
1941 select BLK
1942 select CPU_V7A
1943 select DM
1944 select DM_MMC
1945 select DM_RESET
1946 select DM_SERIAL
1947 imply CMD_DM
1948 help
1949 Support for STMicroelectronics STiH407/10 SoC family.
1950 This SoC is used on Linaro 96Board STiH410-B2260
1951
1952 config ARCH_STM32MP
1953 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1954 select ARCH_MISC_INIT
1955 select ARCH_SUPPORT_TFABOOT
1956 select BOARD_LATE_INIT
1957 select CLK
1958 select DM
1959 select DM_GPIO
1960 select DM_RESET
1961 select DM_SERIAL
1962 select MISC
1963 select OF_CONTROL
1964 select OF_LIBFDT
1965 select OF_SYSTEM_SETUP
1966 select PINCTRL
1967 select REGMAP
1968 select SYSCON
1969 select SYSRESET
1970 select SYS_THUMB_BUILD if !ARM64
1971 imply SPL_SYSRESET
1972 imply CMD_DM
1973 imply CMD_POWEROFF
1974 imply OF_LIBFDT_OVERLAY
1975 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1976 imply USE_PREBOOT
1977 imply TIMESTAMP
1978 help
1979 Support for STM32MP SoC family developed by STMicroelectronics,
1980 MPUs based on ARM cortex A core
1981 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1982 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1983 chain.
1984 SPL is the unsecure FSBL for the basic boot chain.
1985
1986 config ARCH_ROCKCHIP
1987 bool "Support Rockchip SoCs"
1988 select BLK
1989 select BINMAN if SPL_OPTEE || SPL
1990 select DM
1991 select DM_GPIO
1992 select DM_I2C
1993 select DM_MMC
1994 select DM_PWM
1995 select DM_REGULATOR
1996 select DM_SERIAL
1997 select DM_SPI
1998 select DM_SPI_FLASH
1999 select DM_USB_GADGET if USB_DWC3_GADGET
2000 select ENABLE_ARM_SOC_BOOT0_HOOK
2001 select OF_CONTROL
2002 select MTD
2003 select SPI
2004 select SPL_DM if SPL
2005 select SPL_DM_SPI if SPL
2006 select SPL_DM_SPI_FLASH if SPL
2007 select SYS_MALLOC_F
2008 select SYS_THUMB_BUILD if !ARM64
2009 imply ADC
2010 imply CMD_DM
2011 imply DEBUG_UART_BOARD_INIT
2012 imply BOOTSTD_DEFAULTS
2013 imply FAT_WRITE
2014 imply SARADC_ROCKCHIP
2015 imply SPL_SYSRESET
2016 imply SPL_SYS_MALLOC_SIMPLE
2017 imply SYS_NS16550
2018 imply TPL_SYSRESET
2019 imply USB_FUNCTION_FASTBOOT
2020
2021 config ARCH_OCTEONTX
2022 bool "Support OcteonTX SoCs"
2023 select CLK
2024 select DM
2025 select GPIO_EXTRA_HEADER
2026 select ARM64
2027 select OF_CONTROL
2028 select OF_LIVE
2029 select BOARD_LATE_INIT
2030 select SYS_CACHE_SHIFT_7
2031 select SYS_PCI_64BIT if PCI
2032 imply OF_HAS_PRIOR_STAGE
2033
2034 config ARCH_OCTEONTX2
2035 bool "Support OcteonTX2 SoCs"
2036 select CLK
2037 select DM
2038 select GPIO_EXTRA_HEADER
2039 select ARM64
2040 select OF_CONTROL
2041 select OF_LIVE
2042 select BOARD_LATE_INIT
2043 select SYS_CACHE_SHIFT_7
2044 select SYS_PCI_64BIT if PCI
2045 imply OF_HAS_PRIOR_STAGE
2046
2047 config TARGET_THUNDERX_88XX
2048 bool "Support ThunderX 88xx"
2049 select ARM64
2050 select GPIO_EXTRA_HEADER
2051 select OF_CONTROL
2052 select PL01X_SERIAL
2053 select SYS_CACHE_SHIFT_7
2054
2055 config ARCH_ASPEED
2056 bool "Support Aspeed SoCs"
2057 select DM
2058 select OF_CONTROL
2059 imply CMD_DM
2060
2061 config TARGET_DURIAN
2062 bool "Support Phytium Durian Platform"
2063 select ARM64
2064 select GPIO_EXTRA_HEADER
2065 help
2066 Support for durian platform.
2067 It has 2GB Sdram, uart and pcie.
2068
2069 config TARGET_POMELO
2070 bool "Support Phytium Pomelo Platform"
2071 select ARM64
2072 select DM
2073 select AHCI
2074 select SCSI_AHCI
2075 select AHCI_PCI
2076 select BLK
2077 select PCI
2078 select DM_PCI
2079 select SCSI
2080 select DM_SERIAL
2081 imply CMD_PCI
2082 help
2083 Support for pomelo platform.
2084 It has 8GB Sdram, uart and pcie.
2085
2086 config TARGET_PE2201
2087 bool "Support Phytium PE2201 Platform"
2088 select ARM64
2089 help
2090 Support for pe2201 platform.It has 2GB Sdram, uart and pcie.
2091
2092 config TARGET_PRESIDIO_ASIC
2093 bool "Support Cortina Presidio ASIC Platform"
2094 select ARM64
2095 select GICV2
2096
2097 config TARGET_XENGUEST_ARM64
2098 bool "Xen guest ARM64"
2099 select ARM64
2100 select XEN
2101 select OF_CONTROL
2102 select LINUX_KERNEL_IMAGE_HEADER
2103 select XEN_SERIAL
2104 imply OF_HAS_PRIOR_STAGE
2105
2106 config ARCH_GXP
2107 bool "Support HPE GXP SoCs"
2108 select DM
2109 select OF_CONTROL
2110 imply CMD_DM
2111
2112 endchoice
2113
2114 config SUPPORT_PASSING_ATAGS
2115 bool "Support pre-devicetree ATAG-based booting"
2116 depends on !ARM64
2117 imply SETUP_MEMORY_TAGS
2118 help
2119 Support for booting older Linux kernels, using ATAGs rather than
2120 passing a devicetree. This is option is rarely used, and the
2121 semantics are defined at
2122 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2123
2124 config SETUP_MEMORY_TAGS
2125 bool "Pass memory size information via ATAG"
2126 depends on SUPPORT_PASSING_ATAGS
2127
2128 config CMDLINE_TAG
2129 bool "Pass Linux kernel cmdline via ATAG"
2130 depends on SUPPORT_PASSING_ATAGS
2131
2132 config INITRD_TAG
2133 bool "Pass initrd starting point and size via ATAG"
2134 depends on SUPPORT_PASSING_ATAGS
2135
2136 config REVISION_TAG
2137 bool "Pass system revision via ATAG"
2138 depends on SUPPORT_PASSING_ATAGS
2139
2140 config SERIAL_TAG
2141 bool "Pass system serial number via ATAG"
2142 depends on SUPPORT_PASSING_ATAGS
2143
2144 config STATIC_MACH_TYPE
2145 bool "Statically define the Machine ID number"
2146 default y if TARGET_DS109 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2147 help
2148 When booting via ATAGs, enable this option if we know the correct
2149 machine ID number to use at compile time. Some systems will be
2150 passed the number dynamically by whatever loads U-Boot.
2151
2152 config MACH_TYPE
2153 int "Machine ID number"
2154 depends on STATIC_MACH_TYPE
2155 default 527 if TARGET_DS109
2156 default 3036 if TARGET_DS414
2157 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2158 help
2159 When booting via ATAGs, the machine type must be passed as a number.
2160 For the full list see https://www.arm.linux.org.uk/developer/machines
2161
2162 config ARCH_SUPPORT_TFABOOT
2163 bool
2164
2165 config TFABOOT
2166 bool "Support for booting from TF-A"
2167 depends on ARCH_SUPPORT_TFABOOT
2168 help
2169 Some platforms support the setup of secure registers (for instance
2170 for CPU errata handling) or provide secure services like PSCI.
2171 Those services could also be provided by other firmware parts
2172 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2173 does not need to (and cannot) execute this code.
2174 Enabling this option will make a U-Boot binary that is relying
2175 on other firmware layers to provide secure functionality.
2176
2177 config TI_SECURE_DEVICE
2178 bool "HS Device Type Support"
2179 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2180 help
2181 If a high secure (HS) device type is being used, this config
2182 must be set. This option impacts various aspects of the
2183 build system (to create signed boot images that can be
2184 authenticated) and the code. See the doc/README.ti-secure
2185 file for further details.
2186
2187 config SYS_KWD_CONFIG
2188 string "kwbimage config file path"
2189 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2190 default "arch/arm/mach-mvebu/kwbimage.cfg"
2191 help
2192 Path within the source directory to the kwbimage.cfg file to use
2193 when packaging the U-Boot image for use.
2194
2195 source "arch/arm/mach-apple/Kconfig"
2196
2197 source "arch/arm/mach-aspeed/Kconfig"
2198
2199 source "arch/arm/mach-at91/Kconfig"
2200
2201 source "arch/arm/mach-bcm283x/Kconfig"
2202
2203 source "arch/arm/mach-bcmbca/Kconfig"
2204
2205 source "arch/arm/mach-bcmstb/Kconfig"
2206
2207 source "arch/arm/mach-davinci/Kconfig"
2208
2209 source "arch/arm/mach-exynos/Kconfig"
2210
2211 source "arch/arm/mach-hpe/gxp/Kconfig"
2212
2213 source "arch/arm/mach-highbank/Kconfig"
2214
2215 source "arch/arm/mach-histb/Kconfig"
2216
2217 source "arch/arm/mach-integrator/Kconfig"
2218
2219 source "arch/arm/mach-ipq40xx/Kconfig"
2220
2221 source "arch/arm/mach-k3/Kconfig"
2222
2223 source "arch/arm/mach-keystone/Kconfig"
2224
2225 source "arch/arm/mach-kirkwood/Kconfig"
2226
2227 source "arch/arm/mach-lpc32xx/Kconfig"
2228
2229 source "arch/arm/mach-mvebu/Kconfig"
2230
2231 source "arch/arm/mach-octeontx/Kconfig"
2232
2233 source "arch/arm/mach-octeontx2/Kconfig"
2234
2235 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2236
2237 source "arch/arm/mach-imx/mx3/Kconfig"
2238
2239 source "arch/arm/mach-imx/mx5/Kconfig"
2240
2241 source "arch/arm/mach-imx/mx6/Kconfig"
2242
2243 source "arch/arm/mach-imx/mx7/Kconfig"
2244
2245 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2246
2247 source "arch/arm/mach-imx/imx8/Kconfig"
2248
2249 source "arch/arm/mach-imx/imx8m/Kconfig"
2250
2251 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2252
2253 source "arch/arm/mach-imx/imx9/Kconfig"
2254
2255 source "arch/arm/mach-imx/imxrt/Kconfig"
2256
2257 source "arch/arm/mach-imx/mxs/Kconfig"
2258
2259 source "arch/arm/mach-omap2/Kconfig"
2260
2261 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2262
2263 source "arch/arm/mach-orion5x/Kconfig"
2264
2265 source "arch/arm/mach-owl/Kconfig"
2266
2267 source "arch/arm/mach-rmobile/Kconfig"
2268
2269 source "arch/arm/mach-meson/Kconfig"
2270
2271 source "arch/arm/mach-mediatek/Kconfig"
2272
2273 source "arch/arm/mach-qemu/Kconfig"
2274
2275 source "arch/arm/mach-rockchip/Kconfig"
2276
2277 source "arch/arm/mach-s5pc1xx/Kconfig"
2278
2279 source "arch/arm/mach-snapdragon/Kconfig"
2280
2281 source "arch/arm/mach-socfpga/Kconfig"
2282
2283 source "arch/arm/mach-sti/Kconfig"
2284
2285 source "arch/arm/mach-stm32/Kconfig"
2286
2287 source "arch/arm/mach-stm32mp/Kconfig"
2288
2289 source "arch/arm/mach-sunxi/Kconfig"
2290
2291 source "arch/arm/mach-tegra/Kconfig"
2292
2293 source "arch/arm/mach-u8500/Kconfig"
2294
2295 source "arch/arm/mach-uniphier/Kconfig"
2296
2297 source "arch/arm/cpu/armv7/vf610/Kconfig"
2298
2299 source "arch/arm/mach-zynq/Kconfig"
2300
2301 source "arch/arm/mach-zynqmp/Kconfig"
2302
2303 source "arch/arm/mach-versal/Kconfig"
2304
2305 source "arch/arm/mach-versal-net/Kconfig"
2306
2307 source "arch/arm/mach-zynqmp-r5/Kconfig"
2308
2309 source "arch/arm/cpu/armv7/Kconfig"
2310
2311 source "arch/arm/cpu/armv8/Kconfig"
2312
2313 source "arch/arm/mach-imx/Kconfig"
2314
2315 source "arch/arm/mach-nexell/Kconfig"
2316
2317 source "arch/arm/mach-npcm/Kconfig"
2318
2319 source "board/armltd/total_compute/Kconfig"
2320 source "board/armltd/corstone1000/Kconfig"
2321 source "board/bosch/shc/Kconfig"
2322 source "board/bosch/guardian/Kconfig"
2323 source "board/Marvell/octeontx/Kconfig"
2324 source "board/Marvell/octeontx2/Kconfig"
2325 source "board/armltd/vexpress/Kconfig"
2326 source "board/armltd/vexpress64/Kconfig"
2327 source "board/cortina/presidio-asic/Kconfig"
2328 source "board/broadcom/bcmns/Kconfig"
2329 source "board/broadcom/bcmns3/Kconfig"
2330 source "board/cavium/thunderx/Kconfig"
2331 source "board/eets/pdu001/Kconfig"
2332 source "board/emulation/qemu-arm/Kconfig"
2333 source "board/freescale/ls2080aqds/Kconfig"
2334 source "board/freescale/ls2080ardb/Kconfig"
2335 source "board/freescale/ls1088a/Kconfig"
2336 source "board/freescale/ls1028a/Kconfig"
2337 source "board/freescale/ls1021aqds/Kconfig"
2338 source "board/freescale/ls1043aqds/Kconfig"
2339 source "board/freescale/ls1021atwr/Kconfig"
2340 source "board/freescale/ls1021atsn/Kconfig"
2341 source "board/freescale/ls1021aiot/Kconfig"
2342 source "board/freescale/ls1046aqds/Kconfig"
2343 source "board/freescale/ls1043ardb/Kconfig"
2344 source "board/freescale/ls1046ardb/Kconfig"
2345 source "board/freescale/ls1046afrwy/Kconfig"
2346 source "board/freescale/ls1012aqds/Kconfig"
2347 source "board/freescale/ls1012ardb/Kconfig"
2348 source "board/freescale/ls1012afrdm/Kconfig"
2349 source "board/freescale/lx2160a/Kconfig"
2350 source "board/grinn/chiliboard/Kconfig"
2351 source "board/hisilicon/hikey/Kconfig"
2352 source "board/hisilicon/hikey960/Kconfig"
2353 source "board/hisilicon/poplar/Kconfig"
2354 source "board/isee/igep003x/Kconfig"
2355 source "board/kontron/sl28/Kconfig"
2356 source "board/myir/mys_6ulx/Kconfig"
2357 source "board/samsung/common/Kconfig"
2358 source "board/siemens/common/Kconfig"
2359 source "board/seeed/npi_imx6ull/Kconfig"
2360 source "board/socionext/developerbox/Kconfig"
2361 source "board/st/stv0991/Kconfig"
2362 source "board/tcl/sl50/Kconfig"
2363 source "board/traverse/ten64/Kconfig"
2364 source "board/variscite/dart_6ul/Kconfig"
2365 source "board/vscom/baltos/Kconfig"
2366 source "board/phytium/durian/Kconfig"
2367 source "board/phytium/pomelo/Kconfig"
2368 source "board/phytium/pe2201/Kconfig"
2369 source "board/xen/xenguest_arm64/Kconfig"
2370
2371 source "arch/arm/Kconfig.debug"
2372
2373 endmenu